JP5389989B2 - 集積されたパワー増幅器を有するcmosトランシーバ - Google Patents
集積されたパワー増幅器を有するcmosトランシーバ Download PDFInfo
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- JP5389989B2 JP5389989B2 JP2012152341A JP2012152341A JP5389989B2 JP 5389989 B2 JP5389989 B2 JP 5389989B2 JP 2012152341 A JP2012152341 A JP 2012152341A JP 2012152341 A JP2012152341 A JP 2012152341A JP 5389989 B2 JP5389989 B2 JP 5389989B2
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- integrated circuit
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Description
電圧は新型のCMOS装置の破壊電圧を超え、予測不能な性能または装置の損傷を生じさせる。
に配置され、第2のNMOSトランジスタは第2のトランスコンダクタンスおよびそれに関連する第2の破壊電圧とを有し、第2の絶縁体は第1の絶縁体よりも厚い。これにより第1のトランスコンダクタンスは第2のトランスコンダクタンスよりも大きく、第2の破壊電圧は第1の破壊電圧よりも大きい。
図1は絶縁破壊に耐えるトランジスタ構造10を示しており、これは以下さらに説明するように他のCMOS回路コンポーネントと共に集積されることを目的とするパワー増幅器の最終出力段で使用される。この出力段の基本的なトポロジは2つのNMOSトランジスタ12、14である。示されているように、電磁信号等、典型的には無線周波数信号、ここでは無線周波数入力信号RFINとして説明されている通信信号はトランジスタ12のゲートに入力され、トランジスタ14のゲートはパワー供給電圧VDDに接続されている。トランジスタ12はパワー増幅に必要なトランスコンダクタンスを与え、トランジスタ14はRFOUT ノードで生じる高い電圧スイングからトランジスタ12を保護する。トランジスタ14は1の電流利得を有するように接続されているので、トランジスタ12のトランスコンダクタンスをそれ程劣化せず、その破壊電圧を超過せずにRFout OUT の電圧振幅を2*VDDであるように許容できる。さらに、トランジスタ12と14間のソース−ドレイン接続点に現れる電圧はRFOUT 電圧の分割されたバージョンであり、このような過剰な電圧スイングはトランジスタ12の接合部に現れない。
Claims (32)
- 増幅された無線周波数信号を獲得するために基準DC電圧を有する回路で無線周波数信号を、関連する負荷を有する出力へ増幅する集積回路トランジスタ構造において、
接地電位に接続された第1のソースと、第1の絶縁体上に配置されて無線周波数信号を受信する第1のゲートとを有し、第1のトランスコンダクタンスおよびそれに関連する第1の破壊電圧を有している第1のNMOSトランジスタと、
第1のNMOSトランジスタの第1のドレインに接続された第2のソースと、基準DC電圧源に接続された第2のゲートと、増幅された無線信号の出力部を構成する第2のドレインと、基準DC電圧源と第2のNMOSトランジスタの第2のドレインとの間に配置された負荷とを有し、第2のゲートは第2の絶縁体上に配置されている第2のNMOSトランジスタであって、第2のトランスコンダクタンスおよびそれに関連する第2の破壊電圧を有している第2のNMOSトランジスタと、を具備しており、
増幅された無線信号の出力部は無線信号ボンドパッドを経て半導体チップパッケージ上の端子に接続され、無線信号ボンドパッドはそれに関連することができる複数の金属層の一部の金属層を含んでいる集積回路トランジスタ構造。 - 第2の破壊電圧は第1の破壊電圧よりも大きい請求項1記載の集積回路トランジスタ構造。
- 第2の絶縁体は第1の絶縁体と実質上同一の厚さである請求項1記載の集積回路トランジスタ構造。
- 集積回路トランジスタ構造は金属接地平面を含んでいる半導体チップパッケージ内に配置され、第1および第2の各NMOSトランジスタの各々は接地平面に電気的に接続されている部分を有している請求項1記載の集積回路トランジスタ構造。
- 接地平面に対する電気接続はボンドパッドによる電気接続を含んでいる請求項4記載の集積回路トランジスタ構造。
- 増幅された無線信号の出力部は集積回路のエッジの500μm以内に配置されている請求項4記載の集積回路トランジスタ構造。
- 無線信号ボンドパッドはその下に位置する基体中に拡散層を含んでいる請求項1記載の集積回路トランジスタ構造。
- 増幅された無線信号の出力部は5つの層を有することができる無線信号ボンドパッド上の下部の2つの電気層を通って接続されていない請求項1記載の集積回路トランジスタ構造。
- 基準DC電圧と、関連する負荷を有する出力との間に配置されたインダクタをさらに含み、基準DC電圧はVddであり、関連する負荷を有する出力は第2のNMOSトランジスタの第2の破壊電圧を超過せずに電圧振幅を約2Vddであるように許容できる請求項1記載の集積回路トランジスタ構造。
- インダクタはボンドワイヤインダクタである請求項9記載の集積回路トランジスタ構造。
- 集積回路上に他のCMOSトランシーバチップコンポーネントをさらに含んでいる請求項9記載の集積回路トランジスタ構造。
- 第1および第2のNMOSトランジスタは、集積回路に配置されている多段増幅器の最後の段を与える請求項9記載の集積回路トランジスタ構造。
- 集積回路上に他のCMOSトランシーバチップコンポーネントをさらに含んでいる請求項6記載の集積回路トランジスタ構造。
- 第1および第2のNMOSトランジスタは、集積回路に配置されている多段増幅器の最後の段を与える請求項13記載の集積回路トランジスタ構造。
- 集積回路上に他のCMOSトランシーバチップコンポーネントをさらに含んでいる請求項1記載の集積回路トランジスタ構造。
- 2つの回路から形成される差動トランジスタ構造をさらに含んでおり、各2つの回路は請求項1記載の集積回路トランジスタ構造を具備している請求項1記載の集積回路トランジスタ構造。
- 第1および第2のNMOSトランジスタは、集積回路に配置されている多段増幅器の最後の段を与える請求項1記載の集積回路トランジスタ構造。
- 増幅された無線周波数信号を獲得するために基準DC電圧を有する回路で無線周波数信号を、関連する負荷を有する出力へ増幅する集積回路トランジスタ構造において、
接地電位に接続された第1のソースと、第1の絶縁体上に配置されて無線周波数信号を受信する第1のゲートとを有し、第1のトランスコンダクタンスおよびそれに関連する第1の破壊電圧を有している第1のNMOSトランジスタと、
第1のNMOSトランジスタの第1のドレインに接続された第2のソースと、基準DC電圧源に接続された第2のゲートと、増幅された無線信号の出力部を構成する第2のドレインと、基準DC電圧源と第2のNMOSトランジスタの第2のドレインとの間に配置された負荷とを有し、第2のゲートは第2の絶縁体上に配置されている第2のNMOSトランジスタであって、第2のトランスコンダクタンスおよびそれに関連する第2の破壊電圧を有している第2のNMOSトランジスタと、
集積回路上の他のCMOSトランシーバチップコンポーネントと、を具備し、
増幅された無線信号の出力部は無線信号ボンドパッドを経て半導体チップパッケージ上の端子に接続され、無線信号ボンドパッドはそれに関連することができる複数の金属層の一部の金属層を含んでいる、集積回路トランジスタ構造。 - 第2の破壊電圧は第1の破壊電圧よりも大きい請求項18記載の集積回路トランジスタ構造。
- 第2の絶縁体は第1の絶縁体と実質上同一の厚さである請求項18記載の集積回路トランジスタ構造。
- 集積回路トランジスタ構造は金属接地平面を含んでいる半導体チップパッケージ内に配置され、第1および第2の各NMOSトランジスタは接地平面に電気的に接続されている部分を有している請求項18記載の集積回路トランジスタ構造。
- 接地平面に対する電気接続はボンドパッドによる電気接続を含んでいる請求項21記載の集積回路トランジスタ構造。
- 増幅された無線信号の出力部は集積回路のエッジの500μm以内に配置されている請求項21記載の集積回路トランジスタ構造。
- 無線信号ボンドパッドはその下に位置する基体中に拡散層を含んでいる請求項18記載の集積回路トランジスタ構造。
- 増幅された無線信号の出力部は5つの層を有することができる無線信号ボンドパッド上の下部の2つの電気層を通って接続されていない請求項18記載の集積回路トランジスタ構造。
- 基準DC電圧と、関連する負荷を有する出力との間に配置されたインダクタをさらに含み、基準DC電圧はVddであり、関連する負荷を有する出力は第2のNMOSトランジスタの第2の破壊電圧を超過せずに電圧振幅を約2Vddであるように許容できる請求項18記載の集積回路トランジスタ構造。
- インダクタはボンドワイヤインダクタである請求項26記載の集積回路トランジスタ構造。
- 第1および第2のNMOSトランジスタは、集積回路に配置されている多段増幅器の最後の段を与える請求項26記載の集積回路トランジスタ構造。
- 2つの回路から形成される差動トランジスタ構造をさらに含んでおり、各2つの回路は請求項18記載の集積回路トランジスタ構造を具備している請求項18記載の集積回路トランジスタ構造。
- 第1および第2のNMOSトランジスタは、集積回路に配置されている多段増幅器の最後の段を与える請求項18記載の集積回路トランジスタ構造。
- 第2の絶縁体は第1の絶縁体よりも厚く、それによって第1のトランスコンダクタンスは第2のトランスコンダクタンスよりも大きい、請求項1記載の集積回路トランジスタ構造。
- 第2の絶縁体は第1の絶縁体よりも厚く、それによって第1のトランスコンダクタンスは第2のトランスコンダクタンスよりも大きい、請求項18記載の集積回路トランジスタ構造。
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EP3051587A1 (en) | 2016-08-03 |
KR20080003938A (ko) | 2008-01-08 |
JP6046004B2 (ja) | 2016-12-14 |
JP2012239189A (ja) | 2012-12-06 |
WO2002023634A3 (en) | 2002-06-20 |
US6850117B2 (en) | 2005-02-01 |
TW503611B (en) | 2002-09-21 |
EP1317776B1 (en) | 2016-03-09 |
US6504433B1 (en) | 2003-01-07 |
US20030155976A1 (en) | 2003-08-21 |
JP2004509533A (ja) | 2004-03-25 |
KR20030082540A (ko) | 2003-10-22 |
EP1317776A2 (en) | 2003-06-11 |
KR100823241B1 (ko) | 2008-04-18 |
WO2002023634A9 (en) | 2003-04-03 |
JP2015201865A (ja) | 2015-11-12 |
JP2014030197A (ja) | 2014-02-13 |
US20020105380A1 (en) | 2002-08-08 |
EP3051587B1 (en) | 2018-12-12 |
AU2001290886A1 (en) | 2002-03-26 |
US6504431B2 (en) | 2003-01-07 |
WO2002023634A2 (en) | 2002-03-21 |
KR100829200B1 (ko) | 2008-05-13 |
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