JP5234521B2 - 電子部品及びその製造方法 - Google Patents
電子部品及びその製造方法 Download PDFInfo
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- JP5234521B2 JP5234521B2 JP2009192589A JP2009192589A JP5234521B2 JP 5234521 B2 JP5234521 B2 JP 5234521B2 JP 2009192589 A JP2009192589 A JP 2009192589A JP 2009192589 A JP2009192589 A JP 2009192589A JP 5234521 B2 JP5234521 B2 JP 5234521B2
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- 238000004519 manufacturing process Methods 0.000 title description 17
- 239000011241 protective layer Substances 0.000 claims description 133
- 239000010410 layer Substances 0.000 claims description 97
- 239000000758 substrate Substances 0.000 claims description 81
- 239000004020 conductor Substances 0.000 claims description 47
- 230000000149 penetrating effect Effects 0.000 claims description 3
- 239000003990 capacitor Substances 0.000 description 86
- 229910000679 solder Inorganic materials 0.000 description 38
- 238000000034 method Methods 0.000 description 24
- 229910052751 metal Inorganic materials 0.000 description 11
- 239000002184 metal Substances 0.000 description 11
- 238000007747 plating Methods 0.000 description 11
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- 230000015572 biosynthetic process Effects 0.000 description 8
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- 229910045601 alloy Inorganic materials 0.000 description 4
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- 229910052804 chromium Inorganic materials 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 238000007772 electroless plating Methods 0.000 description 4
- 239000010408 film Substances 0.000 description 4
- 239000012212 insulator Substances 0.000 description 4
- 150000002739 metals Chemical class 0.000 description 4
- 229910052750 molybdenum Inorganic materials 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- 229910052763 palladium Inorganic materials 0.000 description 4
- 229910052709 silver Inorganic materials 0.000 description 4
- 238000005476 soldering Methods 0.000 description 4
- 229910052715 tantalum Inorganic materials 0.000 description 4
- 229910052718 tin Inorganic materials 0.000 description 4
- 229910052721 tungsten Inorganic materials 0.000 description 4
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 239000002131 composite material Substances 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 229910052697 platinum Inorganic materials 0.000 description 3
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- 229910004541 SiN Inorganic materials 0.000 description 2
- 238000011156 evaluation Methods 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 229910002367 SrTiO Inorganic materials 0.000 description 1
- 229910010413 TiO 2 Inorganic materials 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
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- 239000002241 glass-ceramic Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
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Description
図1は、本発明による電子部品の好適な一実施形態であるコンデンサ1の構造を示す斜視図であり、図2は、図1に示すコンデンサ1の平面図である。図3は、図2のIII−III線に沿う断面図であり、図4は、図2のIV−IV線に沿う断面図であり、図5は図2のV−V線に沿う断面図である。
この基板2上に、フォトリソグラフィとめっきにより、下部電極3を形成する。より具体的には、例えば、まず、基板2面上に、シード層として膜厚0.01〜1μm程度の下地導体層3aを、スパッタリング又は無電解めっきにて形成する(図6(A))。次いで、下地導体層3a上にフォトレジストを成膜し、それをフォトリソグラフィによって、下部電極3に対応した選択めっき用のレジストマスクM1にパターニングする(図6(B))。
次に、下部電極3の上面端部及び側壁面、さらに、下部電極3の外方の基板2上面の一部を覆う誘電体層4を形成する。より具体的には、下部電極3及び露呈している基板2の部位上の全面に、スパッタリング等のPVD法、CVD法、ALD法、溶液法等により、厚さ0.01〜1μm程度の誘電体層4を形成する(図7(A))。そして、フォトレジストからなるレジストマスクM2を、誘電体層4上であり、かつ下部電極3の中央部を除く部位に成膜し(図7(B))、さらに、レジストマスクM2をエッチマスクとして、レジストマスクM2をエッチングにより除去し、これにより、誘電体層4の一部を除去して開口4aを形成するとともに、開口4aを有した誘電体層4を得る(図7(C))。
次に、図8に示す状態の誘電体層4の上面及び下部電極3が露呈している部分に、めっきやCVD法等により、第1電極用の導体層5を形成する。第1電極用の導体層5は、下部電極用の導体層3の実装エリアを超えないように、内方に形成する。より具体的には、例えば、まず、誘電体層4上に、シード層として膜厚0.01〜1μm程度の下地導体層5aを、スパッタリング又は無電解めっきにて形成する。次いで下地導体層5a上にレジストマスクM3を配置する(図8(A))。次いで、下部電極3上に形成され、かつ、レジストマスクM3に覆われていない下地導体層5aが露呈している部分に、選択的に電気(電解)めっきを施し、第1電極形成用の電気めっき導体層を所望の厚さとなるまで電着形成し、次いで、レジストマスクM3および電気めっき導体層外部の下地導体層を除去することにより、第1電極用の導体層5を得る(図8(B))。なお、図8(B)においては、この導体層5を第1電極5と同じ符合で示す。
次いで、第1電極5の端部、下部電極3上に形成された誘電体層4の上面、下部電極3の側壁面上に形成された誘電体層4、及び基板2上に形成された誘電体層4を覆うように、第1保護層6を形成するための、例えば未硬化状態の光硬化型樹脂を充填する(図9(A))。その後、第1保護層6を形成しない部位の上にメタルマスクM4を設置した状態で、フォトリソグラフィによるパターニングを行うことで、第1電極5の端部,下部電極3上に形成された誘電体層4の上面、下部電極3の側壁面上に形成された誘電体層4、及び基板2上に形成された誘電体層4を覆う第1保護層6を形成する(図9(B))。
次に、図10に示す状態の第1保護層6が形成された上面、及び第1電極5の上面に、めっきやCVD法等により、第2電極用の導体層7を形成する。より具体的には、まず第1保護層6上及び誘電体層4上に、シード層として膜厚0.01〜1μm程度の下地導体層7aを、スパッタリング又は無電解めっきにて形成する。次いで、下地導体層7a上にレジストマスクM5を配置する(図10(A))。次いで、レジストマスクM5に覆われていない下地導体層7aの上面に、それから、選択的に電気(電解)めっきを施し、第2電極形成用の電気めっき導体層を所望の厚さとなるまで電着形成し、次いで、レジストマスクM5および電気めっき導体層外部の下地導体層を除去することにより、第2電極用の導体層7、及び第2電極7と第1電極5とを接続するビア導体を得る(図10(B))。なお、図10(B)においては、この導体層7を第2電極7と同じ符合で示す。
次いで、第2電極7を覆う第2保護層8を形成する。より具体的には、平面視したときに第2保護層8の実装エリアを第1保護層6の実装エリアより内方に形成するために、例えば未硬化状態の光硬化型樹脂を、第2電極7の上面、第1保護層6の上面、及び誘電体層4の上面に充填する(図11(A))。次に、第2保護層8を形成しない部位の上にメタルマスクM6を設置した状態で、フォトリソグラフィによるパターニングを行うことで、第2電極7の全面、及び第2電極7より外方にある第1保護層6の上面に第2保護層用の樹脂層8aを形成する(図11(B))。このときフォトリソグラフィの露光量およびフォーカス等の条件を調整することによって、第2保護層用の樹脂層8aの片側側壁面8tを、その樹脂層8aの上面(パッド電極9側)から底面(第1保護層6側)にかけて、図示において逆テーパが形成されるように第2保護層を形成することができる。(図11(C))
次いで、第2保護層8,第2保護層8より外方に形成されている第1保護層6の上面、及び側壁面、並びに、第1保護層より外方に形成されている誘電体層4の上面を覆うように、パッド電極9を形成する。より具体的には、第2保護層8,第2保護層8より外方に形成されている第1保護層6の上面、及び側壁面、並びに、第1保護層より外方に形成されている誘電体層4の上面に、シード層として膜厚0.01〜1μm程度の下地導体層9gを、スパッタリング又は無電解めっきにて形成する。次いで、コンデンサ1をダイシングする際のマージンを確保するために、基板2の側端部であって、かつ第1保護層6の外方に形成される誘電体層4上に、レジストマスクM7を配置する(図12(A))。
図14は、本発明によるコンデンサ10の第2実施形態の構造を示す断面図である。コンデンサ10は、図示の如く、第2保護層8’が、その側壁面8t’に傾斜を有することなく形成され、パッド電極9c,9dが、第2保護層8’の側壁面8t’、第2保護層8’の外方にある第2電極7の上面及び側壁面、第2電極7の外方にある第1保護層6の上面及び側壁面、並びに第1保護層6の外方にある誘電体層4の上面を覆うように形成されたこと以外は、上述した第1実施形態のコンデンサ1と同様に構成されたものである。
図15は、本発明によるコンデンサ100の第3実施形態の構造を示す斜視図であり、図16は図15に示すコンデンサ100を平面視した平面図である。コンデンサ100は、図示の如く、パッド電極9e,9fのそれぞれが平面視したときにI(又はH)形状となるように形成されていること以外は、上述した第1実施形態のコンデンサ1と同様に構成されたものである。
Claims (7)
- 基板上に形成された回路素子と、
前記回路素子と接続する電極層と、
前記電極層を覆う保護層と、
前記保護層を貫通するビア導体を介して前記電極層と接続され、かつ、前記保護層の上部に設けられた端子電極と、を備え、
前記端子電極の一方端は前記保護層の側壁面上に位置していることを特徴とする電子部品。 - 前記端子電極は、前記保護層の上部から該保護層の側壁面に沿って延在しており、かつ、前記端子電極の一方端が、前記基板側の端部上面に当接するように形成されている、請求項1記載の電子部品。
- 前記端子電極は、前記保護層の上部から該保護層の側壁面、及び、前記基板側の端部上面に沿って延在している、請求項1記載の電子部品。
- 前記基板側の端部上面の一部が露出している、請求項2又は3記載の電子部品。
- 前記保護層は、前記基板上に形成される第1保護層と、前記第1保護層上に形成され、かつ、前記第1保護層の形成エリアより内方に形成される第2保護層と、を備える、請求項1乃至4のいずれか1項に記載の電子部品。
- 前記第2保護層は、該第2保護層における前記基板側の面の面積が、該第2保護層における前記端子電極側の面の面積よりも小さくされている、請求項5に記載の電子部品。
- 基板上に電極層を形成する工程と、
前記電極層を覆う保護層を形成する工程と、
前記保護層を貫通するビア導体を形成する工程と、
前記ビア導体を介して前記電極層と接続されるように、かつ、前記保護層上部から側壁面上に渡り端子電極を設ける工程と、
を含む電子部品の製造方法。
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