JP5174050B2 - Manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a method of manufacturing a semiconductor device in which a new structure is introduced to improve the reliability of a MOS transistor having a metal gate electrode that realizes high-speed operation.

  Over the past 30 years, an increase in the operation speed of a semiconductor integrated circuit has been realized due to a reduction in the element size of a semiconductor device. Up to now, the reduction in element dimensions such as the channel length of semiconductor devices has allowed the device to increase the current drive capability, that is, to increase the circuit speed, but the device dimensions have fallen into the sub-quarter micron region, and the circuit speed has been reduced. It is being determined by parasitic resistance and parasitic capacitance.

  In order to avoid these problems, salicide technology that self-aligns the gate, source, and drain regions of MOS devices, or the gate electrode is heavily doped to further reduce gate sheet resistance. In addition, polycide technology has been developed which has a laminated structure of polycrystalline silicon and metal silicide. Also in the wiring structure, copper wiring is being introduced to reduce resistance, and a low dielectric constant interlayer insulating film is being introduced to reduce load capacitance. However, in order to increase the speed of the next generation MOS device, the parasitic resistance must be further reduced. In recent years, MOS device structures using metal as a gate electrode have attracted attention as a solution to that end.

  However, the use of metal as the gate electrode material can achieve high speed, but there is a problem that reliability deteriorates, and this solution is strongly demanded.

A particularly serious problem is a decrease in breakdown voltage between the gate and the source or between the gate and the drain. When polycrystalline silicon is used as the gate electrode material, the gate electrode is formed by anisotropic etching, and then heat-treated in an oxidizing atmosphere (generally referred to as a reoxidation process) to round the gate electrode edge and concentrate the electric field at the edge In addition, by increasing the thickness of the silicon oxide film SiO ₂ (gate insulating film) at the edge of the gate electrode, the breakdown voltage between the gate and source and between the gate and drain can be reduced between the gate and substrate (channel). It was possible to make it larger. However, when metal is used for the gate electrode, a thin and high-quality insulating film cannot be formed.

  In order to solve the above-described problems of the conventional example, the present invention changes the metal gate electrode surface to a metal insulating film at a low temperature to improve the reliability of the device, that is, the circuit / system, and the manufacturing method thereof. The purpose is to provide.

The method of manufacturing a semiconductor device of the present invention is a method of manufacturing a semiconductor device in which a gate electrode of a MOS (Metal-Oxide-Semiconductor) device is formed of a metal. The surface of the metal to be a gate electrode is made of Ar / N ₂ . a step of covering with silicon using nitride or Ar / SiH ₄ in the metal Te, the metal, the nitride or by patterning the silicon have a step of forming a gate electrode, said silicon, polycrystalline Silicon, amorphous silicon, or doped silicon, which is converted into the metal silicide in a subsequent process .
The nitride is formed by nitriding the surface of the metal.
By doing so, oxidation of the gate metal surface can be prevented, and an increase in gate resistance and an increase in contact resistance with the wiring metal can be suppressed.

FIG. 4 is a manufacturing flow schematic diagram of the device of Example 1; It is a figure which shows a part of cluster tool used at the time of manufacture. Is a schematic view of a plasma apparatus used for reforming of ta ₂ O ₅ thin film. 1 is a diagram illustrating a cluster chamber of Example 1. FIG. FIG. 6 is a manufacturing flow schematic diagram of a device of Example 2.

  Embodiments of the present invention will be described below with reference to the drawings.

Example 1
FIG. 1 shows a schematic diagram of a manufacturing flow of the device of the present invention, and FIG. 2 shows a part of a cluster tool used for manufacturing. After element isolation by field oxide film 102 and room temperature wet cleaning using single wafer cleaning apparatus 202, the concentration of impurities such as moisture and hydrocarbons is 10pp.
The substrate is transferred to the loading chamber 203 of the cluster tool through the transfer path 201 in the dry air atmosphere below b. In this cluster tool, all the chambers are maintained at a pressure of several mTorr by flowing an appropriate amount of nitrogen, and the back diffusion of impurities from the gas exhaust system is always suppressed by flowing a small amount of gas. In the process chamber 204, the gate insulating film Ta
_{After 2} O ₅ is deposited by chemical vapor deposition (MOCVD) using an organic metal gas source, the Ta ₂ O ₅ thin film is modified in the process chamber 205 by Xe / He (20%) / O _2. (3%
) Carried out using a plasma.

Ta ₂ O ₅ was formed using Ta (OC ₂ H ₅ ) ₅ / O ₂ / Ar at a substrate temperature of 450 ° C. and a pressure of 1 Torr. However, the film forming conditions are not limited to this, and TaCl ₅ , Ta (N (CH ₃ ) ₂ ) ₅ , H ₃ Ta (C ₂ H ₅ ) ₂ or the like may be used as a Ta source gas. . Instead of Ta ₂ O ₅ , another insulating film such as SiO ₂ , Si ₃ N ₄ , TiO ₂ , BST [(Ba, Sr) TiO ₃ ], or a ferroelectric thin film such as PZT may be used. Needless to say. Furthermore, as the oxidizing species in the film formation, modification, although with _{O 2, H 2 O · H} 2 O / H 2 · N Similar results using _2-NO oxidizing species, such as ₂ to give Needless to say.

A schematic diagram of the plasma apparatus used for the modification of the Ta ₂ O ₅ thin film is shown in FIG. The plasma apparatus includes a vacuum vessel 301, a raw material gas inlet 302 necessary for generating plasma in the vessel, and a vacuum pump 303 for exhausting the raw material gas introduced into the vessel. Part of the wall portion is a dielectric plate 304 made of a material that can transmit microwaves with substantially no loss, and an antenna 305 that radiates microwaves is installed outside the container across the dielectric plate. ing. An electrode 306 for placing a substrate 308 to be processed is provided inside the container, and the microwave radiation surface of the antenna and the surface on which the substrate is subjected to plasma processing are opposed substantially in parallel. Are arranged. The electrode 306 is provided with a heating mechanism so that the substrate temperature can be raised during the process. A reflector 309 is provided for the purpose of preventing the microwave radiated from the antenna from propagating to the exhaust port side and generating plasma uniformly only on the substrate. Further, in order to make the introduction of the source gas uniform, the source gas of this apparatus is introduced into the process space through a large number of small holes through the shower plate 307. This source gas is exhausted from the plurality of vacuum pumps 303 to the outside. A relatively wide space is provided above each vacuum pump so as not to lower the conductance of the gas. As described above, when a plurality of vacuum pumps arranged at substantially equal intervals on the side of the substrate are exhausted, a gas flow on the substrate that is uniform in the rotation direction can be realized with almost no decrease in gas conductance.

In this example, a radial line slot antenna was used as the microwave antenna, and the substrate temperature was 500 ° C. The feature of this microwave plasma is that the electron temperature is as low as about 1 eV, and the energy of ions incident on the substrate can be controlled to 10 eV or less. Also, heavy Xe
By using ions, energy can be transmitted only to the vicinity of the surface without causing defects in the underlying Si substrate. Compared to the commonly used atomic radius of Ar of 1.88 Å, the atomic radius of Xe is as large as 2.17 、, and is difficult to be implanted into the substrate, so that energy can be efficiently transmitted only to the substrate surface. It is. The atomic amount of Ar and Xe are each 39.95,131.3, Xe is heavier than like Ar, there is also an effect that Dzu leprosy make energy and transfer efficiency is low defect momentum to the substrate surface, defects It is suitable when modifying a gate oxide film that is very sensitive to ion irradiation. MOCVD
When Ta ₂ O _{5 formed by the above method} is not modified, a leak current of about 10 ⁻⁶ A / cm ² flows, but Xe / He (20%) / O ₂ (3%) plasma is used. When the modification is performed, the leak current is ^reduced to 10 ^-9. Reduced to A / cm ² . This is due to the absence of oxygen vacancies in the film. The O / Ta ratio before reforming was 2.43, but O / T was improved by reforming.
The a ratio could be stoichiometric 2.50. This is because the oxygen radical generation rate is improved by adding He to the gas, and intermolecular collisions are effectively generated by adding high pressure ,
This is because oxygen radicals can be generated more efficiently and only the vicinity of the surface can be activated without damaging the substrate by low energy Xe ion irradiation.

  After forming the gate insulating film, the Ta thin film 104 used as the gate electrode in the process chamber 206 was formed by the sputtering method without being exposed to the atmosphere. Using a Xe plasma, the surface of the film was irradiated with Xe ions 25 times as much as the incidence of Ta atoms, and the ion irradiation energy was controlled to 40 eV, thereby forming a Ta film having a bcc structure. The specific resistance of the deposited bcc-Ta is 14 μΩcm, and can be obtained an order of magnitude smaller than β-Ta (specific resistance is about 160 μΩcm), and has a low sheet resistance of 0.7 / □ at 200 nm thickness. Realized.

After the gate electrode is deposited, in order to prevent oxidation of the metal surface, nitriding treatment of the Ta surface is performed in the process chamber 207 by microwave plasma using the radial line slot antenna shown in FIG. 3, and a TaN layer 105 having a thickness of 5 nm is formed. Formed. At this time, the gas used was Ar / N ₂ (5%). Thereafter, a SiO ₂ film 106 for masking was deposited and carried out of the cluster chamber.

A resist mask for the gate was formed by a lithography process, and a gate processing and a gate electrode sidewall re-oxidation process were performed in the cluster chamber shown in FIG. The substrate is loaded from the loading chamber 401, the mask SiO ₂ film 106 is anisotropically etched by C ₄ F ₈ ^/ CO / Ar / O ₂ plasma in the etching chamber 402, and then the resist ashing is performed in the process chamber 403 by Xe. / O ₂ plasma. Subsequently, anisotropic etching of the Ta thin film 104 was performed in the etching chamber 404 using SiCl ₄ plasma.

The re-oxidation process of the Ta gate electrode side wall, which is a feature of the present invention, was performed in the process chamber 405. The process apparatus used in this process is a microwave excited plasma apparatus using a radial line slot antenna similar to that shown in FIG. The processing conditions at that time are as follows: use gas Xe / He / O ₂ , gas pressure 500 mTorr, partial pressure ratio Xe: He: O ₂ = 68%: 30%: 2%, microwave power 1200 W, oxidation treatment time 15 The substrate was kept in an electrically floating state, and the temperature of the object to be processed was set to 450 ° C. However, the film forming conditions are not limited to this, and Ar may be used instead of Xe, but it is preferable to use Xe.

As in the case of Ta ₂ O ₅ reforming, oxygen radicals can be generated efficiently by adding He, and by using Xe plasma, no defects are introduced into the gate oxide film without causing defects on the gate electrode sidewalls. Ta ₂ O ₅ was formed and the gate edge portion was rounded to reduce the electric field concentration. By oxidizing the side wall of the gate electrode using gas plasma containing Xe, the breakdown voltage (voltage at a current density of 100 mA / cm ² ) between the gate and the source and between the gate and the drain is changed from 3V to 5V. I was able to.

Thereafter, the source / drain layers 108 and 109 and the sidewalls 110 were formed using a conventional process. When the Ta gate SiO ₂ gate insulating film has a history of 700 ° C. or more, the electrical oxide film thickness measured by the high frequency CV characteristic is 2 to 3 of the actual film thickness.
Doubled. From the viewpoint of leakage current, a history of 800 ° C. is allowed, but considering the long-term reliability and the like, the upper limit of the process temperature needs to be 700 ° C. In addition, in-plane uniformity for large-diameter wafers, reduction of process time, and in addition to process margin in mass production,
Considering process time, minimum reaction temperature, etc. in processes such as silicide formation, 60
It is more preferable to perform the process at 0 ° C. or lower.

The film forming conditions shown above are not limited to this, and other plasma sources and process conditions may be used as long as similar results can be obtained. The gate may be processed without depositing the mask SiO ₂ film 106. However, when the source / drain layer is formed by ion implantation, impurities are also implanted into the gate Ta film, and the gate electrode Therefore, it is preferable to use a mask SiO ₂ film. Without the SiO ₂ film mask, etching of the Ta film 104 by the resist mask, then, since the by performing resist ashing step and Ta reoxidation process simultaneously, Ta ₂ O ₅ and Ta gate electrode side wall The properties of the film are degraded compared to the process. Therefore, when performing ashing, it can be improved by setting the microwave power to 500 W, then setting the microwave power to 1200 W, and oxidizing the side walls of the Ta gate electrode. The breakdown voltage between the drains (voltage at a current density of 100 mA / cm ² ) was 4.7V.

(Example 2)
FIG. 5 shows another device manufacturing flow schematic diagram of the present invention. The difference from Example 1 is that the Ta ₂ O ₅ film is formed by direct oxidation of Ta, and the non-doped polycrystalline silicon 505 is formed to a thickness of 5 nm by plasma CVD (PECVD) after the gate Ta thin film is formed. The point is that the film is formed and then the SiO ₂ film 106 for mask is deposited.

The Ta ₂ O ₅ film was formed by first depositing Ta with a thickness of 6 nm and then directly oxidizing Ta using XeHe / O ₂ plasma. The process apparatus used in this process is a microwave excited plasma apparatus using a radial line slot antenna similar to that shown in FIG. The processing conditions at that time are as follows: use gas Xe / He / O ₂ , gas pressure 500 mTorr, partial pressure ratio Xe: He: O ₂ = 68%: 30%: 2%, microwave power 1200 W, oxidation treatment time 15 The substrate was kept in an electrically floating state, and the temperature of the object to be processed was set to 450 ° C. However, the film forming conditions are not limited to this, and Ar may be used instead of Xe, but it is preferable to use Xe.

The non-doped polycrystalline silicon was formed using Ar / SiH ₄ (1%) at a gas pressure of 100 mTorr and a substrate temperature of 300 ° C. Although polycrystalline silicon is used this time, amorphous silicon or doped silicon may be used. These silicon layers are used to prevent oxidation of the underlying gate metal. In the absence of this silicon layer or the TaN layer described in Example 1, there arises a problem that the contact resistance between the gate and the wiring metal increases. However, when there is no contact between the gate and the wiring metal, that is, when the present invention is applied to the floating gate, the silicon layer or the TaN layer may not be provided, but it is used to suppress an increase in gate resistance. Better.

The non-doped silicon layer becomes Ta ₅ Si ₃ or TaSi ₂ due to a silicide reaction with the underlying Ta during, for example, activation annealing of the source / drain regions, so that there is no problem of increasing the contact resistance with the wiring metal.

  ADVANTAGE OF THE INVENTION According to this invention, the metal gate electrode surface can be changed into a metal insulating film at low temperature, and the device structure which improves the reliability of a device, ie, a circuit and a system, and its manufacturing method can be provided.

102 field oxide film,
201 transport path,
202 single wafer cleaning device,
203 loading chamber,
204 process chamber,
205 process chamber,
301 vacuum vessel,
302 inlet,
303 vacuum pump,
304 dielectric plate,
305 antenna,
306 electrodes,
307 shower plate,
309 reflector,
401 loading chamber;
402 etching chamber,
403 process chamber,
404 etching chamber,
405 Process chamber.

Claims (2)

Semiconductor device that forms the gate electrode of MOS (Metal-Oxide-Semiconductor) device with metal
In the manufacturing method of the device,
Covering the surface of the metal to be a gate electrode with silicon using Ar / N ₂ or a metal nitride or Ar / SiH ₄ ;
A process for forming a gate electrode by patterning the metal and the nitride or silicon.
Have
The silicon, polycrystalline silicon, an amorphous silicon or doped silicon, a manufacturing method of a semi-conductor device you characterized in that it is converted into a silicide of the metal in a subsequent step. The method of manufacturing a semiconductor device according to claim 1, wherein the nitride is formed by nitriding a surface of the metal.

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