JP5144934B2 - サービス品質モデルを確立するための方法と装置 - Google Patents

サービス品質モデルを確立するための方法と装置 Download PDF

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JP5144934B2
JP5144934B2 JP2006538262A JP2006538262A JP5144934B2 JP 5144934 B2 JP5144934 B2 JP 5144934B2 JP 2006538262 A JP2006538262 A JP 2006538262A JP 2006538262 A JP2006538262 A JP 2006538262A JP 5144934 B2 JP5144934 B2 JP 5144934B2
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service
request
qos
model
arrival
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JP2007510229A5 (https=
JP2007510229A (ja
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ウェバー，ウォルフ−ディートリッヒ
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ソニックス・インコーポレーテッド
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q10/00—Administration; Management
    • G06Q10/06—Resources, workflows, human or project management; Enterprise or organisation planning; Enterprise or organisation modelling
    • G06Q10/063—Operations research, analysis or management
    • G06Q10/0639—Performance analysis of employees; Performance analysis of enterprise or organisation operations
    • G06Q10/06395—Quality analysis or management
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/24—Traffic characterised by specific attributes, e.g. priority or QoS
    • H04L47/2425—Traffic characterised by specific attributes, e.g. priority or QoS for supporting services specification, e.g. SLA
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/70—Admission control; Resource allocation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/70—Admission control; Resource allocation
    • H04L47/80—Actions related to the user profile or the type of traffic
    • H04L47/805—QOS or priority aware
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/70—Admission control; Resource allocation
    • H04L47/82—Miscellaneous aspects
    • H04L47/821—Prioritising resource allocation or reservation requests
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/70—Admission control; Resource allocation
    • H04L47/82—Miscellaneous aspects
    • H04L47/827—Aggregation of resource allocation or reservation requests

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  • Engineering & Computer Science (AREA)
  • Business, Economics & Management (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Human Resources & Organizations (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Educational Administration (AREA)
  • Development Economics (AREA)
  • Strategic Management (AREA)
  • General Engineering & Computer Science (AREA)
  • Economics (AREA)
  • Entrepreneurship & Innovation (AREA)
  • Tourism & Hospitality (AREA)
  • Quality & Reliability (AREA)
  • General Business, Economics & Management (AREA)
  • Operations Research (AREA)
  • Game Theory and Decision Science (AREA)
  • Marketing (AREA)
  • Software Systems (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Microcomputers (AREA)
JP2006538262A 2003-10-31 2004-10-27 サービス品質モデルを確立するための方法と装置 Expired - Lifetime JP5144934B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/698,905 US7665069B2 (en) 2003-10-31 2003-10-31 Method and apparatus for establishing a quality of service model
US10/698,905 2003-10-31
PCT/US2004/035863 WO2005045727A2 (en) 2003-10-31 2004-10-27 Scheduling memory access between a plurality of processors

Publications (3)

Publication Number Publication Date
JP2007510229A JP2007510229A (ja) 2007-04-19
JP2007510229A5 JP2007510229A5 (https=) 2007-12-13
JP5144934B2 true JP5144934B2 (ja) 2013-02-13

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Family Applications (1)

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JP2006538262A Expired - Lifetime JP5144934B2 (ja) 2003-10-31 2004-10-27 サービス品質モデルを確立するための方法と装置

Country Status (6)

Country Link
US (1) US7665069B2 (https=)
EP (1) EP1678620B1 (https=)
JP (1) JP5144934B2 (https=)
KR (1) KR101196048B1 (https=)
AT (1) ATE514132T1 (https=)
WO (1) WO2005045727A2 (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
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US8868397B2 (en) 2006-11-20 2014-10-21 Sonics, Inc. Transaction co-validation across abstraction layers
US9087036B1 (en) 2004-08-12 2015-07-21 Sonics, Inc. Methods and apparatuses for time annotated transaction level modeling

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9087036B1 (en) 2004-08-12 2015-07-21 Sonics, Inc. Methods and apparatuses for time annotated transaction level modeling
US8868397B2 (en) 2006-11-20 2014-10-21 Sonics, Inc. Transaction co-validation across abstraction layers

Also Published As

Publication number Publication date
WO2005045727A2 (en) 2005-05-19
JP2007510229A (ja) 2007-04-19
US20050096970A1 (en) 2005-05-05
KR101196048B1 (ko) 2012-11-02
EP1678620B1 (en) 2011-06-22
KR20060111544A (ko) 2006-10-27
ATE514132T1 (de) 2011-07-15
EP1678620A2 (en) 2006-07-12
US7665069B2 (en) 2010-02-16
WO2005045727A3 (en) 2005-10-06

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