JP5141406B2 - Evaluation method and manufacturing method of silicon epitaxial wafer - Google Patents

Description

  The present invention relates to a silicon epitaxial wafer evaluation method and manufacturing method.

A silicon epitaxial wafer is manufactured as follows, for example. That is, a silicon single crystal substrate is placed in a reaction vessel of a vapor phase growth apparatus, and the temperature in the reaction vessel is raised to 1100 ° C. to 1200 ° C. in a state where hydrogen gas is flowed (temperature raising step). When the temperature in the reaction vessel reaches 1100 ° C. or higher, a natural oxide film (SiO ₂ : Silicon Dioxide) formed on the substrate surface is removed.

In this state, a silicon source gas such as trichlorosilane (SiHCl ₃ : Trichlorosilane) or a dopant gas such as diborane (B ₂ H ₆ : Diborane) or phosphine (PH ₃ : Phosphine) is supplied into the reaction vessel together with hydrogen gas. In this way, a silicon single crystal thin film is vapor-phase grown on the main surface of the substrate (deposition process).

  After vapor-depositing the silicon single crystal thin film in this manner, the supply of the source gas and the dopant gas is stopped, and the temperature in the reaction vessel is lowered while maintaining the hydrogen atmosphere (cooling step).

  By the way, when Cu (copper) is deposited on the surface in the process of manufacturing the silicon epitaxial wafer as described above, the silicon compound produced by the deposition is removed by etching at the time of cleaning, and pits are formed on the surface of the silicon epitaxial wafer. There is a case. A semiconductor device manufactured using a silicon epitaxial wafer in which pits are formed in this manner tends to have a low breakdown voltage (Gate Oxide Integrity, hereinafter referred to as “GOI”) characteristic of its gate oxide film.

  Conventional methods for evaluating Cu in silicon single crystals include, for example, AAS (Atomic Absorption Spectroscopy), ICP-MS (Inductively Coupled Plasma-Mass Spectroscopy), TRXF (Inductively Coupled Plasma Mass Analysis), TRXF X-ray Fluorescence (total reflection fluorescent X-ray analysis) or the like may be used.

Moreover, in the cooling process for manufacturing the silicon epitaxial wafer described above, an evaluation method for detecting Cu contamination with high sensitivity by precipitating Cu on the wafer surface by switching the atmosphere gas from a hydrogen atmosphere to a nitrogen atmosphere at 400 ° C. or lower. Is disclosed (see Patent Document 1).
In addition, the silicon wafer is etched for 30 minutes or more using a treatment liquid whose ammonia concentration is higher than that of hydrogen peroxide, and the number of LPDs formed on the surface is examined to evaluate Cu contamination of the silicon wafer. The method of performing is disclosed (refer patent document 2).

Japanese Patent No. 3664101 Japanese Patent No. 3717691

  However, when measuring the amount of Cu contained in a silicon epitaxial wafer, the conventional evaluation method has a very small amount of Cu present in the wafer, so the sensitivity to analyze and evaluate Cu may not be sufficient. It was. For this reason, when a semiconductor device is manufactured using a silicon epitaxial wafer evaluated as good by a conventional analysis method, there is a problem that a device having low GOI characteristics may be manufactured.

  The present invention has been made in view of the above-described problems. An evaluation method for performing qualitative and quantitative analysis of Cu contained in a silicon epitaxial wafer with high sensitivity, and a silicon epitaxial wafer having excellent GOI characteristics are provided. An object is to provide a production method that can be obtained.

In order to achieve the above object, according to the present invention, in a silicon epitaxial wafer evaluation method for detecting Cu contamination of a silicon epitaxial wafer obtained by vapor-phase growth of a silicon single crystal thin film on a silicon single crystal substrate, at least the above-mentioned A step of pressing the pressing surface of the pressing object in parallel with the surface of the thin film of the wafer to deposit Cu on the surface of the wafer; and the surface of the thin film of the wafer with ammonia, hydrogen peroxide solution a step of washing with a cleaning solution consisting of, by the washing that provides an evaluation method of a silicon epitaxial wafer which comprises a step of measuring the number of pits generated in the surface of the thin film of the wafer.

  Thus, at least the step of pressing the pressing surface of the pressing object against the surface of the thin film of the wafer in parallel to deposit Cu on the surface of the wafer, and the surface of the thin film of the wafer Including a step of cleaning with a cleaning liquid composed of ammonia and hydrogen peroxide, and a step of measuring the number of pits generated on the surface of the thin film of the wafer by the cleaning. The portion where Cu contained inside the wafer is agglomerated and deposited on the wafer surface by pressing is selectively etched to form pits, and the number of pits can be measured in that state. Cu can be evaluated with high sensitivity.

At this time, as a means of applying parallel press pressing surface of the pressing material to the surface of the thin film of the wafer, Ru can be used epi spike crash apparatus for removing protrusions on the surface of the thin film.

  As described above, if an epi spike crusher for removing protrusions on the surface of the thin film is used as means for pressing the pressing surface of the pressing object in parallel with the surface of the thin film of the wafer, a wafer for evaluation is obtained. Without using the product itself, it is possible to remove the protrusions on the surface of the thin film and to press the pressing surface of the pressing object in parallel to the surface of the thin film. As a result, after the wafer is evaluated by the evaluation method of the present invention, the wafer can be sent to the next process as it is. Therefore, the manufacturing cost can be reduced and the product yield can be improved.

At this time, the ammonia, as a cleaning solution consisting of hydrogen peroxide, Ru can be used SC-1 cleaning solution.
As described above, when the SC-1 cleaning liquid is used as the cleaning liquid composed of ammonia and hydrogen peroxide, the wafer can be cleaned without using any special cleaning equipment. In addition, the wafer can be cleaned using the product itself without using the evaluation wafer. As a result, after the wafer is evaluated by the evaluation method of the present invention, the wafer can be sent to the next process as it is. Therefore, the manufacturing cost can be reduced and the product yield can be improved.

The present invention also relates to a method for producing a silicon epitaxial wafer in which a silicon single crystal thin film is vapor-grown on a silicon single crystal substrate, and at least after the silicon single crystal thin film is vapor-grown, the silicon epitaxial according to the present invention is produced. A method for producing a silicon epitaxial wafer, comprising a step of measuring the number of pits on the surface of the wafer by using a wafer evaluation method, and selecting one having a measured number of pits equal to or less than a predetermined number. you provide.

  Thus, at least after vapor-depositing the silicon single crystal thin film, using the silicon epitaxial wafer evaluation method according to the present invention, the number of pits on the surface of the wafer is measured, and the measured number of pits is Including the step of selecting the number less than the predetermined number, it is possible to select and remove silicon epitaxial wafers that have a large Cu content and a large number of pits on the surface and have poor GOI characteristics, and have good GOI characteristics. It can be set as the manufacturing method which can select a wafer.

At this time, the number of pits the measured Ru can be selected those of 50 pieces / sheets or less.
Thus, if the measured number of pits is selected to be 50 or less, it is possible to obtain a manufacturing method that makes it possible to select a silicon wafer having better GOI characteristics.

  In the present invention, in the method for evaluating a silicon epitaxial wafer, at least a step of pressing a pressing surface of a pressing object parallel to the surface of the thin film of the wafer, and depositing Cu on the surface of the wafer; The method includes a step of cleaning the surface of the thin film of the wafer with a cleaning solution comprising ammonia and hydrogen peroxide, and a step of measuring the number of pits generated on the surface of the thin film of the wafer by the cleaning. The part where Cu contained in the wafer aggregates and deposits on the wafer surface by pressing the pressing surface of the object in parallel is selectively etched to form pits, and the number of pits is measured in that state. Therefore, Cu contained in the wafer can be evaluated with high sensitivity.

  Further, the method for producing a silicon epitaxial wafer according to the present invention includes a step of measuring the number of pits on the surface of the wafer by the evaluation method according to the present invention, and selecting those having the measured number of pits equal to or less than a predetermined number. Therefore, it is a manufacturing method that makes it possible to select a wafer having good GOI characteristics.

Hereinafter, although an embodiment is described about the present invention, the present invention is not limited to this.
When evaluating the amount of Cu contained in a silicon epitaxial wafer by a conventional evaluation method, there is a case where the sensitivity is not sufficient to detect a very small amount of Cu present in the wafer and the evaluation cannot be performed with high accuracy.
For this reason, when a semiconductor device is manufactured using a silicon epitaxial wafer evaluated as good by a conventional analysis method, there is a problem that a device having low GOI characteristics may be manufactured.

  Therefore, the present inventor conducted intensive studies and experiments to solve such problems. As a result, after cooling a silicon epitaxial wafer obtained by vapor-phase growth of a silicon single crystal thin film on a silicon single crystal substrate, the pressing surface of the pressed article is pressed in parallel against the surface of the silicon single crystal thin film of the wafer. It was found that Cu contained in the wafer can be collected and deposited on the surface. Then, by measuring the number of pits generated by cleaning the thin film surface of the wafer with a cleaning solution consisting of ammonia and hydrogen peroxide solution, it was conceived that Cu contained in the wafer could be qualitatively and quantitatively analyzed with high sensitivity. Completed the invention.

FIG. 1 shows a flow chart of a silicon epitaxial wafer evaluation method according to the present invention. FIG. 2 shows a flowchart of the method for producing a silicon epitaxial wafer according to the present invention.
Here, a method for evaluating a silicon epitaxial wafer according to the present invention will be described.
The silicon epitaxial wafer which is the object of evaluation in the evaluation method according to the present invention can be obtained, for example, by performing the extraction process from the preparation process of the manufacturing method of the present invention shown in FIG.

First, a silicon single crystal substrate is placed on a susceptor provided in a reaction vessel of a vapor phase growth apparatus by using a transfer device (a charging process in FIG. 2).
Next, with the hydrogen gas flowing in the reaction vessel, the temperature in the reaction vessel is raised to a film formation temperature for vapor phase growth of the silicon single crystal thin film (heating step in FIG. 2). Here, the film formation temperature can be set to 1000 ° C. or higher at which the natural oxide film on the substrate surface can be removed with hydrogen.

  Next, while keeping the inside of the reaction vessel at the film formation temperature, the raw material gas and the dopant gas are supplied at a predetermined flow rate together with the hydrogen gas, and the silicon single crystal thin film is grown until the predetermined film thickness is obtained (the film formation in FIG. 2). Process).

Thereafter, the supply of the source gas and the dopant gas is stopped, the temperature in the reaction vessel is lowered, and the silicon epitaxial wafer is cooled to the extraction temperature (cooling step in FIG. 2).
Here, although not particularly limited, the temperature in the reaction vessel is 400 ° C. or lower, and the hydrogen atmosphere can be switched to the nitrogen atmosphere. Thus, if the atmospheric gas is switched, Cu can be positively deposited on the surface of the silicon single crystal film, and the sensitivity of measuring Cu in the evaluation of Cu contamination can be improved.

When the extraction temperature is reached, the silicon epitaxial wafer is extracted from the vapor phase growth apparatus (the extraction process in FIG. 2).
The evaluation method of the present invention for detecting Cu contamination of the silicon epitaxial wafer thus obtained is performed as follows.

First, the pressing surface of the pressing object is pressed parallel to the surface of the silicon single crystal thin film of the silicon epitaxial wafer (pressing step).
Thus, Cu contained in the wafer can be collected and deposited on the wafer surface by pressing the pressing surfaces of the pressing objects in parallel.

Next, the surface of the thin film of the wafer is cleaned with a cleaning liquid composed of ammonia and hydrogen peroxide (cleaning process). By this cleaning, Cu deposited on the wafer surface is selectively etched, and pits are formed in that portion.
And the pit formed in the wafer surface is measured with a particle counter (pit measurement process).

From the number of pits on the wafer surface thus measured, the Cu content in the wafer can be evaluated with high sensitivity.
At this time, an epi spike crusher for removing protrusions on the surface of the thin film can be used as means for pressing the pressing surface of the pressing object parallel to the surface of the thin film of the wafer.

  In this way, as a means for pressing the pressing surface of the pressing object in parallel with the surface of the thin film of the wafer, if an epi spike crash device for removing projections on the surface of the thin film used in the product manufacturing process is used, Without using the evaluation wafer, the product itself can be used to remove the protrusions on the surface of the thin film and to press the pressing surface of the pressing object parallel to the surface of the thin film. As a result, after the wafer is evaluated by the evaluation method of the present invention, the wafer can be sent to the next process as it is. Therefore, the manufacturing cost can be reduced and the product yield can be improved.

At this time, the SC-1 cleaning liquid can be used as the cleaning liquid composed of ammonia and hydrogen peroxide.
As described above, when the SC-1 cleaning liquid is used as the cleaning liquid composed of ammonia and hydrogen peroxide solution, the wafer cleaning process can be performed without requiring any special cleaning equipment. In addition, the wafer can be cleaned using the product itself without using the evaluation wafer. As a result, after the wafer is evaluated by the evaluation method of the present invention, the wafer can be sent to the next process as it is. Therefore, the manufacturing cost can be reduced and the product yield can be improved.

Next, the manufacturing method of the silicon epitaxial wafer of this invention is demonstrated with reference to FIG.
The take-out process from the preparation process can be performed in the same manner as that described in the method for obtaining the silicon epitaxial wafer to be evaluated in the above evaluation method.
Then, after the extraction step, the number of pits generated on the surface of the wafer is measured using the evaluation method according to the present invention described above (FIG. 2A).

Thereafter, a wafer having a measured number of pits on the wafer surface of a predetermined number or less is selected from the evaluated silicon epitaxial wafers (screening step).
With such a silicon epitaxial wafer manufacturing method, it is possible to select and remove silicon wafers that have a high Cu content and a large number of surface pits and have poor GOI characteristics, and can select wafers with good GOI characteristics. It can be set as the manufacturing method which becomes.

At this time, those having a measured number of pits of 50 or less per wafer can be selected.
As described above, if the measured number of pits is 50 or less per wafer, it is possible to obtain a manufacturing method that enables selection of silicon epitaxial wafers having better GOI characteristics.

  As described above, in the method for evaluating a silicon epitaxial wafer according to the present invention, at least the pressing surface of the pressing object is pressed against the surface of the thin film of the wafer by means for pressing in parallel, and Cu is applied to the surface of the wafer. Depositing, cleaning the surface of the thin film of the wafer with a cleaning solution comprising ammonia and hydrogen peroxide, and measuring the number of pits generated on the surface of the thin film of the wafer by the cleaning Therefore, the portion where Cu contained in the wafer aggregates and precipitates on the wafer surface by pressing the pushing surface of the pushing object in parallel is selectively etched to form pits. Since the number of pits can be measured, Cu contained in the wafer can be evaluated with high sensitivity.

  Further, the method for manufacturing a silicon epitaxial wafer according to the present invention includes a step of measuring the number of pits on the surface of the wafer by the evaluation method according to the present invention, and selecting those having the measured number of pits equal to or less than a predetermined number. Therefore, it is a manufacturing method that makes it possible to select a wafer having good GOI characteristics.

  EXAMPLES Hereinafter, the present invention will be described more specifically with reference to examples and comparative examples of the present invention, but the present invention is not limited to these.

Example 1
A plane orientation (100) that has been previously confirmed to have a Cu concentration of 3 × 10 ¹⁰ atoms / cm ³ or less (lower detection limit) and about 5 × 10 ^{10 to} 7 × 10 ¹¹ atoms / cm ³ using a total dissolution chemical analysis method. ), An n ⁺ type substrate was prepared.
Then, according to the manufacturing method of the present invention, a silicon epitaxial wafer is manufactured by vapor-phase growth of an n ⁻ type thin film on the substrate at a film forming temperature of 1130 ° C., and evaluation of Cu contamination is performed using the evaluation method according to the present invention. Did.

First, using an epi spike crush device, the pressing surface of the pressing object is pressed in parallel to the surface of the silicon single crystal thin film of the manufactured silicon epitaxial wafer to remove the protrusion on the surface of the thin film, and Cu on the surface of the wafer. Was precipitated.
This wafer was cleaned with a standard SC-1 cleaning solution, and surface pits whose size was detected to be 0.13 μm or more in diameter were measured with a particle counter.

  Here, as the SC-1 cleaning liquid, one having a volume ratio of ammonia: hydrogen peroxide: water of 1: 1 to 2: 5 to 7 and a temperature of 75 to 85 ° C. was used. The cleaning treatment time was 100 minutes.

The result of the measured number of pits is shown in FIG. As shown in FIG. 3, it can be seen that fine pits detected as a diameter of 0.13 μm or more increase in proportion to the Cu concentration in the substrate.
On the other hand, in the comparative example described later, the measured number of pits is 20 or less regardless of the Cu concentration in the substrate, and it can be seen that the Cu contained in the wafer can be measured with higher sensitivity in Example 1.

  Thus, it has confirmed that the evaluation method of the silicon epitaxial wafer which concerns on this invention can evaluate Cu contained in a wafer with high sensitivity.

(Example 2)
From the silicon epitaxial wafers evaluated in Example 1, those having a measured number of pits of 100 or less were selected, that is, an epitaxial wafer was manufactured using the manufacturing method according to the present invention, and a polycrystalline silicon gate was manufactured from the wafer. A MOS transistor was fabricated. Then, the GOI characteristics of the MOS transistor were evaluated.

Here, the GOI characteristics were evaluated by TDDB (Time Dependent Dielectric Breakdown) characteristics evaluation and TZDB (Time Zero Dielectric Breakdown) characteristics evaluation.
In general, in either evaluation, the amount of electricity required for dielectric breakdown decreases as the number of defects generated in the oxide film increases.

  Therefore, in the evaluation, the dielectric breakdown at a certain measurement position was classified into the following three types according to the amount of electricity given until the dielectric breakdown. In other words, in the TDDB characteristic evaluation, the breakdown is made into “initial breakdown (α mode)”, “accidental breakdown (β mode)”, and “intrinsic breakdown (γ mode)” from the one that has undergone dielectric breakdown with a smaller amount of electricity. In the evaluation, it was classified into A mode, B mode, and C mode from the direction of dielectric breakdown with a smaller amount of electricity.

  That is, it is evaluated that the GOI characteristic of the epitaxial wafer is superior as the ratio of the γ mode is larger in the TDDB characteristic evaluation and as the C mode ratio is larger in the TZDB characteristic evaluation.

As a result, in the TDDB characteristic evaluation, almost 100% was in the γ mode, and in the TZDB characteristic evaluation, almost 100% was in the C mode. From this result, it was confirmed that a polycrystalline silicon gate MOS transistor having good GOI characteristics can be obtained if the number of surface pits on the wafer to be selected is 100 or less.
In this way, an epitaxial wafer is manufactured by the manufacturing method of the present invention, and at that time, for example, the epitaxial wafer is selected based on a criterion that the measured number of pits on the surface is 50 or less, which is a more severe condition than 100 or less. As a result, it was confirmed that a good wafer having excellent GOI characteristics could be obtained reliably.

(Comparative example)
Cu contamination was evaluated in the same manner as in Example 1 except that the step of pressing the pressing surface of the pressing object in parallel with the surface of the silicon single crystal thin film of the manufactured silicon epitaxial wafer was not performed.
The result of the number of pits measured at the time of evaluation is shown in FIG. As shown in FIG. 3, the measured number of pits was 20 or less regardless of the Cu concentration in the substrate, and it was confirmed that the sensitivity of Cu detection was not sufficient.

The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.
For example, the vapor phase growth apparatus for vapor phase growth of a thin film in the present invention is not limited, and can be applied to various vapor phase growth apparatuses such as a vertical type (pancake type), a barrel type (cylinder type), and a single wafer type. .

It is a flowchart of the evaluation method of the silicon epitaxial wafer which concerns on this invention. It is a flowchart of the manufacturing method of the silicon epitaxial wafer which concerns on this invention. It is a figure which shows the result of Cu contamination evaluation in Example 1 and a comparative example.

Explanation of symbols

  A: A method for evaluating a silicon epitaxial wafer of the present invention.

Claims (4)

In a silicon epitaxial wafer evaluation method for detecting Cu contamination of a silicon epitaxial wafer obtained by vapor-phase growth of a silicon single crystal thin film on a silicon single crystal substrate, at least,
Pressing the pressing surface of the pressing object in parallel with the surface of the thin film of the wafer, and depositing Cu on the surface of the wafer;
Cleaning the surface of the thin film of the wafer with a cleaning liquid comprising ammonia and hydrogen peroxide;
Look including the step of measuring the number of pits generated in the surface of the thin film of the wafer by the washing,
A method for evaluating a silicon epitaxial wafer, comprising using an epi spike crusher for removing protrusions on the surface of the thin film as means for pressing a pressing surface of a pressing object parallel to the surface of the thin film of the wafer . 2. The silicon epitaxial wafer evaluation method according to claim 1, wherein an SC-1 cleaning solution is used as the cleaning solution comprising ammonia and hydrogen peroxide. 3. The evaluation method according to claim 1 , wherein, in the method for producing a silicon epitaxial wafer in which a silicon single crystal thin film is vapor-grown on a silicon single crystal substrate, at least after the silicon single crystal thin film is vapor-grown. And a method of measuring the number of pits on the surface of the wafer and selecting those having a measured number of pits equal to or less than a predetermined number. 4. The method for producing a silicon epitaxial wafer according to claim 3 , wherein those having a measured number of pits of 50 or less are selected.

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