JP5138327B2 - Rectifier circuit and semiconductor device using the rectifier circuit - Google Patents

Description

The present invention relates to a rectifier circuit having a function as a limiter. Furthermore, the present invention relates to a semiconductor device that can perform wireless communication by using a voltage rectified by the rectifier circuit and a driving method thereof.

A technology (RFID: Radio frequency identification) that transmits and receives signals in a contactless manner with a medium (tag) in which an integrated circuit and an antenna are incorporated has been put into practical use in various fields, and new information is being developed. Further expansion of the market is expected as a form of communication. A tag used in RFID often has a card shape or a chip size smaller than that of a card, but various shapes can be adopted depending on the application.

In RFID, communication between a tag and a reader can be performed using radio waves. Specifically, the radio wave emitted from the reader is converted into an electric signal by the antenna in the tag, and the integrated circuit in the tag operates according to the electric signal. A radio wave modulated in accordance with the electrical signal output from the integrated circuit is emitted from the antenna, so that the signal can be sent to the reader in a non-contact manner.

Tags can be broadly classified into two types, active type and passive type. The active type has a built-in primary battery and does not generate electrical energy in the tag.

On the other hand, the passive type can generate electric energy in the tag using radio waves from a reader. Specifically, after the radio wave received from the reader is converted into an AC voltage by the antenna, the AC voltage is rectified by the rectifier circuit and supplied to each circuit in the tag. Therefore, the higher the radio wave energy that can be received by the antenna, the higher the generation of electrical energy. However, since the intensity of the radio wave emitted from the reader is determined by regulations, the electric energy generated in the tag is usually within a predetermined range.

However, if the radio wave from the reader contains noise or unnecessary radiation is emitted from an electronic device other than the reader, the tag is exposed to a stronger radio wave than specified. In this case, an excessively large AC voltage is generated in the antenna that deviates from a predetermined range. As a result, the value of the current supplied to the semiconductor elements in the integrated circuit increases rapidly, and the integrated circuit may be destroyed or deteriorated due to dielectric breakdown.

In particular, when communication is performed using high-frequency radio waves in order to extend the communication distance, there is a tendency to miniaturize semiconductor elements that constitute an integrated circuit so that the integrated circuit can be operated at higher speed. However, when the semiconductor element is miniaturized, the withstand voltage is further lowered, and the tag is easily broken by an overcurrent.

Also, if the radio wave intensity when the communication distance between the tag and the reader is short is the same as the radio wave intensity when the communication distance between the tag and the reader is long, the electrical energy generated in the tag is between the tag and the reader. The closer the communication distance is, the larger it becomes. Therefore, when the communication distance is short, extra electrical energy may be generated.

Therefore, providing a limiter having a function of discharging excess electrical energy in the integrated circuit is very effective in improving the reliability of the tag. The limiter has a function of suppressing the output voltage to a set voltage (limit voltage) or less regardless of the input voltage. By using the limiter, deterioration or destruction of the semiconductor element due to the overcurrent described above is prevented.

In the case of a tag, the circuit in which the semiconductor element is most likely to be deteriorated or destroyed by overcurrent is a circuit to which an AC voltage from an antenna is directly input. The rectifier circuit is one of them, and the following Patent Document 1 describes a rectifier circuit in which a diode functioning as a limiter is provided on the input side.
JP 2002-176141 A (page 6, FIG. 1)

However, when the limiter is provided between the antenna and the rectifier circuit, even if no overcurrent occurs, the rectifier circuit is short-circuited to the ground (GND) side due to the parasitic capacitance or parasitic inductance in the limiter, and power is consumed. There was a problem.

FIG. 19A illustrates a general structure of the antenna 1901, the limiter 1902, and the rectifier circuit 1903. The limiter 1902 and the rectifier circuit 1903 correspond to part of the integrated circuit, and the limiter 1902 is connected to the terminals A1 and A2 included in the antenna 1901. The rectifier circuit 1903 is connected to the subsequent stage of the limiter 1902.

FIG. 19B illustrates an equivalent circuit diagram of the antenna 1901, the limiter 1902, and the rectifier circuit 1903 illustrated in FIG. Note that FIG. 19B shows a circuit diagram in a state where the terminal A2 is dropped to GND. The antenna 1901 has an inductor 1910 and a resonance capacitor 1911 connected in parallel. The limiter 1902 includes a switch 1912 that controls the connection between the terminal A1 and the terminal A2. The rectifier circuit 1903 is connected to the terminal A1 and the terminal A2 in the subsequent stage of the limiter 1902.

When a voltage lower than the specified voltage is applied between the terminal A1 and the terminal A2, the switch 1912 is opened, and the voltage between the terminal A1 and the terminal A2 is applied to the rectifier circuit 1903 as it is. Conversely, when a voltage having a larger amplitude than specified is applied between the terminal A1 and the terminal A2, the switch 1912 is short-circuited so that an overcurrent flows to the terminal A2 (GND) side, and is applied to the rectifier circuit 1903 as a result. It is a mechanism that can suppress the voltage.

By the way, the switch 1912 is usually formed using a semiconductor element such as a transistor or a diode, and thus has a parasitic capacitance and a parasitic inductance. Therefore, when an AC voltage having a high frequency is applied between the terminals A1 and A2, even if the switch 1912 is open, the AC voltage is also applied to the terminal A2 due to the parasitic capacitance and parasitic inductance. Applied power is lost. Since there is a limit to the electrical energy that can be formed within a tag, the current situation is to avoid unnecessary power loss as much as possible.

In view of the above problems, an object of the present invention is to provide a rectifier circuit that can suppress power loss due to parasitic capacitance and parasitic inductance of a semiconductor element. Furthermore, the present invention relates to a semiconductor device capable of performing wireless communication using the voltage rectified by the rectifier circuit and a driving method thereof.

The rectifier circuit according to the present invention is characterized by matching or mismatching the impedance between the preceding circuit and the rectifier circuit in accordance with the amplitude of the input AC voltage. When the input AC voltage is equal to or less than a predetermined amplitude, the impedance is matched and the AC voltage is applied to the rectifier circuit as it is. On the contrary, when the input AC voltage is larger than the specified amplitude, the impedance is mismatched, and the amplitude of the AC voltage is reduced by reflection, and then applied to the rectifier circuit.

In the present invention, a variable capacitor is provided in the rectifier circuit, and the input impedance of the rectifier circuit is adjusted using the variable capacitor. More specifically, the capacitance value of the variable capacitor changes according to the amplitude of the AC voltage input to the rectifier circuit. The reactance corresponding to the imaginary part of the input impedance of the rectifier circuit changes according to the capacitance value of the variable capacitor. Therefore, impedance matching between the rectifier circuit and the preceding circuit can be matched or mismatched by changing the capacitance value of the variable capacitor in accordance with the amplitude of the AC voltage.

The mismatch can be realized by making the input impedance of the rectifier circuit larger than the output impedance of the previous circuit, but conversely, it can also be realized by making the input impedance of the rectifier circuit smaller than the output impedance of the previous circuit. .

The semiconductor device of the present invention is characterized in that the impedance between the antenna and the rectifier circuit is matched or mismatched according to the amplitude of the AC voltage generated in the antenna. When the AC voltage generated in the antenna is equal to or less than the specified amplitude, the impedance is matched and the AC voltage is applied to the rectifier circuit as it is. Conversely, when the AC voltage generated in the antenna is larger than the specified amplitude, the impedance is mismatched, and the amplitude of the AC voltage is reduced by reflection before being applied to the rectifier circuit.

In the semiconductor device of the present invention, a variable capacitor is provided in the rectifier circuit. The reactance corresponding to the imaginary part of the input impedance of the rectifier circuit is determined by the capacitance value of the variable capacitor. Therefore, impedance matching and mismatching can be selected by changing the capacitance value of the variable capacitor in accordance with the amplitude of the AC voltage. By making the input impedance of the rectifier circuit larger than the output impedance of the antenna, the impedance can be mismatched. Conversely, by making the input impedance of the rectifier circuit smaller than the output impedance of the antenna, the impedance can also be mismatched.

The variable capacitor has at least two electrodes. The antenna also has at least two terminals. The variable capacitor is connected in the rectifier circuit so that an AC voltage supplied from one of the two terminals of the antenna is applied to one of the two electrodes of the variable capacitor.

Note that the semiconductor device of the present invention only needs to have at least an integrated circuit and does not have to have an antenna. An integrated circuit included in the semiconductor device of the present invention includes a rectifier circuit that rectifies an AC voltage generated in an antenna to generate a DC power supply voltage, an arithmetic circuit that operates using the power supply voltage, and an arithmetic circuit that generates the integrated circuit It is only necessary to have a modulation circuit for modulating radio waves using the generated signals.

Since the rectifier circuit of the present invention also has a function as a limiter, it is possible to suppress deterioration or destruction of the semiconductor element in the rectifier circuit due to overcurrent without providing a limiter in the previous stage of the rectifier circuit as in the prior art.

Even when the semiconductor device is not exposed to excessive radio waves, the semiconductor element functioning as a limiter switch is short-circuited to the ground (GND) side through the parasitic capacitance and parasitic inductance that the semiconductor element has in advance, It is possible to avoid a situation where power is consumed. In the present invention, since the amplitude of the AC voltage generated in the antenna can be suppressed by using the reflection caused by the impedance mismatch, the semiconductor element in the rectifier circuit is deteriorated or destroyed by the overcurrent. In addition, the reliability of the semiconductor device can be improved while preventing it. Further, by suppressing power loss in the semiconductor device, the semiconductor device can have higher functionality or a longer communication distance.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention is not construed as being limited to the description of this embodiment mode.

(Embodiment 1)
The configuration of the rectifier circuit of the present invention will be described with reference to FIG. In FIG. 1A, a rectifier circuit 101 is connected to terminals A1 and A2 included in the antenna 102, and the terminals A1 and A2 included in the antenna 102 function as input terminals of the rectifier circuit 101. Note that FIG. 1A illustrates the case where the antenna 102 has a coil shape; however, the shape of the antenna used in the present invention is not limited thereto. When communication is performed using an electric field instead of a magnetic field, the antenna 102 does not need to be coiled.

The rectifier circuit 101 includes a variable capacitor 103, a diode 104 and a diode 105 for rectifying an AC voltage applied between the terminals A1 and A2, and a smoothing capacitor for smoothing the rectified voltage. 106. The variable capacitor 103 has at least two electrodes. The capacitance value of the variable capacitor 103 changes according to the value of the voltage applied between the first electrode and the second electrode. In this embodiment, a variable capacitance diode is used as the variable capacitance 103.

The smoothing capacitor 106 is connected between the output terminal OUT1 and the output terminal OUT2 of the rectifier circuit 101. Note that the rectifier circuit illustrated in FIG. 1A uses the smoothing capacitor 106 for smoothing the rectified voltage; however, the smoothing capacitor 106 is not necessarily used. However, by using the smoothing capacitor 106, it is possible to reduce components other than direct current, such as ripple, which the rectified voltage has.

Further, the number of diodes included in the rectifier circuit 101 and the connection thereof are not limited to the structure illustrated in FIG. In the rectifier circuit 101 of the present invention, at least two diodes 104 and 105 are connected in series so that the forward directions of the diodes are aligned. One of the two diodes 104 and 105 is connected in series between the second electrode of the variable capacitor 103 and the output terminal OUT1 of the rectifier circuit 101, and the other is the second electrode of the variable capacitor 103. And the output terminal OUT2 of the rectifier circuit 101 are connected in series.

Specifically, in the rectifier circuit 101 illustrated in FIG. 1A, the first electrode of the variable capacitor 103 is connected to the terminal A1. The second electrode of the variable capacitor 103 is connected to the second electrode (cathode) of the diode 104 and the first electrode (anode) of the diode 105. A first electrode (anode) included in the diode 104 is connected to the terminal A2 and the output terminal OUT2. A second electrode (cathode) included in the diode 105 is connected to the output terminal OUT1. The first electrode of the smoothing capacitor 106 is connected to the output terminal OUT1, and the second electrode of the smoothing capacitor 106 is connected to the output terminal OUT2.

FIG. 1B shows an equivalent circuit diagram of the rectifier circuit 101 and the antenna 102 shown in FIG. 1A when the terminal A2 is dropped to the ground (GND).

The antenna 102 has an inductor 107 and a resonance capacitor 108. The inductor 107 has at least two terminals, one terminal is connected to the terminal A1, and the other terminal is dropped to GND. The resonance capacitor 108 has at least two electrodes, one electrode is connected to the terminal A1, and the other electrode is dropped to GND. In this way, the inductor 107 and the resonant capacitor 108 are connected in parallel, so that a parallel resonant circuit is formed in the antenna 102.

In FIG. 1B, the first electrode of the diode 104 is dropped to GND. The second electrode of the smoothing capacitor 106 is dropped to GND.

When the antenna 102 is exposed to radio waves having a wavelength in a specific range, an AC electromotive force is generated in the antenna 102, and an AC voltage is applied between the terminal A1 and the terminal A2.

When a voltage Vh higher than the terminal A2 is applied to the terminal A1, the voltage Vh is applied to the first electrode of the variable capacitor 103. Then, since negative charges are accumulated on the second electrode side of the variable capacitor 103, the voltage of the second electrode of the variable capacitor 103 becomes lower than the voltage of the terminal A2 (in this case, GND). Then, the diode 104 is turned on, and the voltage of the terminal A2 (in this case, GND) is applied to the second electrode of the variable capacitor 103. Next, when a voltage Vl (= −Vh) lower than that of the terminal A2 is applied to the terminal A1, the voltage Vl is applied to the first electrode of the variable capacitor 103. Here, since the electric charge accumulated in the variable capacitor 103 is stored, the voltage at the second electrode of the variable capacitor 103 has a height obtained by doubling the voltage Vh. The diode 104 is turned off, the diode 105 is turned on, and a voltage twice as high as the voltage Vh is applied to the output terminal OUT1.

Note that the capacitance value of the variable capacitor 103 changes depending on the value of the voltage applied to the first electrode. The input impedance of the rectifier circuit 101 can be changed according to the capacitance value of the variable capacitor 103. Therefore, the relationship between the voltage applied to the first electrode of the variable capacitor 103 and the capacitance value is determined in advance at the design stage. In other words, when the value of the voltage applied to the first electrode of the variable capacitor 103 is within a predetermined range, the characteristics of the variable capacitor 103 are set so that impedance matching is achieved between the rectifier circuit 101 and the antenna 102. Is determined in advance. In addition, when a voltage having a large amplitude that deviates from a predetermined range is applied to the first electrode of the variable capacitor 103, the variable capacitor 103 is set so that impedance is mismatched between the rectifier circuit 101 and the antenna 102. The characteristics are determined in advance.

In the case of the rectifier circuit 101 illustrated in FIG. 1B, impedance is matched between the rectifier circuit 101 and the antenna 102 when a voltage within a predetermined range is applied to the first electrode of the variable capacitor 103. . Then, the AC voltage applied to the first electrode of the variable capacitor 103 is applied to the semiconductor element subsequent to the variable capacitor 103. Specifically, the voltage is applied to the second electrode of the diode 104 and the first electrode of the diode 105.

On the other hand, in the case of the rectifier circuit 101 illustrated in FIG. 1B, when a voltage having a large amplitude that deviates from a predetermined range is applied to the first electrode of the variable capacitor 103, the capacitance value of the variable capacitor 103 decreases. Become. In the case of the variable capacitor 103 connected in series between the terminal A1 corresponding to the input terminal of the rectifier circuit 101 and the output terminal OUT1, when ω is an angular frequency, C is a capacitance value, and j is an imaginary unit, the impedance Z is 1 / (jωC). Therefore, as the capacitance value of the variable capacitor 103 is reduced, the input impedance of the rectifier circuit 101 is increased, and the impedance can be mismatched between the rectifier circuit 101 and the antenna 102. As a result, the amplitude of the AC voltage applied to the first electrode is suppressed by reflection, and is applied to the semiconductor element subsequent to the variable capacitor 103. Specifically, the voltage is applied to the second electrode of the diode 104 and the first electrode of the diode 105.

It should be noted that the determination of how far is matched and how far is mismatched may be appropriately determined by the designer based on the value of the voltage that decreases due to reflection. For example, the amplitude of the AC voltage generated in the antenna 102 is compared with the amplitude of the AC voltage actually input to the rectifier circuit 101. When the voltage drop is less than 3%, it is assumed that matching is achieved. When the voltage drop is 10% or more, it can be determined that matching is not achieved, that is, mismatching.

In actual design, a rectifier circuit having characteristics more suitable for design can be formed by taking into consideration the characteristic impedance of the wiring.

The rectifier circuit of this embodiment has a variable capacitor, and is configured such that the capacitance value of the variable capacitor changes according to the input voltage. The change in the capacitance value of the variable capacitor changes the input impedance of the rectifier circuit and acts so that the input signal is reflected. By this action, an excessive AC voltage is applied to the rectifier circuit, and deterioration or destruction of the semiconductor element in the rectifier circuit due to the overcurrent can be suppressed.

Note that communication between a semiconductor device including such a rectifier circuit and a reader is performed by modulating a reflected wave of a carrier wave transmitted from the reader. The reflected wave in this communication is sufficiently larger than the reflected power for suppressing the amplitude of the AC voltage input to the rectifier circuit. Therefore, even if the impedance is intentionally mismatched between the antenna and the rectifier circuit, there is an advantage that signal transmission is hardly hindered.

Thus, the rectifier circuit of the present invention has a characteristic of changing the input impedance so that an excessive AC voltage is not input. Therefore, deterioration or destruction of semiconductor elements such as the diodes 104 and 105 and the smoothing capacitor 106 in the rectifier circuit 101 due to overcurrent can be suppressed. In addition, since it is not necessary to provide a limiter in the previous stage of the rectifier circuit as in the prior art, it is possible to avoid a situation where the power is consumed due to a short circuit with the ground (GND) side via the parasitic capacitance or parasitic inductance of the limiter. I can do it.

Note that the type and number of semiconductor elements used in the rectifier circuit 101 are not limited to the structures described in this embodiment. In order to obtain more ideal rectification characteristics, a resistor, a capacitor, a diode, an inductor, a switch, or the like may be added as appropriate in addition to the semiconductor element illustrated in FIG.

(Embodiment 2)
The configuration of the rectifier circuit of the present invention will be described with reference to FIG. In FIG. 2A, the rectifier circuit 201 is connected to the terminals A1 and A2 included in the antenna 202. The terminals A1 and A2 included in the antenna 202 function as input terminals of the rectifier circuit 201. Note that FIG. 2A illustrates the case where the antenna 202 has a coil shape; however, the shape of the antenna used in the present invention is not limited thereto. In the case where communication is performed using an electric field instead of a magnetic field, the antenna 202 does not have to be coiled.

The rectifier circuit 201 is output from the variable capacitor 203, the diode 204 and the diode 205 for rectifying the AC voltage applied between the terminals A1 and A2, the resistor 209 functioning as a low-pass filter, and the rectifier circuit. And a capacitor 210 for doubling the voltage. The variable capacitor 203 has at least two electrodes. According to the value of the voltage applied between the first electrode and the second electrode, the capacitance value of the variable capacitor 203 changes. In this embodiment, a variable capacitance diode is used as the variable capacitance 203.

The number of diodes included in the rectifier circuit 201 and the connection thereof are not limited to the structure illustrated in FIG. In the rectifier circuit 201 of the present invention, at least two diodes 204 and 205 are connected in series so that the forward directions of the diodes are aligned. One of the two diodes 204 and 205 is connected in series between the second electrode of the capacitor 210 and the output terminal OUT1 of the rectifier circuit 201, and the other is rectified with the second electrode of the capacitor 210. The circuit 201 is connected in series with the output terminal OUT2.

Specifically, in the rectifier circuit 201 illustrated in FIG. 2A, the first electrode included in the capacitor 210 is connected to the terminal A1. The second electrode included in the capacitor 210 is connected to the first terminal included in the resistor 209. A second terminal included in the resistor 209 is connected to a first electrode included in the variable capacitor 203, a second electrode (cathode) included in the diode 204, and a first electrode (anode) included in the diode 205. The second electrode of the variable capacitor 203 and the first electrode (anode) of the diode 204 are connected to the terminal A2 and the output terminal OUT2. A second electrode (cathode) included in the diode 205 is connected to the output terminal OUT1.

FIG. 2B shows an equivalent circuit diagram of the rectifier circuit 201 and the antenna 202 shown in FIG. 2A when the terminal A2 is dropped to the ground (GND).

The antenna 202 has an inductor 207 and a resonance capacitor 208. Inductor 207 has at least two terminals, one terminal connected to terminal A1, and the other terminal dropped to GND. The resonance capacitor 208 has at least two electrodes, one electrode is connected to the terminal A1, and the other electrode is dropped to GND. In this way, the inductor 207 and the resonant capacitor 208 are connected in parallel, so that a parallel resonant circuit is formed in the antenna 202.

In FIG. 2B, the first electrode of the diode 204 is dropped to GND. The second electrode of the variable capacitor 203 is dropped to GND.

When the antenna 202 is exposed to radio waves having a wavelength in a specific range, an AC electromotive force is generated in the antenna 202, and an AC voltage is applied between the terminal A1 and the terminal A2.

When a voltage Vh higher than the terminal A2 is applied to the terminal A1, the voltage Vh is applied to the first electrode of the capacitor 210. Then, since negative charges are accumulated on the second electrode side of the capacitor 210, the voltage of the second electrode of the capacitor 210 becomes lower than the voltage of the terminal A2 (in this case, GND). Then, the diode 204 is turned on, and the voltage of the terminal A2 (in this case, GND) is applied to the second electrode of the capacitor 210. Next, when a voltage Vl (= −Vh) lower than that of the terminal A2 is applied to the terminal A1, the voltage Vl is applied to the first electrode of the capacitor 210. Here, since the electric charge accumulated in the capacitor 210 is stored, the voltage at the second electrode of the capacitor 210 has a height obtained by doubling the voltage Vh. Then, the diode 204 is turned off, the diode 205 is turned on, and a voltage twice the voltage Vh is applied to the output terminal OUT1.

The capacitance value of the variable capacitor 203 changes depending on the value of the voltage applied to the first electrode. The input impedance of the rectifier circuit 201 can be changed according to the capacitance value of the variable capacitor 203. Therefore, the relationship between the voltage applied to the first electrode of the variable capacitor 203 and the capacitance value is determined in advance at the design stage. That is, when the value of the voltage applied to the first electrode of the variable capacitor 203 is within a predetermined range, the characteristics of the variable capacitor 203 are set so that impedance matching can be achieved between the rectifier circuit 201 and the antenna 202. Is determined in advance. In addition, when a voltage having a large amplitude that deviates from a predetermined range is applied to the first electrode of the variable capacitor 203, the variable capacitor 203 is arranged so that impedance is mismatched between the rectifier circuit 201 and the antenna 202. The characteristics are determined in advance.

In the case of the rectifier circuit 201 illustrated in FIG. 2B, impedance is matched between the rectifier circuit 201 and the antenna 202 when a voltage within a predetermined range is applied to the first electrode of the variable capacitor 203. . Then, the AC voltage applied to the first electrode of the capacitor 210 is applied to the semiconductor element subsequent to the variable capacitor 203. Specifically, the voltage is applied to the second electrode of the diode 204 and the first electrode of the diode 205.

On the other hand, in the case of the rectifier circuit 201 illustrated in FIG. 2B, when a voltage having a large amplitude that deviates from a predetermined range is applied to the first electrode of the variable capacitor 203, the capacitance value of the variable capacitor 203 increases. Become. In the case of the variable capacitor 203 connected in series between the terminal A1 corresponding to the input terminal of the rectifier circuit 201 and the output terminal OUT2, when ω is an angular frequency, C is a capacitance value, and j is an imaginary unit, the impedance Z is 1 / (jωC). Therefore, the larger the capacitance value of the variable capacitor 203, the smaller the input impedance of the rectifier circuit 201, and the impedance can be mismatched between the rectifier circuit 201 and the antenna 202. As a result, the amplitude of the AC voltage applied to the first electrode of the capacitor 210 is suppressed by reflection, and is applied to the semiconductor element at the subsequent stage of the variable capacitor 203. Specifically, the voltage is applied to the second electrode of the diode 204 and the first electrode of the diode 205.

It should be noted that the determination of how far is matched and how far is mismatched may be appropriately determined by the designer based on the value of the voltage that decreases due to reflection. In actual design, a rectifier circuit having characteristics more suitable for design can be formed by taking into consideration the characteristic impedance of the wiring.

Thus, the rectifier circuit of the present invention can suppress the amplitude of the AC voltage by using reflection. Therefore, deterioration or destruction of semiconductor elements such as the diodes 204 and 205 in the rectifier circuit 201 due to overcurrent can be suppressed. In addition, since it is not necessary to provide a limiter in the previous stage of the rectifier circuit as in the prior art, it is possible to avoid a situation where the power is consumed due to a short circuit with the ground (GND) side via the parasitic capacitance or parasitic inductance of the limiter. I can do it.

Note that the type and number of semiconductor elements used in the rectifier circuit 201 are not limited to the structures described in this embodiment. In order to obtain more ideal rectification characteristics, a resistor, a capacitor, a diode, an inductor, a switch, or the like may be added as appropriate in addition to the semiconductor element illustrated in FIG.

(Embodiment 3)
In the present embodiment, a configuration of a rectifier circuit using a MOS (metal-oxide semiconductor) varactor as a variable capacitor will be described.

FIG. 3A shows one mode of the rectifier circuit of the present invention using a MOS varactor. 3A illustrates an example in which a MOS varactor is used as the variable capacitor 103 included in the rectifier circuit 101 illustrated in FIG. FIG. 3A shows an example in which MOS transistors are used as the diode 104 and the diode 105.

The MOS varactor used as the variable capacitor 103 is a p-channel MOS transistor in which a source region (S) and a drain region (D) are electrically connected. The gate electrode (G) of the MOS transistor corresponds to the first electrode. The source region (S) and the drain region (D) correspond to the second electrode.

The transistor used as the diode 104 is an n-channel MOS transistor in which the source region (S) and the gate electrode (G) are electrically connected. The source region (S) and the gate electrode (G) of the MOS transistor correspond to the first electrode (anode) of the diode 104, and the drain region (D) corresponds to the second electrode (cathode) of the diode 104. To do.

The transistor used as the diode 105 is an n-channel MOS transistor in which the source region (S) and the gate electrode (G) are electrically connected, as in the diode 104. The source region (S) and gate electrode (G) of the MOS transistor correspond to the first electrode (anode) of the diode 105, and the drain region (D) corresponds to the second electrode (cathode) of the diode 105. To do.

In FIG. 3A, a MOS varactor is formed using a p-channel MOS transistor, but the present invention is not limited to this structure. An MOS varactor may be formed using an n-channel MOS transistor. However, when a MOS varactor is connected in series between the terminal A1 and the output terminal OUT1 as shown in FIG. 3A, it is preferable to use a p-channel MOS transistor as the MOS varactor. This is because in the case of a MOS varactor formed using a p-channel MOS transistor, an operation is performed using a region surrounded by a broken line 401 as shown in FIG. Therefore, as the voltage applied to the first electrode increases, the capacitance value of the variable capacitor 103 decreases and the impedance increases conversely. Since the impedance can be handled in the same manner as the resistance of the DC circuit, the amplitude of the AC current supplied to the second electrode of the variable capacitor 103 can be suppressed as the impedance increases. Therefore, it is possible to more effectively suppress the occurrence of dielectric breakdown due to current in the semiconductor element (in this case, the diode 105) connected between the second electrode of the variable capacitor 103 and the output terminal OUT1. Similarly, in the semiconductor element (in this case, the diode 104) connected between the second electrode of the variable capacitor 103 and the output terminal OUT2, it is possible to more effectively suppress dielectric breakdown due to current.

In FIG. 3A, the diode 104 and the diode 105 are formed using n-channel MOS transistors; however, the present invention is not limited to this structure. The diode 104 and the diode 105 may be formed using a p-channel MOS transistor. However, in this case, the drain region (D) of the MOS transistor corresponds to the first electrode (anode) of the diodes 104 and 105, and the source region (S) and the gate electrode (G) are the second electrodes of the diodes 104 and 105. It corresponds to an electrode (cathode).

FIG. 3B shows a different form of the rectifier circuit of the present invention using a MOS varactor from FIG. FIG. 3B illustrates an example in which a MOS varactor is used as the variable capacitor 203 included in the rectifier circuit 201 illustrated in FIG. FIG. 3B shows an example in which n-channel MOS transistors are used as the diode 204 and the diode 205.

The MOS varactor used as the variable capacitor 203 is an n-channel MOS transistor in which a source region (S) and a drain region (D) are electrically connected. The gate electrode (G) of the MOS transistor corresponds to the first electrode. The source region (S) and the drain region (D) correspond to the second electrode.

The transistor used as the diode 204 is an n-channel MOS transistor in which the source region (S) and the gate electrode (G) are electrically connected. The source region (S) and gate electrode (G) of the MOS transistor correspond to the first electrode (anode) of the diode 204, and the drain region (D) corresponds to the second electrode (cathode) of the diode 204. To do.

The transistor used as the diode 205 is an n-channel MOS transistor in which the source region (S) and the gate electrode (G) are electrically connected, as in the diode 204. The source region (S) and the gate electrode (G) of the MOS transistor correspond to the first electrode (anode) of the diode 205, and the drain region (D) corresponds to the second electrode (cathode) of the diode 205. To do.

In FIG. 3B, the MOS varactor is formed using an n-channel MOS transistor, but the present invention is not limited to this structure. A MOS varactor may be formed using a p-channel MOS transistor. However, when a MOS varactor is connected in series between the terminal A1 and the output terminal OUT2 as shown in FIG. 3B, it is preferable to use an n-channel MOS transistor as the MOS varactor. This is because in the case of a MOS varactor formed using n-channel MOS transistors, an operation is performed using a region surrounded by a broken line 402 as shown in FIG. Therefore, the higher the voltage applied to the first electrode, the larger the capacitance value of the variable capacitor 203 and the smaller the impedance. Since the impedance can be handled in the same manner as the resistance of the DC circuit, the amplitude of the AC current supplied to the second electrode of the variable capacitor 203 can be suppressed as the impedance decreases. Therefore, it is possible to more effectively suppress the occurrence of dielectric breakdown due to current in the semiconductor element (in this case, the diode 205) connected between the first electrode of the variable capacitor 203 and the output terminal OUT1. Similarly, in the semiconductor element (in this case, the diode 204) connected between the first electrode of the variable capacitor 203 and the output terminal OUT2, the occurrence of dielectric breakdown due to current can be more effectively suppressed.

In FIG. 3B, the diode 204 and the diode 205 are formed using n-channel MOS transistors; however, the present invention is not limited to this structure. The diode 204 and the diode 205 may be formed using a p-channel MOS transistor. However, in this case, the drain region (D) of the MOS transistor corresponds to the first electrode (anode) of the diodes 204 and 205, and the source region (S) and the gate electrode (G) are the second electrodes of the diodes 204 and 205. It corresponds to an electrode (cathode).

Note that a transistor used as a MOS varactor or a diode may be a transistor formed using a semiconductor substrate or a transistor formed using an SOI substrate. Alternatively, a transistor formed using a thin semiconductor film formed over a substrate having an insulating surface such as a glass substrate, a quartz substrate, or a plastic substrate may be used.

The rectifier circuit of the present invention can be formed by a normal MOS process including variable capacitance. In a conventional limiter, a Zener diode may be used as a semiconductor element that functions as a switch. It has been difficult to form a Zener diode by using an ordinary MOS (metal-oxide semiconductor) process. However, the rectifier circuit of the present invention can be formed by a normal MOS process, including variable capacitance. In this case, the rectifier circuit, and thus the semiconductor device using the rectifier circuit, can be downsized.

In this embodiment, a configuration of a rectifier circuit of the present invention that can triple the height of an output voltage will be described with reference to FIG.

In FIG. 5, a rectifier circuit 501 is connected to terminals A1 and A2 included in the antenna 502, and the terminals A1 and A2 included in the antenna 502 function as input terminals of the rectifier circuit 501. Note that FIG. 5 illustrates a case where the antenna 502 is coiled, but the shape of the antenna used in this embodiment is not limited to this. In the case where communication is performed using an electric field instead of a magnetic field, the antenna 502 need not be coiled.

The rectifier circuit 501 includes a variable capacitor 503, a diode 504 for rectifying an AC voltage applied between the terminals A1 and A2, a diode 505 and a diode 507, and a smoothing for the rectified voltage. A smoothing capacitor 506 and a smoothing capacitor 508 are provided. The variable capacitor 503 has at least two electrodes. The capacitance value of the variable capacitor 503 changes according to the value of the voltage applied between the first electrode and the second electrode. In this embodiment, a variable capacitance diode is used as the variable capacitance 503.

The smoothing capacitor 506 and the smoothing capacitor 508 are connected in series between the output terminal OUT1 and the output terminal OUT2 of the rectifier circuit 501. Note that the rectifier circuit 501 illustrated in FIG. 5 uses the smoothing capacitor 506 and the smoothing capacitor 508 for smoothing the rectified voltage; however, these capacitors are not necessarily used. However, by using the smoothing capacitor 506 and the smoothing capacitor 508, components other than direct current, such as ripples, included in the rectified voltage can be reduced.

In the rectifier circuit 501 illustrated in FIG. 5, the terminal A <b> 1 is connected to the first electrode included in the variable capacitor 503 and the first electrode (anode) included in the diode 507. The second electrode included in the variable capacitor 503 is connected to the second electrode (cathode) included in the diode 504 and the first electrode (anode) included in the diode 505. The first electrode (anode) included in the diode 504 and the second electrode (cathode) included in the diode 507 are connected to the second electrode included in the smoothing capacitor 506 and the first electrode included in the smoothing capacitor 508. Yes. The second electrode (cathode) included in the diode 505 and the first electrode included in the smoothing capacitor 506 are connected to the output terminal OUT1. A second electrode of the smoothing capacitor 508 is connected to the terminal A2 and the output terminal OUT2.

In FIG. 5, when the terminal A2 is dropped to the ground (GND), the second electrode of the smoothing capacitor 508 is dropped to GND.

When the antenna 502 is exposed to radio waves having a wavelength in a specific range, an AC electromotive force is generated in the antenna 502, and an AC voltage is applied between the terminal A1 and the terminal A2. If the amplitude of the AC voltage applied between the terminal A1 and the terminal A2 is Vh, a voltage corresponding to three times the height of Vh is applied to the output terminal OUT1.

The input impedance of the rectifier circuit 501 can be changed according to the capacitance value of the variable capacitor 503. The variable capacitor 503 can change its capacitance value depending on the value of the voltage applied to the first electrode. In the case of the rectifier circuit 501 illustrated in FIG. 5, impedance is matched between the rectifier circuit 501 and the antenna 502 when a voltage within a predetermined range is applied to the first electrode of the variable capacitor 503. Then, the AC voltage applied to the first electrode is applied to a semiconductor element subsequent to the variable capacitor 503. Specifically, the voltage is applied to the second electrode of the diode 504 and the first electrode of the diode 505.

On the other hand, in the case of the rectifier circuit 501 shown in FIG. 5, when a voltage with a large amplitude that deviates from a predetermined range is applied to the first electrode of the variable capacitor 503, the capacitance value of the variable capacitor 503 decreases. As the capacitance value of the variable capacitor 503 is reduced, the input impedance of the rectifier circuit 501 is increased, so that the impedance can be mismatched between the rectifier circuit 501 and the antenna 502. As a result, the amplitude of the alternating voltage applied to the first electrode is suppressed by reflection, and is applied to the semiconductor element at the subsequent stage of the variable capacitor 503. Specifically, the voltage is applied to the second electrode of the diode 504 and the first electrode of the diode 505.

As described above, the rectifier circuit of this embodiment can suppress the amplitude of the AC voltage by using reflection. Therefore, deterioration or destruction of semiconductor elements such as the diodes 504 and 505 and the smoothing capacitor 506 in the rectifier circuit 501 due to overcurrent can be suppressed. In addition, since it is not necessary to provide a limiter in the previous stage of the rectifier circuit as in the prior art, it is possible to avoid a situation where the power is consumed due to a short circuit with the ground (GND) side via the parasitic capacitance or parasitic inductance of the limiter. I can do it.

Note that the types and number of semiconductor elements used in the rectifier circuit 501 are not limited to the structure shown in this embodiment. In order to obtain a more ideal rectification characteristic, a resistor, a capacitor, a diode, an inductor, a switch, or the like may be added as appropriate in addition to the semiconductor element shown in FIG.

In this embodiment, the configuration of the rectifier circuit of the present invention that can triple the height of the output voltage will be described with reference to FIG.

In FIG. 6, the rectifier circuit 601 is connected to the terminals A1 and A2 included in the antenna 602, and the terminals A1 and A2 included in the antenna 602 function as input terminals of the rectifier circuit 601. Note that FIG. 6 illustrates the case where the antenna 602 has a coil shape, but the shape of the antenna used in this embodiment is not limited to this. When communication is performed using an electric field instead of a magnetic field, the antenna 602 does not have to be coiled.

The rectifier circuit 601 includes a variable capacitor 603, a diode 604 for rectifying an AC voltage applied between the terminal A1 and the terminal A2, a diode 605 and a diode 607, and a smoothing for the rectified voltage. A smoothing capacitor 606 and a smoothing capacitor 608 are provided. The variable capacitor 603 has at least two electrodes. The capacitance value of the variable capacitor 603 changes according to the value of the voltage applied between the first electrode and the second electrode. In this embodiment, a variable capacitance diode is used as the variable capacitance 603.

The smoothing capacitor 606 and the smoothing capacitor 608 are connected in series between the output terminal OUT1 and the output terminal OUT2 of the rectifier circuit 601. Note that the rectifier circuit 601 illustrated in FIG. 6 uses the smoothing capacitor 606 and the smoothing capacitor 608 for smoothing the rectified voltage; however, these capacitors are not necessarily used. However, by using the smoothing capacitor 606 and the smoothing capacitor 608, components other than direct current, such as ripples, included in the rectified voltage can be reduced.

In the rectifier circuit 601 illustrated in FIG. 6, the terminal A <b> 1 is connected to the first electrode included in the variable capacitor 603 and the second electrode (cathode) included in the diode 607. The second electrode of the variable capacitor 603 is connected to the second electrode (cathode) of the diode 604 and the first electrode (anode) of the diode 605. The first electrode (anode) included in the diode 604 and the terminal A 2 are connected to the second electrode included in the smoothing capacitor 606 and the first electrode included in the smoothing capacitor 608. A first electrode (anode) included in the diode 607 and a second electrode included in the smoothing capacitor 608 are connected to the output terminal OUT2. The second electrode (cathode) included in the diode 605 and the first electrode included in the smoothing capacitor 606 are connected to the output terminal OUT1.

In FIG. 6, when the terminal A2 is dropped to the ground (GND), the first electrode (anode) included in the diode 604, the second electrode included in the smoothing capacitor 606, and the first electrode included in the smoothing capacitor 608 are Dropped to GND.

When the antenna 602 is exposed to radio waves having a wavelength in a specific range, an AC electromotive force is generated in the antenna 602, and an AC voltage is applied between the terminal A1 and the terminal A2. If the amplitude of the AC voltage applied between the terminal A1 and the terminal A2 is Vh, a voltage corresponding to three times the height of Vh is applied to the output terminal OUT1.

The input impedance of the rectifier circuit 601 can be changed according to the capacitance value of the variable capacitor 603. The variable capacitor 603 can change its capacitance value depending on the value of the voltage applied to the first electrode. In the case of the rectifier circuit 601 illustrated in FIG. 6, impedance is matched between the rectifier circuit 601 and the antenna 602 when a voltage within a predetermined range is applied to the first electrode of the variable capacitor 603. Then, the AC voltage applied to the first electrode is applied to the semiconductor element subsequent to the variable capacitor 603. Specifically, the voltage is applied to the second electrode of the diode 604 and the first electrode of the diode 605.

On the other hand, in the case of the rectifier circuit 601 shown in FIG. 6, when a voltage with a large amplitude that deviates from a predetermined range is applied to the first electrode of the variable capacitor 603, the capacitance value of the variable capacitor 603 decreases. As the capacitance value of the variable capacitor 603 is reduced, the input impedance of the rectifier circuit 601 is increased, so that impedance mismatch between the rectifier circuit 601 and the antenna 602 can be achieved. As a result, the amplitude of the AC voltage applied to the first electrode is suppressed by reflection, and is applied to the semiconductor element at the subsequent stage of the variable capacitor 603. Specifically, the voltage is applied to the second electrode of the diode 604 and the first electrode of the diode 605.

As described above, the rectifier circuit of this embodiment can suppress the amplitude of the AC voltage by using reflection. Therefore, deterioration or destruction of semiconductor elements such as the diodes 604 and 605 and the smoothing capacitor 606 in the rectifier circuit 601 due to overcurrent can be suppressed. In addition, since it is not necessary to provide a limiter in the previous stage of the rectifier circuit as in the prior art, it is possible to avoid a situation where the power is consumed due to a short circuit with the ground (GND) side via the parasitic capacitance or parasitic inductance of the limiter. I can do it.

Note that the type and number of semiconductor elements used for the rectifier circuit 601 are not limited to the structure shown in this embodiment. In order to obtain more ideal rectification characteristics, a resistor, a capacitor, a diode, an inductor, a switch, and the like may be added as appropriate in addition to the semiconductor element shown in FIG.

In this embodiment, a configuration of a rectifier circuit of the present invention that can increase the height of an output voltage by four times will be described with reference to FIG.

In FIG. 7, the rectifier circuit 701 is connected to the terminals A1 and A2 included in the antenna 702, and the terminals A1 and A2 included in the antenna 702 function as input terminals of the rectifier circuit 701. Note that FIG. 7 illustrates the case where the antenna 702 has a coil shape, but the shape of the antenna used in this embodiment is not limited thereto. When communication is performed using an electric field instead of a magnetic field, the antenna 702 does not have to be coiled.

The rectifier circuit 701 is rectified with a variable capacitor 703, a variable capacitor 709, and a diode 704, a diode 705, a diode 707, and a diode 710 for rectifying an AC voltage applied between the terminal A1 and the terminal A2. A smoothing capacitor 706 and a smoothing capacitor 708 for smoothing the voltage are provided. The variable capacitor 703 and the variable capacitor 709 have at least two electrodes, respectively. The capacitance values of the variable capacitor 703 and the variable capacitor 709 change according to the value of the voltage applied between the first electrode and the second electrode. In this embodiment, variable capacitance diodes are used as the variable capacitance 703 and the variable capacitance 709.

The smoothing capacitor 706 and the smoothing capacitor 708 are connected in series between the output terminal OUT1 and the output terminal OUT2 of the rectifier circuit 701. Note that the rectifier circuit 701 illustrated in FIG. 7 uses the smoothing capacitor 706 and the smoothing capacitor 708 for smoothing the rectified voltage; however, these capacitors are not necessarily used. However, by using the smoothing capacitor 706 and the smoothing capacitor 708, it is possible to reduce components other than direct current such as ripples in the rectified voltage.

In the rectifier circuit 701 illustrated in FIG. 7, the terminal A <b> 1 is connected to the first electrode included in the variable capacitor 703. The second electrode included in the variable capacitor 703 is connected to the first electrode included in the variable capacitor 709, the first electrode (anode) included in the diode 710, and the second electrode (cathode) included in the diode 707. Yes. The second electrode of the variable capacitor 709 is connected to the second electrode (cathode) of the diode 704 and the first electrode (anode) of the diode 705. A first electrode (anode) included in the diode 707 and a second electrode included in the smoothing capacitor 708 are connected to the terminal A2 and the output terminal OUT2. The first electrode (anode) included in the diode 704 and the second electrode (cathode) included in the diode 710 are connected to the second electrode included in the smoothing capacitor 706 and the first electrode included in the smoothing capacitor 708. Yes. A second electrode (cathode) included in the diode 705 and a first electrode included in the smoothing capacitor 706 are connected to the output terminal OUT1.

In FIG. 7, when the terminal A2 is dropped to the ground (GND), the first electrode (anode) of the diode 707 and the second electrode of the smoothing capacitor 708 are dropped to GND.

When the antenna 702 is exposed to radio waves having a wavelength in a specific range, an AC electromotive force is generated in the antenna 702, and an AC voltage is applied between the terminal A1 and the terminal A2. If the amplitude of the AC voltage applied between the terminal A1 and the terminal A2 is Vh, a voltage corresponding to four times the height of Vh is applied to the output terminal OUT1.

The input impedance of the rectifier circuit 701 can be changed according to the capacitance value of the variable capacitor 703 and the capacitance value of the variable capacitor 709. The capacitance values of the variable capacitor 703 and the variable capacitor 709 can be changed depending on the value of the voltage applied to the first electrode. In the case of the rectifier circuit 701 illustrated in FIG. 7, impedance is matched between the rectifier circuit 701 and the antenna 702 when a voltage within a predetermined range is applied to the first electrode of the variable capacitor 703. Then, the AC voltage applied to the first electrode is applied to a semiconductor element subsequent to the variable capacitor 703. Specifically, the voltage is applied to the first electrode of the variable capacitor 709, the first electrode of the diode 710, and the second electrode of the diode 707.

On the other hand, when a voltage having a large amplitude deviating from a predetermined range is applied to the first electrode of the variable capacitor 703, the capacitance value of the variable capacitor 703 decreases. The smaller the capacitance value of the variable capacitor 703 is, the larger the input impedance of the rectifier circuit 701 becomes, so that the impedance can be mismatched between the rectifier circuit 701 and the antenna 702. As a result, the amplitude of the alternating voltage applied to the first electrode is suppressed by reflection, and is applied to the semiconductor element at the subsequent stage of the variable capacitor 703. Specifically, the voltage is applied to the first electrode of the variable capacitor 709, the first electrode of the diode 710, and the second electrode of the diode 707.

Furthermore, it is assumed that the amplitude of the AC voltage applied to the first electrode of the variable capacitor 709, the first electrode of the diode 710, and the second electrode of the diode 707 is still large enough to deviate from the predetermined range. The In this embodiment, even in this case, the capacitance value of the variable capacitor 709 can be reduced to make the impedance mismatch. As a result, the amplitude of the AC voltage applied to the first electrode of the variable capacitor 709 is suppressed by reflection, and is applied to the semiconductor element at the subsequent stage of the variable capacitor 709. Specifically, the voltage is applied to the first electrode of the diode 705 and the second electrode of the diode 704.

As described above, the rectifier circuit 701 of this embodiment can suppress the amplitude of the AC voltage by using reflection. Therefore, deterioration or destruction of semiconductor elements such as the diodes 704, 705, 707, and 710 and the smoothing capacitors 706 and 708 in the rectifier circuit 701 can be suppressed due to overcurrent. In addition, since it is not necessary to provide a limiter in the previous stage of the rectifier circuit as in the prior art, it is possible to avoid a situation where the power is consumed due to a short circuit with the ground (GND) side via the parasitic capacitance or parasitic inductance of the limiter. I can do it.

In the present embodiment, the configuration of the rectifier circuit using two variable capacitors has been described. However, one of the variable capacitors 703 and 709 may be replaced with a capacitor having a fixed capacitance value. However, the reliability of the rectifier circuit 701 can be further increased by using the variable capacitor 703 and the variable capacitor 709.

Further, the type and number of semiconductor elements used in the rectifier circuit 701 are not limited to the configuration shown in this embodiment. In order to obtain a more ideal rectifying characteristic, a resistor, a capacitor, a diode, an inductor, a switch, and the like may be added as appropriate in addition to the semiconductor element shown in FIG.

In this embodiment, the configuration of the rectifier circuit of the present invention that can increase the height of the output voltage by four times will be described with reference to FIG.

In FIG. 8, the rectifier circuit 801 is connected to the terminals A1 and A2 included in the antenna 802, and the terminals A1 and A2 included in the antenna 802 function as input terminals of the rectifier circuit 801. Note that FIG. 8 illustrates a case where the antenna 802 has a coil shape, but the shape of the antenna used in this embodiment is not limited to this. When communication is performed using an electric field instead of a magnetic field, the antenna 802 does not have to be coiled.

The rectifier circuit 801 is rectified with a variable capacitor 803 and a variable capacitor 809, and a diode 804, a diode 805, a diode 807, and a diode 810 for rectifying an AC voltage applied between the terminal A1 and the terminal A2. A smoothing capacitor 806 and a smoothing capacitor 808 for smoothing the voltage are provided. The variable capacitor 803 and the variable capacitor 809 each have at least two electrodes. In accordance with the value of the voltage applied between the first electrode and the second electrode, the capacitance values of the variable capacitor 803 and the variable capacitor 809 change. In this embodiment, variable capacitance diodes are used as the variable capacitance 803 and the variable capacitance 809.

The smoothing capacitor 806 and the smoothing capacitor 808 are connected in series between the output terminal OUT1 and the output terminal OUT2 included in the rectifier circuit 801. Note that the rectifier circuit 801 illustrated in FIG. 8 uses the smoothing capacitor 806 and the smoothing capacitor 808 for smoothing the rectified voltage; however, these capacitors are not necessarily used. However, by using the smoothing capacitor 806 and the smoothing capacitor 808, components other than direct current, such as ripple, in the rectified voltage can be reduced.

In the rectifier circuit 801 illustrated in FIG. 8, the terminal A1 is connected to the first electrode of the variable capacitor 803 and the first electrode of the variable capacitor 809. The second electrode included in the variable capacitor 809 is connected to the first electrode (anode) included in the diode 810 and the second electrode (cathode) included in the diode 807. The second electrode included in the variable capacitor 803 is connected to the second electrode (cathode) included in the diode 804 and the first electrode (anode) included in the diode 805. A first electrode (anode) included in the diode 807 and a second electrode included in the smoothing capacitor 808 are connected to the output terminal OUT2. The first electrode (anode) included in the diode 804 and the second electrode (cathode) included in the diode 810 are the terminal A2, the second electrode included in the smoothing capacitor 806, and the first electrode included in the smoothing capacitor 808. It is connected. The second electrode (cathode) included in the diode 805 and the first electrode included in the smoothing capacitor 806 are connected to the output terminal OUT1.

In FIG. 8, when the terminal A2 is dropped to the ground (GND), the first electrode of the diode 804, the second electrode of the diode 810, the second electrode of the smoothing capacitor 806, and the first electrode of the smoothing capacitor 808 Is dropped to GND.

When the antenna 802 is exposed to radio waves having a wavelength in a specific range, an AC electromotive force is generated in the antenna 802, and an AC voltage is applied between the terminal A1 and the terminal A2. If the amplitude of the AC voltage applied between the terminal A1 and the terminal A2 is Vh, a voltage corresponding to four times the height of Vh is applied to the output terminal OUT1.

The input impedance of the rectifier circuit 801 can be changed according to the capacitance value of the variable capacitor 803 and the capacitance value of the variable capacitor 809. The capacitance values of the variable capacitor 803 and the variable capacitor 809 can be changed depending on the value of the voltage applied to the first electrode. In the case of the rectifier circuit 801 illustrated in FIG. 8, impedance is matched between the rectifier circuit 801 and the antenna 802 when a voltage within a predetermined range is applied to the first electrodes of the variable capacitors 803 and 809. It becomes. Then, the AC voltage applied to the first electrode is applied to the semiconductor elements subsequent to the variable capacitors 803 and 809. Specifically, the voltage is applied to the first electrode of the diode 810, the second electrode of the diode 807, the second electrode of the diode 804, and the first electrode of the diode 805.

On the other hand, when a voltage having a large amplitude deviating from a predetermined range is applied to the first electrodes of the variable capacitors 803 and 809, the capacitance values of the variable capacitors 803 and 809 are reduced. The smaller the capacitance values of the variable capacitor 803 and the variable capacitor 809, the larger the input impedance of the rectifier circuit 801. Therefore, impedance mismatch between the rectifier circuit 801 and the antenna 802 can be achieved. As a result, the amplitude of the AC voltage applied to the first electrode is suppressed by reflection, and is applied to the semiconductor elements subsequent to the variable capacitors 803 and 809. Specifically, the voltage is applied to the first electrode of the diode 810, the second electrode of the diode 807, the second electrode of the diode 804, and the first electrode of the diode 805.

As described above, the rectifier circuit 801 of this embodiment can suppress the amplitude of the AC voltage by using reflection. Therefore, deterioration or destruction of semiconductor elements such as the diodes 804, 805, 807, and 810 and the smoothing capacitors 806 and 808 in the rectifier circuit 801 due to overcurrent can be suppressed. In addition, since it is not necessary to provide a limiter in the previous stage of the rectifier circuit as in the prior art, it is possible to avoid a situation where the power is consumed due to a short circuit with the ground (GND) side via the parasitic capacitance or parasitic inductance of the limiter. I can do it.

In this embodiment, the configuration of the rectifier circuit using two variable capacitors has been described. However, one of the variable capacitors 803 and 809 may be replaced with a capacitor having a fixed capacitance value. However, the reliability of the rectifier circuit 801 can be further increased by using the variable capacitor 803 and the variable capacitor 809.

The type and number of semiconductor elements used for the rectifier circuit 801 are not limited to the structure shown in this embodiment. In order to obtain a more ideal rectification characteristic, a resistor, a capacitor, a diode, an inductor, a switch, or the like may be added as appropriate in addition to the semiconductor element shown in FIG.

The structure of the semiconductor device of the present invention will be described with reference to FIG. FIG. 9 is a block diagram showing one embodiment of a semiconductor device of the present invention. In FIG. 9, the semiconductor device 900 includes an antenna 901 and an integrated circuit 902. The integrated circuit 902 includes a rectifier circuit 903, a demodulation circuit 904, a modulation circuit 905, a regulator 906, a signal generation circuit 907, an encoder 908, and a memory 909.

When a radio wave is sent from the reader, the radio wave is converted into an AC voltage by the antenna 901. The rectifier circuit 903 rectifies the AC voltage from the antenna 901 to generate a power supply voltage. In the rectifier circuit 903 of the present invention, even if the AC voltage generated in the antenna 901 has an amplitude large enough to deviate from a predetermined range, the power supply is suppressed while suppressing deterioration or destruction of the semiconductor element in the rectifier circuit 903. Can generate a voltage.

The power supply voltage generated in the rectifier circuit 903 is supplied to the signal generation circuit 907 and the regulator 906. The regulator 906 stabilizes the voltage for power supply from the rectifier circuit 903 or adjusts the height thereof, and then the demodulation circuit 904, the modulation circuit 905, the signal generation circuit 907, the encoder 908, or the memory in the integrated circuit 902. The voltage is supplied to various circuits such as 909.

The demodulation circuit 904 generates a signal by demodulating the AC voltage from the antenna 901 and outputs the signal to the subsequent signal generation circuit 907. The signal generation circuit 907 performs arithmetic processing according to the signal input from the demodulation circuit 904, and separately generates a signal. When performing the arithmetic processing, the memory 909 can be used as a primary cache memory or a secondary cache memory. The signal generated by the signal generation circuit 907 is encoded by the encoder 908 and then output to the modulation circuit 905. The modulation circuit 905 modulates the radio wave generated in the antenna 901 in accordance with the signal. When the modulated radio wave is generated in the antenna 901, the reader can receive the signal from the signal generation circuit 907 by receiving the radio wave.

As described above, communication between the semiconductor device 900 and the reader can be performed by modulating a radio wave used as a carrier (carrier wave). As the carrier, radio waves of various frequencies such as 125 kHz, 13.56 MHz, and 950 MHz can be used. There are various modulation methods such as amplitude modulation, frequency modulation, and phase modulation, but there is no particular limitation.

The signal transmission method can be classified into various types such as an electromagnetic coupling method, an electromagnetic induction method, and a microwave method depending on the wavelength of the carrier. In the case of the electromagnetic coupling method or the electromagnetic induction method, an excessively large AC voltage may be generated in the antenna when the semiconductor device is exposed to strong radio waves. The use of the rectifier circuit of the present invention can prevent the semiconductor element in the integrated circuit from being deteriorated or destroyed in the integrated circuit by an excessively large AC voltage. Is particularly effective.

The memory 909 may be a non-volatile memory or a volatile memory. As the memory 909, for example, SRAM, DRAM, flash memory, EEPROM, FeRAM, or the like can be used.

In this embodiment, the structure of the semiconductor device 900 including the antenna 901 is described; however, the semiconductor device of the present invention does not necessarily include an antenna. Further, an oscillation circuit or a secondary battery may be provided in the semiconductor device illustrated in FIG.

In FIG. 9, the structure of a semiconductor device having only one antenna is described; however, the present invention is not limited to this structure. You may have two antennas, the antenna for receiving electric power, and the antenna for receiving a signal. If there is only one antenna, for example, when both power supply and signal transmission are performed using radio waves of 950 MHz, a large amount of power may be transmitted far away, which may cause interference with reception of other wireless devices. For this reason, it is desirable to supply power at a short distance by lowering the frequency of radio waves. In this case, however, the communication distance is inevitably shortened. However, if there are two antennas, the frequency of the radio wave for supplying power and the frequency of the radio wave for sending signals can be used properly. For example, when sending power, a magnetic field can be used with a radio wave frequency of 13.56 MHz, and when sending a signal, an electric field can be used with a radio wave frequency of 950 MHz. By properly using the antennas in accordance with the functions in this way, power can be supplied only for short distance communication, and signal transmission can be performed over long distances.

This example can be implemented in combination with any of Embodiments 1 to 3 and Examples 1 to 4 as appropriate.

Next, the appearance of the semiconductor device of the present invention will be described.

FIG. 10A is a perspective view showing one mode of a semiconductor device of the present invention formed in a chip shape. 1601 corresponds to an integrated circuit, and 1602 corresponds to an antenna. The antenna 1602 is connected to the integrated circuit 1601. Reference numeral 1603 corresponds to a substrate, and 1604 corresponds to a cover material. The rectifier circuit of the present invention is included in the integrated circuit 1601. The integrated circuit 1601 is formed over the substrate 1603, and the cover material 1604 overlaps the substrate 1603 so as to cover the integrated circuit 1601 and the antenna 1602. Note that the antenna 1602 may be formed over the substrate 1603 or a separately formed antenna 1602 may be attached to the substrate 1603 after the integrated circuit 1601 is formed.

FIG. 10B is a perspective view showing one mode of the semiconductor device of the present invention formed in a card shape. Reference numeral 1605 denotes an integrated circuit, 1606 denotes an antenna, and the antenna 1606 is connected to the integrated circuit 1605. Reference numeral 1608 denotes a substrate functioning as an inlet sheet, and 1607 and 1609 denote cover materials. The integrated circuit 1605 and the antenna 1606 are formed over a substrate 1608, and the substrate 1608 is sandwiched between two cover materials 1607 and 1609.

Note that FIGS. 10A and 10B illustrate the case where the antenna 1602 and the antenna 1606 are coiled, but the shape of the antenna used in the present invention is not limited thereto. In the case where communication is performed using an electric field instead of a magnetic field, the antenna 1602 and the antenna 1606 do not need to be coiled.

The rectifier circuit of the present invention can be formed by a normal MOS process including variable capacitance. Therefore, the rectifier circuit, and thus the semiconductor device using the rectifier circuit, can be downsized.

Next, a method for manufacturing a semiconductor device of the present invention will be described in detail. Note that in this embodiment, a thin film transistor (TFT) is shown as an example of a semiconductor element; however, the semiconductor element used in the semiconductor device of the present invention is not limited to this. For example, in addition to the TFT, a memory element, a diode, a resistor, a coil, a capacitor, an inductor, or the like can be used.

First, as illustrated in FIG. 12A, an insulating film 301, a separation layer 302, an insulating film 303 functioning as a base film, and a semiconductor film 304 are sequentially formed over a heat-resistant substrate 300. The insulating film 301, the separation layer 302, the insulating film 303, and the semiconductor film 304 can be formed successively.

As the substrate 300, for example, a glass substrate such as barium borosilicate glass or alumino borosilicate glass, a quartz substrate, a ceramic substrate, or the like can be used. Further, a metal substrate including a stainless steel substrate or a semiconductor substrate such as a silicon substrate may be used. A substrate made of a synthetic resin having flexibility such as plastic generally has a lower heat-resistant temperature than the above-mentioned substrate, but can be used as long as it can withstand the processing temperature in the manufacturing process. .

As plastic substrates, polyester represented by polyethylene terephthalate (PET), polyethersulfone (PES), polyethylene naphthalate (PEN), polycarbonate (PC), nylon, polyetheretherketone (PEEK), polysulfone (PSF), poly Examples include ether imide (PEI), polyarylate (PAR), polybutylene terephthalate (PBT), polyimide, acrylonitrile butadiene styrene resin, polyvinyl chloride, polypropylene, polyvinyl acetate, and acrylic resin.

Note that in this embodiment, the release layer 302 is provided over the entire surface of the substrate 300, but the present invention is not limited to this structure. For example, the peeling layer 302 may be partially formed on the substrate 300 by using a photolithography method or the like.

The insulating film 301 and the insulating film 303 are formed using silicon oxide, silicon nitride (SiNx, Si ₃ N _4, etc.), silicon oxynitride (SiOxNy) (x>y> 0), oxynitride by CVD, sputtering, or the like. It is formed using an insulating material such as silicon (SiNxOy) (x>y> 0).

The insulating film 301 and the insulating film 303 are provided to prevent alkali metal such as Na or alkaline earth metal contained in the substrate 300 from diffusing into the semiconductor film 304 and adversely affecting the characteristics of the semiconductor element such as TFT. . In addition, the insulating film 303 has a function of preventing the impurity element contained in the separation layer 302 from diffusing into the semiconductor film 304 and protecting the semiconductor element in a step of separating the semiconductor element later.

The insulating film 301 and the insulating film 303 may be a single insulating film or may be a stack of a plurality of insulating films. In this embodiment, the insulating film 303 is formed by sequentially stacking a silicon oxynitride film having a thickness of 100 nm, a silicon nitride oxide film having a thickness of 50 nm, and a silicon oxynitride film having a thickness of 100 nm. The thickness and the number of stacked layers are not limited to this. For example, instead of the lower silicon oxynitride film, a siloxane-based resin having a thickness of 0.5 to 3 μm may be formed by a spin coating method, a slit coater method, a droplet discharge method, a printing method, or the like. Further, a silicon nitride film (SiNx, Si ₃ N ₄ or the like) may be used instead of the middle layer silicon nitride oxide film. Further, a silicon oxide film may be used instead of the upper silicon oxynitride film. Each film thickness is preferably 0.05 to 3 μm, and can be freely selected from the range.

Alternatively, the lower layer of the insulating film 303 closest to the separation layer 302 may be formed using a silicon oxynitride film or a silicon oxide film, the middle layer may be formed using a siloxane-based resin, and the upper layer may be formed using a silicon oxide film.

Note that the siloxane-based resin corresponds to a resin including a Si—O—Si bond formed using a siloxane-based material as a starting material. The siloxane-based resin may have at least one of fluorine, alkyl groups, and aromatic hydrocarbons in addition to hydrogen as a substituent.

The silicon oxide film can be formed by a method such as thermal CVD, plasma CVD, atmospheric pressure CVD, or bias ECRCVD using a mixed gas such as SiH ₄ / O ₂ or TEOS (tetraethoxysilane) / O ₂ . The silicon nitride film can be typically formed by plasma CVD using a mixed gas of SiH ₄ / NH ₃ . The silicon oxynitride film and the silicon nitride oxide film can be typically formed by plasma CVD using a mixed gas of SiH ₄ / N ₂ O.

As the separation layer 302, a metal film, a metal oxide film, or a film formed by stacking a metal film and a metal oxide film can be used. The metal film and the metal oxide film may be a single layer or may have a stacked structure in which a plurality of layers are stacked. In addition to a metal film or a metal oxide film, a metal nitride or a metal oxynitride may be used. The peeling layer 302 can be formed by various CVD methods such as a sputtering method and a plasma CVD method.

Examples of the metal used for the peeling layer 302 include tungsten (W), molybdenum (Mo), titanium (Ti), tantalum (Ta), niobium (Nb), nickel (Ni), cobalt (Co), zirconium (Zr), Zinc (Zn), ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), and the like can be given. As the peeling layer 302, a film formed using an alloy containing the metal as a main component or a film formed using a compound containing the metal may be used in addition to the film formed using the metal.

The peeling layer 302 may be a film formed of silicon (Si) alone or a film formed of a compound containing silicon (Si) as a main component. Alternatively, a film formed of an alloy containing silicon (Si) and the above metal may be used. The film containing silicon may be amorphous, microcrystalline, or polycrystalline.

As the peeling layer 302, the above-described film may be used as a single layer, or a plurality of the above-described films may be stacked. The peeling layer 302 in which the metal film and the metal oxide film are stacked can be formed by forming the original metal film and then oxidizing or nitriding the surface of the metal film. Specifically, going to the metal film to a plasma treatment as a source in an oxygen atmosphere or an N _{2 O} atmosphere, or thermal treatment may be applied to the metal film in an oxygen atmosphere or an N _{2 O} atmosphere. Alternatively, oxidation can be performed by forming a silicon oxide film or a silicon oxynitride film so as to be in contact with the original metal film. Further, nitriding can be performed by forming a silicon nitride oxide film or a silicon nitride film so as to be in contact with the original metal film.

As plasma treatment for oxidizing or nitriding a metal film, the plasma density is 1 × 10 ¹¹ cm ⁻³ or more, preferably 1 × 10 ¹¹ cm ⁻³ to 9 × 10 ¹⁵ cm ⁻³ , and microwaves (for example, frequency) High-density plasma treatment using a high frequency such as 2.45 GHz may be performed.

Note that the release layer 302 in which the metal film and the metal oxide film are stacked may be formed by oxidizing the surface of the original metal film, but the metal oxide film is separately formed after the metal film is formed. You may do it.

For example, when tungsten is used as a metal, a tungsten film is formed as a base metal film by a sputtering method, a CVD method, or the like, and then plasma treatment is performed on the tungsten film. As a result, a tungsten film corresponding to the metal film and a metal oxide film in contact with the metal film and formed of an oxide of tungsten can be formed.

Tungsten oxide is represented by WOx. x is in the range of 2 to 3, and when x is 2 (WO ₂ ), x is 2.5 (W ₂ O ₅ ), x is 2.75 (W ₄ O ₁₁ ), This is the case when x is 3 (WO ₃ ). There is no particular restriction on the value of x in forming tungsten oxide, and the value of x may be determined based on the etching rate or the like.

The semiconductor film 304 is preferably formed without being exposed to the air after the insulating film 303 is formed. The thickness of the semiconductor film 304 is 20 to 200 nm (desirably 40 to 170 nm, preferably 50 to 150 nm). Note that the semiconductor film 304 may be an amorphous semiconductor or a polycrystalline semiconductor. As the semiconductor, not only silicon but also silicon germanium can be used. When silicon germanium is used, the concentration of germanium is preferably about 0.01 to 4.5 atomic%.

Note that the semiconductor film 304 may be crystallized by a known technique. Known crystallization methods include a laser crystallization method using laser light and a crystallization method using a catalytic element. Alternatively, a crystallization method using a catalytic element and a laser crystallization method can be used in combination. Further, when a substrate having excellent heat resistance such as quartz is used as the substrate 300, a thermal crystallization method using an electric furnace, a lamp annealing crystallization method using infrared light, a crystallization method using a catalytic element, A crystal method in which high-temperature annealing at about 950 ° C. is freely combined may be used.

For example, in the case of using laser crystallization, heat treatment at 550 ° C. for 4 hours is performed on the semiconductor film 304 in order to increase the resistance of the semiconductor film 304 to the laser before laser crystallization. By using a solid-state laser capable of continuous oscillation and irradiating laser light of the second harmonic to the fourth harmonic of the fundamental wave, a crystal having a large grain size can be obtained. For example, typically, it is desirable to use the second harmonic (532 nm) or the third harmonic (355 nm) of an Nd: YVO ₄ laser (fundamental wave 1064 nm). Specifically, laser light emitted from a continuous wave YVO ₄ laser is converted into a harmonic by a nonlinear optical element to obtain laser light with an output of 10 W. Then, it is preferably formed into a rectangular or elliptical laser beam on the irradiation surface by an optical system, and the semiconductor film 304 is irradiated. At this time, the energy density of approximately 0.01 to 100 MW / cm ² (preferably 0.1 to 10 MW / cm ²⁾ is required. Then, irradiation is performed at a scanning speed of about 10 to 2000 cm / sec.

As a continuous wave gas laser, an Ar laser, a Kr laser, or the like can be used. As continuous wave solid-state lasers, YAG laser, YVO ₄ laser, YLF laser, YAlO ₃ laser, forsterite (Mg ₂ SiO ₄ ) laser, GdVO ₄ laser, Y ₂ O ₃ laser, glass laser, ruby laser, alexandrite laser Ti: sapphire laser or the like can be used.

As pulse oscillation lasers, for example, Ar laser, Kr laser, excimer laser, CO ₂ laser, YAG laser, Y ₂ O ₃ laser, YVO ₄ laser, YLF laser, YAlO ₃ laser, glass laser, ruby laser, alexandrite laser, A Ti: sapphire laser, a copper vapor laser, or a gold vapor laser can be used.

Alternatively, laser crystallization may be performed using a frequency band that is significantly higher than a frequency band of several tens to several hundreds Hz that is normally used, with an oscillation frequency of pulsed laser light of 10 MHz or higher. It is said that the time from when the semiconductor film 304 is irradiated with laser light by pulse oscillation until the semiconductor film 304 is completely solidified is several tens to several hundreds nsec. Therefore, by using the above frequency, the laser light of the next pulse can be irradiated from the time when the semiconductor film 304 is melted by the laser light to solidify. Accordingly, since the solid-liquid interface can be continuously moved in the semiconductor film 304, the semiconductor film 304 having crystal grains continuously grown in the scanning direction is formed. Specifically, a set of crystal grains having a width of 10 to 30 μm in the scanning direction of the included crystal grains and a width of about 1 to 5 μm in a direction perpendicular to the scanning direction can be formed. By forming single crystal grains grown continuously along the scanning direction, it is possible to form a semiconductor film 304 having almost no crystal grain boundaries at least in the channel direction of the TFT.

Laser crystallization may be performed by irradiating a continuous-wave fundamental laser beam and a continuous-wave harmonic laser beam in parallel, or a continuous-wave fundamental laser beam and a pulse oscillation harmonic. You may make it irradiate with the laser beam of a wave in parallel.

Note that laser light may be irradiated in an inert gas atmosphere such as a rare gas or nitrogen. Thereby, roughness of the semiconductor surface due to laser light irradiation can be suppressed, and variation in threshold value caused by variation in interface state density can be suppressed.

By the above-described laser light irradiation, the semiconductor film 304 with higher crystallinity is formed. Note that a polycrystalline semiconductor formed in advance by a sputtering method, a plasma CVD method, a thermal CVD method, or the like may be used for the semiconductor film 304.

Further, although the semiconductor film 304 is crystallized in this embodiment, the process may be advanced to a later-described process without being crystallized as it is as an amorphous silicon semiconductor film or a microcrystalline semiconductor film. A TFT using an amorphous semiconductor or a microcrystalline semiconductor has an advantage that a manufacturing cost can be reduced and a yield can be increased because the number of manufacturing steps is smaller than that of a TFT using a polycrystalline semiconductor.

An amorphous semiconductor can be obtained by glow discharge decomposition of a gas containing silicon. Examples of the gas containing silicon include SiH ₄ and Si ₂ H ₆ . The gas containing silicon may be diluted with hydrogen, hydrogen, and helium.

Next, as illustrated in FIG. 12B, the semiconductor film 304 is processed (patterned) into a predetermined shape, so that island-shaped semiconductor films 305 to 307 are formed. Then, a gate insulating film 308 is formed so as to cover the island-shaped semiconductor films 305 to 307. The gate insulating film 308 can be formed using a single layer or a stack of films containing silicon nitride, silicon oxide, silicon nitride oxide, or silicon oxynitride by a plasma CVD method, a sputtering method, or the like. In the case of stacking, for example, a three-layer structure of a silicon oxide film, a silicon nitride film, and a silicon oxide film is preferable from the substrate 300 side.

The gate insulating film 308 may be formed by oxidizing or nitriding the surface of the island-shaped semiconductor films 305 to 307 by performing high-density plasma treatment. The high-density plasma treatment is performed using, for example, a rare gas such as He, Ar, Kr, or Xe and a mixed gas such as oxygen, nitrogen oxide, ammonia, nitrogen, or hydrogen. In this case, high-density plasma can be generated at a low electron temperature by exciting the plasma by introducing microwaves. By oxidizing or nitriding the surface of the semiconductor film with oxygen radicals (which may include OH radicals) or nitrogen radicals (which may include NH radicals) generated by such high-density plasma, An insulating film having a thickness of 20 nm, typically 5 to 10 nm, is formed in contact with the semiconductor film. This insulating film having a thickness of 5 to 10 nm is used as the gate insulating film 308.

Since the oxidation or nitridation of the semiconductor film by the high-density plasma treatment described above proceeds by a solid phase reaction, the interface state density between the gate insulating film and the semiconductor film can be extremely reduced. Further, by directly oxidizing or nitriding the semiconductor film by high-density plasma treatment, variation in the thickness of the formed insulating film can be suppressed. Also, when the semiconductor film has crystallinity, the surface of the semiconductor film is oxidized by solid phase reaction using high-density plasma treatment, so that the rapid oxidation only at the crystal grain boundary is suppressed and the uniformity is good. A gate insulating film having a low interface state density can be formed. A transistor in which an insulating film formed by high-density plasma treatment is included in part or all of a gate insulating film can suppress variation in characteristics.

Next, as illustrated in FIG. 12C, after a conductive film is formed over the gate insulating film 308, the conductive film is processed (patterned) into a predetermined shape, whereby the island-shaped semiconductor films 305 to 307 are formed. A gate electrode 309 is formed above. In this embodiment, the gate electrode 309 is formed by patterning two stacked conductive films. As the conductive film, tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), copper (Cu), chromium (Cr), niobium (Nb), or the like can be used. Alternatively, an alloy containing the above metal as a main component or a compound containing the above metal may be used. Alternatively, a semiconductor film such as polycrystalline silicon in which an impurity element such as phosphorus imparting conductivity is doped may be used.

In this embodiment, a tantalum nitride film or a tantalum (Ta) film is used as the first conductive film, and a tungsten (W) film is used as the second conductive film. As a combination of the two conductive films, in addition to the example shown in this embodiment, a tungsten nitride film and a tungsten film, a molybdenum nitride film and a molybdenum film, an aluminum film and a tantalum film, an aluminum film and a titanium film, and the like can be given. Since tungsten and tantalum nitride have high heat resistance, heat treatment for thermal activation can be performed in the process after forming the two conductive films. As a combination of the second conductive film, for example, silicon and NiSi (nickel silicide) doped with an impurity imparting n-type, Si and WSix doped with an impurity imparting n-type, and the like may be used. I can do it.

In this embodiment, the gate electrode 309 is formed using two stacked conductive films, but this embodiment is not limited to this structure. The gate electrode 309 may be formed of a single conductive film or may be formed by stacking three or more conductive films. In the case of a three-layer structure in which three or more conductive films are stacked, a stacked structure of a molybdenum film, an aluminum film, and a molybdenum film is preferably employed.

A CVD method, a sputtering method, or the like can be used for forming the conductive film. In this embodiment, the first conductive film is formed with a thickness of 20 to 100 nm, and the second conductive film is formed with a thickness of 100 to 400 nm.

Note that as a mask used for forming the gate electrode 309, silicon oxide, silicon oxynitride, or the like may be used as a mask instead of a resist. In this case, a step of forming a mask made of silicon oxide, silicon oxynitride, or the like by patterning is added. However, since the thickness of the mask during etching is less than that of the resist, the gate electrode 309 having a desired width may be formed. it can. Alternatively, the gate electrode 309 may be selectively formed by a droplet discharge method without using a mask.

The droplet discharge method means a method of forming a predetermined pattern by discharging or ejecting droplets containing a predetermined composition from the pores, and includes an ink jet method and the like in its category.

Next, using the gate electrode 309 as a mask, the island-shaped semiconductor films 305 to 307 are doped with an impurity element imparting n-type (typically P (phosphorus) or As (arsenic)) at a low concentration (first). 1 doping step). The conditions of the first doping step are a dose amount of 1 × 10 ¹⁵ to 1 × 10 ¹⁹ / cm ³ and an acceleration voltage of 50 to 70 keV, but are not limited thereto. In the first doping step, doping is performed through the gate insulating film 308, and a pair of low-concentration impurity regions 310 are formed in the island-shaped semiconductor films 305 to 307, respectively. Note that the first doping step may be performed by covering the island-shaped semiconductor film 305 to be a p-channel TFT with a mask.

Next, as shown in FIG. 13A, a mask 311 is formed so as to cover the island-shaped semiconductor films 306 and 307 to be n-channel TFTs. Then, the gate electrode 309 is used as a mask in addition to the mask 311, and the island-shaped semiconductor film 305 is doped with an impurity element imparting p-type (typically B (boron)) at a high concentration (second doping). Process). The conditions for the second doping step are a dose amount of 1 × 10 ¹⁹ to 1 × 10 ²⁰ / cm ³ and an acceleration voltage of ²⁰ to 40 keV. In this second doping step, doping is performed through the gate insulating film 308, and a p-type high concentration impurity region 312 is formed in the island-shaped semiconductor film 305.

Next, as illustrated in FIG. 13B, after the mask 311 is removed by ashing or the like, an insulating film is formed so as to cover the gate insulating film 308 and the gate electrode 309. The insulating film is formed by a single layer or a stacked layer of a silicon film, a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, or a film containing an organic material such as an organic resin by a plasma CVD method, a sputtering method, or the like. To do. In this embodiment, a silicon oxide film having a thickness of 100 nm is formed by a plasma CVD method.

Then, the gate insulating film 308 and the insulating film are partially etched by anisotropic etching mainly in the vertical direction. The gate insulating film 308 is partially etched by the anisotropic etching, so that the gate insulating film 313 partially formed over the island-shaped semiconductor films 305 to 307 is formed. Further, the insulating film is partially etched by the anisotropic etching, so that a sidewall 314 in contact with the side surface of the gate electrode 309 is formed. The sidewall 314 is used as a doping mask when an LDD (Lightly Doped Drain) region is formed. In this embodiment, a mixed gas of CHF ₃ and He is used as the etching gas. Note that the step of forming the sidewall 314 is not limited to these steps.

Next, a mask is formed so as to cover the island-shaped semiconductor film 305 to be a p-channel TFT. Then, in addition to the formed mask, the gate electrode 309 and the sidewall 314 are used as a mask, and an impurity element imparting n-type (typically P or As) is doped at a high concentration (third doping step). The conditions of the third doping step are as follows: dose amount: 1 × 10 ¹⁹ to 1 × 10 ²⁰ / cm ³ , acceleration voltage: 60 to 100 keV. By this third doping step, a pair of n-type high concentration impurity regions 315 are formed in the island-shaped semiconductor films 306 and 307, respectively.

Note that the sidewall 314 functions as a mask when an impurity imparting a high concentration of n-type is doped later to form a low concentration impurity region or a non-doped offset region below the sidewall 314. Therefore, in order to control the width of the low-concentration impurity region or the offset region, the conditions for anisotropic etching when forming the sidewall 314 or the thickness of the insulating film for forming the sidewall 314 are changed as appropriate. The size of the sidewall 314 may be adjusted.

Next, after removing the mask by ashing or the like, the impurity region may be activated by heat treatment. For example, after a 50 nm silicon oxynitride film is formed, heat treatment may be performed in a nitrogen atmosphere at 550 ° C. for 4 hours.

Further, after a silicon nitride film containing hydrogen is formed to a thickness of 100 nm, a heat treatment is performed in a nitrogen atmosphere at 410 ° C. for 1 hour to hydrogenate the island-shaped semiconductor films 305 to 307. Also good. Alternatively, a process of hydrogenating the island-shaped semiconductor films 305 to 307 may be performed by performing heat treatment at 300 to 450 ° C. for 1 to 12 hours in an atmosphere containing hydrogen. For the heat treatment, thermal annealing, laser annealing, RTA, or the like can be used. By the heat treatment, not only hydrogenation but also activation of the impurity element added to the semiconductor film can be performed. Further, plasma hydrogenation (using hydrogen excited by plasma) may be performed as another means of hydrogenation. By this hydrogenation step, dangling bonds can be terminated by thermally excited hydrogen.

Through the series of steps described above, n-channel TFTs 318 and 319 and a p-channel TFT 317 are formed.

Next, as shown in FIG. 13C, an insulating film 320 functioning as a passivation film for protecting the TFTs 317 to 319 is formed. Although the insulating film 320 is not necessarily provided, by forming the insulating film 320, impurities such as an alkali metal and an alkaline earth metal can be prevented from entering the TFTs 317 to 319. Specifically, silicon nitride, silicon nitride oxide, aluminum nitride, aluminum oxide, silicon oxide, or the like is preferably used for the insulating film 320. In this embodiment, a silicon oxynitride film with a thickness of about 600 nm is used as the insulating film 320. In this case, the hydrogenation step may be performed after the silicon oxynitride film is formed.

Next, an insulating film 321 is formed over the insulating film 320 so as to cover the TFTs 317 to 319. The insulating film 321 can be formed using a heat-resistant organic material such as polyimide, acrylic, benzocyclobutene, polyamide, or epoxy. In addition to the above organic materials, low dielectric constant materials (low-k materials), siloxane resins, silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, PSG (phosphorus silicate glass), BPSG (phosphorus boron silicate glass) ), Alumina or the like can be used. The siloxane-based resin may have at least one of fluorine, alkyl groups, and aromatic hydrocarbons in addition to hydrogen as a substituent. Note that the insulating film 321 may be formed by stacking a plurality of insulating films formed using these materials.

In order to form the insulating film 321, depending on the material, CVD method, sputtering method, SOG method, spin coating, dipping, spray coating, droplet discharge method (ink jet method, screen printing, offset printing, etc.), doctor knife, A roll coater, curtain coater, knife coater, or the like can be used.

Next, contact holes are formed in the insulating film 320 and the insulating film 321 so that the island-shaped semiconductor films 305 to 307 are partially exposed. Then, conductive films 322 and conductive films 323 to 326 in contact with the island-shaped semiconductor films 305 to 307 through the contact holes are formed. The gas used for etching when opening the contact hole is a mixed gas of CHF ₃ and He, but is not limited to this.

The conductive films 322 to 326 can be formed by a CVD method, a sputtering method, or the like. Specifically, as the conductive films 322 to 326, aluminum (Al), tungsten (W), titanium (Ti), tantalum (Ta), molybdenum (Mo), nickel (Ni), platinum (Pt), copper (Cu), Gold (Au), silver (Ag), manganese (Mn), neodymium (Nd), carbon (C), silicon (Si), or the like can be used. Alternatively, an alloy containing the above metal as a main component or a compound containing the above metal may be used. The conductive films 322 to 326 can be formed by stacking a single layer or a plurality of layers each using the above metal.

As an example of an alloy containing aluminum as a main component, an alloy containing aluminum as a main component and containing nickel can be given. In addition, a material containing aluminum as a main component and containing nickel and one or both of carbon and silicon can be given as an example. Aluminum and aluminum silicon are suitable as materials for forming the conductive films 322 to 326 because they have low resistance and are inexpensive. In particular, an aluminum silicon (Al—Si) film can prevent generation of hillocks in resist baking as compared with an aluminum film when the conductive films 322 to 326 are patterned. Further, instead of silicon (Si), about 0.5% of Cu may be mixed into the aluminum film.

For the conductive films 322 to 326, for example, a stacked structure of a barrier film, an aluminum silicon (Al—Si) film, and a barrier film, or a stacked structure of a barrier film, an aluminum silicon (Al—Si) film, a titanium nitride film, and a barrier film is employed. Good. Note that a barrier film is a film formed using titanium, a nitride of titanium, molybdenum, or a nitride of molybdenum. When a barrier film is formed so as to sandwich an aluminum silicon (Al—Si) film, generation of hillocks of aluminum or aluminum silicon can be further prevented. In addition, when a barrier film is formed using titanium, which is a highly reducing element, even if a thin oxide film is formed on the island-shaped semiconductor films 305 to 307, titanium contained in the barrier film forms this oxide film. As a result, the conductive films 323 to 326 and the island-shaped semiconductor films 305 to 307 can make good contact. Further, a plurality of barrier films may be stacked. In that case, for example, the conductive films 322 to 326 can have a five-layer structure in which titanium, titanium nitride, aluminum silicon, titanium, and titanium nitride are stacked in this order.

Note that the conductive films 324 and 325 are connected to the high concentration impurity region 315 of the n-channel TFT 318. The conductive films 325 and 326 are connected to the high concentration impurity region 315 of the n-channel TFT 319. The conductive film 323 is connected to the high concentration impurity region 312 of the p-channel TFT 317. The impurity region 312 of the p-channel TFT 317 is electrically connected by the conductive film 323. The p-channel TFT 317 has two gate electrodes 309 electrically connected to each other, and functions as a MOS varactor.

Next, as illustrated in FIG. 14A, an insulating film 330 is formed so as to cover the conductive films 322 to 326, and then a contact hole is formed in the insulating film 330 so that a part of the conductive film 322 is exposed. Form. Then, a conductive film 331 is formed so as to be in contact with the conductive film 322 in the contact hole. Any material that can be used for the conductive films 322 to 326 can be used as the material of the conductive film 331.

The insulating film 330 can be formed using an organic resin film, an inorganic insulating film, or a siloxane-based insulating film. For an organic resin film, for example, acrylic, epoxy, polyimide, polyamide, polyvinylphenol, benzocyclobutene, or the like can be used. As the inorganic insulating film, silicon oxide, silicon oxynitride, silicon nitride oxide, a film containing carbon typified by DLC (diamond-like carbon), or the like can be used. Note that a mask used for forming the opening by a photolithography method can be formed by a droplet discharge method or a printing method. The insulating film 330 can be formed by a CVD method, a sputtering method, a droplet discharge method, a printing method, or the like depending on the material.

Next, a conductive film 332 functioning as an antenna is formed so that a part thereof is in contact with the conductive film 331. The conductive film 332 includes silver (Ag), gold (Au), copper (Cu), palladium (Pd), chromium (Cr), platinum (Pt), molybdenum (Mo), titanium (Ti), tantalum (Ta), It can be formed using a metal such as tungsten (W), aluminum (Al), iron (Fe), cobalt (Co), zinc (Zn), tin (Sn), nickel (Ni). The conductive film 332 may be a film formed using an alloy containing the metal as a main component or a film formed using a compound containing the metal, in addition to the film formed using the metal. As the conductive film 332, the above-described film may be used as a single layer, or a plurality of the above-described films may be stacked.

The conductive film 332 can be formed by a CVD method, a sputtering method, a printing method such as screen printing or gravure printing, a droplet discharge method, a dispenser method, a plating method, a photolithography method, an evaporation method, or the like.

For example, when the screen printing method is used, a conductive paste in which conductive particles (conductor particles) having a particle size of several nm to several tens of μm are dispersed in an organic resin is selectively printed on the insulating film 330. Thus, the conductive film 332 can be formed. The conductor particles are silver (Ag), gold (Au), copper (Cu), nickel (Ni), platinum (Pt), palladium (Pd), tantalum (Ta), molybdenum (Mo), tin (Sn), It can be formed using lead (Pb), zinc (Zn), chromium (Cr), titanium (Ti), or the like. In addition to the conductive particles formed of the metal, the conductive particles may be formed of an alloy containing the metal as a main component, or may be formed using a compound containing the metal. Silver halide fine particles or dispersible nanoparticles can also be used. In addition, as an organic resin included in the conductive paste, polyimide, siloxane resin, epoxy resin, silicon resin, or the like can be used.

As an example of the metal alloy, silver (Ag) and palladium (Pd), silver (Ag) and platinum (Pt), gold (Au) and platinum (Pt), gold (Au) and palladium (Pd), silver ( Ag) and a combination of copper (Cu). Further, for example, conductive particles coated with copper (Cu) with silver (Ag) can be used.

Note that when the conductive film 332 is formed, it is preferable that the conductive paste be extruded and then baked by a printing method or a droplet discharge method. For example, in the case where conductive particles containing silver as a main component (for example, a particle size of 1 nm to 100 nm) is used for the conductive paste, the conductive film 332 is formed by baking in a temperature range of 150 to 300 ° C. Can do. Firing may be performed by lamp annealing using an infrared lamp, a xenon lamp, a halogen lamp, or the like, or furnace annealing using an electric furnace. Further, laser annealing using an excimer laser or Nd: YAG laser may be used. Further, fine particles mainly composed of solder or lead-free solder may be used. In this case, it is preferable to use fine particles having a particle diameter of 20 μm or less. Solder and lead-free solder have the advantage of low cost.

By using a printing method or a droplet discharge method, the conductive film 332 can be formed without using an exposure mask. In addition, unlike the photolithography method, there is no waste of material that is removed by etching in the droplet discharge method and the printing method. Further, it is not necessary to use an expensive exposure mask, so that the cost for manufacturing a semiconductor device can be suppressed.

Next, as illustrated in FIG. 14B, an insulating film 333 is formed over the insulating film 330 so as to cover the conductive films 331 and 332. The insulating film 333 can be formed using an organic resin film, an inorganic insulating film, or a siloxane-based insulating film. For an organic resin film, for example, acrylic, epoxy, polyimide, polyamide, polyvinylphenol, benzocyclobutene, or the like can be used. As the inorganic insulating film, silicon oxide, silicon oxynitride, silicon nitride oxide, a film containing carbon typified by DLC (diamond-like carbon), or the like can be used. Note that a mask used for forming the opening by a photolithography method can be formed by a droplet discharge method or a printing method. The insulating film 333 can be formed by a CVD method, a sputtering method, a droplet discharge method, a printing method, or the like depending on the material.

Next, as shown in FIG. 15A, a layer including a semiconductor element typified by TFT and various conductive films (hereinafter referred to as “element formation layer 334”) from the insulating film 303 to the insulating film 333 is formed. Peel from the substrate 300. In this embodiment, the first sheet material 335 is attached to the surface of the element formation layer 334 on the insulating film 333 side, and the element formation layer 334 is peeled from the substrate 300 using physical force. The peeling layer 302 may be in a state where a part of the peeling layer 302 remains without being removed.

Further, the peeling may be performed by a method using etching of the peeling layer 302. In this case, a groove is formed so that the peeling layer 302 is partially exposed. The groove is formed by dicing, scribing, processing using laser light including UV light, photolithography, or the like. The groove may be deep enough to expose the release layer 302. Then, halogen fluoride is used as an etching gas, and the gas is introduced from the groove. In this embodiment, for example, ClF ₃ (chlorine trifluoride) is used, and the temperature is 350 ° C., the flow rate is 300 sccm, the atmospheric pressure is 6 Torr, and the time is 3 hours. Further, a gas in which nitrogen is mixed with ClF ₃ gas may be used. By using halogen fluoride such as ClF ₃ , the peeling layer 302 is selectively etched, and the substrate 300 can be peeled from the TFTs 317 to 319. The halogen fluoride may be either a gas or a liquid.

Next, as illustrated in FIG. 15B, the second sheet material 336 is attached to the surface exposed by the separation of the element formation layer 334, and then the element formation layer 334 is separated from the first sheet material 335. To do.

Note that in the case where semiconductor elements corresponding to a plurality of semiconductor devices are formed over the substrate 300, the element formation layer 334 is divided for each semiconductor device. For the division, a laser irradiation apparatus, a dicing apparatus, a scribing apparatus, or the like can be used.

Note that although an example in which the antenna is formed over the same substrate as the semiconductor element has been described in this embodiment, the present invention is not limited to this structure. After forming the semiconductor element, a separately formed antenna may be electrically connected to the integrated circuit. In this case, the electrical connection between the antenna and the integrated circuit is made by crimping with an anisotropic conductive film (ACF (Anisotropic Conductive Film)), an anisotropic conductive paste (ACP (Anisotropic Conductive Paste)), or the like. Can be connected to. In addition, it is also possible to perform connection using a conductive adhesive such as silver paste, copper paste, or carbon paste, solder bonding, or the like.

Note that when the semiconductor device illustrated in FIG. 15B is completed, a third sheet material is attached so as to cover the insulating film 333, and one or both of heat treatment and pressure treatment are performed, so that the second sheet material 336 is formed. And the third sheet material may be bonded together. A hot melt film or the like can be used as the second sheet material 336 and the third sheet material. Alternatively, the first sheet material 335 and the second sheet material 336 may be bonded together without preparing the third sheet material without peeling off the first sheet material 335.

Further, as the second sheet material 336 and the third sheet material, a film provided with an antistatic measure for preventing static electricity or the like (hereinafter referred to as an antistatic film) can be used. By sealing with an antistatic film, it is possible to prevent the semiconductor element from being adversely affected by external static electricity or the like when handled as a product.

Examples of the antistatic film include a type in which a material capable of preventing electrification (antistatic agent) is kneaded into the film, a type in which the film itself has an effect of preventing electrification, and a type in which an antistatic agent is coated on the film. It is done. As the antistatic agent, a nonionic polymer system, an anionic polymer system, a cationic polymer system, a nonionic surfactant system, an anionic surfactant system, a cationic surfactant system, or an amphoteric surfactant system can be used. Metal, indium and tin oxide (ITO), or the like can also be used as an antistatic agent. Further, as the material for the film having the effect of preventing electrification, olefin resin, ABS resin, styrene resin, PMMA resin, polycarbonate resin, PVC polyester resin, polyamide resin, modified PPO resin, and the like can be used.

Note that this embodiment can be implemented in combination with the above embodiment modes and embodiments.

In this embodiment, an example in which a semiconductor device of the present invention is manufactured using a transistor formed over a single crystal substrate will be described. Since variation in characteristics of the transistor formed over the single crystal substrate can be suppressed, the number of transistors used in the semiconductor device can be suppressed.

First, as illustrated in FIG. 16A, an element isolation insulating film 2301 for electrically isolating a semiconductor element is formed over the semiconductor substrate 2300 using an insulating film. By formation of the element isolation insulating film 2301, a region (element formation region) 2302 for forming a transistor and the element formation region 2303 can be electrically isolated.

The semiconductor substrate 2300 is, for example, a single crystal silicon substrate having n-type or p-type conductivity, a compound semiconductor substrate (GaAs substrate, InP substrate, GaN substrate, SiC substrate, sapphire substrate, ZnSe substrate, or the like), a bonding method, An SOI (Silicon on Insulator) substrate manufactured using a SIMOX (Separation by Implanted Oxygen) method or the like can be used.

For the formation of the element isolation insulating film 2301, a selective oxidation method (LOCOS (Local Oxidation of Silicon) method), a trench isolation method, or the like can be used.

In this embodiment, an example in which a single crystal silicon substrate having n-type conductivity is used as the semiconductor substrate 2300 and a p-well 2304 is formed in the element formation region 2303 is shown. The p well 2304 formed in the element formation region 2303 of the semiconductor substrate 2300 can be formed by selectively introducing an impurity element imparting p-type conductivity into the element formation region 2303. As the impurity element imparting p-type conductivity, boron (B), aluminum (Al), gallium (Ga), or the like can be used. In the case where a semiconductor substrate having p-type conductivity is used as the semiconductor substrate 2300, an n-type impurity element may be selectively introduced into the element formation region 2302 to form an n-well.

Note that in this embodiment, a semiconductor substrate having n-type conductivity is used as the semiconductor substrate 2300, and thus no impurity element is introduced into the element formation region 2302. However, an n-well may be formed in the element formation region 2302 by introducing an impurity element imparting n-type conductivity. As the impurity element imparting n-type conductivity, phosphorus (P), arsenic (As), or the like can be used.

Next, as illustrated in FIG. 16B, insulating films 2305 and 2306 are formed so as to cover the element formation regions 2302 and 2303, respectively. In this embodiment, silicon oxide films formed in the element formation regions 2302 and 2303 by thermally oxidizing the semiconductor substrate 2300 are used as the insulating films 2305 and 2306. In addition, after a silicon oxide film is formed by thermal oxidation, a silicon oxynitride film is formed by nitriding the surface of the silicon oxide film to form a silicon oxynitride film, and the silicon oxide film and the silicon oxynitride film are stacked. May be used as the insulating films 2305 and 2306.

In addition, as described above, the insulating films 2305 and 2306 may be formed by plasma treatment. For example, a silicon oxide (SiOx) film or a silicon nitride (SiNx) film used as the insulating films 2305 and 2306 is formed in the element formation regions 2302 and 2303 by oxidizing or nitriding the surface of the semiconductor substrate 2300 by high-density plasma treatment. can do.

Next, as illustrated in FIG. 16C, a conductive film is formed so as to cover the insulating films 2305 and 2306. In this embodiment, an example is shown in which a conductive film 2307 and a conductive film 2308 which are sequentially stacked are used as the conductive film. As the conductive film, a single-layer conductive film may be used, or a structure in which three or more conductive films are stacked may be used.

As the conductive films 2307 and 2308, tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), copper (Cu), chromium (Cr), niobium (Nb), or the like is used. I can do it. As the conductive films 2307 and 2308, a film formed using an alloy containing the metal as a main component or a film formed using a compound containing the metal may be used in addition to the film formed using the metal. good. Alternatively, a semiconductor film such as polycrystalline silicon in which an impurity element such as phosphorus imparting conductivity is doped may be used. In this embodiment, the conductive film 2307 is formed using tantalum nitride, and the conductive film 2308 is formed using tungsten.

Next, as shown in FIG. 17A, gate electrodes 2309 and 2310 are formed over the insulating films 2305 and 2306 by processing (patterning) the conductive films 2307 and 2308 provided in a stacked manner into a predetermined shape. To do.

Next, as shown in FIG. 17B, a mask 2311 is selectively formed with a resist so as to cover the element formation region 2302. Then, an impurity element is introduced into the element formation region 2303. Since the gate electrode 2310 functions as a mask in addition to the mask 2311, an impurity region 2312 that functions as a source region or a drain region and a channel formation region 2313 are formed in the p-well 2304 by introduction of the impurity element. As the impurity element, an impurity element imparting n-type conductivity or an impurity element imparting p-type conductivity is used. As the impurity element imparting n-type conductivity, phosphorus (P), arsenic (As), or the like can be used. As the impurity element imparting p-type conductivity, boron (B), aluminum (Al), gallium (Ga), or the like can be used. In this embodiment, phosphorus (P) is used as the impurity element.

Next, after the mask 2311 is removed, as shown in FIG. 17C, a mask 2314 is selectively formed with a resist so as to cover the element formation region 2303. Then, an impurity element is introduced into the element formation region 2302. Since the gate electrode 2309 also functions as a mask in addition to the mask 2314, an impurity region 2315 that functions as a source region or a drain region and a channel formation region 2316 in the semiconductor substrate 2300 in the element formation region 2302 by introduction of the impurity element. Is formed. As the impurity element, an impurity element imparting n-type conductivity or an impurity element imparting p-type conductivity is used. As the impurity element imparting n-type conductivity, phosphorus (P), arsenic (As), or the like can be used. As the impurity element imparting p-type conductivity, boron (B), aluminum (Al), gallium (Ga), or the like can be used. In this embodiment, an impurity element (eg, boron (B)) having a conductivity type different from that of the impurity element introduced into the element formation region 2303 in FIG. 17B is introduced.

Next, as illustrated in FIG. 18A, an insulating film 2317 is formed so as to cover the insulating films 2305 and 2306 and the gate electrodes 2309 and 2310. Then, a contact hole is formed in the insulating film 2317 and part of the impurity regions 2312 and 2315 is exposed. Next, a conductive film 2318 connected to the impurity regions 2312 and 2315 through contact holes is formed. The conductive film 2318 can be formed by a CVD method, a sputtering method, or the like.

The insulating film 2317 can be formed using an inorganic insulating film, an organic resin film, or a siloxane-based insulating film. As the inorganic insulating film, silicon oxide, silicon oxynitride, silicon nitride oxide, a film containing carbon typified by DLC (diamond-like carbon), or the like can be used. For an organic resin film, for example, acrylic, epoxy, polyimide, polyamide, polyvinylphenol, benzocyclobutene, or the like can be used. The insulating film 2317 can be formed by a CVD method, a sputtering method, a droplet discharge method, a printing method, or the like depending on the material.

Note that the transistor used in the semiconductor device of the present invention is not limited to the structure shown in this embodiment. For example, an inverted stagger structure may be used.

Next, an interlayer film 2324 is formed as shown in FIG. Then, the interlayer film 2324 is etched to form a contact hole, so that part of the conductive film 2318 is exposed. The interlayer film 2324 is not limited to resin, and may be another film such as a CVD oxide film, but is preferably a resin from the viewpoint of flatness. Alternatively, a contact hole may be formed using a photosensitive resin without using etching. Next, a wiring 2325 that is in contact with the conductive film 2318 through a contact hole is formed over the interlayer film 2324.

Next, a conductive film 2326 functioning as an antenna is formed so as to be in contact with the wiring 2325. The conductive film 2326 includes silver (Ag), gold (Au), copper (Cu), palladium (Pd), chromium (Cr), platinum (Pt), molybdenum (Mo), titanium (Ti), tantalum (Ta), It can be formed using a metal such as tungsten (W), aluminum (Al), iron (Fe), cobalt (Co), zinc (Zn), tin (Sn), nickel (Ni). The conductive film 2326 may be a film formed of an alloy containing the metal as a main component or a film formed using a compound containing the metal, in addition to the film formed of the metal. As the conductive film 2326, the above film may be used as a single layer or a plurality of the above films may be stacked.

The conductive film 2326 can be formed by a CVD method, a sputtering method, a printing method such as screen printing or gravure printing, a droplet discharge method, a dispenser method, a plating method, a photolithography method, an evaporation method, or the like.

Note that although an example in which the antenna is formed over the same substrate as the semiconductor element has been described in this embodiment, the present invention is not limited to this structure. After forming the semiconductor element, a separately formed antenna may be electrically connected to the integrated circuit. In this case, the electrical connection between the antenna and the integrated circuit is made by crimping with an anisotropic conductive film (ACF (Anisotropic Conductive Film)), an anisotropic conductive paste (ACP (Anisotropic Conductive Paste)), or the like. Can be connected to. In addition, it is also possible to perform connection using a conductive adhesive such as silver paste, copper paste, or carbon paste, solder bonding, or the like.

By using the above manufacturing method, the semiconductor device of the present invention can have a structure in which a transistor is formed over a semiconductor substrate and a thin film secondary battery is provided thereover. With the above structure, a semiconductor device that is further reduced in thickness and size can be provided.

Note that this embodiment can be implemented in combination with the above embodiment modes and embodiments.

In this embodiment, the structure of the rectifier circuit of the present invention shown in FIG. 3A will be described with reference to a top view thereof.

FIG. 11 shows a top view of the rectifier circuit of the present invention. In FIG. 11, 103 is a variable capacitor, 104 is a diode, 105 is a diode, and 106 is a smoothing capacitor. In FIG. 11, a p-channel type MOS varactor is used as the variable capacitor 103. Further, n-channel transistors are used as the diode 104 and the diode 105.

The conductive film 130 is supplied with the potential of the input terminal A1. The conductive film 130 is connected to the conductive film 132. A part of the conductive film 132 functions as a first electrode of a MOS varactor used as the variable capacitor 103. The impurity region of the semiconductor film 131 included in the variable capacitor 103 functions as the second electrode of the MOS varactor and is all connected to the conductive film 134.

The conductive film 137 is supplied with the potential of the input terminal A2, and the potential of the conductive film 137 is supplied to the subsequent circuit as the potential of the output terminal OUT2. The conductive film 137 is connected to the source region of the semiconductor film 135 included in the diode 104. A part of the conductive film 133 functions as a gate electrode of the diode 104 and is connected to the conductive film 137. A drain region of the semiconductor film 135 included in the diode 104 is connected to the conductive film 134.

A part of the conductive film 143 functions as a gate electrode of the diode 105 and is connected to the conductive film 134. A source region of the semiconductor film 136 included in the diode 105 is connected to the conductive film 134. A drain region of the semiconductor film 136 included in the diode 105 is connected to the conductive film 138. The potential of the conductive film 138 is supplied to the subsequent circuit as the potential of the output terminal OUT1.

The semiconductor film 140 included in the smoothing capacitor 106 overlaps with the conductive film 141 with the gate insulating film interposed therebetween. The conductive film 141 is connected to the conductive film 138, and the semiconductor film 140 is connected to the conductive film 137. A region where the semiconductor film 140 and the conductive film 141 overlap with the gate insulating film interposed therebetween functions as the smoothing capacitor 106.

Note that in the diode 104, the drain region of the semiconductor film 135 functions as a cathode, and the source region functions as an anode together with the gate electrode. In the diode 105, the drain region of the semiconductor film 136 functions as a cathode, and the source region functions as an anode together with the gate electrode.

The rectifier circuit of the present invention can be formed using a normal thin film transistor process. Thus, the cost for manufacturing a rectifier circuit and, in turn, a semiconductor device using the rectifier circuit can be reduced.

The circuit diagram which shows the structure of the rectifier circuit of this invention. The circuit diagram which shows the structure of the rectifier circuit of this invention. The circuit diagram which shows the structure of the rectifier circuit of this invention. The figure which shows the characteristic of a MOS varactor. The circuit diagram which shows the structure of the rectifier circuit of this invention. The circuit diagram which shows the structure of the rectifier circuit of this invention. The circuit diagram which shows the structure of the rectifier circuit of this invention. The circuit diagram which shows the structure of the rectifier circuit of this invention. 1 is a block diagram illustrating a configuration of a semiconductor device of the present invention. FIG. 14 is a diagram showing the appearance of a semiconductor device of the invention. The top view of the rectifier circuit of this invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate a method for manufacturing a semiconductor device of the present invention. FIG. 10 shows a structure of a conventional semiconductor device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 Rectifier circuit 102 Antenna 103 Variable capacity 104 Diode 105 Diode 106 Smoothing capacity 107 Inductor 108 Resonance capacity 130 Conductive film 131 Semiconductor film 132 Conductive film 133 Conductive film 134 Conductive film 135 Semiconductor film 136 Semiconductor film 137 Conductive film 138 Conductive film 140 Semiconductor Film 141 Conductive film 143 Conductive film 201 Rectifier circuit 202 Antenna 203 Variable capacity 204 Diode 205 Diode 207 Inductor 208 Resonance capacity 209 Resistance 210 Capacity 300 Substrate 301 Insulating film 302 Release layer 303 Insulating film 304 Semiconductor film 305 Semiconductor film 306 Semiconductor film 308 Gate Insulating film 309 Gate electrode 310 Impurity region 311 Mask 312 Impurity region 313 Gate insulating film 314 Side wall 315 Impurity region 317 TFT
318 TFT
319 TFT
320 insulating film 321 insulating film 322 conductive film 323 conductive film 324 conductive film 325 conductive film 330 insulating film 331 conductive film 332 conductive film 333 insulating film 334 element formation layer 335 sheet material 336 sheet material 401 broken line 402 broken line 501 rectifier circuit 502 antenna 503 Variable capacitor 504 Diode 505 Diode 506 Smoothing capacitor 507 Diode 508 Smoothing capacitor 601 Rectifier circuit 602 Antenna 603 Variable capacitor 604 Diode 605 Diode 606 Smoothing capacitor 607 Diode 608 Smoothing capacitor 701 Rectifier circuit 702 Antenna 703 Variable capacitor 704 Diode 705 Diode 706 Smoothing capacitor 707 Diode 708 Smoothing capacitor 709 Variable capacitor 710 Diode 801 Rectifier circuit 802 Antenna 803 Variable capacitor 804 Diode 805 Diode 806 Smoothing capacitor 807 Diode 808 Smoothing capacitor 809 Variable capacitor 810 Diode 900 Semiconductor device 901 Antenna 902 Integrated circuit 903 Rectifier circuit 904 Demodulator circuit 905 Modulator circuit 906 Regulator 907 Signal generation circuit 908 Encoder 909 Memory 1601 Integrated circuit 1602 Antenna 1603 Substrate 1604 Cover material 1605 Integrated circuit 1606 Antenna 1607 Cover material 1608 Substrate 1901 Antenna 1902 Limiter 1903 Rectifier circuit 1910 Inductor 1911 Resonant capacitance 1912 Switch 2300 Semiconductor substrate 2301 Element isolation insulating film 2302 Element formation area 2303 Element formation area 2304 P well 2305 Insulation Film 2307 Conductive film 2308 Conductive film 2309 Gate electrode 2310 Gate electrode 311 mask 2312 impurity regions 2313 channel forming region 2314 mask 2315 impurity regions 2316 channel forming region 2317 insulating film 2318 conductive 2324 interlayer film 2325 wiring 2326 conductive film

Claims (15)

A variable capacitor, a first diode, a second diode, a first input terminal, a second input terminal, a first output terminal, and a second output terminal;
The first electrode of the variable capacitor is electrically connected to the first input terminal;
A second electrode of the variable capacitor includes a first electrode of the first diode is electrically connected to the second electrode of the second diode,
A second electrode of the first diode is electrically connected to the first output terminal;
First electrode of said second diode, said second input terminal is electrically connected to said second output terminal,
The first diode has a function of allowing a current to flow from the first electrode of the first diode to the second electrode of the first diode;
The second diode has a function of allowing a current to flow from the first electrode of the second diode to the second electrode of the second diode;
The rectifier circuit according to claim 1, wherein the variable capacitor has a smaller capacitance value as the voltage applied to the first electrode of the variable capacitor is higher . In claim 1,
Have capacity,
A first electrode of the capacitor is electrically connected to a second electrode of the first diode;
The rectifier circuit, wherein the second electrode of the capacitor is electrically connected to the first electrode of the second diode. In claim 1,
Having a third diode;
First electrode of said third diode, said first input terminal is electrically connected to the first electrode of the variable capacitor,
The second electrode of the third diode, a first electrode of the second diode, and said second input terminal is electrically connected to said second output terminal,
The third diode has a function of allowing a current to flow from a first electrode of the third diode to a second electrode of the third diode . In claim 3,
Having a first capacity and a second capacity;
A first electrode of the first capacitor is electrically connected to a second electrode of the first diode;
The second electrode of the first capacitor is electrically connected to the first electrode of the second diode and the first electrode of the second capacitor;
The rectifier circuit according to claim 1, wherein the second electrode of the second capacitor is electrically connected to the second input terminal. In claim 1,
Having a fourth diode;
A second electrode of said fourth diode, said first input terminal is electrically connected to the first electrode of the variable capacitor,
The first electrode of the fourth diode, a first electrode of the second diode, and said second input terminal is electrically connected to said second output terminal,
The fourth diode has a function of allowing a current to flow from a first electrode of the fourth diode to a second electrode of the fourth diode . In claim 5,
Having a first capacity and a second capacity;
A first electrode of the first capacitor is electrically connected to a second electrode of the first diode;
The second electrode of the first capacitor is electrically connected to the first electrode of the second diode and the first electrode of the second capacitor;
The rectifier circuit, wherein the second electrode of the second capacitor is electrically connected to the first electrode of the third diode. In any one of Claims 1 thru | or 6 ,
A rectifier circuit using a p-channel MOS varactor as the variable capacitor. The first variable capacitor, the second variable capacitor, the first diode, the second diode, the fifth diode, the sixth diode, the first input terminal, and the second input terminal And a first output terminal and a second output terminal,
First electrode of said first variable capacitance, and a second electrode of said second variable capacitance, and the first electrode of the fifth diode, and a second electrode of the sixth diode Electrically connected,
A second electrode of said first variable capacitance includes a first electrode of the first diode is electrically connected to the second electrode of the second diode,
The first electrode of the second variable capacitor is electrically connected to the first input terminal;
A second electrode of the first diode is electrically connected to the first output terminal;
The first electrode of the second diode is electrically connected to the second electrode of the fifth diode;
First electrode of said sixth diode, and the second input terminal is electrically connected to said second output terminal,
The first diode has a function of allowing a current to flow from the first electrode of the first diode to the second electrode of the first diode;
The second diode has a function of allowing a current to flow from the first electrode of the second diode to the second electrode of the second diode;
The fifth diode has a function of allowing a current to flow from the first electrode of the fifth diode to the second electrode of the fifth diode;
The sixth diode has a function of allowing a current to flow from the first electrode of the sixth diode to the second electrode of the sixth diode;
In the first variable capacitor, the higher the voltage applied to the first electrode of the first variable capacitor, the smaller the capacitance value of the first variable capacitor,
The rectifier circuit according to claim 2, wherein the second variable capacitor has a capacitance value of the second variable capacitor that decreases as a voltage applied to the first electrode of the second variable capacitor increases . In claim 8,
Having a first capacity and a second capacity;
A first electrode of the first capacitor is electrically connected to a second electrode of the first diode;
The second electrode of the first capacitor is electrically connected to the first electrode of the second diode and the first electrode of the second capacitor;
The rectifier circuit, wherein the second electrode of the second capacitor is electrically connected to the first electrode of the sixth diode. The first variable capacitor, the second variable capacitor, the first diode, the second diode, the fifth diode, the sixth diode, the first input terminal, and the second input terminal And a first output terminal and a second output terminal,
First electrode of said first variable capacitance, said first input terminal is electrically connected to the first electrode of the second variable capacitance,
A second electrode of said first variable capacitance includes a first electrode of the first diode is electrically connected to the second electrode of the second diode,
A second electrode of said second variable volume, a first electrode of said fifth diode is electrically connected to the second electrode of the sixth diode,
A second electrode of the first diode is electrically connected to the first output terminal;
A first electrode of the second diode is electrically connected to the first input terminal and a second electrode of the fifth diode;
First electrode of said sixth diode is electrically connected to the second output terminal,
The first diode has a function of allowing a current to flow from the first electrode of the first diode to the second electrode of the first diode;
The second diode has a function of allowing a current to flow from the first electrode of the second diode to the second electrode of the second diode;
The fifth diode has a function of allowing a current to flow from the first electrode of the fifth diode to the second electrode of the fifth diode;
The sixth diode has a function of allowing a current to flow from the first electrode of the sixth diode to the second electrode of the sixth diode;
In the first variable capacitor, the higher the voltage applied to the first electrode of the first variable capacitor, the smaller the capacitance value of the first variable capacitor,
The rectifier circuit according to claim 2, wherein the second variable capacitor has a capacitance value of the second variable capacitor that decreases as a voltage applied to the first electrode of the second variable capacitor increases . In claim 10,
Having a first capacity and a second capacity;
A first electrode of the first capacitor is electrically connected to a second electrode of the first diode;
The second electrode of the first capacitor is electrically connected to the first electrode of the second diode and the first electrode of the second capacitor;
The rectifier circuit, wherein the second electrode of the second capacitor is electrically connected to the first electrode of the sixth diode. In any one of Claims 8 thru | or 11 ,
A rectifier circuit using a p-channel MOS varactor for the first variable capacitor and the second variable capacitor. A variable capacitor, a first diode, a second diode, a first input terminal, a second input terminal, a first output terminal, a second output terminal, a capacitor, and a resistor Have
A first electrode of the capacitor is electrically connected to the first input terminal,
A second electrode of the capacitor is electrically connected to one of the resistors;
The other of said resistor, and a first electrode of the variable capacitor, a first electrode of the first diode is electrically connected to the second electrode of the second diode,
A second electrode of the variable capacitor includes a second input terminal, a first electrode of the second diode is electrically connected to said second output terminal,
A second electrode of the first diode is electrically connected to the first output terminal ;
The first diode has a function of allowing a current to flow from the first electrode of the first diode to the second electrode of the first diode;
The second diode has a function of allowing a current to flow from the first electrode of the second diode to the second electrode of the second diode;
The rectifier circuit , wherein the variable capacitor has a larger capacitance value as the voltage applied to the first electrode of the variable capacitor is higher . In claim 13 ,
The variable capacitor uses an n-channel MOS varactor. A rectifier circuit according to any one of claims 1 to 14 and an antenna,
The first input terminal is electrically connected to one of the antennas;
The semiconductor device, wherein the second input terminal is electrically connected to the other of the antennas.

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