JP5132068B2 - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

Info

Publication number
JP5132068B2
JP5132068B2 JP2006085744A JP2006085744A JP5132068B2 JP 5132068 B2 JP5132068 B2 JP 5132068B2 JP 2006085744 A JP2006085744 A JP 2006085744A JP 2006085744 A JP2006085744 A JP 2006085744A JP 5132068 B2 JP5132068 B2 JP 5132068B2
Authority
JP
Japan
Prior art keywords
insulating film
film
density
disposed
type insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2006085744A
Other languages
English (en)
Japanese (ja)
Other versions
JP2007266081A5 (https=
JP2007266081A (ja
Inventor
和明 岩澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2006085744A priority Critical patent/JP5132068B2/ja
Priority to KR1020060084012A priority patent/KR100770820B1/ko
Priority to US11/685,984 priority patent/US7803721B2/en
Publication of JP2007266081A publication Critical patent/JP2007266081A/ja
Publication of JP2007266081A5 publication Critical patent/JP2007266081A5/ja
Application granted granted Critical
Publication of JP5132068B2 publication Critical patent/JP5132068B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6502—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
    • H10P14/6506—Formation of intermediate materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6529—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6342—Liquid deposition, e.g. spin-coating, sol-gel techniques or spray coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
    • H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
    • H10P14/6687—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and nitrogen
    • H10P14/6689—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and nitrogen the compound being a silazane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/906—Cleaning of wafer as interim step

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Element Separation (AREA)
JP2006085744A 2006-03-27 2006-03-27 半導体装置及びその製造方法 Expired - Fee Related JP5132068B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2006085744A JP5132068B2 (ja) 2006-03-27 2006-03-27 半導体装置及びその製造方法
KR1020060084012A KR100770820B1 (ko) 2006-03-27 2006-09-01 반도체 장치 및 그 제조 방법
US11/685,984 US7803721B2 (en) 2006-03-27 2007-03-14 Semiconductor device and method of manufacturing same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006085744A JP5132068B2 (ja) 2006-03-27 2006-03-27 半導体装置及びその製造方法

Publications (3)

Publication Number Publication Date
JP2007266081A JP2007266081A (ja) 2007-10-11
JP2007266081A5 JP2007266081A5 (https=) 2007-11-22
JP5132068B2 true JP5132068B2 (ja) 2013-01-30

Family

ID=38638817

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006085744A Expired - Fee Related JP5132068B2 (ja) 2006-03-27 2006-03-27 半導体装置及びその製造方法

Country Status (3)

Country Link
US (1) US7803721B2 (https=)
JP (1) JP5132068B2 (https=)
KR (1) KR100770820B1 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008010537A (ja) * 2006-06-28 2008-01-17 Toshiba Corp Ｎａｎｄ型不揮発性半導体記憶装置およびｎａｎｄ型不揮発性半導体記憶装置の製造方法
JP2009076638A (ja) 2007-09-20 2009-04-09 Toshiba Corp 半導体装置の製造方法
KR20100027388A (ko) * 2008-09-02 2010-03-11 삼성전자주식회사 반도체 소자의 절연막 및 그를 이용한 반도체 소자의 형성방법
US8080463B2 (en) * 2009-01-23 2011-12-20 Kabushiki Kaisha Toshiba Semiconductor device manufacturing method and silicon oxide film forming method
US11600628B2 (en) * 2020-01-15 2023-03-07 Globalfoundries U.S. Inc. Floating gate memory cell and memory array structure
US11222825B2 (en) * 2020-03-10 2022-01-11 Micron Technology, Inc. Integrated circuitry, memory arrays comprising strings of memory cells, methods used in forming integrated circuitry, and methods used in forming a memory array comprising strings of memory cells

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2834667B2 (ja) * 1994-03-25 1998-12-09 川崎製鉄株式会社 半導体装置の製造方法
FR2734811B1 (fr) * 1995-06-01 1997-07-04 Saint Gobain Vitrage Substrats transparents revetus d'un empilement de couches minces a proprietes de reflexion dans l'infrarouge et/ou dans le domaine du rayonnement solaire
KR100459691B1 (ko) * 1998-01-05 2005-01-17 삼성전자주식회사 반도체 장치의 트랜치 소자 분리 방법
KR100281192B1 (ko) * 1999-03-04 2001-01-15 황인길 반도체 소자 분리를 위한 얕은 트렌치 제조 방법
TW444252B (en) * 1999-03-19 2001-07-01 Toshiba Corp Semiconductor apparatus and its fabricating method
US6492283B2 (en) * 2000-02-22 2002-12-10 Asm Microchemistry Oy Method of forming ultrathin oxide layer
US6358785B1 (en) * 2000-06-06 2002-03-19 Lucent Technologies, Inc. Method for forming shallow trench isolation structures
US6635565B2 (en) * 2001-02-20 2003-10-21 United Microelectronics Corp. Method of cleaning a dual damascene structure
KR20030000436A (ko) * 2001-06-25 2003-01-06 주식회사 하이닉스반도체 반도체 소자의 격리막 제조방법
JP3586268B2 (ja) * 2002-07-09 2004-11-10 株式会社東芝 半導体装置及びその製造方法
KR20040008874A (ko) * 2002-07-19 2004-01-31 삼성전자주식회사 반도체 장치의 소자 분리 방법
JP2005166700A (ja) * 2003-11-28 2005-06-23 Toshiba Corp 半導体装置及びその製造方法
JP2005175277A (ja) 2003-12-12 2005-06-30 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
JP2005243709A (ja) 2004-02-24 2005-09-08 Toshiba Corp 半導体装置およびその製造方法
US7524735B1 (en) * 2004-03-25 2009-04-28 Novellus Systems, Inc Flowable film dielectric gap fill process
JP2005332885A (ja) * 2004-05-18 2005-12-02 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法
JP4594648B2 (ja) * 2004-05-26 2010-12-08 株式会社東芝 半導体装置およびその製造方法
US7332408B2 (en) * 2004-06-28 2008-02-19 Micron Technology, Inc. Isolation trenches for memory devices
US7521378B2 (en) * 2004-07-01 2009-04-21 Micron Technology, Inc. Low temperature process for polysilazane oxidation/densification
US7361958B2 (en) * 2004-09-30 2008-04-22 Intel Corporation Nonplanar transistors with metal gate electrodes
JP4329740B2 (ja) * 2004-10-22 2009-09-09 セイコーエプソン株式会社 有機エレクトロルミネッセンス装置の製造方法、及び有機エレクトロルミネッセンス装置
US7837838B2 (en) * 2006-03-09 2010-11-23 Applied Materials, Inc. Method of fabricating a high dielectric constant transistor gate using a low energy plasma apparatus
JP2009076638A (ja) * 2007-09-20 2009-04-09 Toshiba Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
US7803721B2 (en) 2010-09-28
US20070284649A1 (en) 2007-12-13
KR20070096758A (ko) 2007-10-02
KR100770820B1 (ko) 2007-10-26
JP2007266081A (ja) 2007-10-11

Similar Documents

Publication Publication Date Title
JP3917063B2 (ja) 半導体装置及びその製造方法
KR101096976B1 (ko) 반도체 소자 및 그 형성방법
CN106024794A (zh) 半导体器件及其制造方法
US20120100700A1 (en) Method for fabricating non-volatile memory device
CN108899321B (zh) 快闪存储器的制造方法
US7186607B2 (en) Charge-trapping memory device and method for production
TW200810120A (en) Double gate transistor and method of manufacturing same
JP2010177279A (ja) Ｎａｎｄ型フラッシュメモリおよびその製造方法
JP2009267208A (ja) 半導体装置及びその製造方法
US7803721B2 (en) Semiconductor device and method of manufacturing same
KR100876957B1 (ko) 노어형 불 휘발성 메모리 소자 및 이를 형성하기 위한 형성방법
US20060131637A1 (en) Bit line structure and production method thereof
KR20140144206A (ko) 비휘발성 메모리 어레이에 사용하기 위한 자가-정렬된 스택 게이트 구조물
JP2009278098A (ja) フラッシュメモリ素子及びその製造方法
US7573089B2 (en) Non-volatile memory device
US7915123B1 (en) Dual charge storage node memory device and methods for fabricating such device
JP2007005380A (ja) 半導体装置
CN112436011B (zh) 闪存器件及其制造方法
US20050205922A1 (en) Flash memory cell and methods for fabricating same
US6802322B2 (en) Method of fabricating a stringerless flash memory
US7038304B2 (en) Semiconductor memory device and manufacturing method thereof
JP4070703B2 (ja) 不揮発性半導体記憶装置の製造方法
JPH10256402A (ja) 半導体記憶装置およびその製造方法
JP2009152360A (ja) 半導体装置の製造方法
JP2010040754A (ja) 半導体装置およびその製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070926

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20090225

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20120308

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120403

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120604

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120814

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120918

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20121009

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20121106

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20151116

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20151116

Year of fee payment: 3

LAPS Cancellation because of no payment of annual fees