JP5087365B2 - Output device, multi-value output device, and semiconductor integrated device - Google Patents

Output device, multi-value output device, and semiconductor integrated device Download PDF

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JP5087365B2
JP5087365B2 JP2007278127A JP2007278127A JP5087365B2 JP 5087365 B2 JP5087365 B2 JP 5087365B2 JP 2007278127 A JP2007278127 A JP 2007278127A JP 2007278127 A JP2007278127 A JP 2007278127A JP 5087365 B2 JP5087365 B2 JP 5087365B2
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雅幸 村中
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株式会社リコー
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本発明は出力装置に関し、さらに詳しくは、当該出力装置を使用してシリアル伝送信号を高速で伝送する伝送回路に関するものである。   The present invention relates to an output device, and more particularly to a transmission circuit that transmits a serial transmission signal at high speed using the output device.

近年の高速伝送は、伝送路の周波数依存性のため、変化の多いビットは高周波成分が多く減衰により受信側の波形が小さくなるが、変化しないビットの場合は、高周波成分が少なく相対的に受信側の波形が大きくなる。このため、受信側での波形を一定とするためディエンファシスもしくはエンファシスを行う。(以降ディエンファシスの意味にエンファシスも含む。)ディエンファシスの方法は様々であるが、特許文献1のように、伝送路とインピーダンス整合された抵抗デバイスに流れる電流値を制御することで、伝送信号の振幅値を変える方法などが知られている(図31参照)。
また、特許文献2では出力端子の高周波成分を第一の制御回路6と、第二の制御回路8に帰還し、第一の制御回路6と、第二の制御回路8によって第一のMOSFETゲートがオン/オフするタイミングと第二のMOSFETがオフ/オンするタイミングをずらし出力波形を鈍らせることで、出力波形が遷移しているときの消費電流を減らし、電源電圧の変動を抑えることが可能である(図32参照)。 Further, in Patent Document 2, the high frequency component of the output terminal is fed back to the first control circuit 6 and the second control circuit 8, and the first MOSFET gate is provided by the first control circuit 6 and the second control circuit 8. By shifting the timing of turning on / off and the timing of turning off / on of the second MOSFET and blunting the output waveform, it is possible to reduce the current consumption when the output waveform is transitioning and suppress fluctuations in the power supply voltage. (See FIG. 32).
特開2006−60751公報JP-A-2006-60751 特開2006−33301公報Japanese Unexamined Patent Publication No. 2006-33301 In recent years, high-speed transmission is dependent on the frequency of the transmission line, so bits with a lot of changes have many high-frequency components and the waveform on the receiving side becomes small due to attenuation. The waveform on the side increases. For this reason, de-emphasis or emphasis is performed to make the waveform on the receiving side constant. (Hereinafter, emphasis is also included in the meaning of de-emphasis.) There are various methods of de-emphasis. However, as in Patent Document 1, a transmission signal is controlled by controlling a current value flowing in a resistance device impedance-matched to a transmission line. There is known a method of changing the amplitude value (see FIG. 31). In recent years, high-speed transmission is dependent on the frequency of the transmission line, so bits with a lot of changes have many high-frequency components and the waveform on the receiving side becomes small due to attenuation. The waveform on the side increases. For this reason, de-emphasis or emphasis is performed to make the waveform on the receiving side constant. (Hereinafter, emphasis is also included in the meaning of de-emphasis.) There are various methods of de-emphasis. However, as in Patent Document 1, a transmission signal is controlled by controlling a current value flowing in a resistance device impedance-matched to a transmission line. There is known a method of changing the waveform value (see FIG. 31).
In Patent Document 2, the high frequency component of the output terminal is fed back to the first control circuit 6 and the second control circuit 8, and the first MOSFET gate is fed by the first control circuit 6 and the second control circuit 8. By shifting the timing when the second MOSFET is turned on / off and the timing when the second MOSFET is turned off / on, the output waveform is blunted, thereby reducing current consumption when the output waveform is transitioning and suppressing fluctuations in the power supply voltage (See FIG. 32). In Patent Document 2, the high frequency component of the output terminal is fed back to the first control circuit 6 and the second control circuit 8, and the first MOSFET gate is fed by the first control circuit 6 and the second control circuit 8. By shifting the timing when the second MOSFET is turned on / off and the timing when the second MOSFET is turned off / on, the output waveform is blunted, thereby reducing current consumption when the output waveform is transitioning and suppressing fluctuations in the power supply voltage ( See FIG. 32).
JP 2006-60751 A JP 2006-60751 A JP 2006-33301 A JP 2006-33301 A

しかし、特許文献1に開示されている従来方法では、ディエンファシス時には振幅を制御するため出力回路に余分に電流を流し込むので、非ディエンファシス時より消費電流が大きくなる。よって、ディエンファシス時と非ディエンファシス時の電源電圧の変動量が異なり、伝送信号のジッタの原因となるといった問題がある。
また、特許文献2に開示されている従来方法は、エッジ起因の電源変動を抑える方法なので、特許文献2に対して特許文献1と同様の方法でディエンファシスを付加した場合でも、ディエンファシス時と非ディエンファシス時の消費電流の差が原因のジッタに対しては全く効果がない。 Further, since the conventional method disclosed in Patent Document 2 is a method of suppressing power fluctuations caused by edges, even when de-emphasis is added to Patent Document 2 by the same method as in Patent Document 1, the de-emphasis occurs. It has no effect on jitter caused by the difference in current consumption during non-emphasis. また、出力を制御回路に帰還する機構のため、帰還しない場合と比べて負荷容量が大きくなり、伝送信号を受信回路に送信できない可能性もある。 Further, since the mechanism returns the output to the control circuit, the load capacitance becomes larger than that in the case where the output is not fed back, and there is a possibility that the transmission signal cannot be transmitted to the receiving circuit.
本発明は、かかる課題に鑑みてなされたものであり、特許文献1の機構(図31)にダミーの電流駆動部を加え、電流駆動部が電流を流していない時に、ダミーの電流駆動部が電流を消費するようにして、ディエンファシス時と非ディエンファシス時の消費電流を一定にすることで、電源変動も一定となり、その結果ジッタの低減を可能にする出力装置を提供することを目的とする。 The present invention has been made in view of such a problem, and when a dummy current drive unit is added to the mechanism of Patent Document 1 (FIG. 31) and the current drive unit does not pass a current, the dummy current drive unit is By consuming current and making the current consumption during de-enfasis and non-de-enfasis constant, the power supply fluctuation becomes constant, and as a result, the purpose is to provide an output device that enables reduction of jitter. To do.
また、他の目的は、電流駆動部を複数にし、それに対応するダミー電流駆動部も複数にすることで、多値出力のデータ依存によるジッタにも対応可能とすることである。 Another object is to make it possible to deal with jitter due to data dependence of multi-valued output by using a plurality of current drive units and a plurality of dummy current drive units corresponding to the current drive units. However, in the conventional method disclosed in Patent Document 1, an extra current is supplied to the output circuit in order to control the amplitude during de-emphasis, so that the current consumption is greater than during non-de-emphasis. Therefore, there is a problem that the amount of fluctuation in the power supply voltage during de-emphasis and non-de-emphasis is different, causing jitter in the transmission signal. However, in the conventional method disclosed in Patent Document 1, an extra current is supplied to the output circuit in order to control the amplitude during de-emphasis, so that the current consumption is greater than during non-de-emphasis. Therefore, there is a problem that the amount of fluctuation in the power supply voltage during de-emphasis and non-de-emphasis is different, causing jitter in the transmission signal.
Further, the conventional method disclosed in Patent Document 2 is a method for suppressing power supply fluctuation caused by an edge. Therefore, even when de-emphasis is added to Patent Document 2 by the same method as Patent Document 1, There is no effect on jitter caused by the difference in current consumption during non-de-emphasis. Further, since the output is fed back to the control circuit, the load capacity becomes larger than when feedback is not performed, and the transmission signal may not be transmitted to the receiving circuit. Further, the conventional method disclosed in Patent Document 2 is a method for suppressing power supply fluctuation caused by an edge. Therefore, even when de-emphasis is added to Patent Document 2 by the same method as Patent Document 1, There is no effect on Jitter caused by the difference in current consumption during non-de-emphasis. Further, since the output is fed back to the control circuit, the load capacity becomes larger than when feedback is not performed, and the transmission signal may not be transmitted to the receiving circuit.
The present invention has been made in view of such a problem. A dummy current drive unit is added to the mechanism of FIG. 31 (FIG. 31), and when the current drive unit is not passing current, the dummy current drive unit is The purpose is to provide an output device that consumes current and keeps the current consumption constant during de-emphasis and non-de-emphasis, so that power fluctuations are also constant, and as a result, jitter can be reduced. To do. The present invention has been made in view of such a problem. A dummy current drive unit is added to the mechanism of FIG. 31 (FIG. 31), and when the current drive unit is not passing current, the dummy current drive unit is The purpose is to provide an output device that consumes current and keeps the current consumption constant during de-emphasis and non-de-emphasis, so that power fluctuations are also constant, and as a result, jitter can be reduced. To do.
Another object is to make it possible to cope with jitter due to data dependence of multi-level output by using a plurality of current drive units and a plurality of corresponding dummy current drive units. Another object is to make it possible to cope with jitter due to data dependence of multi-level output by using a plurality of current drive units and a plurality of corresponding dummy current drive units.

本発明はかかる課題を解決するために、請求項1は、伝送路に伝送信号を出力する出力装置であって、入力されたデータを振幅制御して出力するデータ出力部と、第1及び第2の振幅制御信号に基づいて前記伝送路に電流を重畳出力して前記伝送信号の振幅を制御する電流駆動部と、前記第1及び第2の振幅制御信号に基づいて前記電流駆動部との合計消費電流値が略一定となるように消費電流を制御するダミー電流駆動部と、を備え、前記ダミー電流駆動部と前記電流駆動部との構成が同じであり、前記電流駆動部は、前記第1の振幅制御信号に基づいてオン・オフする電源側駆動スイッチと、前記第2の振幅制御信号に基づいてオン・オフするグランド側駆動スイッチと、前記電源側駆動スイッチを介して前記伝送路に電流を流し込む電源側駆動電流源と、前記グランド側駆動スイッチを介して前記電源側駆動電流源と略等しい電流をグランドに引き込むグランド側駆動電流源と、を備え、前記ダミー電流駆動部は、前記第1の振幅制御信号に基づいてオン・オフする電源側ダミースイッチと、前記第2の振幅制御信号に基づいてオン・オフするグランド側ダミースイッチと、前記電源側ダミースイッチを介して電流を流し込む電源側ダミー電流源と、前記グランド側ダミースイッチを介して電流をグランドに引き込むグランド側ダミー電流源と、を備え前記電源側駆動スイッチ及び前記グランド側駆動スイッチがオフすることで前記電流駆動部をオフとし、且つ前記電源側ダミースイッチ及び前記グランド側ダミースイッチが何れもオン状態になった時、前記ダミー電流駆動部が電流を消費することを特徴とする。
請求項2は、前記データ出力部は、出力インピーダンスを前記伝送路の特性インピーダンスに整合するように調整された第1及び第2の抵抗デバイスと、該第1の抵抗デバイスに直列に接続されて、前記入力されたデータに基づいて前記伝送信号をハイ・レベル又はロー・レベルに切り替えるためにオン、オフ制御される電源側スイッチと、前記第2の抵抗デバイスに直列に接続されて、前記入力されたデータに基づいて前記伝送信号をハイ・レベル又はロー・レベルに切り替えるためにオン、オフ制御されるグランド側スイッチと、を備えたことを特徴とする。 According to claim 2, the data output unit is connected in series to the first and second resistance devices whose output impedance is adjusted to match the characteristic impedance of the transmission line, and the first resistance device. , The power supply side switch controlled on and off to switch the transmission signal to high level or low level based on the input data, and the input connected in series with the second resistance device. It is characterized by including a ground-side switch that is controlled on and off to switch the transmitted signal to a high level or a low level based on the obtained data. In order to solve this problem, the present invention provides an output device that outputs a transmission signal to a transmission line, a data output unit that outputs amplitude-controlled input data, and first and first outputs A current driver that superimposes and outputs a current to the transmission path based on the amplitude control signal of 2 to control the amplitude of the transmission signal, and the current driver based on the first and second amplitude control signals. A dummy current driving unit that controls current consumption so that the total current consumption value is substantially constant, and the dummy current driving unit and the current driving unit have the same configuration, and the current driving unit includes: A power supply side drive switch that is turned on / off based on the first amplitude control signal, a ground side drive switch that is turned on / off based on the second amplitude control signal, and the transmission line via the power suppl In order to solve this problem, the present invention provides an output device that outputs a transmission signal to a transmission line, a data output unit that outputs amplitude-controlled input data, and first and first outputs A current driver that superimposes and outputs a current A dummy current driving unit that controls current consumption so that the total current consumption. To the transmission path based on the amplitude control signal of 2 to control the amplitude of the transmission signal, and the current driver based on the first and second amplitude control signals. value is substantially constant, and the dummy current driving unit and the current driving unit have the same configuration, and the current driving unit includes: A power supply side drive switch that is turned on / off based on the first amplitude control signal, a ground side drive switch that is turned on / off based on the second amplitude control signal, and the transmission line via the power suppl y side drive switch Electric current that flows into A side drive current source and a ground side drive current source that draws a current substantially equal to the power supply side drive current source to the ground via the ground side drive switch, and the dummy current drive unit has the first amplitude. A power supply side dummy switch that is turned on / off based on a control signal, a ground side dummy switch that is turned on / off based on the second amplitude control signal, and a power supply side dummy current that flows a current through the power supply side dummy switch A power source side driving switch and the ground side driving switch are turned off to turn off the current driving unit, and a ground side dummy current source that draws a current to the ground via the ground side dummy switch. When both the power supply side dummy switch and the ground side dummy switch are turned on, the dummy current drive is performed. There wherein the consuming current. y side drive switch Electric current that flows into A side drive current source and a ground side drive current source that draws a current substantially equal to the power supply side drive current source to the ground via the ground side drive switch, and the dummy current drive unit has the first amplitude. A power supply side dummy switch that is turned on / off based on a control signal, a ground side dummy switch that is turned on / off based on the second amplitude control signal, and a power supply side dummy current that flows a current through the power supply side dummy switch A power source side driving switch and the ground side driving switch are turned off to turn off the current driving unit, and a ground side dummy current source that draws a current to the ground via the ground side dummy switch. When both the power supply side dummy switch and the ground side dummy switch are turned on, the dummy current drive is performed. There hence the consuming current.
According to a second aspect of the present invention, the data output unit is connected in series to the first and second resistance devices adjusted to match the output impedance to the characteristic impedance of the transmission line, and the first resistance device. A power supply side switch that is controlled to be turned on and off in order to switch the transmission signal to a high level or a low level based on the inputted data, and the input connected to the second resistance device in series. And a ground-side switch that is controlled to be turned on and off in order to switch the transmission signal to a high level or a low level based on the received data. According to a second aspect of the present invention, the data output unit is connected in series to the first and second resistance devices adjusted to match the output impedance to the characteristic impedance of the transmission line, and the first resistance device. A power supply side And a ground-side switch that is controlled to be turned on and off in order to switch the transmission signal to a high level or a low level based on the therefore data, and the input connected to the second resistance device in series. is controlled to be turned on and off in order to switch the transmission signal to a high level or a low level based on the received data.

請求項3は、伝送路に多値の伝送信号を出力する多値信号出力装置において、入力された振幅制御信号に基づいてデータを出力するデータ出力部と、第1及び第2の振幅制御信号に基づいて前記伝送路に電流を重畳出力して前記伝送信号の振幅を制御する複数の電流駆動部と、前記第1及び第2の振幅制御信号に基づいて前記電流駆動部との合計消費電流値が略一定となるように消費電流を制御する複数のダミー電流駆動部と、を備え、前記複数のダミー電流駆動部と前記複数の電流駆動部との構成が同じであり、前記複数の電流駆動部は、前記第1の振幅制御信号に基づいてオン・オフする電源側駆動スイッチと、前記第2の振幅制御信号に基づいてオン・オフするグランド側駆動スイッチと、前記電源側駆動スイッチを介して前記伝送路に電流を流し込む電源側駆動電流源と、前記グランド側駆動スイッチを介して前記電源側駆動電流源と略等しい電流をグランドに引き込むグランド側駆動電流源と、を備え、前記複数のダミー電流駆動部は、前記第1の振幅制御信号に基づいてオン・オフする電源側ダミースイッチと、前記第2の振幅制御信号に基づいてオン・オフするグランド側ダミースイッチと、前記電源側ダミースイッチを介して電流を流し込む電源側ダミー電流源と、前記グランド側ダミースイッチを介して電流をグランドに引き込むグランド側ダミー電流源と、を備え、前記電源側駆動スイッチ及び前記グランド側駆動スイッチがオフすることで前記電流駆動部をオフとし、且つ前記電源側ダミースイッチ及び前記グランド側ダミースイッチが何れもオン状態になった時、前記ダミー電流駆動部が電流を消費することを特徴とする。
請求項4は、前記データ出力部は、出力インピーダンスを前記伝送路の特性インピーダンスに整合するように調整された第1及び第2の抵抗デバイスと、該第1の抵抗デバイスに直列に接続されて、前記入力されたデータに基づいて前記伝送信号をハイ・レベル又はロー・レベルに切り替えるためにオン、オフ制御される電源側スイッチと、前記第2の抵抗デバイスに直列に接続されて、前記入力されたデータに基づいて前記伝送信号をハイ・レベル又はロー・レベルに切り替えるためにオン、オフ制御されるグランド側スイッチと、を備えたことを特徴とする。 According to claim 4, the data output unit is connected in series to the first and second resistance devices whose output impedance is adjusted to match the characteristic impedance of the transmission line, and the first resistance device. , The power supply side switch controlled on and off to switch the transmission signal to high level or low level based on the input data, and the input connected in series with the second resistance device. It is characterized by including a ground-side switch that is controlled on and off to switch the transmitted signal to a high level or a low level based on the obtained data. According to a third aspect of the present invention, there is provided a multilevel signal output device for outputting a multilevel transmission signal to a transmission line, a data output section for outputting data based on the input amplitude control signal, and first and second amplitude control signals. And a plurality of current driving units that control the amplitude of the transmission signal by superimposing and outputting current to the transmission line based on the first and second current control units based on the first and second amplitude control signals. A plurality of dummy current drive units that control current consumption so that the values are substantially constant, and the plurality of dummy current drive units and the plurality of current drive units have the same configuration, and the plurality of currents The drive unit includes a power supply side drive switch that is turned on / off based on the first amplitude control signal, a ground side drive swit According to a third aspect of the present invention, there is provided a multilevel signal output device for outputting a multilevel transmission signal to a transmission line, a data output section for outputting data based on the input amplitude control signal, and first and second amplitude control signals. And a plurality of current driving units that control the amplitude of the transmission signal by superimposing and outputting current to the transmission line based on the first and second current control units based on the first and second amplitude control signals. A plurality of dummy current drive units that control current consumption so that the values ​​are substantially constant, and the plurality of dummy current drive units and the plurality of current drive units have the same configuration, and the plurality of currents The drive unit includes a power supply side drive switch that is turned on / off based on the first amplitude control signal, a ground side drive swit ch that is turned on / off based on the second amplitude control signal, and the power supply side drive switch. Via the transmission line A power supply side drive current source that feeds current; and a ground side drive current source that draws current substantially equal to the power supply side drive current source to the ground via the ground side drive switch, and the plurality of dummy current drive units include A power-side dummy switch that is turned on / off based on the first amplitude control signal, a ground-side dummy switch that is turned on / off based on the second amplitude control signal, and a current via the power-side dummy switch. And a ground-side dummy current source that draws current to the ground via the ground-side dummy switch, and the current-side drive switch and the ground-side drive switch are turned off to turn off the current. The drive unit is turned off, and the power supply side dummy switch and the ground side dummy switch are both turned on. ch that is turned on / off based on the second amplitude control signal, and the power supply side drive switch. Via the transmission line A power supply side drive current source that feeds current; and a ground side drive current source that draws current substantially equal to the power supply side drive current source to the ground via the ground side drive switch, and the plurality of dummy current drive units include A power-side dummy switch that is turned on / off based on the first amplitude control signal, a ground- And a ground-side dummy current source that draws current to the ground via the ground-side dummy switch, and a current via the power-side dummy switch, and a ground-side dummy current source that draws current to the ground via the ground-side dummy switch, And the current-side drive switch and the ground-side drive switch are turned off to turn off the current. The drive unit is turned off, and the power supply side dummy switch and the ground side dummy switch are both turned on. When the, wherein the dummy current driver consumes current. When the, wherein the dummy current driver consumes current.
According to a fourth aspect of the present invention, the data output unit is connected in series to the first and second resistance devices adjusted to match the output impedance to the characteristic impedance of the transmission line, and the first resistance device. A power supply side switch that is controlled to be turned on and off in order to switch the transmission signal to a high level or a low level based on the inputted data, and the input connected to the second resistance device in series. And a ground-side switch that is controlled to be turned on and off in order to switch the transmission signal to a high level or a low level based on the received data. According to a fourth aspect of the present invention, the data output unit is connected in series to the first and second resistance devices adjusted to match the output impedance to the characteristic impedance of the transmission line, and the first resistance device. A power supply side And a ground-side switch that is controlled to be turned on and off in order to switch the transmission signal to a high level or a low level based on the therefore data, and the input connected to the second resistance device in series. is controlled to be turned on and off in order to switch the transmission signal to a high level or a low level based on the received data.

請求項5は、高速シリアル伝送に用いられる半導体集積装置であって、請求項1至の何れか一項に記載の出力装置を用いてシリアル伝送信号を出力することを特徴とする。

A fifth aspect of the present invention is a semiconductor integrated device used for high-speed serial transmission, wherein a serial transmission signal is output using the output device according to any one of the first to fourth aspects.

本発明によれば、ディエンファシス(エンファシス)時と非ディエンファシス(エンファシス)時に流れる電流値の総和を一定にすることで、ディエンファシス時と非ディエンファシス時の消費電流の差を低減し、その結果、電源変動量がデータによらず一定となり、従来と比べてジッタの低減を可能にすることができる。
また、電流駆動部と同様の構成を持つダミー電流駆動部を用いて、電流駆動部が電流を消費していない時に、ダミー電流駆動部が電流を消費することで、ディエンファシス時と非ディエンファシス時に消費される電流量をほぼ等しくし、その結果、電源変動量を一定にすることでデータ依存のジッタの低減を可能にすることができる。 Further, by using a dummy current drive unit having the same configuration as the current drive unit, the dummy current drive unit consumes the current when the current drive unit does not consume the current, so that the dummy current drive unit consumes the current, thereby de-emphasizing and non-de-enhancement. It is possible to reduce data-dependent jitter by making the amount of current consumed at times almost equal and, as a result, the amount of power fluctuation constant. According to the present invention, by making the sum of current values flowing during de-emphasis (emphasis) and non-de-emphasis (emphasis) constant, the difference in current consumption during de-emphasis and non-de-emphasis is reduced. As a result, the power fluctuation amount is constant regardless of the data, and jitter can be reduced as compared with the conventional case. According to the present invention, by making the sum of current values ​​flowing during de-emphasis (emphasis) and non-de-emphasis (emphasis) constant, the difference in current consumption during de-emphasis and non-de-emphasis is reduced. As a result, the power fluctuation amount is constant regardless of the data, and jitter can be reduced as compared with the conventional case.
Also, by using a dummy current drive unit having the same configuration as the current drive unit, when the current drive unit does not consume current, the dummy current drive unit consumes current, thereby de-emphasis and non-de-emphasis. The amount of current consumed sometimes is made substantially equal, and as a result, the amount of power supply fluctuation can be made constant, thereby making it possible to reduce data-dependent jitter. Also, by using a dummy current drive unit having the same configuration as the current drive unit, when the current drive unit does not consume current, the dummy current drive unit consumes current, thereby de-emphasis and non-de-emphasis. The amount of current consumed sometimes is made substantially equal, and as a result, the amount of power supply fluctuation can be made constant, thereby making it possible to reduce data-dependent jitter.

また、出力抵抗に流れる電流値によって出力振幅を制御する多値出力装置に、ダミー電流駆動部を用いることで、出力される電圧値によらず電流値の総和を一定にすることが可能となり、その結果、出力値によらず電源の変動量を一定にすることが可能となり、データ依存のジッタの低減を可能にすることができる。
また、出力される電圧値によらず、電流駆動部もしくはダミー電流で電流を消費することで、電源の変動量をデータによらず一定にすることが可能となり、データ依存のジッタの低減を可能にすることができる。 In addition, by consuming the current with the current drive unit or dummy current regardless of the output voltage value, it is possible to make the fluctuation amount of the power supply constant regardless of the data, and it is possible to reduce data-dependent jitter. Can be.
また、差動の構成をなすことで、近年の高速シリアル伝送の装置に応用が可能となり、電源変動量がデータによらない出力装置を提供し、低ジッタの高速シリアル伝送装置を実現できる。 Further, the differential configuration makes it possible to apply it to a high-speed serial transmission device in recent years, provide an output device in which the amount of power fluctuation does not depend on data, and realize a high-speed serial transmission device with low jitter. In addition, by using a dummy current drive unit in the multi-value output device that controls the output amplitude according to the current value flowing through the output resistor, it becomes possible to make the sum of the current values constant regardless of the output voltage value, As a result, it is possible to make the fluctuation amount of the power source constant regardless of the output value, and it is possible to reduce data-dependent jitter. In addition, by using a dummy current drive unit in the multi-value output device that controls the output amplitude according to the current value flowing through the output resistor, it becomes possible to make the sum of the current values ​​constant regardless of the output voltage value, As a result, it is possible to make the fluctuation amount of the power source constant regardless of the output value, and it is possible to reduce data-dependent jitter.
In addition, by consuming current with the current driver or dummy current regardless of the output voltage value, the amount of power fluctuation can be made constant regardless of data, and data-dependent jitter can be reduced. Can be. In addition, by consuming current with the current driver or dummy current regardless of the output voltage value, the amount of power fluctuation can be made constant regardless of data, and data-dependent jitter can be reduced. Can be.
In addition, the differential configuration can be applied to recent high-speed serial transmission devices, and an output device whose power fluctuation amount does not depend on data can be provided, thereby realizing a low-jitter high-speed serial transmission device. In addition, the differential configuration can be applied to recent high-speed serial transmission devices, and an output device whose power fluctuation amount does not depend on data can be provided, thereby realizing a low-jitter high-speed serial transmission device.

以下、本発明を図に示した実施形態を用いて詳細に説明する。但し、この実施形態に記載される構成要素、種類、組み合わせ、形状、その相対配置などは特定的な記載がない限り、この発明の範囲をそれのみに限定する主旨ではなく単なる説明例に過ぎない。
<実施例1>
図1は本発明の出力装置の一実施形態を示す概略図である。図2は本発明の多値出力装置の一実施形態を示す概略図である。

図3は本発明の出力装置のブロック図である。 FIG. 3 is a block diagram of the output device of the present invention. 本発明はデータ出力部1、電流駆動部2、ダミー電流駆動部3の3つのパートから構成されている。 The present invention is composed of three parts: a data output unit 1, a current drive unit 2, and a dummy current drive unit 3. 以下、データ出力部1の説明、電流駆動部2の説明、ダミー電流駆動部3の説明をした後、全体の説明を行う。 Hereinafter, the data output unit 1, the current drive unit 2, and the dummy current drive unit 3 will be described, and then the whole will be described.
図4はデータ出力部1の実施例である。 FIG. 4 is an example of the data output unit 1. データ出力部1は、一方が出力端67に接続された抵抗デバイス(第1抵抗デバイス)p62(または(第2抵抗デバイス)n63)と他方がスイッチpo(電源側スイッチ)61((グランド側スイッチ)no64)と接続されている。 One of the data output units 1 is a resistance device (first resistance device) p62 (or (second resistance device) n63) connected to the output terminal 67, and the other is a switch po (power supply side switch) 61 ((ground side switch). ) No64) is connected. また、68は終端抵抗で、伝送路の特性インピーダンスと等しい値の抵抗値である。 Further, 68 is a terminating resistor, which is a resistance value equal to the characteristic impedance of the transmission line. 以下では各部位について説明する。 Each part will be described below. Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings. However, the components, types, combinations, shapes, relative arrangements, and the like described in this embodiment are merely illustrative examples and not intended to limit the scope of the present invention only unless otherwise specified. . However, the components, types, combinations, shapes, relative arrangements, and the like described in this embodiment are merely schematically examples and not intended to limit the, however, the present invention will be described in detail with reference to embodiments shown in the drawings. scope of the present invention only unless otherwise specified.
<Example 1> <Example 1>
FIG. 1 is a schematic view showing an embodiment of the output device of the present invention. FIG. 2 is a schematic view showing an embodiment of the multi-value output apparatus of the present invention. FIG. 1 is a schematic view showing an embodiment of the output device of the present invention. FIG. 2 is a schematic view showing an embodiment of the multi-value output apparatus of the present invention.
FIG. 3 is a block diagram of the output device of the present invention. The present invention comprises three parts: a data output unit 1, a current drive unit 2, and a dummy current drive unit 3. Hereinafter, the data output unit 1, the current drive unit 2, and the dummy current drive unit 3 will be described, and then the entire description will be given. FIG. 3 is a block diagram of the output device of the present invention. The present invention has three parts: a data output unit 1, a current drive unit 2, and a dummy current drive unit 3. recently, the data output unit 1 , the current drive unit 2, and the dummy current drive unit 3 will be described, and then the entire description will be given.
FIG. 4 shows an embodiment of the data output unit 1. The data output unit 1 includes a resistance device (first resistance device) p62 (or (second resistance device) n63), one of which is connected to the output terminal 67, and a switch po (power supply side switch) 61 ((ground side switch). ) No64). Reference numeral 68 denotes a termination resistor having a resistance value equal to the characteristic impedance of the transmission line. Below, each part is demonstrated. FIG. 4 shows an embodiment of the data output unit 1. The data output unit 1 includes a resistance device (first resistance device) p62 (or (second resistance device) n63), one of which is connected to the output terminal 67, and a switch po (power supply side switch) 61 ((ground side switch).) No64). Reference identifier 68 Then a termination resistor having a resistance value equal to the characteristic impedance of the transmission line. Below, each part is demonstrated.

スイッチpo(61)はp−MOSトランジスタにより構成され、スイッチno(64)はn−MOSトランジスタで構成される。更に抵抗デバイスp(62)は、スイッチpo(61)がオン状態の時にスイッチpo(61)と抵抗デバイスp(62)の合成インピーダンスが、伝送路のインピーダンスに整合する。
同様に抵抗デバイスn(63)もスイッチno(64)がオン状態の時にスイッチno(64)と抵抗デバイスn(63)の合成インピーダンスが、伝送路のインピーダンスに整合する。 Similarly, in the resistance device n (63), when the switch no (64) is in the ON state, the combined impedance of the switch no (64) and the resistance device n (63) matches the impedance of the transmission line. 抵抗デバイス62及び63が厳密な値を要求された場合、所望の値になるように制御される。 If the resistor devices 62 and 63 are required to have exact values, they are controlled to the desired values. そして、その出力インピーダンス整合を行う制御の方法については特開2006−60751に詳述されているように、抵抗デバイス62(または63)が可変抵抗でインピーダンス調整部で得られた結果をもとにインピーダンス整合する方法と、抵抗デバイス62(または63)が複数の抵抗デバイスからなり、インピーダンス調整部で得られた結果をもとに複数の抵抗デバイスがいくつか選択されインピーダンス整合をする選択式の方法がある。 Then, as described in detail in Japanese Patent Application Laid-Open No. 2006-60751, the control method for performing the output impedance matching is based on the result obtained by the impedance adjusting unit of the resistance device 62 (or 63) with a variable resistance. Impedance matching method and selection method in which resistance device 62 (or 63) is composed of a plurality of resistance devices, and several resistance devices are selected based on the result obtained by the impedance adjustment unit to perform impedance matching. There is.
また、抵抗デバイス62及び63を用いずに、スイッチpo61及びスイッチno64のゲート電圧を制御して、スイッチpo及びスイッチnoのオン抵抗が、伝送路のインピーダンスに整合する用に制御する方法もあり、これらの方法のいずれを用いてもデータ出力部を構成することが可能である。 There is also a method of controlling the gate voltage of the switch po61 and the switch no64 so that the on-resistance of the switch po and the switch no is matched with the impedance of the transmission line without using the resistance devices 62 and 63. The data output unit can be configured by using any of these methods. The switch po (61) is composed of a p-MOS transistor, and the switch no (64) is composed of an n-MOS transistor. Further, in the resistance device p (62), when the switch po (61) is in the ON state, the combined impedance of the switch po (61) and the resistance device p (62) matches the impedance of the transmission line. The switch po (61) is composed of a p-MOS transistor, and the switch no (64) is composed of an n-MOS transistor. Further, in the resistance device p (62), when the switch po (61) is in the ON state, the combined impedance of the switch po (61) and the resistance device p (62) matches the impedance of the transmission line.
Similarly, when the switch device no (64) is in the ON state, the combined impedance of the switch device no (64) and the resistance device n (63) matches the impedance of the transmission line. When the resistance devices 62 and 63 are required to have exact values, the resistance devices 62 and 63 are controlled to have desired values. The control method for matching the output impedance is based on the result obtained by the impedance adjusting unit with the resistance device 62 (or 63) having a variable resistance, as described in detail in JP-A-2006-60751. A method of impedance matching and a selection type method in which the resistance device 62 (or 63) is composed of a plurality of resistance devices, and a plurality of resistance devices are selected based on the result obtained by the impedance adjustment unit to perform impedance matching. There is. Similarly, when the switch device no (64) is in the ON state, the combined impedance of the switch device no (64) and the resistance device n (63) matches the impedance of the transmission line. When the resistance devices 62 and 63 The control method for matching the output impedance is based on the result obtained by the impedance adjusting unit with the resistance device 62 (or 63) having a. are required to have exact values, the resistance devices 62 and 63 are controlled to have desired values. variable resistance, as described in detail in JP-A-2006-60751. A method of impedance matching and a selection type method in which the resistance device 62 (or 63) is composed of a plurality of resistance devices, and a plurality of resistance devices are selected based on the result obtained by the impedance adjustment unit to perform impedance matching. There is.
There is also a method of controlling the gate voltages of the switch po61 and the switch no64 without using the resistance devices 62 and 63 so that the on-resistances of the switch po and the switch no match the impedance of the transmission line. The data output unit can be configured by using any of these methods. There is also a method of controlling the gate voltages of the switch po61 and the switch no64 without using the resistance devices 62 and 63 so that the on-resistances of the switch po and the switch no match the impedance of the transmission line. output unit can be configured by using any of these methods.

図5はデータ出力部1にHが入力された時の動作図、図6は等価回路1である。71は入力データHが入力されていることを示す。図4と同じ構成要素には同一の番号を付し、説明を省略する。点線で描かれているスイッチ61及び抵抗デバイス62はスイッチ61がオフであることから、伝送路66から見た場合、開放であることを示している。スイッチno63はn−MOSトランジスタでHが入力されているのでオンとなり伝送路66と抵抗デバイスn63が接続される。また、抵抗デバイスn63及びスイッチno64のオン抵抗の合成インピーダンスは前述の通り伝送路のインピーダンスに整合するように制御されているので、図6の等価回路1と等価である。等価回路1は出力抵抗72のインピーダンスがZΩ、終端抵抗73がZΩで、それぞれ、一方がGNDと接続されているので、出力端67の電圧は0である。   FIG. 5 is an operation diagram when H is input to the data output unit 1, and FIG. 6 is an equivalent circuit 1. 71 indicates that the input data H is input. The same components as those in FIG. 4 are denoted by the same reference numerals, and description thereof is omitted. Since the switch 61 and the resistance device 62 drawn with a dotted line are off, the switch 61 is in an open state when viewed from the transmission line 66. Since the switch no63 is an n-MOS transistor and H is inputted, it is turned on and the transmission line 66 and the resistance device n63 are connected. Further, since the combined impedance of the on-resistances of the resistance device n63 and the switch no64 is controlled to match the impedance of the transmission line as described above, it is equivalent to the equivalent circuit 1 of FIG. In the equivalent circuit 1, since the impedance of the output resistor 72 is ZΩ and the termination resistor 73 is ZΩ, and one of them is connected to GND, the voltage at the output terminal 67 is zero.

図7はデータ出力部1にLが入力された時の動作図、図8は等価回路2である。74は入力データLが入力されていることを示す。図4及び図5と同じ構成要素には同一の番号を付し、説明を省略する。点線で描かれている63及び64は図7と同様に開放状態であることを示している。スイッチ61がオンなので、伝送路には抵抗デバイス62が接続され、図8の等価回路2で表される回路と等価である。出力端67の電圧は出力抵抗75(ZΩ)及び終端抵抗73(ZΩ)の抵抗分圧なので、Vdd/2である。このようにデータ出力部1は入力データに従って、伝送路の特性インピーダンスに整合したHレベルまたはLレベルの信号を出力する。
図9に電流駆動部2の実施の形態を示す。 FIG. 9 shows an embodiment of the current drive unit 2. 電流駆動部2は電流源p81及び電流源p81と直列に接続されたスイッチp82及び、電流源n84と電流源n84と直列に接続されたスイッチn83からなる。 The current drive unit 2 includes a current source p81, a switch p82 connected in series with the current source p81, and a switch n83 connected in series with the current source n84 and the current source n84. また、電流源p81及び電流源n84の電流値は等しい。 Further, the current values ​​of the current source p81 and the current source n84 are equal. スイッチp82はp−MOSトランジスタ、スイッチn83はn−MOSトランジスタで構成され、スイッチp82は振幅制御信号85によって、スイッチn83は振幅制御信号86によってオン/オフ制御される。 The switch p82 is composed of a p-MOS transistor, the switch n83 is composed of an n-MOS transistor, the switch p82 is controlled on / off by an amplitude control signal 85, and the switch n83 is controlled by an amplitude control signal 86. また電流駆動部の出力端67は伝送路66に接続され、出力端67はデータ出力部1の出力端67と同一である。 Further, the output end 67 of the current drive unit is connected to the transmission line 66, and the output end 67 is the same as the output end 67 of the data output unit 1. FIG. 7 is an operation diagram when L is input to the data output unit 1, and FIG. 8 is an equivalent circuit 2. 74 indicates that the input data L is input. The same components as those in FIGS. 4 and 5 are denoted by the same reference numerals, and description thereof is omitted. Reference numerals 63 and 64 drawn by dotted lines indicate an open state as in FIG. Since the switch 61 is on, the resistance device 62 is connected to the transmission line, which is equivalent to the circuit represented by the equivalent circuit 2 in FIG. The voltage of the output terminal 67 is Vdd / 2 because it is a resistance divided voltage of the output resistance 75 (ZΩ) and the termination resistance 73 (ZΩ). In this way, the data output unit 1 outputs an H level or L level signal matched to the characteristic impedance of the transmission line according to the input data. FIG. 7 is an operation diagram when L is input to the data output unit 1, and FIG. 8 is an equivalent circuit 2. 74 indicates that the input data L is input. The same components as those in FIGS. 4 and 5 are referenced by the same reference numerals, and description thereof is omitted. Reference numerals 63 and 64 drawn by dotted lines indicate an open state as in FIG. Since the switch 61 is on, the resistance device 62 is connected to the transmission line, which is equivalent to the circuit represented by the equivalent circuit 2 in FIG. The voltage of the output terminal 67 is Vdd / 2 because it is a resistance divided voltage of the output resistance 75 (ZΩ) and the termination resistance 73 (ZΩ). In this way, the data output unit 1 outputs an H level or L level signal matched to the characteristic impedance of the transmission line according to the input data.
FIG. 9 shows an embodiment of the current driver 2. The current driver 2 includes a current source p81, a switch p82 connected in series with the current source p81, and a switch n83 connected in series with the current source n84 and the current source n84. The current values of the current source p81 and the current source n84 are equal. The switch p82 is a p-MOS transistor and the switch n83 is an n-MOS transistor. The switch p82 is ON / OFF controlled by the amplitude control signal 85 and the switch n83 is ON / OFF controlled by the amplitude control signal 86. The output end 67 of the current driver is connected to the transmission line 66, and the output end 67 is the same as the output end 67 of the data output unit 1. FIG. 9 shows an embodiment of the current driver 2. The current driver 2 includes a current source p81, a switch p82 connected in series with the current source p81, and a switch n83 connected in series with the current source n84 and the current source n84. The current values ​​of the current source p81 and the current source n84 are equal. The switch p82 is a p-MOS transistor and the switch n83 is an n-MOS transistor. The switch p82 is ON / OFF controlled by the amplitude control signal 85 and the switch n83 is ON / OFF controlled by the amplitude control signal 86. The output end 67 of the current driver is connected to the transmission line 66, and the output end 67 is the same as the output end 67 of the data output unit 1.

図10〜13に電流駆動部2の電流経路と振幅制御信号p、nの関係を示す。図4乃至図9と同じ構成要素には同一の番号を付し、説明を省略する。
91〜94は振幅制御信号85/振幅制御信号86のデータパターンを示している。95〜99は電流の向きを示している。81〜84が点線で表されている場合、スイッチ82もしくは83がオフのため、伝送路66からみたら開放状態であることを示している。
図10で振幅制御信号85がLで振幅制御信号86がLの場合、スイッチ83がオフでスイッチ82がオンなので、電源電圧から伝送路66に電流が流 れ込む。
図11で振幅制御信号85がHで振幅制御信号86がHの場合、スイッチ82がオフでスイッチ83がオンなので伝送路からGNDに電流を引き込む。 In FIG. 11, when the amplitude control signal 85 is H and the amplitude control signal 86 is H, the switch 82 is off and the switch 83 is on, so that a current is drawn from the transmission line to the GND. 10 to 13 show the relationship between the current path of the current driver 2 and the amplitude control signals p and n. The same components as those in FIGS. 4 to 9 are denoted by the same reference numerals and description thereof is omitted. 10 to 13 show the relationship between the current path of the current driver 2 and the amplitude control signals p and n. The same components as those in FIGS. 4 to 9 are exemplified by the same reference numerals and description thereof is omitted.
Reference numerals 91 to 94 denote data patterns of the amplitude control signal 85 / amplitude control signal 86, respectively. Reference numerals 95 to 99 indicate current directions. When 81 to 84 are represented by dotted lines, it indicates that the switch 82 or 83 is in an OFF state, so that the switch 82 or 83 is open as viewed from the transmission path 66. Reference numerals 91 to 94 correctly data patterns of the amplitude control signal 85 / amplitude control signal 86, respectively. Reference numerals 95 to 99 indicate current directions. When 81 to 84 are represented by dotted lines, it indicates that the switch 82 or 83 is in an OFF state, so that the switch 82 or 83 is open as viewed from the transmission path 66.
In FIG. 10, when the amplitude control signal 85 is L and the amplitude control signal 86 is L, since the switch 83 is off and the switch 82 is on, a current flows from the power supply voltage to the transmission line 66. In FIG. 10, when the amplitude control signal 85 is L and the amplitude control signal 86 is L, since the switch 83 is off and the switch 82 is on, a current flows from the power supply voltage to the transmission line 66.
In FIG. 11, when the amplitude control signal 85 is H and the amplitude control signal 86 is H, since the switch 82 is off and the switch 83 is on, current is drawn from the transmission line to GND. In FIG. 11, when the amplitude control signal 85 is H and the amplitude control signal 86 is H, since the switch 82 is off and the switch 83 is on, current is drawn from the transmission line to GND.

図12で振幅制御信号85がLで振幅制御信号86がHの場合、スイッチ82及びスイッチ83がオンなので、電流源81及び電流源84が導通状態になる。ここで、電流源81と電流源84は理想的には電流値の等しい電流源なので、伝送路には電流が流れず電源からGNDに貫通電流が流れる。
図13で振幅制御信号85がHで振幅制御信号86がLの場合、スイッチ82及びスイッチ83がオフなので電流駆動部2は電流を消費しない。 In FIG. 13, when the amplitude control signal 85 is H and the amplitude control signal 86 is L, the switch 82 and the switch 83 are off, so the current drive unit 2 does not consume the current. データ出力部のスイッチと電流駆動部のスイッチは連動して動作をし、抵抗デバイスn63に電流を流しこんだり、抵抗デバイス62から電流を引き抜いたりして、出力端67に出力される電圧の値を制御する機能を持つ。 The switch of the data output unit and the switch of the current drive unit operate in conjunction with each other, and the value of the voltage output to the output terminal 67 by flowing a current into the resistance device n63 or drawing a current from the resistance device 62. Has a function to control. In FIG. 12, when the amplitude control signal 85 is L and the amplitude control signal 86 is H, the switch 82 and the switch 83 are on, so that the current source 81 and the current source 84 are in a conductive state. Here, since the current source 81 and the current source 84 are ideally current sources having the same current value, no current flows through the transmission line, and a through current flows from the power source to the GND. In FIG. 12, when the amplitude control signal 85 is L and the amplitude control signal 86 is H, the switch 82 and the switch 83 are on, so that the current source 81 and the current source 84 are in a conductive state. Here , since the current source 81 and the current source 84 are ideally current sources having the same current value, no current flows through the transmission line, and a through current flows from the power source to the GND.
In FIG. 13, when the amplitude control signal 85 is H and the amplitude control signal 86 is L, the switch 82 and the switch 83 are off, so that the current driver 2 does not consume current. The switch of the data output unit and the switch of the current drive unit operate in conjunction with each other, and the value of the voltage output to the output terminal 67 by flowing current into the resistance device n63 or drawing current from the resistance device 62. It has a function to control. In FIG. 13, when the amplitude control signal 85 is H and the amplitude control signal 86 is L, the switch 82 and the switch 83 are off, so that the current driver 2 does not consume current. The switch of the data output unit and the switch of the current drive unit operate in conjunction with each other, and the value of the voltage output to the output terminal 67 by flowing current into the resistance device n63 or drawing current from the resistance device 62. It has a function to control ..

図14はデータ出力部1と電流駆動部2の実施例である。データ65と振幅制御信号85、86のデータパターンについて説明する。
図15にデータ出力部に入力されるデータと振幅制御信号85乃至86の関係を示す。 FIG. 15 shows the relationship between the data input to the data output unit and the amplitude control signals 85 to 86. 図15の上からデータ、振幅制御信号85、振幅制御信号86のデータパターンを示している。 The data, the amplitude control signal 85, and the amplitude control signal 86 data patterns are shown from the top of FIG. 図中1UIとはデータパターンの最小パルス幅を示している。 In the figure, 1 UI indicates the minimum pulse width of the data pattern. 以降1UIを1bitとする。 Hereinafter, 1 UI will be referred to as 1 bit.
(1)、(4)のように1bit毎にデータが切り替わる場合、振幅制御信号85はHを振幅制御信号86はLを保持するので、電流駆動部2は電流を消費しない。 When the data is switched every 1 bit as in (1) and (4), the amplitude control signal 85 holds H and the amplitude control signal 86 holds L, so that the current drive unit 2 does not consume current.
(2)、(6)のように2bit以上データがLである場合、最初の1bit目では電流駆動部2は電流を消費しないが、2bit目以降はデータが切り替わるまで振幅制御信号は85はLを振幅制御信号86はLを保持するので、電流駆動部2は電源電圧から伝送路66に電流を流し込む(Lのディエンファシス)。 When the data of 2 bits or more is L as in (2) and (6), the current drive unit 2 does not consume the current in the first 1 bit, but after the 2 bit, the amplitude control signal is 85 L until the data is switched. Since the amplitude control signal 86 holds L, the current drive unit 2 causes a current to flow from the power supply voltage into the transmission line 66 (L deenfasis).
同様に(3)、(5)のように2bit以上データがHである場合、最初の1bit目では電流駆動部2は電流を消費しないが、2bit目移行はデータが切り替わるまで、出力端66からGNDに電流を引き込む(Hのディエンファシス)。 Similarly, when the data of 2 bits or more is H as in (3) and (5), the current drive unit 2 does not consume the current in the first 1 bit, but the 2 bit shift is from the output terminal 66 until the data is switched. Pull current into GND (H de-enhancement). 以上(1)〜(6)の間で、電流駆動部が電流を消費している時としていない時では消費電流に差が出るので、この差が電源電圧の変動量に差につながり、結果データ依存のジッタを生じる。 Between (1) and (6) above, there is a difference in the current consumption when the current drive unit is consuming the current and when it is not, so this difference leads to a difference in the amount of fluctuation of the power supply voltage, and the result data. It causes dependent jitter. 以上のデータパターンを基に振幅制御信号85及び86が取りうるデータパターンを図16に示す。 FIG. 16 shows a data pattern that the amplitude control signals 85 and 86 can take based on the above data pattern. 図16に示すように振幅制御信号は同時にスイッチ82及び83が同時にオンすることはない。 As shown in FIG. 16, the amplitude control signals do not turn on the switches 82 and 83 at the same time. FIG. 14 shows an embodiment of the data output unit 1 and the current drive unit 2. The data pattern of the data 65 and the amplitude control signals 85 and 86 will be described. FIG. 14 shows an embodiment of the data output unit 1 and the current drive unit 2. The data pattern of the data 65 and the amplitude control signals 85 and 86 will be described.
FIG. 15 shows the relationship between the data input to the data output unit and the amplitude control signals 85 to 86. Data patterns of the data, the amplitude control signal 85, and the amplitude control signal 86 are shown from the top in FIG. In the figure, 1 UI indicates the minimum pulse width of the data pattern. Hereinafter, 1 UI is set to 1 bit. FIG. 15 shows the relationship between the data input to the data output unit and the amplitude control signals 85 to 86. Data patterns of the data, the amplitude control signal 85, and the amplitude control signal 86 are shown from the top in FIG. In the figure, 1 UI indicates the minimum pulse width of the data pattern. In the figure, 1 UI is set to 1 bit.
When data is switched every 1 bit as in (1) and (4), the amplitude control signal 85 holds H and the amplitude control signal 86 holds L, so that the current driver 2 does not consume current. When data is switched every 1 bit as in (1) and (4), the amplitude control signal 85 holds H and the amplitude control signal 86 holds L, so that the current driver 2 does not consume current.
When the data is 2 bits or more as in (2) and (6), the current driver 2 does not consume current in the first 1 bit, but the amplitude control signal is 85 until the data is switched after the 2nd bit. Since the amplitude control signal 86 holds L, the current driver 2 feeds current from the power supply voltage to the transmission line 66 (deemphasis of L). When the data is 2 bits or more as in (2) and (6), the current driver 2 does not consume current in the first 1 bit, but the amplitude control signal is 85 until the data is switched after the 2nd bit. Since the amplitude control signal 86 holds L, the current driver 2 feeds current from the power supply voltage to the transmission line 66 (deemphasis of L).
Similarly, when the data of 2 bits or more is H as in (3) and (5), the current driver 2 does not consume current in the first 1 bit, but the transition to the 2 bit starts from the output terminal 66 until the data is switched. Current is drawn to GND (H de-emphasis). Between the above (1) to (6), there is a difference in current consumption when the current drive unit is not consuming current, so this difference leads to a difference in the amount of fluctuation of the power supply voltage, and the result data Dependent jitter. FIG. 16 shows data patterns that the amplitude control signals 85 and 86 can take based on the above data pattern. As shown in FIG. 16, in the amplitude control signal, the switches 82 and 83 are not simultaneously turned on. Similarly, when the data of 2 bits or more is H as in (3) and (5), the current driver 2 does not consume current in the first 1 bit, but the transition to the 2 bit starts from the output terminal 66 until The data is switched. Current is drawn to GND (H de-emphasis). Between the above (1) to (6), there is a difference in current consumption when the current drive unit is not consuming current, so this difference leads to a difference in the amount of fluctuation of the power supply voltage, and the result data Dependent jitter. FIG. 16 shows data patterns that the amplitude control signals 85 and 86 can take based on the above data pattern. As shown in FIG. 16, in the amplitude control signal, the switches 82 and 83 are not simultaneously turned on.

以下、図17、18に1bit毎にデータが切り替わる時にHを出力する時の等価回路とHのディエンファシス状態時の出力端電圧がVdd/3時の等価回路を示し、電源電圧の変動量の差について説明する。
図17、18、121は外部電源と出力装置の電源(Vdd)につく配線抵抗などのインピーダンスを示し、122は外部のGNDと出力装置にのGNDにつく配線抵抗などのインピーダンスを示す。出力端67の電圧がVdd/2の時に出力装置が消費する電流は出力抵抗75と終端抵抗73で決まるのでVdd/2Zである。よって外部電源からチップ内電源の電圧降下はおよそZs*(Vdd/2Z)である。
図18は電流を余分に流すことでディエンファシスをかける。 In FIG. 18, de-emphasis is applied by passing an extra current. このときの出力装置に流れる電流値は2Vdd/3なので、外部電源からチップ内電源の電圧降下はZs*(2Vdd/3)であり、1bit毎にデータが切り替わる場合と比べて電源の変動量が異なり、この変動量の違いがジッタとなる。 Since the current value flowing through the output device at this time is 2Vdd / 3, the voltage drop from the external power supply to the in-chip power supply is Zs * (2Vdd / 3), and the amount of fluctuation of the power supply is larger than that when the data is switched every 1 bit. Differently, this difference in the amount of fluctuation becomes jitter. そこで、ダミー電流駆動部で非ディエンファシス時に電流を余分に流すことで、データによらず、消費電流を一定にし、電源の変動量を一定にすることでジッタを低減することが可能となる。 Therefore, by passing an extra current in the dummy current drive unit during non-emphasis, it is possible to reduce the jitter by making the current consumption constant and the fluctuation amount of the power supply constant regardless of the data. 17 and 18 show an equivalent circuit when H is output when data is switched every 1 bit and an equivalent circuit when the output terminal voltage in the de-emphasis state of H is Vdd / 3, and the fluctuation amount of the power supply voltage is shown. The difference will be described. 17 and 18 show an equivalent circuit when H is output when data is switched every 1 bit and an equivalent circuit when the output terminal voltage in the de-emphasis state of H is Vdd / 3, and the fluctuation amount of the power supply voltage is shown. The difference will be described.
17, 18 and 121 show impedances such as wiring resistances attached to the external power supply and the power supply (Vdd) of the output device, and 122 denotes impedances such as wiring resistances attached to the external GND and the GND of the output device. The current consumed by the output device when the voltage at the output terminal 67 is Vdd / 2 is Vdd / 2Z because it is determined by the output resistor 75 and the termination resistor 73. Therefore, the voltage drop from the external power supply to the in-chip power supply is approximately Zs * (Vdd / 2Z). 17, 18 and 121 show impedances such as wiring resistances attached to the external power supply and the power supply (Vdd) of the output device, and 122 located impedances such as wiring resistances attached to the external GND and the GND of the output device. The current consumed by the output device when the voltage at the output terminal 67 is Vdd / 2 is Vdd / 2Z because it is determined by the output resistor 75 and the termination resistor 73. Therefore, the voltage drop from the external power supply to the in-chip power supply is approximately Zs * (Vdd / 2Z).
In FIG. 18, de-emphasis is applied by passing an extra current. Since the current value flowing through the output device at this time is 2Vdd / 3, the voltage drop from the external power supply to the power supply in the chip is Zs * (2Vdd / 3), and the fluctuation amount of the power supply is larger than when the data is switched every 1 bit. Differently, the difference in the amount of variation is jitter. Therefore, it is possible to reduce the jitter by making the current consumption constant and making the fluctuation amount of the power supply constant regardless of data by allowing an extra current to flow at the time of non-de-emphasis in the dummy current driver. In FIG. 18, de-emphasis is applied by passing an extra current. Since the current value flowing through the output device at this time is 2Vdd / 3, the voltage drop from the external power supply to the power supply in the chip is Zs * (2Vdd / 3), and the fluctuation amount of the power supply is larger than when the data is switched every 1 bit. Differently, the difference in the amount of variation is jitter. Therefore, it is possible to reduce the jitter by making. the current consumption constant and making the fluctuation amount of the power supply constant regardless of data by allowing an extra current to flow at the time of non-de-emphasis in the dummy current driver.

図19にダミー電流駆動部3の実施例を示す。ダミー電流駆動部3はディエンファシス時に電源電圧に定常的に流れる電流と非ディエンファシス時に電源電圧に流れる電流の差分と等しい電流量を流す電流源(電源側ダミー電流源)pd131と電流源直列に接続されたスイッチ(電源側ダミースイッチ)pd132とスイッチpd132と直列に接続されたスイッチ(グランド側ダミースイッチ)nd133とスイッチnd133の他方が電流源pd131と等しい電流量を流す電流源(グランド側ダミー電流源)nd134に直列に接続された構成をなす。スイッチpd132はp−MOSトランジスタ、スイッチnd133はn−MOSトランジスタで構成されている。
図20にデータと振幅制御信号85/振幅制御信号86と電流駆動部2、ダミー電流駆動部3の関係について示す。 FIG. 20 shows the relationship between the data, the amplitude control signal 85 / amplitude control signal 86, the current drive unit 2, and the dummy current drive unit 3. 電流源駆動部2の電流源pとはスイッチ82がオン状態を示し、電流源nとはスイッチ83がオン状態を示す。 The current source p of the current source drive unit 2 indicates that the switch 82 is in the ON state, and the current source n indicates that the switch 83 is in the ON state. 振幅制御信号の条件に関わらず、電流は常に流れる状態となり、エンファシスが原因で生じるデータ依存の消費電流の差異は解決され、電流の差異による電源変動の差異も解消される。 Regardless of the amplitude control signal conditions, the current always flows, the difference in data-dependent current consumption caused by emphasis is resolved, and the difference in power supply fluctuation due to the difference in current is also eliminated. FIG. 19 shows an embodiment of the dummy current driver 3. The dummy current drive unit 3 is connected in series with a current source (power source side dummy current source) pd131 that supplies a current amount equal to the difference between the current that constantly flows in the power supply voltage during de-emphasis and the current that flows in the power supply voltage during non-deemphasis The connected switch (power source side dummy switch) pd132 and the switch (ground side dummy switch) nd133 connected in series with the switch pd132 and the current source (ground side dummy current) in which the other of the switch nd133 passes the same amount of current as the current source pd131 Source) It is configured to be connected in series to nd134. The switch pd132 is a p-MOS transistor, and the switch nd133 is an n-MOS transistor. FIG. 19 shows an embodiment of the dummy current driver 3. The dummy current drive unit 3 is connected in series with a current source (power source side dummy current source) pd131 that supplies a current amount equal to the difference between the current that constantly flows in the power supply voltage during de-emphasis and the current that flows in the power supply voltage during non-deemphasis The connected switch (power source side dummy switch) pd132 and the switch (ground side dummy switch) nd133 connected in series with the switch pd132 and the current source (ground side dummy current) in which the other of the switch nd133 passes the same amount of current as the current source pd131 Source) It is configured to be connected in series to nd134. The switch pd132 is a p -MOS transistor, and the switch nd133 is an n-MOS transistor.
FIG. 20 shows the relationship among the data, the amplitude control signal 85 / amplitude control signal 86, the current driver 2 and the dummy current driver 3. The current source p of the current source driving unit 2 indicates that the switch 82 is turned on, and the current source n indicates that the switch 83 is turned on. Regardless of the condition of the amplitude control signal, the current always flows, the difference in data-dependent consumption current caused by emphasis is solved, and the difference in power supply fluctuation due to the difference in current is also eliminated. FIG. 20 shows the relationship among the data, the amplitude control signal 85 / amplitude control signal 86, the current driver 2 and the dummy current driver 3. The current source p of the current source driving unit 2 indicates that the switch 82 is turned On, and the current source n indicates that the switch 83 is turned on. Regardless of the condition of the amplitude control signal, the current always flows, the difference in data-dependent consumption current caused by emphasis is solved, and the difference in power supply fluctuation due to the difference in current is also eliminated.

<実施例2>
図21に他の実施形態にかかる出力装置の概略図を示す。 FIG. 21 shows a schematic view of the output device according to another embodiment. 本発明はデータ出力部1、複数の電流駆動部2a、2b…2x、複数のダミー電流駆動部3a、3b…3xの3つのパートから構成されている。 The present invention is composed of three parts: a data output unit 1, a plurality of current drive units 2a, 2b ... 2x, and a plurality of dummy current drive units 3a, 3b ... 3x. 複数の電流駆動部2a、2b…2xの各々は電流駆動部2と同様の構成をなし、複数のダミー電流駆動部3a、3b…3xの各々でダミー電流駆動部3と同様の構成をなす。 Each of the plurality of current drive units 2a, 2b ... 2x has the same configuration as the current drive unit 2, and each of the plurality of dummy current drive units 3a, 3b ... 3x has the same configuration as the dummy current drive unit 3.
図22〜25で本発明における多値出力装置の原理を7値出力回路を例に説明する。 The principle of the multi-value output device in the present invention will be described with reference to FIGS. 22 to 25 by taking a 7-value output circuit as an example. 図22は7値出力回路の実施例である。 FIG. 22 is an example of a 7-value output circuit. 7値の出力回路の場合電流駆動部は2つ以上で構成される。 In the case of a 7-value output circuit, the current drive unit is composed of two or more. <Example 2> <Example 2>
FIG. 21 shows a schematic diagram of an output device according to another embodiment. The present invention comprises three parts: a data output unit 1, a plurality of current drive units 2a, 2b,... 2x, and a plurality of dummy current drive units 3a, 3b,. Each of the plurality of current drive units 2a, 2b,... 2x has the same configuration as that of the current drive unit 2, and each of the plurality of dummy current drive units 3a, 3b,. FIG. 21 shows a schematic diagram of an output device according to another embodiment. The present invention has three parts: a data output unit 1, a plurality of current drive units 2a, 2b, ... 2x, and a plurality of dummy current drive units 3a, 3b ,. Each of the plurality of current drive units 2a, 2b, ... 2x has the same configuration as that of the current drive unit 2, and each of the plurality of dummy current drive units 3a, 3b, ..
22 to 25, the principle of the multi-value output apparatus according to the present invention will be described by taking a 7-value output circuit as an example. FIG. 22 shows an example of a 7-value output circuit. In the case of a 7-value output circuit, the current driver is composed of two or more. 22 to 25, the principle of the multi-value output apparatus according to the present invention will be described by taking a 7-value output circuit as an example. FIG. 22 shows an example of a 7-value output circuit. In the case of a 7-value output circuit, the current driver is composed of two or more.

データ出力部1は図4と同じ構成なので同一番号を付し、説明を省略する。電流駆動部2aは電源電圧から電流を引き込む電流源(電源側駆動電流源)p0(151)と電流源p0(151)と直列に接続されたスイッチ(電源側駆動スイッチ)p0(152)とスイッチp0(152)と直列に接続されたスイッチ(グランド側駆動スイッチ)n0(153)と、スイッチn0(153)と直列に接続された電流源(グランド側駆動電流源)n0(154)を有し、電流源151と電流源154は等しい電流値の電流源で、スイッチ152とスイッチ153は出力端151を介している。またスイッチ152はp−MOSトランジスタで、振幅制御信号p0によってオンオフされ、スイッチ153はn−MOSトランジスタで、振幅制御信号n0でオンオフ制御される。
電流駆動部2bも電流駆動部2aと同様の構成をなし、電流源155と電流源158は等しい電流値であるが、電流源155(または158)は必ずしも電流源151(または154)と等しい必要性はない。 The current drive unit 2b has the same configuration as the current drive unit 2a, and the current source 155 and the current source 158 have the same current value, but the current source 155 (or 158) must necessarily be equal to the current source 151 (or 154). There is no sex. また、スイッチ156は振幅制御信号p1でオンオフ制御され、スイッチ157は振幅制御信号n1でオンオフ制御される。 Further, the switch 156 is on / off controlled by the amplitude control signal p1, and the switch 157 is on / off controlled by the amplitude control signal n1. 振幅制御信号n0及び振幅制御信号p0、振幅制御信号n1、振幅制御信号p1は振幅制御信号0の1UIを最小パルス幅としてオン・オフすることを特徴とする。 The amplitude control signal n0, the amplitude control signal p0, the amplitude control signal n1, and the amplitude control signal p1 are characterized in that 1 UI of the amplitude control signal 0 is turned on and off as the minimum pulse width. Since the data output unit 1 has the same configuration as that shown in FIG. The current driver 2a includes a current source (power source side drive current source) p0 (151) and a switch (power source side drive switch) p0 (152) and a switch connected in series with the current source p0 (151). a switch (ground side drive switch) n0 (153) connected in series with p0 (152) and a current source (ground side drive current source) n0 (154) connected in series with switch n0 (153) The current source 151 and the current source 154 are current sources having the same current value, and the switch 152 and the switch 153 are connected via the output terminal 151. The switch 152 is a p-MOS transistor and is turned on / off by the amplitude control signal p0. The switch 153 is an n-MOS transistor and is on / off controlled by the amplitude control signal n0. Since the data output unit 1 has the same configuration as that shown in FIG. The current driver 2a includes a current source (power source side drive current source) p0 (151) and a switch (power source side drive switch) p0 (152) and a switch connected in series with the current source p0 (151). a switch (ground side drive switch) n0 (153) connected in series with p0 (152) and a current source (ground side drive current source) n0 (154) connected in series with switch n0 (153) The current source 151 and the current source 154 are current sources having the same current value, and the switch 152 and the switch 153 are connected via the output terminal 151. The switch 152 is a p- MOS transistor and is turned on / off by the amplitude control signal p0. The switch 153 is an n-MOS transistor and is on / off controlled by the amplitude control signal n0.
The current driver 2b has the same configuration as the current driver 2a, and the current source 155 and the current source 158 have the same current value, but the current source 155 (or 158) is not necessarily equal to the current source 151 (or 154). There is no sex. The switch 156 is ON / OFF controlled by the amplitude control signal p1, and the switch 157 is ON / OFF controlled by the amplitude control signal n1. The amplitude control signal n0, the amplitude control signal p0, the amplitude control signal n1, and the amplitude control signal p1 are characterized by being turned on / off with 1 UI of the amplitude control signal 0 as a minimum pulse width. The current driver 2b has the same configuration as the current driver 2a, and the current source 155 and the current source 158 have the same current value, but the current source 155 (or 158) is not necessarily equal to the current source 151 (or) 154). There is no sex. The switch 156 is ON / OFF controlled by the amplitude control signal p1, and the switch 157 is ON / OFF controlled by the amplitude control signal n1. The amplitude control signal n0, the amplitude control signal p0 , the amplitude control signal n1, and the amplitude control signal p1 are characterized by being turned on / off with 1 UI of the amplitude control signal 0 as a minimum pulse width.

図23はデータ出力部1の振幅制御信号0がHで、スイッチ152、153、156、157がオフの時の等価回路を示している。この時出力端141の出力電圧は0である。
図24は振幅制御信号0がHで電流駆動部2a及び2bのスイッチの中で145のみがオンの時の等価回路を示している。 FIG. 24 shows an equivalent circuit when the amplitude control signal 0 is H and only 145 of the switches of the current drive units 2a and 2b is on. 電流源駆動部2a及び2bの電流値をそれぞれ、Vdd/(12*Z)、Vdd/(6*Z)とすると出力端の電圧はVdd/12である。 Assuming that the current values ​​of the current source drive units 2a and 2b are Vdd / (12 * Z) and Vdd / (6 * Z), respectively, the voltage at the output end is Vdd / 12.
図25は振幅制御信号0がHで電流駆動部2a及び電流駆動部2bのスイッチの152及び156がオンの時の等価回路を示している。 FIG. 25 shows an equivalent circuit when the amplitude control signal 0 is H and the switches 152 and 156 of the current drive unit 2a and the current drive unit 2b are on. この時出力端141の電圧はVdd/4である。 At this time, the voltage at the output terminal 141 is Vdd / 4. 上記の説明のように出力電圧は出力抵抗72に流れる電流値で制御される。 As described above, the output voltage is controlled by the value of the current flowing through the output resistor 72.
図26に振幅制御信号0及び振幅制御信号n0/p0、振幅制御信号n1/p1のデータパターンと出力電圧について記述する。 FIG. 26 describes the data patterns and output voltages of the amplitude control signal 0, the amplitude control signal n0 / p0, and the amplitude control signal n1 / p1. 本発明のように電流値によって振幅を制御する方式の場合、出力値毎に電流駆動部の動作が異なるので、消費される電流値が異なり、その結果電源変動の差もことなる。 In the case of the method of controlling the amplitude by the current value as in the present invention, since the operation of the current drive unit is different for each output value, the current value consumed is different, and as a result, the difference in power supply fluctuation is also different. そこで、データに依存しないようにダミー電流駆動部で消費電流を一定にするような電流を消費することで電源の変動量も一定となり、ジッタも低減できる。 Therefore, by consuming a current that makes the current consumption constant in the dummy current drive unit so as not to depend on the data, the fluctuation amount of the power supply becomes constant and the jitter can be reduced. FIG. 23 shows an equivalent circuit when the amplitude control signal 0 of the data output unit 1 is H and the switches 152, 153, 156, and 157 are off. At this time, the output voltage of the output terminal 141 is zero. FIG. 23 shows an equivalent circuit when the amplitude control signal 0 of the data output unit 1 is H and the switches 152, 153, 156, and 157 are off. At this time, the output voltage of the output terminal 141 is zero.
FIG. 24 shows an equivalent circuit when the amplitude control signal 0 is H and only 145 is on in the switches of the current drivers 2a and 2b. If the current values of the current source driving units 2a and 2b are Vdd / (12 * Z) and Vdd / (6 * Z), the voltage at the output terminal is Vdd / 12. FIG. 24 shows an equivalent circuit when the amplitude control signal 0 is H and only 145 is on in the switches of the current drivers 2a and 2b. If the current values ​​of the current source driving units 2a and 2b are Vdd / (12 * Z) and Vdd / (6 * Z), the voltage at the output terminal is Vdd / 12.
FIG. 25 shows an equivalent circuit when the amplitude control signal 0 is H and the switches 152 and 156 of the current driver 2a and the current driver 2b are on. At this time, the voltage of the output terminal 141 is Vdd / 4. As described above, the output voltage is controlled by the value of the current flowing through the output resistor 72. FIG. 25 shows an equivalent circuit when the amplitude control signal 0 is H and the switches 152 and 156 of the current driver 2a and the current driver 2b are on. At this time, the voltage of the output terminal 141 is Vdd / 4. As described above, the output voltage is controlled by the value of the current flowing through the output resistor 72.
FIG. 26 describes data patterns and output voltages of the amplitude control signal 0, the amplitude control signal n0 / p0, and the amplitude control signal n1 / p1. In the case of the method of controlling the amplitude by the current value as in the present invention, the operation of the current driving unit is different for each output value, so that the consumed current value is different, and as a result, the difference in power supply fluctuation is also different. Therefore, by consuming a current that makes the current consumption constant in the dummy current driving unit so as not to depend on data, the amount of fluctuation of the power source becomes constant and jitter can be reduced. FIG. 26 describes data patterns and output voltages of the amplitude control signal 0, the amplitude control signal n0 / p0, and the amplitude control signal n1 / p1. In the case of the method of controlling the amplitude by the current value as in the present invention, the operation of the current driving unit is different for each output value, so that the consumed current value is different, and as a result, the difference in power supply fluctuation is also different. Therefore, by consuming a current that makes the current consumption constant in the dummy current driving unit so as not to depend on data, the amount of fluctuation of the power source becomes constant and jitter can be reduced.

図27に7値のダミー電流駆動部に関する実施例を示す。ダミー電流駆動部3aは、電流源(電源側ダミー電流源)pd0(161)と直列に接続されたスイッチ(電源側ダミースイッチ)pd0(162)と、スイッチpd0(162)と直列に接続され他方を電流源(グランド側ダミー電流源)nd0(164)に接続されたスイッチ(グランド側ダミースイッチ)nd0(163)からなり、ダミー電流駆動部3bは、電流源pd1(167)と直列に接続されたスイッチpd1(168)と、スイッチpd1(168)と直列に接続された他方を電流源nd1(1610)に接続されたスイッチnd1(169)を備えた構成である。
スイッチpd0(162)とスイッチpd1(168)は、p−MOSトランジスタである。 The switch pd0 (162) and the switch pd1 (168) are p-MOS transistors. スイッチnd0(163)とスイッチnd1(169)は、n−MOSスイッチトランジスタである。 The switch nd0 (163) and the switch nd1 (169) are n-MOS switch transistors. 電流源pd0(167)と電流源nd0(1610)の電流値は等しくVdd/(6Z)、電流源nd0(161)と電流源nd1(164)の電流値は等しくVdd/(12Z)である。 The current values ​​of the current source pd0 (167) and the current source nd0 (1610) are equal to Vdd / (6Z), and the current values ​​of the current source nd0 (161) and the current source nd1 (164) are equal to Vdd / (12Z). ダミー電流源161及び164は、図22の電流駆動部2aのスイッチp0(152)、n0(153)が両方オフの時に電流を消費し、ダミー電流源167及び1610は図22の電流駆動部2bのスイッチp1(156)、n1(157)が両方オフの時に電流を消費する。 The dummy current sources 161 and 164 consume current when both the switches p0 (152) and n0 (153) of the current drive unit 2a in FIG. 22 are off, and the dummy current sources 167 and 1610 consume the current in the current drive unit 2b in FIG. 22. Current is consumed when both switches p1 (156) and n1 (157) are off. 電流駆動部とダミー電流駆動部の流す電流値の総和は常に一定なので、データによって生じる電流値の差異を解消することが可能である。 Since the sum of the current values ​​flowing through the current drive unit and the dummy current drive unit is always constant, it is possible to eliminate the difference in the current values ​​caused by the data. FIG. 27 shows an embodiment relating to a seven-value dummy current drive unit. The dummy current driver 3a includes a switch (power source side dummy switch) pd0 (162) connected in series with a current source (power source side dummy current source) pd0 (161) and a switch pd0 (162) connected in series. Is composed of a switch (ground side dummy switch) nd0 (163) connected to a current source (ground side dummy current source) nd0 (164), and the dummy current driver 3b is connected in series with the current source pd1 (167). The switch pd1 (168) and the switch nd1 (169) in which the other connected in series with the switch pd1 (168) is connected to the current source nd1 (1610) are provided. FIG. 27 shows an embodiment relating to a seven-value dummy current drive unit. The dummy current driver 3a includes a switch (power source side dummy switch) pd0 (162) connected in series with a current source (power source side dummy current source) ) pd0 (161) and a switch pd0 (162) connected in series. Is composed of a switch (ground side dummy switch) nd0 (163) connected to a current source (ground side dummy current source) nd0 (164), and the dummy current driver 3b is connected in series with the current source pd1 (167). The switch pd1 (168) and the switch nd1 (169) in which the other connected in series with the switch pd1 (168) is connected to the current source nd1 (1610) are provided.
The switch pd0 (162) and the switch pd1 (168) are p-MOS transistors. The switches nd0 (163) and nd1 (169) are n-MOS switch transistors. The current values of the current source pd0 (167) and the current source nd0 (1610) are equal to Vdd / (6Z), and the current values of the current source nd0 (161) and the current source nd1 (164) are equal to Vdd / (12Z). The dummy current sources 161 and 164 consume current when both the switches p0 (152) and n0 (153) of the current driver 2a in FIG. 22 are off, and the dummy current sources 167 and 1610 are current drivers 2b in FIG. Current is consumed when both the switches p1 (156) and n1 (157) are off. Since the sum of the current values flowing between the current driver and the dummy current driver is always constant, it is possible to eliminate the difference in the current value caused by the data. The switch pd0 (162) and the switch pd1 (168) are p-MOS transistors. The switches nd0 (163) and nd1 (169) are n-MOS switch transistors. The current values ​​of the current source pd0 (167) and the current source nd0 (1610) are equal to Vdd / (6Z), and the current values ​​of the current source nd0 (161) and the current source nd1 (164) are equal to Vdd / (12Z). The dummy current sources 161 and 164 consume current when both the switches p0 (152) and n0 (153) of the current driver 2a in FIG. 22 are off, and the dummy current sources 167 and 1610 are current drivers 2b in FIG. Current is consumed when both the switches p1 (156) and n1 (157) are off. Since the sum of the current values ​​flowing between the current driver and the dummy current driver is always constant, it is possible to eliminate the difference in the current value caused by the data.

<実施例3>
図28、29はPCIexpressに関する物理層エレクトリカルサブブロックの回路の一部である。 28 and 29 are part of the physical layer electrical subblock circuit for PCIe express. PCIExpressではそのほか10b8b変換機構や、シリアライザなどデジタル部も必要であるがここでは省略する。 PCI Express also requires a 10b8b conversion mechanism and a digital unit such as a serializer, but these are omitted here.
171〜176が一つのレーン間の回路を示し、171a〜176aは別のレーンの回路を示す。 171 to 176 indicate circuits between one lane, and 171a to 176a indicate circuits in another lane. 171a〜176aは171〜176と全く同様の構成をなしているので、以下では171〜176のみを説明する。 Since 171a to 176a have exactly the same configuration as 171 to 176, only 171 to 176 will be described below.
本発明は171の送信部に応用される。 The present invention applies to the transmitter of 171. 171が差動の構成をなす出力回路であり、172、173が容量カップリング用の容量で、174、175が50Ωの伝送路、176が受信回路である。 171 is an output circuit having a differential configuration, 172 and 173 are capacitances for capacitive coupling, 174 and 175 are transmission lines of 50Ω, and 176 is a receiving circuit. さらに171のブロック図を図29に示す。 Further, a block diagram of 171 is shown in FIG. 177、1711は伝送路インピーダンスと等しい出力インピーダンスで信号を出力するデータ出力部で、177が正転(反転)データが入力され、1711には反転(正転)データが入力されるそして、回路の構成に関しては実施例1の構成がそのまま利用できる。 177 and 1711 are data output units that output signals with an output impedance equal to the transmission line impedance. 177 is input with normal rotation (inverted) data, 1711 is input with inverted (forward) data, and the circuit Regarding the configuration, the configuration of the first embodiment can be used as it is.
電流駆動部178、1710に関しても実施例1の構成がそのまま利用できる。 The configuration of the first embodiment can be used as it is for the current drive units 178 and 1710. ダミー電流駆動部も実施例1の構成がそのまま利用できる。 As for the dummy current drive unit, the configuration of the first embodiment can be used as it is. データに関しては、シリアルデータ+とエンファシスデータn+とエンファシスデータp+に関してはそれぞれ、データと振幅制御信号85と振幅制御信号86と同様のパターンのデータが入力される。 Regarding the data, the data, the amplitude control signal 85, and the data of the same pattern as the amplitude control signal 86 are input for the serial data +, the emphasic data n +, and the emphasic data p +, respectively. この構成によって、データパターンによらず一定の消費電流となり、電源電圧変動も一定になり、ジッタが低減する。 With this configuration, the current consumption is constant regardless of the data pattern, the fluctuation of the power supply voltage is constant, and the jitter is reduced. <Example 3> <Example 3>
FIGS. 28 and 29 are a part of a physical layer electrical sub-block circuit relating to PCI express. In addition, PCI Express requires a digital part such as a 10b8b conversion mechanism and a serializer, but is omitted here. Pictures. 28 and 29 are a part of a physical layer electrical sub-block circuit relating to PCI express. In addition, PCI Express requires a digital part such as a 10b8b conversion mechanism and a serializer, but is omitted here.
Reference numerals 171 to 176 denote circuits between one lane, and reference numerals 171a to 176a denote circuits of another lane. Since 171a to 176a have exactly the same configuration as 171 to 176, only 171 to 176 will be described below. Reference numerals 171 to 176 excipient circuits between one lane, and reference numerals 171a to 176a epitaxial circuits of another lane. Since 171a to 176a have exactly the same configuration as 171 to 176, only 171 to 176 will be described below.
The present invention is applied to the transmission unit 171. Reference numeral 171 denotes an output circuit having a differential configuration, reference numerals 172 and 173 denote capacitance coupling capacitors, reference numerals 174 and 175 denote 50Ω transmission lines, and reference numeral 176 denotes a reception circuit. Further, a block diagram of 171 is shown in FIG. Reference numerals 177 and 1711 denote data output units for outputting a signal with an output impedance equal to the transmission line impedance. 177 is input with normal (inverted) data, and 1711 is input with inverted (normal) data. Regarding the configuration, the configuration of the first embodiment can be used as it is. The present invention is applied to the transmission unit 171. Reference numeral 171 effort an output circuit having a differential configuration, reference numerals 172 and 173 capacitive coupling capacitors, reference numerals 174 and 175 epitaxial 50Ω transmission lines, and reference numeral 176 msgid a reception circuit. Further, a block diagram of 171 is shown in FIG. Reference numerals 177 and 1711 capacitive data output units for outputting a signal with an output impedance equal to the transmission line impedance. 177 is input with normal (inverted) data, and 1711 is input with inverted (normal) data. Regarding the configuration, the configuration of the first embodiment can be used as it is.
Regarding the current driving units 178 and 1710, the configuration of the first embodiment can be used as it is. The configuration of the first embodiment can be used as it is for the dummy current driver. Regarding data, serial data +, emphasis data n +, and emphasis data p + are input with data, the same pattern data as the amplitude control signal 85 and the amplitude control signal 86, respectively. With this configuration, the current consumption is constant regardless of the data pattern, the power supply voltage fluctuation is also constant, and jitter is reduced. Regarding the current driving units 178 and 1710, the configuration of the first embodiment can be used as it is. The configuration of the first embodiment can be used as it is for the dummy current driver. Regarding data, serial data +, emphasis data n +, and emphasis data p + are input with data, the same pattern data as the amplitude control signal 85 and the amplitude control signal 86, respectively. With this configuration, the current consumption is constant regardless of the data pattern, the power supply voltage fluctuation is also constant, and jitter is reduced.

図30にシリアルデータ+とエンファシスデータn+とエンファシスデータp+と出力波形、電流駆動部の消費電流とダミー電流駆動部の消費電流と電源電圧の降下を示す。
電流駆動部が電流を消費していない時にダミー電流が電流を消費することで電流駆動部とダミー電流駆動部が消費電流の総和を一定にし、電源電圧の降下を一定にすることで、従来の方法と比べて、ジッタの低減を可能にする。 When the current drive unit does not consume the current, the dummy current consumes the current, so that the current drive unit and the dummy current drive unit make the total current consumption constant, and the drop in the power supply voltage becomes constant. Allows reduction of jitter compared to the method. FIG. 30 shows the serial data +, the emphasis data n +, the emphasis data p +, the output waveform, the current consumption of the current driver, the current consumption of the dummy current driver, and the drop in power supply voltage. FIG. 30 shows the serial data +, the emphasis data n +, the emphasis data p +, the output waveform, the current consumption of the current driver, the current consumption of the dummy current driver, and the drop in power supply voltage.
When the current driver does not consume current, the dummy current consumes current, so that the current driver and dummy current driver keep the sum of current consumption constant, and the power supply voltage drop is constant, Compared with the method, the jitter can be reduced. When the current driver does not consume current, the dummy current consumes current, so that the current driver and dummy current driver keep the sum of current consumption constant, and the power supply voltage drop is constant, Compared with the method, the jitter can be reduced.

本発明の出力装置の一実施形態を示す概略図である。 It is the schematic which shows one Embodiment of the output device of this invention. 本発明の多値出力装置の一実施形態を示す概略図である。 It is the schematic which shows one Embodiment of the multi-value output device of this invention. 本発明の出力装置のブロック図である。 It is a block diagram of the output device of the present invention. データ出力部1の実施例を示す図である。 It is a figure which shows the Example of the data output part. データ出力部1にHが入力された時の動作図である。 FIG. 6 is an operation diagram when H is input to the data output unit 1. 図5の等価回路1を示す図である。 It is a figure which shows the equivalent circuit 1 of FIG. データ出力部1にLが入力された時の動作図である。 FIG. 6 is an operation diagram when L is input to the data output unit 1. 図7の等価回路2を示す図である。 It is a figure which shows the equivalent circuit 2 of FIG. 電流駆動部2の実施の形態を示す図である。 FIG. 3 is a diagram illustrating an embodiment of a current driver 2. 電流駆動部2の動作説明図(その1)である。 FIG. 6 is an operation explanatory diagram (No. 1) of a current driver. 電流駆動部2の動作説明図(その2)である。 FIG. 6 is an operation explanatory diagram (No. 2) of the current driver 2; 電流駆動部2の動作説明図(その3)である。 FIG. 6 is an operation explanatory diagram (No. 3) of the current driver 2; 電流駆動部2の動作説明図(その4)である。 FIG. 6 is an operation explanatory diagram (No. 4) of the current driver 2; データ出力部と電流駆動部を組み合わせた図である。 It is the figure which combined the data output part and the current drive part. データパターンと振幅制御信号の関係を示す図である。 It is a figure which shows the relationship between a data pattern and an amplitude control signal. データパターンと振幅制御信号と出力の関係を示す図である。 It is a figure which shows the relationship between a data pattern, an amplitude control signal, and an output. 出力H時のチップ外電源を含んだ等価回路を示す図である。 It is a figure which shows the equivalent circuit containing the power supply outside a chip | tip at the time of output H. 出力Hでエンファシス時のチップ外電源を含んだ等価回路を示す図である。 It is a figure which shows the equivalent circuit containing the power supply outside a chip | tip at the time of emphasis with the output H. ダミー電流駆動部の実施例を示す図である。 It is a figure which shows the Example of a dummy current drive part. データと振幅制御信号と電流駆動部、ダミー電流駆動部、出力の関係を示す図である。 It is a figure which shows the relationship between data, an amplitude control signal, a current drive part, a dummy current drive part, and an output. 本発明の多値出力装置の一実施形態を示す概略図である。 It is the schematic which shows one Embodiment of the multi-value output device of this invention. 7値出力回路を示す図である。 It is a figure which shows a 7-value output circuit. 図21の等価回路1を示す図(その1)である。 FIG. 22 is a diagram (part 1) illustrating an equivalent circuit 1 of FIG. 21; 図21の等価回路1を示す図(その2)である。 FIG. 22 is a second diagram illustrating the equivalent circuit 1 of FIG. 21; 図21の等価回路1を示す図(その3)である。 FIG. 22 is a third diagram illustrating the equivalent circuit 1 of FIG. 21; 振幅制御信号と出力電圧値の関係を示す図である。 It is a figure which shows the relationship between an amplitude control signal and an output voltage value. ダミー電流駆動部の一実施形態を示す概略図である。 It is the schematic which shows one Embodiment of a dummy current drive part. PCIexpressに関する物理層エレクトリカルサブブロックの回路を示す図である。 It is a figure which shows the circuit of the physical layer electrical subblock regarding PCI express. PCIexpressに関する物理層エレクトリカルサブブロックの回路を示す図である。 It is a figure which shows the circuit of the physical layer electrical subblock regarding PCI express. データごとの消費電流と電圧降下の関係を示す図である。 It is a figure which shows the relationship between the consumption current for every data, and a voltage drop. 従来の出力装置を示す図である。 It is a figure which shows the conventional output device. 従来の出力装置を示す図である。 It is a figure which shows the conventional output device.

符号の説明Explanation of symbols

1 データ出力部、2 電流駆動部、3 ダミー電流駆動部、61 スイッチpo、62 抵抗デバイスp、63 抵抗デバイスn、64 スイッチno、65 データ、66 伝送路、68 終端抵抗、85、86 振幅制御信号、131 電流源pd、132 スイッチpd、133 スイッチnd、134 電流源nd 1 data output section, 2 current drive section, 3 dummy current drive section, 61 switch po, 62 resistance device p, 63 resistance device n, 64 switch no, 65 data, 66 transmission path, 68 termination resistance, 85, 86 amplitude control Signal, 131 Current source pd, 132 Switch pd, 133 Switch nd, 134 Current source nd

Claims (5)

  1. 伝送路に伝送信号を出力する出力装置であって、
    入力されたデータを振幅制御して出力するデータ出力部と、
    第1及び第2の振幅制御信号に基づいて前記伝送路に電流を重畳出力して前記伝送信号の振幅を制御する電流駆動部と、
    前記第1及び第2の振幅制御信号に基づいて前記電流駆動部との合計消費電流値が略一定となるように消費電流を制御するダミー電流駆動部と、を備え
    前記ダミー電流駆動部と前記電流駆動部との構成が同じであり、
    前記電流駆動部は、前記第1の振幅制御信号に基づいてオン・オフする電源側駆動スイッチと、前記第2の振幅制御信号に基づいてオン・オフするグランド側駆動スイッチと、前記電源側駆動スイッチを介して前記伝送路に電流を流し込む電源側駆動電流源と、前記グランド側駆動スイッチを介して前記電源側駆動電流源と略等しい電流をグランドに引き込むグランド側駆動電流源と、を備え、 The current drive unit includes a power supply side drive switch that turns on / off based on the first amplitude control signal, a ground side drive switch that turns on / off based on the second amplitude control signal, and the power supply side drive. It is provided with a power supply side drive current source that allows a current to flow into the transmission line via a switch, and a ground side drive current source that draws a current substantially equal to that of the power supply side drive current source to the ground via the ground side drive switch.
    前記ダミー電流駆動部は、前記第1の振幅制御信号に基づいてオン・オフする電源側ダミースイッチと、前記第2の振幅制御信号に基づいてオン・オフするグランド側ダミースイッチと、前記電源側ダミースイッチを介して電流を流し込む電源側ダミー電流源と、前記グランド側ダミースイッチを介して電流をグランドに引き込むグランド側ダミー電流源と、を備え The dummy current drive unit includes a power supply side dummy switch that turns on / off based on the first amplitude control signal, a ground side dummy switch that turns on / off based on the second amplitude control signal, and the power supply side. It includes a power supply side dummy current source that allows current to flow through the dummy switch, and a ground side dummy current source that draws current to ground via the ground side dummy switch.
    前記電源側駆動スイッチ及び前記グランド側駆動スイッチがオフすることで前記電流駆動部をオフとし、且つ前記電源側ダミースイッチ及び前記グランド側ダミースイッチが何れもオン状態になった時、前記ダミー電流駆動部が電流を消費することを特徴とする出力装置。 When the power supply side drive switch and the ground side drive switch are turned off to turn off the current drive unit, and both the power supply side dummy switch and the ground side dummy switch are turned on, the dummy current drive is performed. An output device characterized in that the unit consumes current . An output device for outputting a transmission signal to a transmission line, An output device for outputting a transmission signal to a transmission line,
    A data output unit for controlling the amplitude of the input data and outputting it; A data output unit for controlling the amplitude of the input data and outputting it;
    A current driver for controlling the amplitude of the transmission signal by superimposing and outputting a current to the transmission path based on the first and second amplitude control signals; A current driver for controlling the amplitude of the transmission signal by superimposing and outputting a current to the transmission path based on the first and second amplitude control signals;
    A dummy current driver that controls current consumption so that a total current consumption value with the current driver is substantially constant based on the first and second amplitude control signals , A dummy current driver that controls current consumption so that a total current consumption value with the current driver is substantially constant based on the first and second amplitude control signals ,
    The dummy current driving unit and the current driving unit have the same configuration, The dummy current driving unit and the current driving unit have the same configuration,
    The current driver includes a power supply side drive switch that is turned on / off based on the first amplitude control signal, a ground side drive switch that is turned on / off based on the second amplitude control signal, and the power supply side drive. A power supply side drive current source that supplies current to the transmission line via a switch, and a ground side drive current source that draws current substantially equal to the power supply side drive current source to the ground via the ground side drive switch, The current driver includes a power supply side drive switch that is turned on / off based on the first amplitude control signal, a ground side drive switch that is turned on / off based on the second amplitude control signal, and the power supply side drive. A power supply side drive current source that supplies current to the transmission line via a switch, and a ground side drive current source that draws current substantially equal to the power supply side drive current source to the ground via the ground side drive switch,
    The dummy current driver includes a power supply side dummy switch that is turned on / off based on the first amplitude control signal, a ground side dummy switch that is turned on / off based on the second amplitude control signal, and the power supply side. A power supply side dummy current source for supplying current through a dummy switch; and a ground side dummy current source for drawing current into the ground through the ground side dummy switch. The dummy current driver includes a power supply side dummy switch that is turned on / off based on the first amplitude control signal, a ground side dummy switch that is turned on / off based on the second amplitude control signal, and the power supply side. A power supply side dummy current source for supplying current through a dummy switch; and a ground side dummy current source for drawing current into the ground through the ground side dummy switch.
    When the power supply side drive switch and the ground side drive switch are turned off, the current drive unit is turned off, and when both the power supply side dummy switch and the ground side dummy switch are turned on, the dummy current drive is performed. An output device, wherein the unit consumes current . When the power supply side drive switch and the ground side drive switch are turned off, the current drive unit is turned off, and when both the power supply side dummy switch and the ground side dummy switch are turned on, the dummy current drive is performed . An output device, wherein the unit consumes current .
  2. 前記データ出力部は、出力インピーダンスを前記伝送路の特性インピーダンスに整合するように調整された第1及び第2の抵抗デバイスと、該第1の抵抗デバイスに直列に接続されて、前記入力されたデータに基づいて前記伝送信号をハイ・レベル又はロー・レベルに切り替えるためにオン、オフ制御される電源側スイッチと、前記第2の抵抗デバイスに直列に接続されて、前記入力されたデータに基づいて前記伝送信号をハイ・レベル又はロー・レベルに切り替えるためにオン、オフ制御されるグランド側スイッチと、を備えたことを特徴とする請求項1に記載の出力装置。   The data output unit is connected to the first resistor device in series with the first and second resistor devices adjusted to match the output impedance with the characteristic impedance of the transmission line, and is input to the data output unit. A power supply side switch that is controlled to be turned on and off in order to switch the transmission signal to a high level or a low level based on data, and connected in series to the second resistance device, based on the input data The output device according to claim 1, further comprising a ground-side switch that is on / off controlled to switch the transmission signal to a high level or a low level.
  3. 伝送路に多値の伝送信号を出力する多値信号出力装置において、
    入力された振幅制御信号に基づいてデータを出力するデータ出力部と、
    第1及び第2の振幅制御信号に基づいて前記伝送路に電流を重畳出力して前記伝送信号の振幅を制御する複数の電流駆動部と、
    前記第1及び第2の振幅制御信号に基づいて前記電流駆動部との合計消費電流値が略一定となるように消費電流を制御する複数のダミー電流駆動部と、を備え
    前記複数のダミー電流駆動部と前記複数の電流駆動部との構成が同じであり、
    前記複数の電流駆動部は、前記第1の振幅制御信号に基づいてオン・オフする電源側駆動スイッチと、前記第2の振幅制御信号に基づいてオン・オフするグランド側駆動スイッチと、前記電源側駆動スイッチを介して前記伝送路に電流を流し込む電源側駆動電流源と、前記グランド側駆動スイッチを介して前記電源側駆動電流源と略等しい電流をグランドに引き込むグランド側駆動電流源と、を備え、 The plurality of current drive units include a power supply side drive switch that turns on / off based on the first amplitude control signal, a ground side drive switch that turns on / off based on the second amplitude control signal, and the power supply. A power supply side drive current source that causes a current to flow into the transmission path via the side drive switch, and a ground side drive current source that draws a current substantially equal to that of the power supply side drive current source to the ground via the ground side drive switch. Prepare,
    前記複数のダミー電流駆動部は、前記第1の振幅制御信号に基づいてオン・オフする電源側ダミースイッチと、前記第2の振幅制御信号に基づいてオン・オフするグランド側ダミースイッチと、前記電源側ダミースイッチを介して電流を流し込む電源側ダミー電流源と、前記グランド側ダミースイッチを介して電流をグランドに引き込むグランド側ダミー電流源と、を備え、 The plurality of dummy current drive units include a power supply side dummy switch that turns on / off based on the first amplitude control signal, a ground side dummy switch that turns on / off based on the second amplitude control signal, and the like. It is provided with a power supply side dummy current source that allows current to flow through the power supply side dummy switch, and a ground side dummy current source that draws current to ground via the ground side dummy switch.
    前記電源側駆動スイッチ及び前記グランド側駆動スイッチがオフすることで前記電流駆動部をオフとし、且つ前記電源側ダミースイッチ及び前記グランド側ダミースイッチが何れもオン状態になった時、前記ダミー電流駆動部が電流を消費することを特徴とする多値出力装置。 When the power supply side drive switch and the ground side drive switch are turned off to turn off the current drive unit, and both the power supply side dummy switch and the ground side dummy switch are turned on, the dummy current drive is performed. A multi-value output device characterized in that the unit consumes current . In a multilevel signal output device that outputs a multilevel transmission signal to a transmission line, In a multilevel signal output device that outputs a multilevel transmission signal to a transmission line,
    A data output unit for outputting data based on the input amplitude control signal; A data output unit for outputting data based on the input amplitude control signal;
    A plurality of current drive units for controlling the amplitude of the transmission signal by superimposing and outputting a current to the transmission line based on the first and second amplitude control signals; A plurality of current drive units for controlling the amplitude of the transmission signal by superimposing and outputting a current to the transmission line based on the first and second amplitude control signals;
    A plurality of dummy current drive units that control current consumption so that a total current consumption value with the current drive unit is substantially constant based on the first and second amplitude control signals ; A plurality of dummy current drive units that control current consumption so that a total current consumption value with the current drive unit is substantially constant based on the first and second amplitude control signals ;
    The configurations of the plurality of dummy current driving units and the plurality of current driving units are the same, The configurations of the plurality of dummy current driving units and the plurality of current driving units are the same,
    The plurality of current drivers include a power supply side drive switch that is turned on / off based on the first amplitude control signal, a ground side drive switch that is turned on / off based on the second amplitude control signal, and the power supply A power supply side drive current source for supplying current to the transmission line via a side drive switch, and a ground side drive current source for drawing current substantially equal to the power supply side drive current source to the ground via the ground side drive switch. Prepared, The plurality of current drivers include a power supply side drive switch that is turned on / off based on the first amplitude control signal, a ground side drive switch that is turned on / off based on the second amplitude control signal, and the power supply A power supply side drive current source for supplying current to the transmission line via a side drive switch, and a ground side drive current source for drawing current substantially equal to the power supply side drive current source to the ground via the ground side drive switch. Prepared ,,
    The plurality of dummy current driving units include a power source side dummy switch that is turned on / off based on the first amplitude control signal, a ground side dummy switch that is turned on / off based on the second amplitude control signal, and A power supply side dummy current source for flowing current through a power supply side dummy switch, and a ground side dummy current source for drawing current into the ground through the ground side dummy switch, The plurality of dummy current driving units include a power source side dummy switch that is turned on / off based on the first amplitude control signal, a ground side dummy switch that is turned on / off based on the second amplitude control signal, and A power supply side dummy current source for flowing current through a power supply side dummy switch, and a ground side dummy current source for drawing current into the ground through the ground side dummy switch,
    When the power supply side drive switch and the ground side drive switch are turned off, the current drive unit is turned off, and when both the power supply side dummy switch and the ground side dummy switch are turned on, the dummy current drive is performed. A multi-value output device, wherein the unit consumes current . When the power supply side drive switch and the ground side drive switch are turned off, the current drive unit is turned off, and when both the power supply side dummy switch and the ground side dummy switch are turned on, the dummy current drive is performed . A multi-value output device, wherein the unit consumes current .
  4. 前記データ出力部は、出力インピーダンスを前記伝送路の特性インピーダンスに整合するように調整された第1及び第2の抵抗デバイスと、該第1の抵抗デバイスに直列に接続されて、前記入力されたデータに基づいて前記伝送信号をハイ・レベル又はロー・レベルに切り替えるためにオン、オフ制御される電源側スイッチと、前記第2の抵抗デバイスに直列に接続されて、前記入力されたデータに基づいて前記伝送信号をハイ・レベル又はロー・レベルに切り替えるためにオン、オフ制御されるグランド側スイッチと、を備えたことを特徴とする請求項に記載の多値出力装置。 The data output unit is connected to the first resistor device in series with the first and second resistor devices adjusted to match the output impedance with the characteristic impedance of the transmission line, and is input to the data output unit. A power supply side switch that is controlled to be turned on and off in order to switch the transmission signal to a high level or a low level based on data, and connected in series to the second resistance device, based on the input data The multi-value output apparatus according to claim 3 , further comprising: a ground-side switch that is turned on and off to switch the transmission signal to a high level or a low level.
  5. 高速シリアル伝送に用いられる半導体集積装置であって、
    請求項1至の何れか一項に記載の出力装置を用いてシリアル伝送信号を出力することを特徴とする半導体集積装置。
    A semiconductor integrated device used for high-speed serial transmission,
    The semiconductor integrated device and outputs a serial transmission signal by using the output device according to any one of claims 1 Itaru 4.
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