JP5086613B2 - アクティブ・マトリクス・エレクトロルミネッセント・ディスプレイ・ピクセルとその製造方法 - Google Patents
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/782—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, each consisting of a single circuit element
- H01L21/786—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, each consisting of a single circuit element the substrate being other than a semiconductor body, e.g. insulating body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Theoretical Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Electroluminescent Light Sources (AREA)
- Thin Film Transistor (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Description
212 絶縁層
218 ゲート電極
222 容量分割回路網
232 ソース領域
234 ドレイン領域
Claims (9)
- エレクトロルミネッセントセルが接続されて、前記エレクトロルミネッセントセルを流れる電流を制御する第1の絶縁層を含む切り替え回路を、基板上に形成するステップと、
前記第1の絶縁層と前記エレクトロルミネッセントセルとの間に設けられて、前記エレクトロルミネッセントセルを前記切り替え回路から隔てる電界シールドを堆積するステップと
を含む、エレクトロルミネッセントディスプレイのピクセルを製造する方法であって、
前記切り替え回路を形成するステップが、前記第1の絶縁層上にゲート電極及び第1の複数の容量要素を堆積し、前記ゲート電極を有する高電圧トランジスタを形成することを含み、前記ゲート電極が、活性化電圧を受け取るように構成され、前記高電圧トランジスタが、前記活性化電圧に応答して高電圧を前記エレクトロルミネッセントセルに接続するように構成され、
前記電界シールドを堆積するステップが、前記ゲート電極及び前記第1の複数の容量要素を覆って第2の絶縁層を形成し、前記第2の絶縁層上に第2の複数の容量要素及び前記電界シールドを堆積することを含み、前記電界シールドが蓄積キャパシタの一方の極板として構成され、前記ゲート電極が前記蓄積キャパシタのもう一方の極板として構成されて、前記蓄積キャパシタが前記活性化電圧を蓄積するように構成される、方法。 - 前記高電圧トランジスタを形成するときに、ドレイン領域、ソース領域、前記ドレイン領域及び前記ソース領域間のドリフト領域を形成することを含み、
前記第1の絶縁層が前記ドリフト領域上に形成され、
前記ゲート電極が、前記ドリフト領域に部分的に重なると共に、前記電界シールドと並行であり、
前記電界シールドが接地されている、請求項1に記載の方法。 - 前記エレクトロルミネッセントセルに前記ドレイン領域を接続するための抵抗体を前記ドレイン領域に形成するステップを更に含む請求項2に記載の方法。
- 前記第1の複数の容量要素は、前記ドリフト領域の一部と重なり且つ前記ゲート電極とは重なっておらず、
前記第2の複数の容量要素は、前記第1の複数の容量要素に部分的に重なり、
前記第2の複数の容量要素を覆って第3の絶縁層を形成するステップと、
前記エレクトロルミネッセントセルの高電圧の電極を前記第3の絶縁層上に堆積するステップであって、高電圧が前記高電圧の電極に加えられるとき、電荷が前記第1および第2の複数の容量要素上に集まると共に、前記ドリフト領域に一様に電界を分布させるようにする、ステップと
を更に含む請求項2に記載の方法。 - 請求項1〜4のいずれかに記載の方法を使用して形成された複数のピクセルを有するエレクトロルミネッセントディスプレイであって、
各ピクセルが、
前記エレクトロルミネッセントセルと、
エレクトロルミネッセントライトを生成するため、前記エレクトロルミネッセントセルを選択的に活性化するように構成された前記切り替え回路であって、前記切り替え回路が、前記ゲート電極を有する前記高電圧トランジスタを備え、前記ゲート電極及び前記第1の複数の容量要素が前記第1の絶縁層上に堆積されており、前記ゲート電極が、前記活性化電圧を受け取るように構成され、前記高電圧トランジスタが、前記活性化電圧に応答して前記高電圧を前記エレクトロルミネッセントセルに接続するように構成される、切り替え回路と、
前記活性化電圧を蓄積するように構成された前記蓄積キャパシタと
を含み、
前記蓄積キャパシタが前記電界シールドを有し、前記電界シールドが、前記エレクトロルミネッセントセルを前記切り替え回路から隔てるように構成され且つ前記蓄積キャパシタの前記一方の極板として作用するように構成され、前記第2の複数の容量要素及び前記電界シールドが前記第2の絶縁層上に堆積されており、前記電界シールドが前記ゲート電極と平行であり、前記エレクトロルミネッセントセルと前記切り替え回路との間に位置付けられ、前記ゲート電極が、前記蓄積キャパシタの前記もう一方の極板として作用するように構成されており、
前記第1の複数の容量要素及び前記第2の複数の容量要素が、前記高電圧トランジスタのドリフト領域上に電界を均一に分布させるように構成された容量分圧器ネットワークを構成する、エレクトロルミネッセントディスプレイ。 - 前記切り替え回路が、前記活性化電圧を前記高電圧トランジスタの前記ゲート電極に選択的に加えるように構成された選択トランジスタをさらに含む請求項5に記載のエレクトロルミネッセントディスプレイ。
- 前記電界シールドが導電性材料の層を含む請求項5又は請求項6に記載のエレクトロルミネッセントディスプレイ。
- 前記容量分圧器ネットワークが、
前記エレクトロルミネッセントセルの高電圧の電極と、
第3の絶縁層によって前記高電圧の電極から間隔をあけられ、前記高圧電極からの電荷を蓄積するように構成された、前記第2の複数の容量要素と、
前記第2の絶縁層によって前記第2の複数の容量要素から間隔をあけられ、前記第2の複数の容量要素から結合される電荷を蓄積するように構成された、前記第1の複数の容量要素と
を含み、
前記高電圧トランジスタの前記ドリフト領域が、前記第1の複数の容量要素に平行であり、前記第1の絶縁層によって前記第1の複数の容量要素から間隔をあけられ、前記容量分圧器ネットワークに蓄積された前記電荷が、前記ドリフト領域に実質的に均一な電界を生成する請求項5〜7のいずれか1項に記載のエレクトロルミネッセントディスプレイ。 - 前記第1の複数の容量要素のそれぞれが、前記第2の複数の容量要素の少なくとも1つと部分的に重なる請求項8に記載のエレクトロルミネッセントディスプレイ。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/295,374 | 1994-08-24 | ||
US08/295,374 US5587329A (en) | 1994-08-24 | 1994-08-24 | Method for fabricating a switching transistor having a capacitive network proximate a drift region |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP8508253A Division JPH11511898A (ja) | 1994-08-24 | 1995-08-24 | アクティブ・マトリクス・エレクトロルミネッセント・ディスプレイ・ピクセルとその製造方法 |
Publications (2)
Publication Number | Publication Date |
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JP2007134728A JP2007134728A (ja) | 2007-05-31 |
JP5086613B2 true JP5086613B2 (ja) | 2012-11-28 |
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Application Number | Title | Priority Date | Filing Date |
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JP8508253A Pending JPH11511898A (ja) | 1994-08-24 | 1995-08-24 | アクティブ・マトリクス・エレクトロルミネッセント・ディスプレイ・ピクセルとその製造方法 |
JP2006308986A Expired - Lifetime JP5086613B2 (ja) | 1994-08-24 | 2006-11-15 | アクティブ・マトリクス・エレクトロルミネッセント・ディスプレイ・ピクセルとその製造方法 |
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JP8508253A Pending JPH11511898A (ja) | 1994-08-24 | 1995-08-24 | アクティブ・マトリクス・エレクトロルミネッセント・ディスプレイ・ピクセルとその製造方法 |
Country Status (6)
Country | Link |
---|---|
US (3) | US5587329A (ja) |
EP (1) | EP0776526B1 (ja) |
JP (2) | JPH11511898A (ja) |
KR (1) | KR100385378B1 (ja) |
DE (1) | DE69531055T2 (ja) |
WO (1) | WO1996006456A1 (ja) |
Families Citing this family (59)
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US6104041A (en) * | 1994-08-24 | 2000-08-15 | Sarnoff Corporation | Switching circuitry layout for an active matrix electroluminescent display pixel with each pixel provided with the transistors |
US5587329A (en) * | 1994-08-24 | 1996-12-24 | David Sarnoff Research Center, Inc. | Method for fabricating a switching transistor having a capacitive network proximate a drift region |
DE69739633D1 (de) * | 1996-11-28 | 2009-12-10 | Casio Computer Co Ltd | Anzeigevorrichtung |
JP3392672B2 (ja) * | 1996-11-29 | 2003-03-31 | 三洋電機株式会社 | 表示装置 |
US6110804A (en) * | 1996-12-02 | 2000-08-29 | Semiconductor Components Industries, Llc | Method of fabricating a semiconductor device having a floating field conductor |
TW441136B (en) * | 1997-01-28 | 2001-06-16 | Casio Computer Co Ltd | An electroluminescent display device and a driving method thereof |
KR100586715B1 (ko) * | 1997-02-17 | 2006-06-08 | 세이코 엡슨 가부시키가이샤 | 유기 el 장치 |
CN100558206C (zh) * | 1997-02-17 | 2009-11-04 | 精工爱普生株式会社 | 显示装置 |
US6462722B1 (en) * | 1997-02-17 | 2002-10-08 | Seiko Epson Corporation | Current-driven light-emitting display apparatus and method of producing the same |
US6147362A (en) * | 1997-03-17 | 2000-11-14 | Honeywell International Inc. | High performance display pixel for electronics displays |
US6501094B1 (en) * | 1997-06-11 | 2002-12-31 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device comprising a bottom gate type thin film transistor |
JP3520396B2 (ja) * | 1997-07-02 | 2004-04-19 | セイコーエプソン株式会社 | アクティブマトリクス基板と表示装置 |
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- 1994-08-24 US US08/295,374 patent/US5587329A/en not_active Expired - Fee Related
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1995
- 1995-08-24 WO PCT/US1995/010621 patent/WO1996006456A1/en active IP Right Grant
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- 1995-08-24 KR KR1019970701166A patent/KR100385378B1/ko not_active IP Right Cessation
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DE69531055T2 (de) | 2004-04-01 |
EP0776526A4 (en) | 1998-04-29 |
US5932892A (en) | 1999-08-03 |
JPH11511898A (ja) | 1999-10-12 |
WO1996006456A1 (en) | 1996-02-29 |
DE69531055D1 (de) | 2003-07-17 |
EP0776526B1 (en) | 2003-06-11 |
KR100385378B1 (ko) | 2003-07-16 |
EP0776526A1 (en) | 1997-06-04 |
US5736752A (en) | 1998-04-07 |
JP2007134728A (ja) | 2007-05-31 |
US5587329A (en) | 1996-12-24 |
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