JP5007308B2 - Plasma display panel driving method and plasma display apparatus - Google Patents

Description

  The present invention relates to a method for driving a plasma display panel (PDP) and a plasma display apparatus (PDP apparatus) including the PDP, and more particularly to a reset operation in field and subfield drive control.

  In a PDP driving method (subfield method) in a conventional PDP apparatus, a field corresponding to a display area (screen) and a period of a PDP is composed of a plurality of subfields weighted by brightness, and each subfield is , Reset (charge adjustment), address (cell selection), and sustain (sustain discharge light emission) operation periods. In the reset period, basically, a cell charge state is mainly obtained by performing a reset operation (first reset operation: R1) in a method of generating discharge (reset discharge) for all cells in the display region. Is adjusted (reset) to prepare for the operation in the next address period. In the address period, a cell to be lit (on) / non-lit (off) in the display area is selected, and in the sustain period, the selected cell is lit (emitted) by sustain discharge. The first reset operation (R1) needs to be provided for driving stabilization. However, the reset discharge by R1 becomes a factor which raises background luminance.

  In addition to the first reset operation (R1), there is also a reset operation (second reset operation: R2) in which a reset discharge is generated not for all cells in the display area but for ON cells. By applying a predetermined waveform to all the cells, a reset discharge is generated only in the ON cell. Here, the ON cell refers to a cell that has been selected in the address period in the immediately preceding subfield and sustain-discharged in the sustain period. By reducing the number of reset discharges of R1 by the second reset operation (R2), extra light emission can be suppressed.

  For example, as a conventional configuration, the light emission luminance due to R1 is reduced by an optical filter provided on the front surface of the PDP panel.

  In the conventional PDP device, the time position and frequency for performing the reset operation are generally fixed with respect to the field. Typically, in a predetermined temporal sequence arrangement (field configuration and subfield arrangement configuration) of a plurality (m) of subfields (SF1 to SFm) with a predetermined weight in a field, a specific order (position) The subfield is fixedly provided with a reset period by the first reset operation (R1) (the first method (fixed reset method)).

  As the first method, for example, the first reset operation (R1) is performed at least once for each field (referred to as FC1). Also, for example, in a field configuration with m subfields (SF1 to SFm) whose weights are arranged in order from small to large, the first reset operation (R1) is performed in the first subfield (SF1) of the field. Was configured. Further, except for the subfield in which the first reset operation (R1) is performed, for example, the number of reset discharges due to R1 is reduced by using the second reset operation (R2).

  However, since the amount of light emitted by the reset discharge of all the cells by the first reset operation (R1) is relatively large, the background luminance (black luminance) is increased by that amount and the display quality such as the contrast ratio is impaired. . In addition to using the second reset operation (R2), it is desirable to reduce the reset discharge due to the first reset operation (R1).

  In addition to the configuration (FC1), as a configuration for reducing the number (frequency) of the first reset operation (R1) for the field, for example, there is a configuration (referred to as FC2) that is reduced at least once every two fields. . In this configuration, for example, the first reset operation (R1) is performed in the first subfield of the odd-numbered field. However, in the case of this configuration (FC2), there is a problem of causing erroneous display such as lighting in a cell that should not be lit due to insufficient driving margin, that is, driving is unstable. Note that the drive margin is a range / condition in which normal lighting (on) / non-lighting (off) display can be performed in the cell group of the display area according to the display data.

  For explanation, as a basic conventional technique, a configuration in which a temporal arrangement (position) of a plurality of subfields of a field is fixed is a first field configuration (FA1). Further, as a conventional technique, a configuration in which the temporal arrangement (position) of a plurality of subfields of the field is not fixed with respect to the first field configuration (FA1) is defined as a second field configuration (FA2). As this configuration (FA2), for example, there is a configuration in which the temporal position (length) of the subfield in the field is moved (changed) in accordance with the difference in display data.

  As an example of the second field configuration (FA2), there is a driving method by automatic power control (APC) which is a conventional technique. In APC, the sustain period (light emission time) of the subfield is increased or decreased according to the display load factor of the subfield (that is, the length of the subfield changes and the position shifts). Thereby, the brightness and power of the display are adjusted to reduce power consumption.

  As another example of the second field configuration (FA2), a configuration in which the order of a plurality of subfields of the field is rearranged can be considered.

  A configuration in which the first reset operation (R1) is performed in subfields in a predetermined order as in the first method, in contrast to a configuration in which the subfield arrangement may be changed as in the second field configuration (FA2). Consider the case of applying together. In this case, the position (L1) where the first reset operation (R1) is performed in the field may vary depending on the difference in display data. Therefore, the effect of the first reset operation (R1) (charge adjustment effect) is not constant due to the difference in display data. This is particularly remarkable in the case of the configuration (FC2) of the first reset operation (R2) performed once in the two fields. In other words, a predetermined drive time unit is covered by an effect of a predetermined reset operation unit, for example, a drive margin is satisfied by an effect of one first reset (R1) operation for two field periods, May not be possible.

  The present invention has been made in view of the above problems, and its object is related to a reset operation in display drive control of a PDP device, and background brightness reduction (reset discharge frequency reduction) and drive margin securing (drive stabilization). ) And to improve the display quality.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows. In order to achieve the above object, the present invention is a technique of a PDP driving method and a driving device (PDP device) using the method, and has the following configuration.

  In the present invention, in order to control the reset operation, a unit time (T) independent of the time of the field and subfield is defined (set). This time (T) is for determining the approximate periodic execution timing of the reset operation. That is, in the drive display of the field group, the reset operation is not performed at a fixed position and frequency with respect to the field as in the prior art, but the timing of the period of time (T) is roughly independent of the field configuration. Perform reset operation with. For each timing of time (T), a subfield existing at a position closest to the timing is set as a target (first reset SF), and in the subfield, for example, a first reset operation (R1) (target for all cells) A period (reset period) including a reset) is provided. The first reset operation (R1) is performed at a frequency of at least once per unit time (T). As a result, the number of times of the first reset operation (R1) is, for example, twice in 3 fields (1... While maintaining the effect (reset effect) by the first reset operation (R1), that is, ensuring the drive margin. About once every 5 fields). That is, the unit time (T) is defined by conditions such as T≈1.5F or 1F <T <2F (F represents a field period of a predetermined length).

  Further, in subfields other than the subfield (first reset SF) including the first reset operation (R1), for example, by providing a period of the second reset operation (ON cell target reset), the reset discharge by R1 Reduce the number of times.

  With this configuration, both background luminance reduction (reset discharge frequency reduction) and drive margin securing (drive stabilization) are realized. In particular, regarding the background luminance reduction, the luminance can be reduced as compared with the configuration (FC1) of the first reset operation (R1) performed once in the one field. Further, with respect to securing the drive margin, the drive can be stabilized more than the configuration (FC2) of the first reset operation (R1) performed once in the two fields.

  The PDP driving method and the PDP apparatus have the following configuration, for example. This PDP apparatus includes a normal configuration or a so-called ALIS configuration including a PDP in which a display cell group is configured by an electrode group such as an X electrode, a Y electrode, and an address electrode, and a circuit unit that drives and controls the electrode group. It is a compatible device. The field corresponding to the display area and period of the PDP is composed of a plurality of subfields divided in time. The subfield has a reset period for charge adjustment and the like, an address period for selecting a lighting target cell according to display data, and a sustain period for lighting the selected cell by sustain discharge. A multi-gradation moving image is displayed by a combination of lighting / non-lighting of a plurality of subfields of the field. And in this method and apparatus, unit time (T) independent of a field and a subfield is prescribed | regulated. The unit time (T) is defined within a range longer than one field and shorter than two fields, for example. In the driving of the field group, the first reset operation (R1) is provided in the first type subfield close to each timing of the unit time (T), and the first reset operation in the first type subfield is performed. In the period (R1), a first drive waveform for generating a reset discharge is applied to the electrode group regardless of the presence or absence of the sustain discharge in the immediately preceding subfield for all cells in the display area of the PDP.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows. According to the present invention, in connection with the reset operation in the display drive control of the PDP device, both background luminance reduction (reduction in the number of reset discharges) and drive margin securing (drive stabilization) can be achieved, and display quality can be improved.

It is a figure which shows the whole block structure of the PDP apparatus (1st structure: normal structure) in one embodiment of this invention. It is a figure which shows the whole block structure of the PDP apparatus (2nd structure: ALIS structure) in one embodiment of this invention. In the PDP apparatus of one embodiment of this invention, it is a figure which shows the panel structure example of PDP in an exploded perspective view. It is a figure which shows the structural example of the field of a PDP drive display in the PDP apparatus of one embodiment of this invention. In the PDP device having the first configuration (1-1a) according to the first embodiment of the present invention, the first in the field group drive sequence (when T≈1.5F, 1f: 1F, m = 8, FA1) It is a figure which shows the timing etc. of reset operation | movement (R1). In the PDP device having the second configuration (1-1b) according to the first embodiment of the present invention, the first in the field group drive sequence (when T≈1.5F, 1f: 1F, m = 8, FA2) It is a figure which shows the timing etc. of reset operation | movement (R1). In the PDP device having the third configuration (1-2a) according to the first embodiment of the present invention, the field group drive sequence (in the case of 1.5F <T <2F, 1f: 1F, m = 8, FA1). FIG. 6 is a diagram illustrating timing of a reset operation (R1) of FIG. In the PDP device having the fourth configuration (1-2b) according to the first embodiment of the present invention, the field group drive sequence (in the case of 1.5F <T <2F, 1f: 1F, m = 8, FA2). FIG. 6 is a diagram illustrating timing of a reset operation (R1) of FIG. In the PDP device having the fifth configuration (1-3a) according to the first embodiment of the present invention, the field group drive sequence (in the case of 1F <T <1.5F, 1f: 1F, m = 8, FA1) FIG. 6 is a diagram illustrating timing of a reset operation (R1) of FIG. In the PDP device having the sixth configuration (1-3b) according to the first embodiment of the present invention, the field group drive sequence (in the case of 1F <T <1.5F, 1f: 1F, m = 8, FA2) FIG. 6 is a diagram illustrating timing of a reset operation (R1) of FIG. In the PDP device having the first configuration (2-1a) according to the second embodiment of the present invention, the first in the field group drive sequence (when T≈1.5F, 1f: 2F, m = 8, FA1) It is a figure which shows the timing etc. of reset operation | movement (R1). In the PDP device having the second configuration (2-1b) according to the second embodiment of the present invention, the first in the field group drive sequence (T≈1.5F, 1f: 2F, m = 8, FA2) It is a figure which shows the timing etc. of reset operation | movement (R1). In the PDP device having the third configuration (2-2a) according to the second embodiment of the present invention, the field group drive sequence (1.5F <T <2F, 1f: 2F, m = 8, FA1) FIG. 6 is a diagram illustrating timing of a reset operation (R1) of FIG. In the PDP device having the fourth configuration (2-2b) according to the second embodiment of the present invention, the field group drive sequence (in the case of 1.5F <T <2F, 1f: 2F, m = 8, FA2) FIG. 6 is a diagram illustrating timing of a reset operation (R1) of FIG. In the PDP device having the fifth configuration (2-3a) according to the second embodiment of the present invention, the field group drive sequence (1F <T <1.5F, 1f: 2F, m = 8, FA1) FIG. 6 is a diagram illustrating timing of a reset operation (R1) of FIG. In the PDP device having the sixth configuration (2-3b) according to the second embodiment of the present invention, the field group drive sequence (1F <T <1.5F, 1f: 2F, m = 8, FA2) FIG. 6 is a diagram illustrating timing of a reset operation (R1) of FIG. In the PDP apparatus of Embodiment 1 of this invention, it is a figure which shows the structural example (in the case of 1f: 1F, R1-1 (blunt wave), R2) of a subfield drive waveform. In the PDP device according to the first embodiment of the present invention, it is a diagram illustrating a configuration example of subfield drive waveforms (in the case of 1f: 1F, R1-2 (rectangular wave), R2). In the PDP apparatus of Embodiment 2 of this invention, it is a figure which shows the structural example (In the case of 1f: 2F, R1-1 (blunt wave), R2, odd field (Fo)) of a subfield drive waveform. It is a figure which shows the timing of the 1st reset operation | movement (R1) in the drive sequence (1f: 1F, when m = 8) of a field group in a prior art example (1). It is a figure which shows the timing etc. of the 1st reset operation | movement (R1) in the drive sequence (1f: 2F, when m = 8) of a field group in a prior art example (2).

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted. Hereinafter, the field is represented by F and the subfield is represented by SF as necessary.

  In the present embodiment, as a summary, in a normal configuration PDP device (FIG. 1) or a so-called ALIS configuration PDP device (FIG. 2), the unit time (T) is greater than 1F and less than 2F (1F <T <2F). The first reset operation (R1) (all cell target reset) is performed in SF corresponding to the periodic timing by the unit time (T), and the second reset operation (R2) is performed in other SFs. (Reset ON cell target).

<PDP device (1)>
In FIG. 1, the PDP device having the first configuration (corresponding to a normal PDP) includes a PDP 10 (FIG. 3), a control circuit 110, and drive circuits (151, 152, 153). The drive circuit (driver) includes an X drive circuit 151, a Y drive circuit 152, and an address drive circuit 153. The control circuit 110 controls the entire PDP apparatus including a drive circuit unit and the drive circuit unit drives and controls the PDP 10 by applying a voltage. Each circuit unit is mounted on an IC substrate or the like. Each drive circuit is electrically connected to a corresponding electrode group (31, 32, 33) of the PDP 10. The Y drive circuit 152 also includes a scan drive circuit.

  The PDP 10 has, for example, an AC drive type having an X electrode (first electrode) 31 and a Y electrode (second electrode) 32 for generating a sustain discharge for display, and an address (A) electrode 33 for address operation. This is a three-electrode PDP. The Y electrode 32 is also used for a scanning operation. In the PDP 10, a matrix of display cells (cell: C) associated with pixels is configured by the electrode groups (31, 32, 33). A pixel is composed of a set of cells (C) of each color of R, G, and B. A display area of the PDP 10 is configured by the cell matrix, and is associated with a field and SF that are video display units.

  The control circuit 110 includes a timing generation unit (not shown), a display data control unit (multi-gradation processing unit), a field memory, a signal processing circuit, and the like. The timing generation unit inputs a video signal (DATA), a control clock signal (CLK), a horizontal synchronization signal (H), a vertical synchronization signal (V), etc., and generates a timing signal necessary for controlling each unit. Output. Based on the input video signal (DATA), the display data control unit performs display data for video display by the multi-tone pixel group for the PDP 10 and the drive circuit by multi-tone display processing (SF conversion processing). Field and SF data) and the like. The control circuit 110 also holds data and settings for the SF lighting pattern (conversion table). The video signal (DATA) is a signal including gradation value information in the (R, G, B) format, for example. The field and SF data are data encoded in the on / off information of each cell of each SF corresponding to the gradation value information.

  The control circuit 110 (display data control unit, field memory) outputs SF data, control signals, and the like of the field to the drive circuits (151, 152, 153) at each field display timing. In accordance with this, voltage waveforms (drive sequence) for display drive are output from the drive circuits (151, 152, 153) to the electrode groups (31, 32, 33) of the PDP 10. As a result, various discharges are generated in the display cell group of the PDP 10 and field display is performed.

<PDP device (2)>
In FIG. 2, the PDP device having the second configuration (ALIS-PDP compatible) is roughly the same as the PDP device having the first configuration in FIG. 1. This is a configuration having a PDP 10 (FIG. 3) having a structure corresponding to ALIS, and drive circuits (151, 152, 153) corresponding to the electrode group. The X drive circuit 151 includes an Xo circuit 151A for driving the odd-numbered X electrodes 31 (Xo) and an Xe circuit 151B for driving the even-numbered X electrodes 31 (Xe). The Y drive circuit 152 includes a Yo circuit 152A for driving the odd-numbered Y electrodes 32 (Yo) and a Ye circuit 152B for driving the even-numbered Y electrodes 32 (Ye). The Y drive circuit 152 also includes a scan drive circuit.

<PDP>
In FIG. 3, a panel structure example (in the case of a box rib) of the PDP 10 corresponding to the first configuration or the second configuration of the PDP apparatus will be described. A part corresponding to the pixel is shown. The PDP 10 includes a front substrate 1 and a rear substrate 2 that are mainly made of light-emitting glass. The structures (front portion 201 and rear portion 202) are opposed to each other, the surrounding portions are sealed, and a discharge gas is formed in the space. Is constituted by enclosing.

  In the front surface portion 201, a plurality of X electrodes 31 and Y electrodes 32 are repeatedly formed in the vertical (column) direction alternately extending in the horizontal (row) direction on the front substrate 1. These electrodes (display electrodes) are covered with a dielectric layer 13 and a surface thereof with a protective layer 14. The display electrodes (31, 32) are composed of, for example, a transparent electrode 11 and a metal electrode 12. The transparent electrode 11 has, for example, a shape that protrudes to the inside of the cell (C) and forms a discharge gap between adjacent display electrodes. The metal electrode 12 is, for example, linear, and is electrically connected to the transparent electrode 11 and the drive circuit.

  In the back surface portion 202, a plurality of address electrodes 33 are formed on the back substrate 2 so as to extend in parallel with the X electrode 31 and the Y electrode 32 in parallel with each other, and are further covered with the dielectric layer 22. Yes. On the dielectric layer 22, on both sides of the address electrode 33, partition walls (vertical partition walls) 23A extending in the vertical direction are formed and divided in the column direction. Further, a partition wall (horizontal partition wall) 23B extending in the horizontal direction is formed at a position below the display electrodes (31, 32) and divided in the row direction. Thus, a box (lattice) -like partition wall (rib) 23 corresponding to the region of the display cell (C) is formed. Further, a phosphor 24 is applied between the partition walls 23 and on the dielectric layer 22 to generate visible light of each color of red (R), green (G), and blue (B) when excited by ultraviolet rays.

  A display row (line) is formed corresponding to a pair of X electrode 31 and Y electrode 32 (display electrode pair) adjacent to each other, and a display column and a cell (C) corresponding to the intersection with the address electrode 33. Composed. In the normal configuration, rows of display electrode pairs (31, 32) are sequentially repeated in the vertical direction. In the ALIS configuration, a row is configured corresponding to all adjacent display electrode pairs (31, 32), and the Y electrode 32 is commonly used in adjacent rows. The PDP has various detailed structures depending on the driving method.

  As a configuration of the display row, in the normal configuration, for example, the first row (L1) is configured by a pair of the first X electrode 31 (X1) and the first Y electrode 32 (Y1) from the top. The nth row (Ln) is composed of a pair of the nth X electrode 31 (Xn) and the nth Y electrode 32 (Yn). In the ALIS configuration, for example, the first row (L1) is configured by a pair of the first X electrode 31 (X1) and the first Y electrode 32 (Y1) from the top, and the first Y electrode 31 (X1). And the second X electrode 31 (Y2) pair constitute the second row (L2), and the second X electrode 31 (X2) and second Y electrode 32 (Y2) pair constitute the third row. Similarly, a pair of nth X electrode 31 (Xn) and nth Y electrode 32 (Yn) forms a 2nth row (L2n), and nth Y electrode 32 ( Yn) and the (n + 1) th X electrode 31 (Xn + 1) constitute a 2n + 1th row (L2n + 1).

<Field and subfield>
In FIG. 4, the configuration of the field and SF (drive sequence) will be described as the basis of drive control of the PDP 10. One field (F) 50 is displayed in 1/60 seconds, for example. The field (F) 50 is composed of a plurality (m) of SFs 60 that are temporally divided for gradation expression. m is 8-10, for example. Each SF 60 (SF1 to SFm) includes a reset period 71, an address period 72, and a sustain period 73 in order. The SF 60 of the field (F) 50 is weighted by the length of the sustain period 73 (in other words, the number of sustain discharges, etc.), and the SF 60 (SF1 to SFm) is turned on / off (non-lighted) for each cell. The gradation of the pixel is expressed by a lighting step (step) by selecting (combining) off.

  In the reset period 71, the reset operation is performed to prepare for the operation of the next address period 72 by adjusting the charge state of the cells of the SF 60 as uniform as possible. In the next address period 72, an address operation for selecting an on / off cell in the cell group of the SF 60 is performed. That is, according to display data (SF data), by applying a scanning pulse to the Y electrode 32 and an address pulse to the address electrode 33, an address discharge is generated in the lighting target cell and wall charges are accumulated (write address). Method). In the next sustain period 73, a sustain operation is performed in which a sustain discharge is generated in the cell selected in the immediately preceding address period 72 to emit light by applying the sustain pulse repeatedly to the display electrode pair (31, 32).

  The field (F) 50 is associated with the image frame (f) 40 of the input video signal (DATA). In the case of the normal configuration, one frame (1f) is displayed in one field (1F) (represented by 1f: 1F). In the case of the ALIS configuration, for example, using an even / even line interlace driving method, one frame (1f) is displayed in two fields (2F) (continuous odd / even fields) as shown in FIG. 4 (represented by 1f: 2F). . That is, in the odd field 50 (Fo), the odd line (Lo) of the display area is driven, and in the even field 50 (Fe), the even line (Le) is driven.

<Prior art example (1)>
The configuration of the first method (fixed reset method) and the prior art examples (1) and (2) corresponding to FC1 will be described with reference to FIGS. 20 and 21 for comparison with the present embodiment. .

  FIG. 20 shows the timing of the first reset operation (R1) in the field group drive sequence (1f: 1F, m = 8, FA1) in the prior art example (1). In F1 to F4 as examples of the continuous field (F) 50, m = 8 predetermined weighted SFs 60 (SF1 to SF8) are similarly formed. SF1 to SF8 are arranged in order from the smallest weight.

  For the sake of explanation, a temporal position (timing) for which the first reset operation (R1) is to be provided and a subfield including the temporal position are referred to as a first reset position (L1) and a first reset SF (shaded portion). . The first reset operation (R1) is included in the reset period 71 in the first reset SF60.

  In the prior art example (1), the first reset operation (R1) is fixedly performed at least once every field (F) 50 (FC1), for example, at the first SF 60 (SF1) of the field 50. . Further, in the SF 60 other than the first reset SF 60, for example, a second reset operation (R2) is performed (the SF 60 is referred to as a second reset SF). The number of reset discharges of R1 is reduced by using the second reset operation (R2).

  Further, for example, in the case of a configuration (FC2) that reduces at least once every two fields 50, for example, the first reset operation (R1) is performed in the first SF 60 of the odd-numbered fields 50 (F1, F3), for example. It becomes composition.

<Prior Art Example (2)>
FIG. 21 shows the timing of the first reset operation (R1) in the field group drive sequence (1f: 2F, m = 8, FA1) in the prior art example (2). In each of f1 and f2 which are examples of continuous frames (f) 40 and F1 to F4 (Fo1, Fe1, Fo2 and Fe2) which are continuous fields (F) 50 constituting the same, m = 8 in the same manner. It consists of SF60 (SF1 to SF8) having a predetermined weight. Fo is the odd-numbered field 50, and Fe is the even-numbered field 50.

  In the prior art example (2), the first reset operation (R1) is fixedly performed at least once for each odd / even field (Fo, Fe) 50 (FC1), particularly at the first SF 60 (SF1) of the field 50. It is the structure which performs. Further, in the SF 60 other than the first reset SF 60, for example, a second reset operation (R2) is performed. In this configuration, a reset operation is provided for each odd / even field (Fo, Fe) 50 in the same manner as in the prior art example (1).

  Further, for example, in the case of a configuration (FC2) that reduces at least once every two fields 50, for example, the first reset operation (for each field 50 of odd-numbered frames (f) 40 (f1, f3)) ( R1) is performed.

  Next, features of the PDP driving method and the PDP apparatus according to the present embodiment will be described with reference to FIGS.

(Embodiment 1)
A first embodiment of the present invention will be described with reference to FIGS. In the first embodiment (normal configuration) of the PDP apparatus (FIG. 1), the 1f: 1F drive system, the m = 8 field 50 and SF60 configurations, and the first field configuration (FA1) ) Or the second field configuration (FA2), in which the unit time (T) is defined within the range of 1F <T <2F.

<Control action>
For the control operation in this PDP driving method, the control circuit 110 and the like perform the following processing. The control circuit 110 sets a specific value of the unit time (T) under the condition of 1F <T <2F. This setting can be previously set internally or externally by the user. For example, T≈1.5F (a time length corresponding to 1.5 fields) is set. With the SF conversion process, the control circuit 110 performs the first reset operation (R1) in which SF 60 of each of the plurality of fields 50 to be displayed according to the setting of the unit time (T) (first reset SF), Furthermore, it is determined whether the second reset operation (R2) is performed (second reset SF). This can be obtained by a simple calculation. The control circuit 110 sends SF data and a drive control signal reflecting the determined reset position and type to each drive circuit (151, 152, 153). Each drive circuit (151, 152, 153) selects and outputs a corresponding drive sequence and waveform.

<APC>
In the case of a PDP apparatus related to the FA 2 and having an APC function, the control circuit 110 includes an APC processing unit (not shown). In the APC processing unit, for example, SF data after SF conversion is input, and the display load factor (lighting rate of the cell group) of the field 50 and SF 60 is calculated. For example, when the display load factor of the SF 60 is large, the drive output to the PDP 10 is adjusted so as to reduce the power consumption by lowering the luminance level of the display of the SF 60. When the luminance level of the SF 60 is lowered, the sustain period 73 is shortened by reducing the number of sustain pulses (or the sustain pulse width, etc.) in the sustain period 73 in the SF 60.

<First Configuration Example (1-1a)>
In FIG. 5, a first configuration example (1-1a) in the first embodiment will be described. This configuration example is a case where T≈1.5F and FA1. In F1 to F4 as examples of the continuous field (F) 50, m = 8 predetermined weighted SFs 60 (SF1 to SF8) are similarly formed. SF1 to SF8 are arranged in order from the smallest weight. The plurality of SFs 60 (SF1 to SF8) constituting each field (F) 50 have the same configuration in the field (F) 50 unit, and have a configuration (FA1) in which the temporal position of the SF 60 does not vary. L1 is the position (timing) of R1, the hatched portion is SF60 (first reset SF) including R1, and the other SF60 is SF60 (second reset SF) including R2.

  A unit time (T), which is a period independent of the time by the field 50 and the SF 60 group, is associated. In this example, the reference position (timing) is delimited such as 1.5F, 3F, 4.5F, and 6F by repeating T≈1.5F from the beginning of F1. For each periodic timing of the time (T), the SF 60 closest to it is associated as the first reset SF. Then, the first reset operation (R1) is performed by the first reset SF. That is, a period for applying a drive waveform corresponding to the first reset operation (R1) is provided in the reset period 71 of the first reset SF. Further, in the SF 60 other than the first reset SF, for example, a second reset operation (R2) is performed (second reset SF). By using the second reset operation (R2), the number of reset discharges of R1 is reduced.

  In this example, all the SFs 60 other than the first reset SF are determined as the second reset SF. Note that the first reset operation (R1) may be provided at the SF 60 other than the timing of the unit time (T), for example, when it is desired to provide a drive stabilization margin.

  In the example of FIG. 5, first, SF1 of F1 includes R1. Next, the SF 60 closest to the position after T≈1.5F (the middle of F2) from the start of F1 is SF7 of F2. Therefore, R1 is included in the SF7. Next, R1 is similarly included at a position after T≈1.5F from the middle of F2 (start of F4). Similarly, L1 is determined.

  According to this configuration example, it is possible to obtain both effects of reducing the background luminance by reducing the number of reset discharges of R1 in the R2 operation and securing the drive margin (driving stabilization) by the reliable R1 operation in a substantially constant cycle. In particular, regarding the background luminance reduction, the luminance can be reduced as compared with the configuration (FC1) of the first reset operation (R1) performed once in the one field. Further, with respect to securing the drive margin, the drive can be stabilized more than the configuration (FC2) of the first reset operation (R1) performed once in the two fields.

<Second Configuration Example (1-1b)>
In FIG. 6, a second configuration example (1-1b) in the first embodiment will be described. This configuration example is a case where T≈1.5F and FA2. In F1 to F4, the plurality of SFs 60 (SF1 to SF8) constituting each field (F) 50 have the same configuration in units of the field (F) 50, but have a configuration in which the temporal position of the SF 60 varies. (FA2). In this example, according to the control of APC corresponding to the display data, each SF 60 (SF1 to SF8) is assigned to the configuration of the field 50 of the first configuration example (1-1a) without changing the weighting. By shortening the sustain period 73, the display brightness is lowered and power consumption is reduced. By shortening each SF 60, the arrangement is changed so that each SF 60 is packed in front of the field 50. Since the time length of the field (F) is constant, a pause time (punishment area) is formed after the final SF 60 (SF8) of each field (F) 50. Note that the APC control and the SF arrangement change are examples, and for example, a configuration in which no downtime is provided in the field (F) 50 is also possible.

  In this example, as in the first configuration example (1-1a), for each periodic timing of unit time (T), the closest SF 60 is associated as the first reset SF. In the example of FIG. 6, first, R1 is included in SF1 of F1. Next, the SF 60 closest to the position after T≈1.5F (the middle of F2) from the start of F1 is the SF8 of F2. Therefore, R1 is included in the SF8. Next, R1 is similarly included at a position after T≈1.5F from the middle of F2 (start of F4). Similarly, L1 is determined.

  Compared to the first configuration example (1-1a), the position (L1) of the second R1 is changed from SF7 to SF8 in the first reset SF60 including the SF position change. The timing is substantially the same for driving the entire 50 group.

  In a configuration in which the first method (fixed reset method) is applied to the second field configuration (FA2) in the prior art, the position of the SF to be subjected to the first reset operation (R1) varies. May be large. As a result, the time difference between the first reset operations (R1) is not constant in the driving of the entire field 50 group, and a portion where the time difference is large and a portion where small is generated. For this reason, the effect (charge adjustment effect) of the first reset operation (R1) is not constant, and there is a possibility of causing a display defect. On the other hand, in the present configuration example, since the effect of the first reset operation (R1) is made constant according to the timing of the unit time (T), the above problems can be prevented.

<Third Configuration Example (1-2a)>
In FIG. 7, a third configuration example (1-2a) in the first embodiment will be described. This configuration example is a case where 1.5F <T <2F and FA1. In this example, first, R1 is included in SF1 of F1. Next, the SF 60 closest to the position after T from the start of F1 (slightly after the middle of F2 in this example) is SF7 of F2. Therefore, R1 is included in the SF7. The SF 60 closest to the next T-position (slightly after the beginning of F4) is SF4 of F4. Therefore, R1 is included in the SF4. Similarly, L1 is determined.

<Fourth Configuration Example (1-2b)>
In FIG. 8, a fourth configuration example (1-2b) in the first embodiment will be described. This configuration example is a case where 1.5F <T <2F and FA2. Compared to the third configuration example (1-2a), this is a case of a field 50 configuration in which each SF 60 of the field 50 is shortened by the APC operation and a pause time is allowed. In this example, first, R1 is included in SF1 of F1. Next, the SF 60 closest to the position after T from the start of F1 (slightly after the middle of F2 in this example) is SF8 of F2. Therefore, R1 is included in the SF8. The SF 60 closest to the next T-position (slightly after the beginning of F4) is SF4 of F4. Therefore, R1 is included in the SF5. Similarly, L1 is determined.

  Compared to the third configuration example (1-2a), the second and third R1 positions (L1) change in accordance with the SF arrangement change in the first reset SF60 including the position (L1). The timing is substantially the same for driving the entire 50 group.

<Fifth Configuration Example (1-3a)>
With reference to FIG. 9, a fifth configuration example (1-3a) in the first embodiment will be described. This configuration example is a case where 1F <T <1.5F and FA1. In this example, first, R1 is included in SF1 of F1. Next, the SF 60 closest to the position after T from the start of F1 (in this example, about 1 / 4F after the start of F2) is SF5 of F2. Therefore, R1 is included in the SF5. Similarly, the SF 60 closest to the position for each T (the middle of F3, about 1 / 4F from the middle of F4, the start of F6, etc.) is SF7 of F3, SF8 of F4, SF1 of F6, etc. Yes, include R1 in their SF60. In this example, the result does not include R1 in F5.

<Sixth Configuration Example (1-3b)>
In FIG. 10, a sixth configuration example (1-3b) in the first embodiment will be described. This configuration example is a case where 1F <T <1.5F and FA2. Note that the value of T is slightly different from the value of T in the fifth configuration example (1-3a). Compared to the fifth configuration example (1-3a), this is a case of the field 50 configuration in which each SF 60 of the field 50 is shortened by the APC operation and a pause time is allowed. In this example, first, R1 is included in SF1 of F1. Next, SF 60 closest to the position after T from the beginning of F1 (slightly before the middle of F2 in this example) is SF6 of F2. Therefore, R1 is included in the SF6. Similarly, the SF 60 closest to the position for each T (slightly after the middle of F3, the beginning of F5, a little before the middle of F6, etc.) is SF8 of F3, SF1 of F5, SF6 of F6, etc. Yes, include R1 in their SF60. In this example, the result does not include R1 in F4.

(Embodiment 2)
A second embodiment of the present invention will be described with reference to FIGS. In the second embodiment (ALIS configuration) PDP apparatus (FIG. 2), the 1f: 2F drive system, the m = 8 field 50 and SF60 configurations, and the first field configuration (FA1) ) Or the second field configuration (FA2), in which the unit time (T) is defined within the range of 1F <T <2F.

<First Configuration Example (2-1a)>
In FIG. 11, the first configuration example (2-1a) in the second embodiment will be described. This configuration example is a case of T≈1.5F (every odd / even field 50 (Fo / Fe)) and FA1.

  In f1 to f4 which are examples of continuous frames (f) 40 and F1 to F8 (Fo1 to Fo4, Fe1 to Fe4) which are continuous fields (F) 50 constituting the frames, m = 8 in the same manner. It consists of SF60 (SF1 to SF8) having a predetermined weight.

  The same unit time (T) is associated with each odd / even field (Fo, Fe) 50. In this configuration, a reset operation is provided for each odd / even field (Fo, Fe) 50 based on the same concept as the first configuration example (1-1a) of the first embodiment.

  In this example, for example, in the Fo group excluding the Fe group, the reference position (timing) is divided by the repetition of T≈1.5F from the start of F1. The same applies to the other Fe group. For each of the periodic timings of Fo and Fe, the closest SF 60 is associated as the first reset SF and the other SF 60 is associated as the second reset SF for each periodic timing of unit time (T).

  In the example of FIG. 11, first, SF1 of F1 (Fo1) and SF1 of F2 (Fe1) include R1. Next, SF 60 closest to the position after T≈1.5F (the middle of F3 and the middle of F4) is SF7 of F3 (Fo2) and SF7 of F4 (Fe2), respectively. Therefore, R1 is included in those SF7. Next, R1 is similarly included in SF1 of F7 (Fo4) and SF1 of F8 (Fe4) respectively corresponding to positions after T≈1.5F (start of F7, start of F8) (note that f3 (F5 F6) is the case where R1 is not included due to the carry to f4). Similarly, L1 is determined.

  According to this configuration example, it is possible to obtain both effects of reducing the background luminance by reducing the number of reset discharges of R1 in the R2 operation and securing the drive margin (driving stabilization) by the reliable R1 operation in a substantially constant cycle. In particular, with respect to the conventional ALIS configuration, with respect to the background luminance reduction, the luminance can be reduced as compared with the configuration (FC1) of the first reset operation (R1) performed once in one field. Further, with respect to securing the drive margin, the drive can be stabilized more than the configuration (FC2) of the first reset operation (R1) performed once in the two fields.

<Second Configuration Example (2-1b)>
A second configuration example (2-1b) in the second embodiment will be described with reference to FIG. This configuration example is a case where T≈1.5F and FA2. In f1 to f4 (F1 to F8), the plurality of SFs 60 (SF1 to SF8) constituting each field (F) 50 have the same configuration in units of field (F) 50, but the temporal position variation of SF60 (FA2). In this example, the configuration of the field 50 of the first configuration example (2-1a) is controlled in accordance with the APC control according to the display data, similarly to the second configuration example (1-1b) of the first embodiment. On the other hand, the sustain period 73 of each SF 60 (SF1 to SF8) is shortened.

  In this example, as in the first configuration example (2-1a), for each periodic timing of unit time (T), the closest SF 60 is associated as the first reset SF. In the example of FIG. 12, first, R1 is included in SF1 of F1 and SF1 of F2. Next, SF 60 closest to the position after T≈1.5F (the middle of F3 and the middle of F4) is SF8 of F3 and SF8 of F4. Therefore, R1 is included in those SF8. Next, R1 is similarly included in SF1 of F7 (Fo4) and SF1 of F8 (Fe4) respectively corresponding to positions after T≈1.5F (start of F7, start of F8) (note that f3 (F5 F6) is the case where R1 is not included due to the carry to f4). Similarly, L1 is determined.

  Compared to the first configuration example (2-1a), the first reset SF60 including the second R1 position (L1) of Fo and Fe changes from SF7 to SF8 as the SF arrangement is changed. However, the timing is substantially the same in driving the entire field 50 group.

  In the configuration of the prior art ALIS configuration in which the FA2 and the first method are applied together, there is a possibility of a display defect as described above, but in this configuration example, according to the timing of unit time (T). Since the effect of the first reset operation (R1) is made constant, it can also be prevented.

<Third Configuration Example (2-2a)>
A third configuration example (2-2a) in the second embodiment will be described with reference to FIG. This configuration example is a case where 1.5F <T <2F and FA1. In this example, first, R1 is included in SF1 of F1 and SF1 of F2. Next, SF 60 closest to the positions after T (Fo and the middle of F3, and a little after the middle of F4) are SF7 of F3 and SF7 of F4. Therefore, R1 is included in those SF7. The SFs 60 closest to the next T-position (slightly after the beginning of F7, slightly after the start of F8) are SF4 of F7 and SF4 of F8. Therefore, R1 is included in those SF4. Similarly, L1 is determined.

<Fourth Configuration Example (2-2b)>
In FIG. 14, a fourth configuration example (2-2b) in the second embodiment will be described. This configuration example is a case where 1.5F <T <2F and FA2. Compared to the third configuration example (2-2a), this is a case of the field 50 configuration in which each SF 60 of the field 50 is shortened by the APC operation and a pause time is allowed. In this example, first, R1 is included in SF1 of F1 and SF1 of F2. Next, SF 60 closest to the positions after T (Fo and the middle of F3, slightly after the middle of F4) are SF8 of F3 and SF8 of F4. Therefore, R1 is included in those SF8. The SFs 60 closest to the next T-position (slightly after the beginning of F7, slightly after the start of F8) are SF5 of F7 and SF5 of F8. Therefore, R1 is included in those SF5. Similarly, L1 is determined.

  Compared to the third configuration example (2-2a), the second and third R1 positions (L1) of Fo and Fe respectively change with the SF arrangement change of the first reset SF60 including the position. However, the timing is substantially the same in driving the entire field 50 group.

<Fifth Configuration Example (2-3a)>
In FIG. 15, a fifth configuration example (2-3a) in the second embodiment will be described. This configuration example is a case where 1F <T <1.5F and FA1. In this example, first, R1 is included in SF1 of F1 and SF1 of F2. Next, SF60 closest to the positions after T (about 1 / 4F from the start of F3 and about 1 / 4F after the start of F4) are SF5 of F3 and SF5 of F4. Therefore, R1 is included in those SF5. In the same manner, the SF 60 closest to the position for each T of Fo and Fe (the middle of F5 and F6, about 3 / 4F after the start of F7 and F8, the start of F11 and F12, etc.) SF7 of SF7, F7 and F8, SF1 of F11 and F12, etc., and R1 is included in those SF60. In this example, the result does not include R1 in f5 (F9, F10).

<Sixth Configuration Example (2-3b)>
In FIG. 16, a sixth configuration example (2-3b) in the second embodiment will be described. This configuration example is a case where 1F <T <1.5F and FA2. Note that the value of T is slightly different from the value of T in the fifth configuration example (2-3a). Compared to the fifth configuration example (2-3a), this is a case of the field 50 configuration in which each SF 60 of the field 50 is shortened by the APC operation and a pause time is allowed. In this example, first, R1 is included in SF1 of F1 and SF1 of F2. Next, the SFs 60 closest to the positions after T respectively for Fo and Fe (slightly before the middle of F3 and slightly before the middle of F4) are SF6 of F3 and SF6 of F4. Therefore, R1 is included in those SF6. Similarly, the SF 60 closest to the position of every T (slightly after the middle of F5 and F6, the beginning of F9 and F10, slightly before the middle of F11 and F12, etc.) is SF8, F9 and F9 of F5 and F6. SF1 of F10, SF6 of F12, and SF6 of F12, etc., and R1 is included in those SF60. In this example, the result does not include R1 in f4 (F7, F8).

<Reset operation>
Next, with reference to FIGS. 17 to 19, SF 60 drive waveforms including various reset operations applied to the configuration examples of the drive sequence of the field 50 (FIGS. 5 to 16) in each of the above-described embodiments. An example of the configuration will be described.

  As described above, in accordance with the period of the unit time (T), the SF 60 (first reset SF) to be included in the field 50 and including the first reset operation (R1) is determined, and further, the first reset is performed. In order to reduce the reset discharge due to the operation (R1), the second reset operation (R2) is executed (or selectable) with the other SF60.

  In the first reset operation (R1) in the SF 60, for the operation of the reset period 71 including the first reset operation (R1) from the drive circuit to the electrode group (mainly the X electrode 31 and the Y electrode 32) of the PDP 10. The drive waveform (reset waveform) is applied. As a result, a reset discharge for charge writing and adjustment is generated in all cells that are not related to the lighted cell (ON cell) and the non-lighted cell (OFF cell) in the immediately preceding SF 60 in the display area.

  In the second reset operation (R2) in the SF 60, for the operation of the reset period 71 including the second reset operation (R2) from the drive circuit to the electrode group (mainly the X electrode 31 and the Y electrode 32) of the PDP 10. The drive waveform (reset waveform) is applied. As a result, a reset discharge for charge adjustment is generated only in the cell (ON cell) lit in the immediately preceding SF in the display area.

<1-R1-1>
In FIG. 17, a driving waveform example (first configuration) of the SF 60 including the first reset operation (R1), which is applied to the first embodiment, and the subsequent second reset operation (R2). The drive waveform example of SF60 including is shown. This is a case where an obtuse wave (gradient wave) is used as the reset waveform of the first reset operation (R1) in the 1f: 1F driving method (R1-1). PA, PX, and PY are drive waveforms for the address electrode 33, the X electrode 31, and the Y electrode 32.

  In the reset period 71 including the reset waveform of the first reset operation (R1), a first period 711 and a second period 712 are provided. The charge write waveform (51, 61) in the first period 711 and the charge adjustment waveform (52, 62) in the second period 712 are applied to the display electrode pairs (31, 32) of all cells of the relevant SF60. To do. The address electrode 33 is set to a reference potential. The charge writing waveforms in the first period 711 are a positive blunt wave 61 of the Y electrode 32 and a negative blunt wave 51 of the X electrode 31. The charge adjustment waveform in the second period 712 is a negative blunt wave 62 of the Y electrode 32 and a positive voltage 52 of the X electrode 31. As a result, a reset discharge is generated in the discharge gap of the display electrode pairs (31, 32) of all the cells. The charge state of the cell is made uniform and adjusted by the reset discharge.

  In the next address period 72, the address discharge is performed in the selected cell by applying the scan pulse 63 (X electrode 31 is voltage 52) to the target Y electrode 32 and the address pulse 41 to the address electrode 33 according to the display data. generate. In the next sustain period 73, the cell selected in the address period 72 is applied to all the display electrode pairs (31, 32) by applying the sustain pulse pair (54, 64) whose polarity is alternately inverted (voltage: Vs). The sustain discharge is generated the number of times corresponding to the weighting of the SF 60.

<1-R2>
In FIG. 17, in the drive waveform of SF 60 including the second reset operation (R2), the reset period 71 has a first period 711 and a second period 712. The waveform (65) in the first period 711 and the charge adjustment waveform (52, 66) in the second period 712 are applied to the display electrode pairs (31, 32) of all cells of the relevant SF60. The address electrode 33 is set to a reference potential. The charge write waveform in the first period 711 is a positive voltage (voltage clamp waveform, Vr = Vs) 65 of the Y electrode 32. The charge adjustment waveform in the second period 712 is a descending waveform 66 of the Y electrode 32 and a positive voltage 52 of the X electrode 31. The peak value of the voltage (Vr) 65 of the Y electrode 32 is the same as the peak value (Vs) of the sustain pulse 64 in the sustain period 73 of the immediately preceding SF 60. The falling waveform 66 is a waveform that drops from the voltage (Vr) 65 to a predetermined negative voltage. As a result, reset discharge occurs only in the ON cell.

  As an effect of the second reset operation (R2), the reset discharge, particularly the charge write discharge like the first reset operation (R1) is omitted depending on the ON cell / OFF cell state. Light emission as background luminance is suppressed.

<1-R1-2>
FIG. 18 shows an example of the driving waveform of the SF 60 including the first reset operation (R1) (second configuration) and the example of the driving waveform of the SF 60 including the second reset operation (R2) that follows. . This is a case where a rectangular wave is used as the waveform of the first reset operation (R1) in the 1f: 1F driving method (R1-2).

  In the reset period 71 including the reset waveform of the first reset operation (R1), the charge write waveform (56, 67) in the first period 711 is applied to the display electrode pairs (31, 32) of all cells of the corresponding SF 60. Applied (set to the reference potential in the second period 712). The address electrode 33 is set to a reference potential. The charge writing waveform in the first period 711 is a positive rectangular wave 67 of the Y electrode 32 and a negative rectangular wave 56 of the X electrode 31. As a result, a reset discharge is generated in the discharge gap of the display electrode pairs (31, 32) of all the cells. The charge state of the cell is made uniform and adjusted by the reset discharge. The operations in the subsequent address period 72 and the sustain period 73 and the operation of the SF 60 including R2 are the same as those in FIG. The reset discharge in the second configuration (R1-2) has a slightly stronger light emission and reset effect than the reset discharge in the first configuration (R1-1).

<2-R1-1>
In FIG. 19, an example of the driving waveform of SF 60 including the first reset operation (R1) and the example of the driving waveform of SF 60 including the second reset operation (R2) that is applied to the second embodiment. Show. In the 1f: 2F driving method in which the odd / even lines (Lo, Le) are alternately driven in the odd / even field 50 (Fo, Fe), when the obtuse wave is used as the waveform of the first reset operation (R1) (R1-1) It is. In particular, the waveform at the time of driving display in the odd field 50 (Fo) is shown. PXo, PYo, PXe, and PYe are waveforms for the adjacent odd X electrode 31 (Xo), odd Y electrode 32 (Yo), even X electrode 31 (Xe), and even Y electrode 32 (Ye). For the sake of clarity, corresponding lines (Lo, Le) are shown between these electrode application waveforms. Sp indicates a pair (sustain pair) that generates a sustain discharge.

  At the time of Fo drive display, in the reset period 71, the charge writing waveform (51, 61) is applied to the display electrode pair (31, 32) of the odd line (Lo) in the first period 711. In the second period 712, the charge adjustment waveform (52, 62) is applied to the display electrode pair (31, 32). As a result, reset discharge is generated in all cells of all odd lines (Lo) (reset discharge is also generated on the even line (Le) side). The subsequent operation in the address period 72 is substantially the same as that in FIG. The odd line (Lo) group is addressed in the first half and second half of the address period 72. The subsequent operation in the sustain period 73 is substantially the same as that in FIG. Sustain discharge is generated by applying a sustain pulse pair (54, 64) in which an odd line (Lo) to be driven is sp, and light emission is displayed. The reverse even line (Le) side does not sustain discharge due to the same phase. The subsequent operation of the SF 60 including R2 is substantially the same as FIG. In the reset period 71, the waveform (65) is applied to the display electrode pair (31, 32) of the odd line (Lo) in the first period 711. In the second period 712, the charge adjustment waveform (52, 66) is applied to the display electrode pair (31, 32). As a result, reset discharge is generated in the ON cells of all odd lines (Lo). The operations in the subsequent address period 72 and sustain period 73 are the same. At the drive display of the even field 50 (Fe), since the drive target line is switched to the even line (Le), the address target and sp are switched in the waveform as in FIG. Further, in the case of a configuration example (R1-2) using a rectangular wave instead of an obtuse wave as the reset waveform, the waveform is similar to that in FIG.

<Others>
Other possible configurations are as follows, for example. Although the number (m) of SFs 60 constituting each field 50 is eight, m may vary for each field 50. In addition, although the case where the length of each SF 60 in each field 50 is constant has been shown, this length may vary from field 50 to field 50. In those cases, there is no problem because the first reset position and the SF 60 are determined by the unit time (T) independent of them. Further, when the SF 60 arrangement configuration is changed (FA2), although not a general technique, a method of rearranging a plurality of SF 60 (weighting) in the field 50 may be used.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  The present invention is applicable to a PDP device.

Claims (14)

A field corresponding to a display region and a period of a plasma display panel in which a display cell group is formed by an electrode group is configured by a plurality of subfields divided in time, and the subfield is reset for charge adjustment. A period of time, an address period for selecting a lighting target cell according to display data, and a sustain period for lighting the selected cell by sustain discharge, and a combination of lighting / non-lighting in a plurality of subfields of the field A plasma display panel driving method for displaying a moving image of
A unit time (T) that is longer than one field and shorter than two fields independent of the field and subfield is defined,
In the driving of the plurality of fields, each timing of the unit time (T), it the first type of sub-fields near the first reset operation (R1) is provided,
During the period of the first reset operation (R1) in the first type subfield, all cells in the display area of the plasma display panel are reset regardless of the presence or absence of the sustain discharge in the immediately preceding subfield. A plasma display panel driving method, wherein a first driving waveform for generating discharge is applied to the electrode group. The plasma display panel driving method according to claim 1,
In the driving of a plurality of said fields, for each of the field, even if the arrangement change of a plurality of sub-fields there in the field, plasma display and controls using the same unit time (T) Panel driving method. The plasma display panel driving method according to claim 1,
Providing a second reset operation (R2) in a second type of subfield other than the first type of subfield providing the first reset operation (R1);
In the period of the second reset operation (R2) in the second type subfield, only the ON cells in the sustain discharge state in the immediately preceding subfield among all the cells in the display area of the plasma display panel are targeted. A plasma display panel driving method, wherein a second driving waveform for generating a reset discharge is applied to the electrode group. The plasma display panel driving method according to claim 1,
A plasma display panel driving method characterized in that an obtuse waveform whose voltage changes gradually is used as the first driving waveform in the first reset operation (R1). The plasma display panel driving method according to claim 1,
A plasma display panel driving method characterized in that a rectangular waveform whose voltage changes sharply is used as the first driving waveform in the first reset operation (R1). A field corresponding to a display region and a period of a plasma display panel in which a display cell group is formed by an electrode group is configured by a plurality of subfields divided in time, and the subfield is reset for charge adjustment. A period of time, an address period for selecting a lighting target cell according to display data, and a sustain period for lighting the selected cell by sustain discharge, and a combination of lighting / non-lighting in a plurality of subfields of the field A plasma display panel driving method for displaying a moving image of
The display line group of the display area is driven in a time-sharing manner so as to form one image frame by two fields,
A unit time (T) that is longer than 1 field and shorter than 2 fields in terms of time-division driven field units independent of the field and subfield is defined,
In the driving of a plurality of said fields, a field units the time-division driving, each time the unit time (T), it the first type of sub-field close, provided the first reset operation,
During the period of the first reset operation (R1) in the first type subfield, all cells in the display area of the plasma display panel are reset regardless of the presence or absence of the sustain discharge in the immediately preceding subfield. A plasma display panel driving method, wherein a first driving waveform for generating discharge is applied to the electrode group. The plasma display panel driving method according to claim 6, wherein
In the driving of a plurality of said fields, for each of the field, even if the arrangement change of a plurality of sub-fields there in the field, plasma display and controls using the same unit time (T) Panel driving method. The plasma display panel driving method according to claim 6, wherein
Providing a second reset operation (R2) in a second type of subfield other than the first type of subfield providing the first reset operation (R1);
In the period of the second reset operation (R2) in the second type subfield, only the ON cells in the sustain discharge state in the immediately preceding subfield among all the cells in the display area of the plasma display panel are targeted. A plasma display panel driving method, wherein a second driving waveform for generating a reset discharge is applied to the electrode group. The plasma display panel driving method according to claim 6, wherein
A plasma display panel driving method characterized in that an obtuse waveform whose voltage changes gradually is used as the first driving waveform in the first reset operation (R1). The plasma display panel driving method according to claim 6, wherein
A plasma display panel driving method characterized in that a rectangular waveform whose voltage changes sharply is used as the first driving waveform in the first reset operation (R1). A plasma display panel having a display cell group constituted by an electrode group; and a circuit unit for driving and controlling the electrode group, and a field corresponding to a display region and a period of the plasma display panel is divided in time. The subfield includes a reset period for charge adjustment, an address period for selecting a lighting target cell according to display data, and a sustain period for lighting the selected cell by sustain discharge. A plasma display device that displays a multi-gradation moving image by a combination of lighting / non-lighting of a plurality of subfields of the field,
In the circuit part,
A unit time (T) that is longer than one field and shorter than two fields independent of the field and subfield is defined,
In the driving of the plurality of fields, each timing of the unit time (T), it the first type of sub-fields near the first reset operation (R1) is provided,
During the period of the first reset operation (R1) in the first type subfield, all cells in the display area of the plasma display panel are reset regardless of the presence or absence of the sustain discharge in the immediately preceding subfield. A plasma display apparatus, wherein a first drive waveform for generating discharge is applied to the electrode group. The plasma display device according to claim 11 , wherein
Providing a second reset operation (R2) in a second type of subfield other than the first type of subfield providing the first reset operation (R1);
In the period of the second reset operation (R2) in the second type subfield, only the ON cells in the sustain discharge state in the immediately preceding subfield among all the cells in the display area of the plasma display panel are targeted. A plasma display apparatus, wherein a second drive waveform for generating a reset discharge is applied to the electrode group. A plasma display panel having a display cell group constituted by an electrode group; and a circuit unit for driving and controlling the electrode group, and a field corresponding to a display region and a period of the plasma display panel is divided in time. The subfield includes a reset period for charge adjustment, an address period for selecting a lighting target cell according to display data, and a sustain period for lighting the selected cell by sustain discharge. A plasma display device that displays a multi-gradation moving image by a combination of lighting / non-lighting of a plurality of subfields of the field,
The display line group of the display area is driven in a time-sharing manner so as to form one image frame by two fields,
In the circuit part,
A unit time (T) that is longer than 1 field and shorter than 2 fields in terms of time-division driven field units independent of the field and subfield is defined,
In the driving of a plurality of said fields, a field units the time-division driving, each time the unit time (T), the first type of sub-field close, provided the first reset operation (R1) ,
During the period of the first reset operation (R1) in the first type subfield, all cells in the display area of the plasma display panel are reset regardless of the presence or absence of the sustain discharge in the immediately preceding subfield. A plasma display apparatus, wherein a first drive waveform for generating discharge is applied to the electrode group. The plasma display device according to claim 13 , wherein
Providing a second reset operation (R2) in a second type of subfield other than the first type of subfield providing the first reset operation (R1);
In the period of the second reset operation (R2) in the second type subfield, only the ON cells in the sustain discharge state in the immediately preceding subfield among all the cells in the display area of the plasma display panel are targeted. A plasma display apparatus, wherein a second drive waveform for generating a reset discharge is applied to the electrode group.

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