JP4922645B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device, and more particularly, to a technique effective when applied to a semiconductor device that measures real time or performs an operation dependent on real time without providing a storage battery for time measurement.

For example, Patent Documents 1 and 2 disclose a method of measuring time using a discharge time with time of charge written in an EEPROM or the like. According to this, it is possible to measure time even without a watch battery or the like, and it is possible to reduce the size of the apparatus. In Patent Document 3, an EEPROM or the like in which an ONO (oxide-nitride-oxide structure) layer is formed between a floating gate and a control gate is used, and written charges move with time in the ONO layer. A method for measuring time by utilizing the change in transmission characteristics of the channel region as it is performed is shown. According to this, in addition to the need for a battery or the like, time measurement can be performed without being affected by the external temperature or the like.
Japanese Patent Laid-Open No. 2002-246887 JP-A-9-127271 JP-T-2004-534938

  In recent years, the use of a small semiconductor device called an IC tag has been advanced. The IC tag is also called RFID (Radio Frequency Identification), and the simplest IC tag has a wireless communication function and a data recording function. The IC tag is mainly used for storing information such as the attribute information and distribution route of a product to which the IC tag is attached as a technique that replaces the conventionally used barcode.

  The IC tag wirelessly exchanges data with a dedicated reading device. The distance between the IC tag and the reading device varies from several millimeters to several meters depending on the application, such as when the IC tag is attached to an individual product, or when attached to a container that stores a product group. In general, in order to perform long-distance communication wirelessly, the size of an antenna mounted on an IC tag and available power must be increased. If the size of the antenna is increased, the size of the IC tag naturally increases. If a unique battery is provided inside the IC tag in order to use a large amount of power, the size of the IC tag also increases.

  For example, if the IC tag is attached to a large and fixed size object such as a cargo container, a certain increase in size will not hinder practical use. However, if the target to which the IC tag is to be attached is a product of various shapes placed in a mass retailer or the like, the IC tag must be compatible with all these shapes, so it is inevitably attached to the product of the smallest size. It must be of a size and shape that can be attached. In other words, it can be said that the IC tag that is assumed to be used for general purposes is preferably downsized.

  The dominant factors in determining the size of the IC tag are the size of the antenna and the size of the built-in battery. To reduce the size of the IC tag, the antenna size must be reduced and the battery inside. It is necessary not to prepare. If the size of the antenna is reduced, the communicable distance is shortened. However, with the development of technology, a practical level communication distance can be secured even with a somewhat small antenna. As for the non-mounting of the battery, a technique of supplying power from the reading device via the antenna is available, and it can be said that the practicality has been secured.

  One of the uses of IC tags is distribution management. An IC tag is affixed to an article shipped from a factory, and a history of which truck's loading platform is carried from the factory to the warehouse is recorded on the IC tag. Since the central information management server collects and manages the IC tag information read from the terminals installed at each distribution checkpoint, the identity of the article can be displayed even at the end of distribution. This means that safety can be confirmed in applications where it is important to manage the route from production to consumers, such as fresh foods and medicines, and as a result, the consumer's sense of security can be enhanced.

  A general purpose IC tag has a merit that it is a small size, but in that case, it is difficult to provide a storage battery inside. One solution is to increase the number of distribution checkpoints and perform more precise time management of goods at a central information management server. However, the problem with this method is that it is impossible to perform time management of articles once out of the management of the information management server.

  On the other hand, there is a case where it is desired to measure time internally in an IC card (also called a Smartcard in the US and Europe) used for higher security than an IC tag. The IC card has high encryption function and tamper resistance so that third parties cannot control information illegally so that electronic payment can be made offline. Security is realized. Here, tamper resistance refers to various attacks and analyzes from the outside, such as physical modification that causes inconvenience in the operation of the IC chip, and decryption by power consumption analysis (PowerAnalysis). Says that technology to make it difficult is implemented.

  There are various types of attacks that must be considered in order to provide tamper resistance, but in order to make attacks difficult, the real time that an attacker or analyst can spend on analysis should be as short as possible. It is effective. For example, a credit card, which is an application destination of a general IC card, has an expiration date. However, it is effective to prevent the analysis of an IC chip even after the expiration date, in order to improve safety. It is believed that there is. That is, it is desired to manage the real time also in the IC card.

  Since most of current IC cards do not have a clock function, it can be said that there is a problem similar to the above-described IC tag even in real-time management of the IC card. As long as the IC card is used online, the central information management server can perform time management, but once an IC card that has been out of the management of the information management server is used offline, the time management expected is performed. It becomes difficult.

  Thus, if the battery is not provided inside the IC tag or the IC card, there is a problem that the elapsed time cannot be measured by itself. If the IC tag or IC card is completely under system control, a similar function can be realized by periodically rewriting the time information inside the IC tag or IC card. If you go outside, you may not be able to manage time information correctly. The same applies to other small microcomputers as well as IC tags and IC cards.

  Accordingly, one of the objects of the present invention is to provide a semiconductor device capable of measuring an elapsed time or switching a process according to the elapsed time without having an internal battery for time measurement. The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  The semiconductor device of the present invention uses the characteristics of a variable resistance element that transitions from one state of a high resistance state and a low resistance state to the other state when heat is supplied for a first time, Various processes are switched according to the elapsed time. In other words, the first time can be measured by starting the supply of heat when the variable resistance element is in one state and then transitioning to the other state as a trigger. Can be switched.

  An example of such a variable resistance element is a phase change element. In the phase change element, when the supply of heat is started in the amorphous state (high resistance state), the state rapidly changes to the crystalline state (low resistance state) when the first time elapses. Therefore, various processes can be switched using the time when the crystal state is changed to a trigger.

  More specifically, for example, a resistance dividing circuit is configured by a phase change element and a resistance element, and the transistor is controlled by a voltage-divided output thereby, so that a high power supply voltage and a low power supply voltage are output from the output terminal of the transistor. A configuration that outputs two types can be given. In this case, if, for example, a circuit that operates only at a high power supply voltage and a circuit that operates at a low power supply voltage are connected to the output terminal of the transistor, the circuit that operates only at the high power supply voltage is inactivated when a predetermined time elapses. You can That is, when the phase change element is first changed to the amorphous state and then the current is continuously passed through the resistance dividing circuit for a certain period of time, the phase change element changes to the crystalline state, and accordingly, the output of the transistor is lowered from the high power supply voltage. Transition to power supply voltage. Then, the circuit that operates only with the high power supply voltage becomes inactive, and thereafter, only the circuit that operates with the low power supply voltage operates.

  In addition, when the above-described circuit that operates only with a high power supply voltage is used as a reset circuit, for example, such a semiconductor device is applied to an IC card or the like, security can be improved. That is, the reset circuit operates in response to the reset signal input to the IC card and the high power supply voltage from the transistor, and this reset circuit keeps, for example, a microcomputer or the like that is a circuit operating at the low power supply voltage in a reset state. Since this reset state continues until the phase change element transitions to the crystalline state, it takes a certain amount of time until the reset state is released.For example, while the reset signal is repeatedly input from the outside, the internal movement of the microcomputer is controlled. It is difficult to perform an attack that is statistically analyzed in a short time. In addition, each time a reset signal is repeatedly input, a current for initialization (amorphization) is supplied to the phase change element. The degree of becomes stronger (higher resistance state). Then, since it takes time to release the reset state (that is, crystallization), it becomes more difficult to attack from the outside.

  To briefly explain the effects obtained by typical inventions among inventions disclosed in the present application, even if an internal battery for time measurement is not provided, the elapsed time is measured or the process is switched according to the elapsed time. Can be done.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted. Further, in the following embodiments, when necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments, but they are not irrelevant to each other unless otherwise specified. Is related to some or all of the other modifications, details, supplementary explanations, and the like.

(Embodiment 1)
The semiconductor device according to the first embodiment is a material whose resistance value is changed by heat, and is often used in a phase change memory (PCM) for time measurement of a phase change film made of a chalcogenide element. To use. Phase change memory means that a large current is passed through the phase change film, and once the temperature is raised, it changes from the crystalline state to the amorphous state, and then the current is cut off to rapidly change the amorphous state. The memory element utilizes the fact that the crystal state is maintained when the temperature is gradually lowered while being maintained.

  In general, since the resistance value of the phase change film in the crystalline state is lower than the resistance value in the amorphous state, if a voltage is applied to both ends of the phase change film, the two states can be discriminated based on the magnitude of the flowing current value. In the phase change memory, these two states are regarded as ‘0’ or ‘1’ and 1-bit information is recorded. If the voltage applied at the time of reading is low enough to prevent the phase change film from causing a phase change, repeated reading can be performed.

  As for the phase change film, experimental results using chalcogenide materials that are also used in phase change recording media such as CD-RW and DVD-RAM are well known. Since chalcogenide is crystallized by its own heat storage, it changes to a low resistance state over time. In the case of using as a memory element, it is one guideline to retain data for 10 years, and it is necessary to make it amorphous so that it can be achieved.

  There are three main parameters for promoting the amorphization: the magnitude of the current when the temperature is raised, the time during which the current is passed, and the cooling method. In other words, the current is large (although there is a limit), the longer the current flows, the greater the degree of amorphization, and the quicker the cooling, the easier it is to maintain the amorphous state and the longer period of data retention. It becomes possible.

  The semiconductor device (time measuring device) according to the first embodiment uses, for example, a resistance element using chalcogenide to form a resistance dividing circuit for input voltage, and the voltage applied to the internal circuit depends on time. It is something to change. Hereinafter, the characteristics of the phase change memory will be described, and a configuration example and an operation example of the time measuring device using the characteristics will be described in detail.

  FIG. 1 shows a simple circuit example of a phase change memory. The power supply line 001 is connected to an element 002 having a phase change film sandwiched between electrodes (hereinafter, referred to as a phase change element). Further, a transistor 004 is used to connect the terminal 005 to the terminal 005 using the voltage of the gate 003. Conduction control is performed. Here, the phase change element 002 is indicated by a symbol of a variable resistance element, and the reason will be described later.

  The phase change memory causes amorphization by rapidly increasing the temperature. The temperature rise is generated by opening the gate 003 of the transistor 004 and applying a high voltage to the power supply line 001 rapidly. At this time, the phase change element 002 is locally heated to several hundred degrees, and amorphization occurs. If the phase change element 002 is further cooled rapidly by dropping the voltage of the power supply line 001 to the ground level (ground level) or closing the gate 003, the phase change element 002 maintains an amorphous state. Alternatively, when the voltage of the power supply line 001 is lowered to some extent and the phase change element 002 is gradually cooled, the phase change element 002 is crystallized. Since the phase change element 002 has a large electric resistance in the amorphous state and a small electric resistance in the crystalline state, it applies a small voltage for reading to the power supply line 001, opens the gate 003 of the transistor 004, and is connected to the terminal 005. The current detection circuit determines whether phase change element 002 is in an amorphous state or a crystalline state.

  FIG. 2 shows a structural example of the phase change element 002. The phase change film 22 is sandwiched between electrodes 21 and 24, and an insulating film 23 is placed between the two electrodes. These are formed on the semiconductor substrate 25. When a voltage is applied between the electrodes 21 and 24 when changing the state of the phase change element 002, a current flows inside the phase change film 22. Joule heat is generated by the electrical resistance of the phase change film 22 at this time.

  FIG. 3 shows changes in electrical resistance 100 of phase change element 002 in the amorphous state and electrical resistance 101 of phase change element 002 in the crystalline state. The electrical resistance 100 in the amorphous state and the electrical resistance 101 in the crystalline state can be configured so as to have a sufficiently large difference by selecting an appropriate material. Further, FIG. 3 shows how the material characteristics deteriorate due to repeated writing and erasing. As the number of times of writing and erasing increases, it becomes difficult to distinguish between the high resistance state and the low resistance state due to the deterioration. To go.

  FIG. 4 shows the change in electrical resistance when a sufficient voltage is applied to the phase change element 002 in the amorphous state for the progress of crystallization. As shown in FIG. 4, the resistance value changes according to the state of the phase change element 002, but the change suddenly occurs at a certain time. In other words, the phase change element 002 is a variable resistance element that controls the current to flow and can change the resistance value like a switch in a certain time (first time) after the current starts flowing. I can say that.

  FIG. 5 is a circuit diagram showing a configuration example of the semiconductor device according to the first embodiment of the present invention. The semiconductor device shown in FIG. 5 is an example in which a level shift circuit by resistance division is configured by utilizing the property of the phase change element described in FIGS. 1 to 4 as a variable resistance element. In FIG. 5, when the voltage V1 is applied to the node 30 and the voltage −V3 is applied to the node 34, the resistance value of the resistance element 31 is R1, and the resistance value of the variable resistance element 33 (phase change element 002) is R2. The current I flowing through the resistance element 31 can be expressed as I = (V1 + V3) / (R1 + R2) when the gate current of the transistor 35 is ignored. Therefore, the voltage V2 at the node 32 is V2 = V1−R1 × I = (R2V1−R1V3) / (R1 + R2).

  That is, if the resistance value R2 of the variable resistance element 33 is in a high resistance state, the voltage V2 at the node 32 is close to V1, but a certain time (first time) elapses in this state, as shown in FIG. When shifting from the high resistance state to the low resistance state, the voltage V2 at the node 32 decreases accordingly. Therefore, for example, if a circuit using the terminal 36 as a power source is connected inside, the transistor 35 that was initially turned on is turned off after a certain period of time due to the crystallization of the phase change element constituting the variable resistance element 33. Therefore, a circuit in which the power supply is turned on / off depending on time can be configured. Note that the resistance divider circuit shown in FIG. 5 is an example, and the switching function according to time can be variously selected by appropriately selecting the installation location of the variable resistive element using the resistor divider circuit having a more complicated mechanism. Needless to say, it can be realized with this.

  As described above, by using the semiconductor device of the first embodiment, it is possible to measure the elapsed time (first time) without having a battery for time measurement inside. Then, when a certain time (first time) elapses, a process is switched according to the elapsed time by generating a trigger, for example, by a switch switching function as shown in FIG. It becomes possible. In addition, since the resistance value change due to heat is used, in some cases, it is possible to inspect whether or not appropriate temperature management has been performed in the distribution channel.

(Embodiment 2)
In the first embodiment described above, an example of a resistance divider circuit using a phase change element as a variable resistance element has been described. In the resistance dividing circuit as described above, the resistance value of the variable resistance element changes steeply so as to instantaneously switch ON / OFF of the transistor 35 in FIG. 5 due to the characteristics of the phase change element as shown in FIG. In the second embodiment, a device configuration for finely controlling the time (first time) of the variable resistance element will be described.

  In a DVD-RAM, data is recorded using a phase change material, as in a phase change memory. Data can be written / erased by heating a minute area of a disk made of a phase change material to a high temperature with a laser and then cooling it. In the case of DVD-RAM, since the disk is rotating, cooling is performed quickly. However, the phase change element does not move on the IC chip, and heat storage due to overheating occurs for a while. . Due to this heat storage, crystallization of the phase change element proceeds, and at a certain point, the state rapidly changes to a low resistance state. The semiconductor device according to the second embodiment is configured so that more heat is stored in the phase change element itself by increasing the amount of the phase change material in the phase change element as much as possible so that heat can be stored more easily. To do.

  Each of FIGS. 6 to 8 is a cross-sectional view showing a configuration example of the phase change element included in the semiconductor device according to the second embodiment of the present invention. In the phase change element of FIG. 6, the phase change film 22 a serving as a member is configured to be larger than the phase change film 22 of FIG. 2, but the most current path between the electrodes 21 and 24 (which is the shortest distance). The size of the path 26 that is likely to be equal is the same. That is, while the resistance value change due to the phase change is substantially the same, the region where heat is stored is configured to be large. On the other hand, the phase change film 22b of FIG. 7 has the same size as the phase change film 22 of FIG. 2, but surrounds the periphery of the phase change film 22b with a material 27 that easily stores heat, such as metal. Thus, the crystallization is promptly advanced. Thus, by configuring the phase change element used in the semiconductor device as shown in FIG. 6 or FIG. 7, the speed at which crystallization proceeds can be controlled.

  FIG. 8 shows a configuration example using a plurality of phase change elements formed so that the size of the phase change film or the size of the heat storage material is different for the purpose of heat storage with different degrees of progress of crystallization. . As an example, in FIG. 8, two phase change elements are formed on the semiconductor substrate 25, and the heat storage material 27 a around the phase change film 22 c in one phase change element is used as the periphery of the phase change film 22 c in the other phase change element. The heat storage material 27b is formed larger. In this case, the phase change film 22c surrounded by the heat storage material 27a is crystallized earlier. In this way, by using a plurality of phase change elements and making the time required for each crystallization different, for example, it is possible to configure a circuit in which the operation is switched according to different elapsed times. Here, an example in which the number of phase change elements is at most two has been described, but it is needless to say that more phase change elements can be combined.

  As described above, by using the semiconductor device of the second embodiment, in addition to the effects described in the first embodiment, the elapsed time (first time) can be controlled in more detail. . Further, it is possible to cause the semiconductor device to perform an operation corresponding to each elapsed time using a plurality of different elapsed times.

(Embodiment 3)
In the second embodiment described above, an example in which the time required for crystallization is changed by changing the amount and material of the phase change material constituting the phase change element has been described. In the third embodiment, a plurality of adjacent phase change elements are installed, one phase change element is warmed by heat storage of the plurality of phase change elements, and the crystallization time (first time) is controlled. That is, in general, in the phase change memory, in order to avoid the crystallization from proceeding due to the heat of the adjacent phase change element, the distance between the adjacent phase change memories is increased to some extent as shown in FIG. In the semiconductor device according to the third embodiment, the heat of each other is utilized by reducing the distance between adjacent phase change memories.

  FIG. 10 is a cross-sectional view showing a configuration example of the phase change element included in the semiconductor device according to the third embodiment of the present invention. The semiconductor device of FIG. 10 includes, for example, a phase change element 006, a phase change element 007 adjacent to the phase change element 006, and a phase change element 008 formed at a position sufficiently away from the phase change element 007. In this way, the phase change element groups are arranged with various distance relationships, and these distance relationships are configured to be shortened when it is desired to shorten the time until crystallization. In the example of FIG. 10, based on the crystallization speed of the phase change element 008, the phase change element 006 and the phase change element 007 can set the crystallization speed faster by utilizing the mutual heat. .

  As described above, by using the semiconductor device of the third embodiment, in addition to the effects described in the first embodiment, the elapsed time can be controlled in more detail. Further, it is possible to cause the semiconductor device to perform an operation corresponding to each elapsed time using a plurality of different elapsed times.

(Embodiment 4)
In Embodiments 2 and 3 described above, the time required for crystallization is adjusted by the structure (shape) of the phase change element, but in Embodiment 4, the time required for crystallization by the circuit configuration (first time). Adjust. FIG. 11 is a circuit diagram showing a configuration example of the semiconductor device according to the fourth embodiment of the present invention. The semiconductor device of FIG. 11 includes a pulse generation circuit 009 connected to one end of a phase change element 002, and this pulse generation circuit 009 gives a plurality of different current pulses to the phase change element 002. .

  Since the degree of amorphization of the phase change element 002 depends on the degree of high temperature depending on the magnitude of a given pulse, the amorphization can be achieved by changing the magnitude of the pulse generated by the pulse generation circuit 009. It is possible to control the time until crystallization is performed again later. FIG. 12 is a conceptual diagram illustrating the operation of FIG. As shown in FIG. 12, in general, if the current (applied pulse) flowing between the electrodes 21 and 24 is small, the size of the amorphized portion 28a of the phase change film 22 is small as shown in the left figure. If the current is large, the size of the amorphized portion 28b of the phase change film 22 increases as shown in the right figure. In other words, the smaller the pulse applied by the pulse generation circuit 009, the shorter the time required for crystallization again. According to this property, the time is controlled by adjusting the pulse size.

  FIG. 13 is a circuit diagram showing another configuration example of the semiconductor device according to the fourth embodiment of the present invention. In the semiconductor device shown in FIG. 13, a plurality of phase change elements are arranged in an array, and different voltages (currents) can be applied to the phase change elements when amorphization is performed. That is, phase change element control units 010, 011, 012 and 013 are equivalent to those shown in FIG. 1, and input voltages 010a, 011a, 012a and 013a respectively corresponding to the phase change element control units are different. (Or at least one is different from the others). Therefore, when amorphization is performed, each phase change element control unit 010, 011, 012, 013 has a different time required for subsequent recrystallization.

  In such a state, any one of the phase change element control units 010, 011, 012, 013 is selected by the selection signal lines 10, 11, and a predetermined input voltage is applied to the corresponding phase change element. The internal circuit 014 detects when the phase change element has become low resistance due to recrystallization, and receives this detection signal to perform a desired process. Then, by performing such an operation while sequentially changing the selection of the phase change element control unit by the selection signal lines 10 and 11, it becomes possible to execute a desired process according to each different elapsed time.

  As described above, by using the semiconductor device of the fourth embodiment, in addition to the effects described in the first embodiment, the elapsed time can be set in more detail. Then, it is possible to cause the semiconductor device to perform an operation corresponding to each elapsed time using a plurality of elapsed times set in detail. Further, the circuit as shown in FIG. 13 can be realized with a small area like a general memory array. In particular, in a semiconductor device originally provided with a phase change memory as a memory circuit, the memory array can be diverted. As a result, the area can be further reduced.

  In the description of the first to fourth embodiments described so far, the phase change element is cited as an element accompanied by a change in resistance value due to heat. However, the materials used for the magnetoresistive memory and other similar tendencies have been described. Needless to say, the present invention can be similarly applied even if the materials shown are used.

(Embodiment 5)
The semiconductor devices of the first to fourth embodiments described above provide a basic mechanism for performing various processes according to the elapsed time (in units of the first time) using the characteristics of the phase change element. However, in the fifth embodiment, an example of a semiconductor device that performs more specific processing using this mechanism will be described. FIG. 14 is a circuit diagram showing a configuration example of the semiconductor device according to the fifth embodiment of the present invention. In the semiconductor device shown in FIG. 14, an internal circuit 014 is connected to the voltage output terminal 36 of the resistance dividing circuit shown in FIG. The internal circuit 014 further includes a high voltage operation circuit (first circuit) 015 and a low voltage operation circuit (second circuit) 016.

  In this semiconductor device, a pulse current is first applied to the phase change element constituting the variable resistance element 33 at the time of start-up to make it amorphous and to be in a high resistance state. Thereafter, when a current is continuously passed through the resistance dividing circuit, the voltage of the terminal 36 is initially high due to crystallization of the time-dependent variable resistance element 33. Transition to voltage. Therefore, the high voltage operation circuit 015 operates only for a fixed time determined by the characteristics of the variable resistance element 33 from startup. Therefore, for example, if the high voltage operation circuit 015 has a function of performing initialization (reset operation) of the internal circuit 014, the initialization operation can be performed once at startup. In general, a large amount of power is required for the reset operation. However, when the configuration as shown in FIG. 14 is used, a high power consumption operation is performed only at start-up, and thereafter a low power consumption operation is performed. Is possible.

  FIG. 15 is a flowchart showing an example of the operation of the semiconductor device of FIG. FIG. 16 is an external view showing an example of an IC card to which the semiconductor device of FIG. 14 is applied. FIG. 16 shows a plastic card 200 having a general credit card size, and an IC chip 201 is attached to the plastic card 200. The IC chip 201 is precisely obtained by attaching a metal surface to the surface of the main body of the IC chip, and the metal surface is divided into eight regions as shown in FIG. These eight areas are a power input terminal, an input / output port, a clock signal input terminal, a reset signal input terminal, a programming voltage input terminal, a ground terminal, and two reserved areas, respectively.

  Here, for example, the processing flow of FIG. 15 will be described taking the IC chip 201 of FIG. 16 as an example. First, in the power supply start 1000 of FIG. 15, the ground terminal is grounded and an appropriate voltage is applied to the power input terminal. . After the power supply is started, a reset operation is instructed from the reset signal input terminal (1001), so that the circuit provided in the IC chip 201, for example, as shown in FIG. To make it amorphous and transition to a high resistance state (1002). As a result, the high voltage operation circuit 015 included in the internal circuit 014 of FIG. 14 starts a reset operation (1003). Thereafter, when a certain time elapses and the phase change element transitions to the low resistance state, the high voltage operation circuit 015 stops the operation, that is, the reset operation (1004). Thereafter, the operation by only the low voltage operation circuit 016 is performed (1005). After the necessary processing is completed, resetting is again performed according to a reset operation instruction (1007) or power supply is terminated (1006), and use of the IC chip 201 is terminated.

  In FIG. 14, the voltage applied to the internal circuit 014 by switching the resistance element 31 and the variable resistance element 33 or switching the conductivity type of the transistor (for example, n-type and p-type) is It is also possible to make a transition from a low voltage to a high voltage while shifting from a high voltage to a low voltage. In this case, for example, as in the previous example, if the high voltage operation circuit 015 has a function of resetting the internal circuit 014, the function of limiting the operation time of the apparatus can be realized. At this time, if the phase change element constituting the variable resistance element 33 is increased in resistance in a timely manner, the operation time limit can be appropriately extended.

  FIG. 17 is a block diagram showing a configuration example of the IC chip 201 shown in FIG. In FIG. 17, among the eight terminals included in the IC chip 201, a power input terminal 202, a ground terminal 203, an input / output port 206, a clock signal input terminal 205, and a reset signal input terminal 204 are wired internally. The configuration includes a level shifter (third circuit) 40, a high voltage operation reset circuit 015 and a low voltage operation microcomputer 016 connected to the output terminal 36. The microcomputer 016 includes, for example, a CPU, peripheral logic circuits (SYSCTRL, RNG, TIMER, I / O), memory devices (ROM, PCM, RAM, CRAM) and the like. Among these, PCM is a phase change memory. Although the terminal 36 is directly connected to the microcomputer 016 here, an overcurrent prevention device may be attached to the input of the microcomputer 016 so that the terminal 36 is not damaged by being applied with a high voltage. As an example of a simple overcurrent prevention device, a method is known in which a diode element is used to prevent a voltage exceeding a certain level from reaching the inside.

  The level shifter (third circuit) 40 has a circuit configuration as shown in FIG. 18, for example. The level shifter 40 shown in FIG. 18 has a configuration in which an initialization circuit (fourth circuit) 37 connected to the reset signal input terminal 204 is added to the circuit of FIG. When the initialization circuit 37 receives the reset signal from the reset signal input terminal 204, the initialization circuit 37 uses the pulse generation circuit 009 a included in the initialization circuit 37 as a variable resistance element 33 using a phase change element, and outputs a current pulse. give. As a result, the phase change element becomes amorphous and enters a high resistance state. Thereafter, the initialization circuit 37 operates in the same manner as the constant voltage circuit. As a result, after the voltage of the terminal 36 becomes a high voltage as an initial state, the variable resistance element 33 enters a low resistance state after a predetermined time has elapsed, and then shifts to a low voltage.

  Therefore, in the configuration example of FIG. 17, the level shifter 40 receives the reset signal from the reset input terminal 204 and outputs a high voltage to the terminal 36 in the initial state, whereby the reset circuit 015 operates (activates). The reset circuit 015 initializes a part or the whole of the microcomputer 016. Thereafter, after a predetermined time has elapsed, the level shifter 40 outputs a low voltage to the terminal 36, and as a result, the reset circuit 015 does not operate (becomes inactive). The microcomputer 016 released from the reset state performs a predetermined operation. At this time, a reset completion flag may be set by a register or the like so that the microcomputer 016 does not operate unless the reset circuit 015 performs the reset operation correctly.

  In FIG. 15, when the resistance of the variable resistance element is increased (1002), that is, when the phase change film is amorphized, the phase change film is first crystallized and then amorphized, and the crystallization is not performed. There is a method of amorphization. The former is suitable for performing a normal reset operation, but if the latter is performed, a special security effect can be obtained.

  That is, when analyzing an IC chip, an attacker / analyzer may repeat a plurality of reset operations within a short period of time. This is a behavior seen when, for example, an attempt is made to search all possible combinations of passwords automatically at a high speed in order to analyze the password of the IC chip. However, when the configuration as shown in FIG. 17 is used, a time determined by the variable resistance element 33 is required after the reset input is generated until the reset operation is completed (the reset circuit 015 releases the reset state). Attackers / analysts need to acquire data after the reset operation is completed, but if it takes time to complete this reset operation, data acquisition is performed while repeatedly performing reset input in a short period of time. It is impossible to do this.

  Further, if such reset input is repeated many times, current is supplied by the pulse generation circuit 009a of FIG. 18 each time, and the amorphized region of the phase change element is expanded accordingly. Time (cancellation of reset state) takes time, and eventually locks up. Therefore, the IC chip can be surely protected from this type of attacker. Here, for the purpose of defense from attackers, the configuration as shown in FIGS. 17 and 18 realizes a function that the reset state is not released until a predetermined time determined by the phase change element has elapsed. For the same purpose, the configuration of FIGS. 17 and 18 can be modified to realize a function that the reset circuit does not operate unless a certain time has elapsed since the power supply.

  In addition, the configuration as shown in FIG. 17 ensures that the necessary power is supplied to the power input terminal during the real time from when the reset signal is supplied to the reset signal input terminal until the reset operation is completed. It can also be used as a function. That is, unless necessary power is continuously supplied to the power input terminal for a certain period of time, the phase change element is not recrystallized and the reset operation is not completed. In addition, even for an attacker who tries to adversely affect the internal circuit by changing the power supply voltage suddenly, the abrupt change in voltage causes the phase change element to become amorphous, and the internal circuit transitions to the reset state. Therefore, an effective attack prevention effect can be provided.

  As described above, by using the semiconductor device according to the fifth embodiment, for example, in an IC card that does not have a battery inside, it is possible to set an elapsed time and perform a desired process according to the elapsed time. Become. Further, by setting the reset period using the characteristics of the phase change element, it is possible to prevent an attack from the outside, and to improve the damper resistance (or confidentiality). Furthermore, by using the characteristics of the phase change element when setting the elapsed time, it is possible to reduce the area as compared with the case where a timer circuit such as a counter is used. In particular, as shown in FIG. If a memory (PCM) is provided, the manufacturing process can be shared. Further, since time is defined by element characteristics, it is impossible to tamper with time by an external attack, and high confidentiality can be realized from this viewpoint. Although an IC card has been described here as an example, it can be similarly applied to an IC tag or the like as a security improvement technique.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  The semiconductor device of the present invention can be widely applied to all semiconductor devices that do not have a battery inside and require real-time measurement or processing that depends on the real time. This technology is useful when applied to semiconductor devices that require security.

It is a figure which shows the simple circuit example of a phase change memory. It is a figure which shows the structural example of a phase change element. It is a figure which shows the mode of a change of the electrical resistance of the phase change element in an amorphous state, and the electrical resistance of the phase change element in a crystalline state. It is a figure which shows the mode of a change of an electrical resistance at the time of continuing applying sufficient voltage for the progress of crystallization to the phase change element in an amorphous state. 1 is a circuit diagram showing a configuration example of a semiconductor device according to a first embodiment of the present invention. In the semiconductor device by Embodiment 2 of this invention, it is sectional drawing which shows the structural example of the phase change element contained in it. In the semiconductor device by Embodiment 2 of this invention, it is sectional drawing which shows the other structural example of the phase change element contained in it. In the semiconductor device by Embodiment 2 of this invention, it is sectional drawing which shows the other structural example of the phase change element contained in it. It is a figure which shows the general example of arrangement | positioning of several phase change memory. In the semiconductor device by Embodiment 3 of this invention, it is sectional drawing which shows the structural example of the phase change element contained in it. FIG. 10 is a circuit diagram showing a configuration example of a semiconductor device according to a fourth embodiment of the present invention. It is a conceptual diagram explaining the operation | movement of FIG. FIG. 10 is a circuit diagram showing another configuration example of the semiconductor device according to the fourth embodiment of the present invention. FIG. 10 is a circuit diagram showing a configuration example of a semiconductor device according to a fifth embodiment of the present invention. FIG. 15 is a flowchart showing an example of operation of the semiconductor device of FIG. 14. FIG. 15 is an external view showing an example of an IC card to which the semiconductor device of FIG. 14 is applied. FIG. 17 is a block diagram illustrating a configuration example of an IC chip illustrated in FIG. 16. FIG. 18 is a circuit diagram illustrating a configuration example of the level shifter illustrated in FIG. 17.

Explanation of symbols

001 Power line 002 Phase change element 003 Gate 004 Transistor 005 Terminal 006,007,008 Phase change element 009,009a Pulse generation circuit 010 to 013 Phase change element control unit 010a to 013a Input voltage 014 Internal circuit 015 High voltage operation circuit 016 Low Voltage operation circuit 100 Electrical resistance in amorphous state 101 Electrical resistance in crystal state 102 Electrical resistance associated with state transition 200 Plastic card 201 IC chip 202 Power input terminal 203 Ground terminal 204 Reset signal input terminal 205 Clock signal input terminal 206 Input / output port 10 , 11 Selection signal line 21, 24 Electrode 22, 22a-22c Phase change film 23 Insulating film 25 Semiconductor substrate 26 Current passing region 27, 27a, 27b Thermal storage material 28a, 28b Amorphous Regions 30, 32, 34 node 31 resistor element 33 phase change element 35 transistor 36 the output terminal 37 initialization circuit 40 level shifter

Claims (9)

A phase change element that transitions from an amorphous state to a crystalline state when heat is supplied for a first time;
Means for transitioning the phase change element to the amorphous state;
Using the first time as a unit by causing a current to flow through the phase change element that has transitioned to the amorphous state to generate heat, and then triggering when the phase change element transitions to the crystalline state And a means for switching various processes. The semiconductor device according to claim 1 ,
The means for switching the various processes is
A resistive divider circuit that outputs a voltage divided by the phase change element and the resistive element;
A transistor whose driving capability is adjusted according to the output voltage of the resistor divider circuit;
A first circuit connected to the transistor and operating only with a high power supply voltage;
A second circuit connected to the transistor and operating at a low power supply voltage;
The driving capability of the transistor is adjusted depending on whether the phase change element is in the amorphous state or the crystalline state, and the high power supply voltage or the low power supply voltage is applied to the first circuit and the second circuit based on the driving capability. A semiconductor device comprising: The semiconductor device according to claim 1 ,
The means for making a transition to the amorphous state can adjust the degree of the amorphous state by supplying currents of different magnitudes to the phase change element. The semiconductor device according to claim 2 ,
The semiconductor device according to claim 1, wherein the first circuit includes a reset circuit that initializes the second circuit. A power terminal;
A reset terminal;
A third circuit connected to the power supply terminal and the reset terminal;
A reset circuit whose activation / deactivation is controlled by the third circuit;
An internal circuit in which the reset state is set by activation of the reset circuit and the reset state is released by inactivation of the reset circuit;
The third circuit includes:
A phase change element that transitions from an amorphous state to a crystalline state when current is supplied for a first time;
A fourth circuit that transitions the phase change element to the amorphous state when a reset signal is input from the reset terminal;
The reset circuit is activated while the phase change element is in the amorphous state, current is supplied from the power supply terminal to the phase change element in the amorphous state, and then the phase change element transitions to the crystalline state. And a fifth circuit for inactivating the reset circuit at the time. The semiconductor device according to claim 5 .
The fourth circuit supplies a current for causing the phase change element to transition to the amorphous state every time a reset signal is input from the reset terminal. The semiconductor device according to claim 5 .
The fifth circuit includes:
A resistance dividing circuit connected to the power supply terminal and dividing and outputting the voltage of the power supply terminal by the phase change element and the resistance element;
A transistor whose driving capability is adjusted according to the output voltage of the resistor divider circuit,
The reset circuit is activated when a high power supply voltage is supplied from the transistor while the phase change element is in the amorphous state, and is reset from the transistor when the phase change element transitions to the crystalline state. Inactivated by the supply of power supply voltage,
The semiconductor device is characterized in that the internal circuit is operated by the low power supply voltage supplied from the transistor. The semiconductor device according to claim 6 .
The semiconductor device is an IC card. The semiconductor device according to claim 8 .
2. The semiconductor device according to claim 1, wherein the internal circuit includes a phase change memory circuit as a memory circuit.

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