JP4718369B2 - Solder alloy - Google Patents
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- JP4718369B2 JP4718369B2 JP2006129305A JP2006129305A JP4718369B2 JP 4718369 B2 JP4718369 B2 JP 4718369B2 JP 2006129305 A JP2006129305 A JP 2006129305A JP 2006129305 A JP2006129305 A JP 2006129305A JP 4718369 B2 JP4718369 B2 JP 4718369B2
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Description
本発明は、金属の接合剤として用いられるはんだ合金に関し、さらに詳しくは鉛を含まないはんだ合金に関する。 The present invention relates to a solder alloy used as a metal bonding agent, and more particularly to a solder alloy containing no lead.
従来、金属の接合剤として用いられるはんだ合金として、Ｐｂ−Ｓｎ合金またはＰｂ−Ｓｎ合金にさらにＳｂ、Ｂｉ、Ｃｄ等の成分を加えた合金が用いられている。ところが、前記従来のはんだ合金はＰｂを必須成分として含んでいるので、該はんだ合金を用いた電子機器等が廃棄されると、Ｐｂが溶出して環境を汚染するという問題がある。 Conventionally, as a solder alloy used as a metal bonding agent, a Pb—Sn alloy or an alloy obtained by adding a component such as Sb, Bi, or Cd to a Pb—Sn alloy has been used. However, since the conventional solder alloy contains Pb as an essential component, there is a problem that when an electronic device or the like using the solder alloy is discarded, Pb is eluted and pollutes the environment.
そこで、Ｐｂを含まない各種はんだ合金が提案されている。このようなはんだ合金として、例えば、Ｓｂ１０〜４０質量％、Ｃｕ０．５〜１０質量％、残部Ｓｎからなるはんだ合金、少なくとも約９０重量％のＳｎを含み、さらにＳｂ、Ｂｉ、Ｃｕを含むはんだ合金、Ｂｉ２０〜５７重量％、Ｓｂ０．２〜５重量％、Ｇａ０．０１〜１重量％、残部Ｓｎからなるはんだ合金等が知られている（特許文献１〜３参照）。 Therefore, various solder alloys not containing Pb have been proposed. As such a solder alloy, for example, a solder alloy comprising 10 to 40% by mass of Sb, 0.5 to 10% by mass of Cu and the balance Sn, a solder alloy containing at least about 90% by weight of Sn, and further including Sb, Bi and Cu , Bi20 to 57 wt%, Sb 0.2 to 5 wt%, Ga 0.01 to 1 wt%, and a solder alloy composed of the remaining Sn are known (see Patent Documents 1 to 3).
前記はんだ合金は、例えば、シリコンチップと純銅からなる基板との接合に用いられる。前記シリコンチップは表面にＡｇが蒸着されており、前記基板は表面に電解Ｎｉメッキが施こされている。 The solder alloy is used for joining, for example, a silicon chip and a substrate made of pure copper. The silicon chip has Ag deposited on the surface, and the substrate has electrolytic Ni plating on the surface.
前記シリコンチップと前記基板とは、例えば、室温から１８０℃まで加熱し、再び室温まで冷却するというような熱サイクルを繰り返すと、加熱時には膨張、冷却時には収縮する。ところが、前記シリコンチップと前記基板とでは熱膨張係数が異なっているので、前記熱サイクルを繰り返すと、両者を接合するはんだ合金に負荷がかかる。そこで、前記はんだ合金は前記熱サイクルに対して優れた耐久性を備えることが望まれる。 The silicon chip and the substrate expand when heated, and shrink when cooled, for example, by repeating a thermal cycle of heating from room temperature to 180 ° C. and cooling to room temperature again. However, since the thermal expansion coefficient is different between the silicon chip and the substrate, when the thermal cycle is repeated, a load is applied to the solder alloy that joins the two. Therefore, it is desired that the solder alloy has excellent durability against the thermal cycle.
しかしながら、Ｐｂを含まない前記はんだ合金は、熱サイクルに対する耐久性が低く、脆化しやすいという不都合がある。
本発明は、かかる不都合を解消して、Ｐｂを含まず、熱サイクルに対して優れた耐久性を備えるはんだ合金を提供することを目的とする。 An object of the present invention is to solve such inconvenience and to provide a solder alloy that does not contain Pb and has excellent durability against thermal cycling.
かかる目的を達成するために、本発明のはんだ合金は、Ｃｕ１２〜３０重量％、Ｓｂ２０〜４０重量％、Ｓｎ３０〜６５重量％からなる合金組成を有することを特徴とする。本発明のはんだ合金は、前記合金組成を備えることにより、Ｐｂを含まないにも関わらず、熱サイクルに対して優れた耐久性を得ることができる。
In order to achieve this object, the solder alloy of the present invention is characterized by having an alloy composition consisting of Cu 12 to 30% by weight,
また、本発明のはんだ合金は、Ｃｕ−Ｓｂ−Ｓｎ３元状態図上で、Ｃｕがｘ重量％、Ｓｂがｙ重量％、Ｓｎがｚ重量％である点を（ｘ，ｙ，ｚ）とするときに、（３０，４０，３０）、（１５，２０，６５）、（１２，３０，５８）の各点を頂点とする三角形で囲まれる領域内の合金組成を有することにより、熱サイクルに対してさらに優れた耐久性を得ることができる。 Further, in the solder alloy of the present invention, the point where Cu is x wt%, Sb is y wt%, and Sn is z wt% on the Cu—Sb—Sn ternary phase diagram is (x, y, z). Sometimes, by having an alloy composition in a region surrounded by a triangle with each point of (30, 40, 30), (15, 20, 65), (12, 30, 58) as a vertex, the thermal cycle On the other hand, further excellent durability can be obtained .
次に、添付の図面を参照しながら本発明の実施の形態についてさらに詳しく説明する。図１は本発明の実施形態のはんだ合金の合金組成を示すＣｕ−Ｓｂ−Ｓｎ３元状態図である。 Next, embodiments of the present invention will be described in more detail with reference to the accompanying drawings. Figure 1 is a Cu-Sb-Sn3 binary phase diagram showing the alloy composition of the solder alloy implementation of the invention.
本発明の実施形態のはんだ合金は、Ｃｕ１２〜３０重量％、Ｓｂ２０〜４０重量％、Ｓｎ３０〜６５重量％からなる合金組成を有する。前記合金組成は、図１に示すＣｕ−Ｓｂ−Ｓｎ３元状態図上で、Ｃｕ１２重量％、Ｃｕ３０重量％、Ｓｂ２０重量％、Ｓｂ４０重量％、Ｓｎ６５重量％の直線で囲まれた五角形１の領域内（五角形１を形成する直線を含む）にある。
The solder alloy of implementation of the invention has Cu12~30 wt%, Sb20～40 wt%, the alloy composition consisting Sn30~65 wt%. The alloy composition is in the region of pentagon 1 surrounded by a straight line of Cu 12 wt%, Cu 30 wt%,
また、本実施形態のはんだ合金は、図１に示すＣｕ−Ｓｂ−Ｓｎ３元状態図上で、Ｃｕがｘ重量％、Ｓｂがｙ重量％、Ｓｎがｚ重量％である点を（ｘ，ｙ，ｚ）とするときに、（３０，４０，３０）、（１５，２０，６５）、（１２，３０，５８）の各点を頂点とする三角形２で囲まれる領域内（三角形２を形成する直線を含む）の合金組成を有することが好ましい。 In addition, the solder alloy of the present embodiment is such that Cu is x wt%, Sb is y wt%, and Sn is z wt% on the Cu—Sb—Sn ternary phase diagram shown in FIG. , Z) in the region surrounded by the triangle 2 having the points (30, 40, 30), (15, 20, 65), (12, 30, 58) as vertices (forms the triangle 2) It is preferable to have an alloy composition including a straight line.
前記はんだ合金は、Ｃｕ、Ｓｂ、Ｓｎの純金属をそれぞれ前記範囲となるように秤量して、真空中で、高周波溶解炉にて溶解し、所定の鋳型を用いて鋳造することにより母合金を得ることができる。前記母合金は、前記合金組成の範囲のＣｕ、Ｓｂ、Ｓｎを含むと共に、前記Ｃｕ、Ｓｂ、Ｓｎの純金属の製造過程で不可避的に混入する不純物を含んでいてもよい。 In the solder alloy, Cu, Sb, and Sn pure metals are weighed so as to be within the above ranges, melted in a high-frequency melting furnace in vacuum, and cast using a predetermined mold to form a mother alloy. Obtainable. The master alloy may contain Cu, Sb, and Sn within the range of the alloy composition, and may contain impurities inevitably mixed in the process of producing the pure metal of Cu, Sb, and Sn .
本実施形態のはんだ合金は、前記母合金を黒鉛坩堝中等で加熱溶解したのち、回転している銅製ロール上に吹き付けて凝固させることにより、例えば約１００μｍの厚さの箔状のはんだ材料とすることができる。前記箔状のはんだ材料は、例えば、表面にＡｇが蒸着されたシリコンチップと、表面に電解Ｎｉメッキが施こされた純銅基板とのような金属の接合に用いられる。前記箔状のはんだ材料は、例えば、該はんだ材料により接合された前記シリコンチップと前記純銅基板とを、室温から１８０℃まで加熱し、再び室温まで冷却する熱サイクルに付したときに、該熱サイクルに対して優れた耐久性を得ることができる。 The solder alloy of the present embodiment, before after the Kihaha alloy was heated and dissolved at a graphite crucible secondary, rotated by solidifying by blowing onto a copper roll has, eg if the solder material foil of a thickness of about 100μm It can be. The foil-like solder material is used, for example, for joining metals such as a silicon chip having Ag deposited on its surface and a pure copper substrate having electrolytic Ni plating on its surface. The foil-shaped solder material is, for example, when the silicon chip and the pure copper substrate joined by the solder material are subjected to a heat cycle in which the silicon chip and the pure copper substrate are heated from room temperature to 180 ° C. and cooled to room temperature again. Excellent durability against the cycle can be obtained.
次に、本発明の実施例と比較例とを示す。 Next, examples of the present invention and comparative examples will be described.
本実施例では、まず、Ｃｕ、Ｓｂ、Ｓｎの純金属を、Ｃｕ３０重量％、Ｓｂ４０重量％、Ｓｎ３０重量％となるように秤量して、真空中で、高周波溶解炉にて溶解し、所定の鋳型を用いて鋳造することにより母合金を得た。前記母合金の合金組成を図１に○で示す。また、前記母合金の固相線温度と、液相線温度とを表１に示す。
In this example, first, Cu, Sb, and Sn pure metals are weighed so as to be Cu 30 wt%,
次に、前記母合金を黒鉛坩堝中等で加熱溶解したのち、回転している銅製ロール上に吹き付けて凝固させることにより、厚さ約１００μｍ、幅３０ｍｍの箔状はんだ材料を得た。次に、５ｍｍ×５ｍｍの大きさに裁断した前記箔状はんだ材料を、水素雰囲気下、前記はんだ合金の液相線温度より２０℃高い温度に加熱して溶融させ、表面にＡｇが蒸着されたシリコンチップと、表面に電解Ｎｉメッキが施こされた純銅基板とのはんだ付けを行った。前記シリコンチップと、前記純銅基板とは、いずれも５ｍｍ×５ｍｍの大きさを備えている。
Next, the master alloy was heated and melted in a graphite crucible or the like, and then sprayed and solidified on a rotating copper roll to obtain a foil solder material having a thickness of about 100 μm and a width of 30 mm. Next, the foil-shaped solder material cut to a size of 5 mm × 5 mm was melted by heating to a
次に、前記はんだ合金によりはんだ付けされた前記シリコンチップと前記純銅基板とを、室温から１８０℃まで加熱し、再び室温まで冷却することを１サイクルとする熱サイクル試験に供し、前記はんだ材料にクラックが生じるまでのサイクル数を測定した。結果を表１に示す。 Next, the silicon chip soldered with the solder alloy and the pure copper substrate are subjected to a heat cycle test in which one cycle is heating from room temperature to 180 ° C. and cooling to room temperature again, The number of cycles until cracks were generated was measured. The results are shown in Table 1.
尚、前記シリコンチップの熱膨張係数は室温〜３００℃の範囲で２．８ｐｐｍ／Ｋであり、前記純銅基板の熱膨張係数は室温〜３００℃の範囲で１６．５ｐｐｍ／Ｋである。 The thermal expansion coefficient of the silicon chip is 2.8 ppm / K in the range of room temperature to 300 ° C., and the thermal expansion coefficient of the pure copper substrate is 16.5 ppm / K in the range of room temperature to 300 ° C.
本実施例では、Ｃｕ１５重量％、Ｓｂ２０重量％、Ｓｎ６５重量％となるようにした以外は実施例１と全く同一にして母合金を得た。前記母合金の合金組成を図１に○で示す。また、前記母合金の固相線温度と、液相線温度とを表１に示す。 In this example, a master alloy was obtained in exactly the same manner as in Example 1 except that Cu was 15% by weight, Sb was 20% by weight, and Sn was 65% by weight. The alloy composition of the mother alloy is indicated by ◯ in FIG. Table 1 shows the solidus temperature and liquidus temperature of the master alloy.
次に、本実施例で得られた前記母合金を用いた以外は実施例１と全く同一にして、前記シリコンチップと前記純銅基板とのはんだ付けを行い、はんだ付けされた前記シリコンチップと前記純銅基板とを前記熱サイクル試験に供して、前記はんだ材料にクラックが生じるまでのサイクル数を測定した。結果を表１に示す。 Next, the silicon chip and the pure copper substrate were soldered in exactly the same manner as in Example 1 except that the mother alloy obtained in this example was used, and the soldered silicon chip and the soldered The pure copper substrate was subjected to the thermal cycle test, and the number of cycles until cracks occurred in the solder material was measured. The results are shown in Table 1.
本実施例では、Ｃｕ１２重量％、Ｓｂ３０重量％、Ｓｎ５８重量％となるようにした以外は実施例１と全く同一にして母合金を得た。前記母合金の合金組成を図１に示す。また、前記母合金の固相線温度と、液相線温度とを表１に○で示す。 In this example, a mother alloy was obtained in exactly the same manner as in Example 1 except that Cu was 12% by weight, Sb was 30% by weight, and Sn was 58% by weight. The alloy composition of the mother alloy is shown in FIG. Further, the solidus temperature and the liquidus temperature of the master alloy are indicated by ○ in Table 1.
次に、本実施例で得られた前記母合金を用いた以外は実施例１と全く同一にして、前記シリコンチップと前記純銅基板とのはんだ付けを行い、はんだ付けされた前記シリコンチップと前記純銅基板とを前記熱サイクル試験に供して、前記はんだ材料にクラックが生じるまでのサイクル数を測定した。結果を表１に示す。 Next, the silicon chip and the pure copper substrate were soldered in exactly the same manner as in Example 1 except that the mother alloy obtained in this example was used, and the soldered silicon chip and the soldered The pure copper substrate was subjected to the thermal cycle test, and the number of cycles until cracks occurred in the solder material was measured. The results are shown in Table 1.
本実施例では、Ｃｕ１３重量％、Ｓｂ３１重量％、Ｓｎ５６重量％となるようにした以外は実施例１と全く同一にして母合金を得た。前記母合金の合金組成を図１に○で示す。また、前記母合金の固相線温度と、液相線温度とを表１に示す。 In this example, a mother alloy was obtained in exactly the same manner as in Example 1 except that Cu was 13 wt%, Sb 31 wt%, and Sn 56 wt%. The alloy composition of the mother alloy is indicated by ◯ in FIG. Table 1 shows the solidus temperature and liquidus temperature of the master alloy.
次に、本実施例で得られた前記母合金を用いた以外は実施例１と全く同一にして、前記シリコンチップと前記純銅基板とのはんだ付けを行い、はんだ付けされた前記シリコンチップと前記純銅基板とを前記熱サイクル試験に供して、前記はんだ材料にクラックが生じるまでのサイクル数を測定した。結果を表１に示す。 Next, the silicon chip and the pure copper substrate were soldered in exactly the same manner as in Example 1 except that the mother alloy obtained in this example was used, and the soldered silicon chip and the soldered The pure copper substrate was subjected to the thermal cycle test, and the number of cycles until cracks occurred in the solder material was measured. The results are shown in Table 1.
本実施例では、Ｃｕ１９重量％、Ｓｂ３３重量％、Ｓｎ４８重量％となるようにした以外は実施例１と全く同一にして母合金を得た。前記母合金の合金組成を図１に○で示す。また、前記母合金の固相線温度と、液相線温度とを表１に示す。 In this example, a mother alloy was obtained in exactly the same manner as in Example 1 except that Cu was 19% by weight, Sb was 33% by weight, and Sn was 48% by weight. The alloy composition of the mother alloy is indicated by ◯ in FIG. Table 1 shows the solidus temperature and liquidus temperature of the master alloy.
次に、本実施例で得られた前記母合金を用いた以外は実施例１と全く同一にして、前記シリコンチップと前記純銅基板とのはんだ付けを行い、はんだ付けされた前記シリコンチップと前記純銅基板とを前記熱サイクル試験に供して、前記はんだ材料にクラックが生じるまでのサイクル数を測定した。結果を表１に示す。 Next, the silicon chip and the pure copper substrate were soldered in exactly the same manner as in Example 1 except that the mother alloy obtained in this example was used, and the soldered silicon chip and the soldered The pure copper substrate was subjected to the thermal cycle test, and the number of cycles until cracks occurred in the solder material was measured. The results are shown in Table 1.
本実施例では、Ｃｕ２２重量％、Ｓｂ３５重量％、Ｓｎ４３重量％となるようにした以外は実施例１と全く同一にして母合金を得た。前記母合金の合金組成を図１に○で示す。また、前記母合金の固相線温度と、液相線温度とを表１に示す。 In this example, a mother alloy was obtained in exactly the same manner as in Example 1 except that Cu was 22% by weight, Sb was 35% by weight, and Sn was 43% by weight. The alloy composition of the mother alloy is indicated by ◯ in FIG. Table 1 shows the solidus temperature and liquidus temperature of the master alloy.
次に、本実施例で得られた前記母合金を用いた以外は実施例１と全く同一にして、前記シリコンチップと前記純銅基板とのはんだ付けを行い、はんだ付けされた前記シリコンチップと前記純銅基板とを前記熱サイクル試験に供して、前記はんだ材料にクラックが生じるまでのサイクル数を測定した。結果を表１に示す。 Next, the silicon chip and the pure copper substrate were soldered in exactly the same manner as in Example 1 except that the mother alloy obtained in this example was used, and the soldered silicon chip and the soldered The pure copper substrate was subjected to the thermal cycle test, and the number of cycles until cracks occurred in the solder material was measured. The results are shown in Table 1.
本実施例では、Ｃｕ３０重量％、Ｓｂ３５重量％、Ｓｎ３５重量％となるようにした以外は実施例１と全く同一にして母合金を得た。前記母合金の合金組成を図１に○で示す。また、前記母合金の固相線温度と、液相線温度とを表１に示す。 In this example, a mother alloy was obtained in exactly the same manner as in Example 1 except that Cu was 30% by weight, Sb was 35% by weight, and Sn was 35% by weight. The alloy composition of the mother alloy is indicated by ◯ in FIG. Table 1 shows the solidus temperature and liquidus temperature of the master alloy.
次に、本実施例で得られた前記母合金を用いた以外は実施例１と全く同一にして、前記シリコンチップと前記純銅基板とのはんだ付けを行い、はんだ付けされた前記シリコンチップと前記純銅基板とを前記熱サイクル試験に供して、前記はんだ材料にクラックが生じるまでのサイクル数を測定した。結果を表１に示す。 Next, the silicon chip and the pure copper substrate were soldered in exactly the same manner as in Example 1 except that the mother alloy obtained in this example was used, and the soldered silicon chip and the soldered The pure copper substrate was subjected to the thermal cycle test, and the number of cycles until cracks occurred in the solder material was measured. The results are shown in Table 1.
本実施例では、Ｃｕ２５重量％、Ｓｂ２５重量％、Ｓｎ５０重量％となるようにした以外は実施例１と全く同一にして母合金を得た。前記母合金の合金組成を図１に○で示す。また、前記母合金の固相線温度と、液相線温度とを表１に示す。 In this example, a mother alloy was obtained in exactly the same manner as in Example 1 except that Cu was 25% by weight, Sb was 25% by weight, and Sn was 50% by weight. The alloy composition of the mother alloy is indicated by ◯ in FIG. Table 1 shows the solidus temperature and liquidus temperature of the master alloy.
次に、本実施例で得られた前記母合金を用いた以外は実施例１と全く同一にして、前記シリコンチップと前記純銅基板とのはんだ付けを行い、はんだ付けされた前記シリコンチップと前記純銅基板とを前記熱サイクル試験に供して、前記はんだ材料にクラックが生じるまでのサイクル数を測定した。結果を表１に示す。
〔比較例１〕
本比較例では、Ｃｕ３５重量％、Ｓｂ４０重量％、Ｓｎ２５重量％となるようにした以外は実施例１と全く同一にして母合金を得た。前記母合金の合金組成を図１に●で示す。また、前記母合金の固相線温度と、液相線温度とを表１に示す。
Next, the silicon chip and the pure copper substrate were soldered in exactly the same manner as in Example 1 except that the mother alloy obtained in this example was used, and the soldered silicon chip and the soldered The pure copper substrate was subjected to the thermal cycle test, and the number of cycles until cracks occurred in the solder material was measured. The results are shown in Table 1.
[Comparative Example 1]
In this comparative example, a mother alloy was obtained in exactly the same manner as in Example 1 except that Cu was 35% by weight, Sb was 40% by weight, and Sn was 25% by weight. The alloy composition of the mother alloy is shown by ● in FIG. Table 1 shows the solidus temperature and liquidus temperature of the master alloy.
次に、本比較例で得られた前記母合金を用いた以外は実施例１と全く同一にして、前記シリコンチップと前記純銅基板とのはんだ付けを行い、はんだ付けされた前記シリコンチップと前記純銅基板とを前記熱サイクル試験に供して、前記はんだ材料にクラックが生じるまでのサイクル数を測定した。結果を表１に示す。
〔比較例２〕
本比較例では、Ｃｕを全く含まず、Ｓｂ４０重量％、Ｓｎ６０重量％となるようにした以外は実施例１と全く同一にして母合金を得た。前記母合金の合金組成を図１に●で示す。また、前記母合金の固相線温度と、液相線温度とを表１に示す。
Next, the silicon chip and the pure copper substrate were soldered in exactly the same manner as in Example 1 except that the mother alloy obtained in the present comparative example was used, and the soldered silicon chip and the solder The pure copper substrate was subjected to the thermal cycle test, and the number of cycles until cracks occurred in the solder material was measured. The results are shown in Table 1.
[Comparative Example 2]
In this comparative example, a mother alloy was obtained in exactly the same manner as in Example 1 except that Cu was not contained at all and Sb was 40% by weight and Sn was 60% by weight. The alloy composition of the mother alloy is shown by ● in FIG. Table 1 shows the solidus temperature and liquidus temperature of the master alloy.
次に、本比較例で得られた前記母合金を用いた以外は実施例１と全く同一にして、前記シリコンチップと前記純銅基板とのはんだ付けを行い、はんだ付けされた前記シリコンチップと前記純銅基板とを前記熱サイクル試験に供して、前記はんだ材料にクラックが生じるまでのサイクル数を測定した。結果を表１に示す。
〔比較例３〕
本比較例では、Ｃｕ１０重量％、Ｓｂ４５重量％、Ｓｎ４５重量％となるようにした以外は実施例１と全く同一にして母合金を得た。前記母合金の合金組成を図１に●で示す。また、前記母合金の固相線温度と、液相線温度とを表１に示す。
Next, the silicon chip and the pure copper substrate were soldered in exactly the same manner as in Example 1 except that the mother alloy obtained in the present comparative example was used, and the soldered silicon chip and the solder The pure copper substrate was subjected to the thermal cycle test, and the number of cycles until cracks occurred in the solder material was measured. The results are shown in Table 1.
[Comparative Example 3]
In this comparative example, a mother alloy was obtained in exactly the same manner as in Example 1 except that Cu was 10% by weight, Sb 45% by weight, and Sn 45% by weight. The alloy composition of the mother alloy is shown by ● in FIG. Table 1 shows the solidus temperature and liquidus temperature of the master alloy.
次に、本比較例で得られた前記母合金を用いた以外は実施例１と全く同一にして、前記シリコンチップと前記純銅基板とのはんだ付けを行い、はんだ付けされた前記シリコンチップと前記純銅基板とを前記熱サイクル試験に供して、前記はんだ材料にクラックが生じるまでのサイクル数を測定した。結果を表１に示す。
〔比較例４〕
本比較例では、Ｃｕ１０重量％、Ｓｂ２０重量％、Ｓｎ７０重量％となるようにした以外は実施例１と全く同一にして母合金を得た。前記母合金の合金組成を図１に●で示す。また、前記母合金の固相線温度と、液相線温度とを表１に示す。
Next, the silicon chip and the pure copper substrate were soldered in exactly the same manner as in Example 1 except that the mother alloy obtained in the present comparative example was used, and the soldered silicon chip and the solder The pure copper substrate was subjected to the thermal cycle test, and the number of cycles until cracks occurred in the solder material was measured. The results are shown in Table 1.
[Comparative Example 4]
In this comparative example, a mother alloy was obtained in exactly the same manner as in Example 1 except that Cu was 10 wt%,
次に、本比較例で得られた前記母合金を用いた以外は実施例１と全く同一にして、前記シリコンチップと前記純銅基板とのはんだ付けを行い、はんだ付けされた前記シリコンチップと前記純銅基板とを前記熱サイクル試験に供して、前記はんだ材料にクラックが生じるまでのサイクル数を測定した。結果を表１に示す。 Next, the silicon chip and the pure copper substrate were soldered in exactly the same manner as in Example 1 except that the mother alloy obtained in the present comparative example was used, and the soldered silicon chip and the solder The pure copper substrate was subjected to the thermal cycle test, and the number of cycles until cracks occurred in the solder material was measured. The results are shown in Table 1.
表１から、実施例１〜８のはんだ合金は、いずれも固相線温度が２４３℃以上、液相線温度が３８２℃以下であり、はんだ材料に適した物性を備えていることが明らかである。 From Table 1, it is clear that the solder alloys of Examples 1 to 8 each have a solidus temperature of 243 ° C. or higher and a liquidus temperature of 382 ° C. or lower, and have physical properties suitable for the solder material. is there.
次に、表１から、図１に示す五角形１の領域内の合金組成を備える実施例１〜８のはんだ合金によれば、クラックが発生したサイクル数はいずれも２０００サイクル以上であり、図１に示す五角形１の領域外の合金組成を備える比較例１〜４のはんだ合金がいずれも３００サイクル未満であることと比較して、熱サイクルに対して優れた耐久性を備えていることが明らかである。 Next, from Table 1, according to the solder alloys of Examples 1 to 8 having the alloy composition in the region of the pentagon 1 shown in FIG. 1, the number of cycles in which cracks occurred is 2000 or more, and FIG. It is clear that the solder alloys of Comparative Examples 1 to 4 having an alloy composition outside the region of the pentagon 1 shown in FIG. It is.
また、表１から、図１に示す三角形２の領域内の合金組成を備える実施例１〜６のはんだ合金によれば、クラックが発生したサイクル数はいずれも３０００サイクル以上であり、熱サイクルに対してさらに優れた耐久性を備えていることが明らかである。 Further, from Table 1, according to the solder alloys of Examples 1 to 6 having the alloy composition in the region of the triangle 2 shown in FIG. 1, the number of cycles in which cracks occurred is 3000 cycles or more, and the heat cycle On the other hand, it is clear that it has further excellent durability .
１，２…第１の実施形態のはんだ合金の合金組成。 1, 2... Alloy composition of the solder alloy of the first embodiment .
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| CN104466085B (en) * | 2008-02-22 | 2018-03-16 | 科罗拉多州立大学研究基金会 | Lithium ion battery |
| CN101332544A (en) * | 2008-05-28 | 2008-12-31 | 广州瀚源电子科技有限公司 | High-melting point lead-free solder and production technique thereof |
| JP5278616B2 (en) * | 2010-06-30 | 2013-09-04 | 千住金属工業株式会社 | Bi-Sn high temperature solder alloy |
| JP2013076143A (en) * | 2011-09-30 | 2013-04-25 | Energy Support Corp | Alloy for fixing between ceramic and metal fitting, and power distribution apparatus |
| JP5847520B2 (en) * | 2011-09-30 | 2016-01-20 | エナジーサポート株式会社 | Alloy for fixing between porcelain and metal fittings and power distribution equipment |
| CN108284286B (en) * | 2013-01-28 | 2020-07-03 | 日本半田株式会社 | Brazing alloy for die bonding |
| DE102015121438B4 (en) * | 2015-12-09 | 2023-12-28 | Tdk Electronics Ag | Electrical protective component with short-circuit device |
| CN106392366B (en) * | 2016-12-02 | 2019-07-19 | 北京康普锡威科技有限公司 | A kind of BiSbAg system high temperature lead-free solder and preparation method thereof |
| JP6903037B2 (en) * | 2018-07-20 | 2021-07-14 | 千住金属工業株式会社 | Solder paste |
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