JP4707624B2 - Voice coil motor control circuit and disk device using the same - Google Patents

Description

  The present invention relates to a driving technique for a voice coil motor, and more particularly to a driving technique for detecting the counter electromotive voltage and performing speed control.

  In a hard disk device or the like, a voice coil motor is used to drive the head. A drive circuit for driving the voice coil motor detects a counter electromotive voltage generated in the voice coil motor and performs speed feedback in order to control the rotation of the voice coil motor.

  Patent Document 1 points out a problem that speed feedback control cannot be performed correctly when the resistance value of the voice coil motor fluctuates during speed feedback based on the back electromotive force. The technique of Patent Document 1 discloses a technique for calibrating fluctuations in resistance value in order to solve this problem.

JP 2000-163901 A

  In the technique described in Patent Document 1, the calibration operation is performed using digital signal processing. The present invention has been made in view of such problems, and one object thereof is to provide a control circuit for a voice coil motor that can be accurately calibrated by an approach different from that of Patent Document 1.

  According to an aspect of the present invention, there is provided a control circuit that detects a counter electromotive voltage generated in a voice coil motor and drives the voice coil motor based on at least the counter electromotive voltage. The control circuit drives a voice coil motor based on a detection resistor connected in series with the voice coil motor, a first amplifier that amplifies a detection voltage generated at both ends of the detection resistor, and an output voltage of the first amplifier. The motor voltage generated at both ends of the voice coil motor in the state in which the rotation of the voice coil motor is stopped in a state where the rotation of the voice coil motor is stopped, the second amplifier further amplifying the detection voltage amplified by the first amplifier. 1. A calibration circuit that adjusts at least the amplification factor of the second amplifier so as to match the detection voltage amplified by the second amplifier, the detection voltage amplified by the first and second amplifiers, and a voice coil motor A second drive circuit that controls the rotation of the voice coil motor using a voltage corresponding to the difference between the motor voltage generated at both ends as a back electromotive voltage.The driving by the first driving circuit and the driving by the second driving circuit are switched according to the operation mode.

In the first operation mode, a detection voltage proportional to the current flowing through the voice coil motor is generated, amplified by the first amplifier, and the voice coil motor is driven. In the second operation mode, by canceling the voltage effect generated in the internal resistance of the voice coil motor by calibration using the detection voltage appearing in the detection resistance, only the back electromotive voltage component is extracted and the voice is extracted. The coil motor is driven.
According to this aspect, when generating the counter electromotive voltage, the detection voltage is amplified via the first amplifier for supplying the detection voltage to the first drive circuit and the amplifier of at least two stages of the second amplifier. The Therefore, in this aspect, the amplification factor of the second amplifier can be set lower than in the case where amplification is performed in one stage, an error in amplification factor can be suppressed, and accurate calibration can be realized.

  The calibration circuit includes a gain control unit that sweeps the amplification factor of the second amplifier, and a voltage corresponding to the motor voltage generated at both ends of the voice coil motor in accordance with the detection voltage amplified by the first and second amplifiers. And a comparator that detects that the voltage is equal. The gain control unit may fix the amplification factor of the second amplifier when the comparator detects that the two voltages are equal.

  The control circuit may further include a third amplifier that amplifies the detection voltage amplified by the first and second amplifiers based on a predetermined reference voltage. The comparator may compare the voltage output from the third amplifier with a reference voltage, and the gain control unit may fix the amplification factor of the second amplifier when the output of the comparator changes.

The control circuit may further include a third amplifier that amplifies the detection voltage amplified by the first and second amplifiers based on a predetermined first reference voltage. The comparator may compare the voltage output from the third amplifier with a predetermined second reference voltage, and the gain controller may fix the amplification factor of the second amplifier when the output of the comparator changes. . At least one of the first reference voltage and the second reference voltage may be configured to be adjustable.
By changing either the first reference voltage or the second reference voltage, an offset error generated in the circuit can be canceled, and accurate calibration can be performed.

  The calibration circuit further includes a variable voltage source that generates a reference voltage obtained by adding an offset to the predetermined reference voltage, and the comparator compares the voltage output from the third amplifier with the reference voltage output from the variable voltage source. The gain control unit may fix the gain of the second amplifier when the output of the comparator changes.

  The first amplifier may include a first operational amplifier that amplifies the voltage at one end of the detection resistor based on a voltage obtained by dividing the voltage at the other end of the detection resistor and a predetermined reference voltage. The second amplifier may include a second operational amplifier that amplifies a voltage obtained by dividing the output voltage of the first operational amplifier and the reference voltage with reference to the reference voltage.

  The first amplifier includes a first input resistor provided between the inverting input terminal of the first operational amplifier and one end of the detection resistor, and a first input provided between the inverting input terminal of the first operational amplifier and its output terminal. Provided between the feedback resistor, the second input resistor provided between the non-inverting input terminal of the first operational amplifier and the other end of the detection resistor, and the non-inverting input terminal of the first operational amplifier and the terminal where the reference voltage appears. A second input amplifier provided between a non-inverting input terminal of the second operational amplifier and an output terminal of the first operational amplifier; A fifth input resistor provided between the non-inverting input terminal of the second operational amplifier and the other end of the detection resistor, and a sixth input provided between the inverting input terminal of the second operational amplifier and the terminal where the reference voltage appears. Provided between the resistor and the inverting input terminal of the second operational amplifier and its output terminal Second and feedback resistor may be a non-inverting amplifier circuit including.

  The fourth, fifth, and sixth input resistors and the second feedback resistor are configured as variable resistors, and the calibration circuit has at least one resistance value of the fourth, fifth, and sixth input resistors and the second feedback resistor. By changing the gain, the amplification factor of the second amplifier may be adjusted.

  The calibration circuit sets the resistance values of the fourth input resistor and the sixth input resistor to the first resistance value, sets the resistance values of the fifth input resistor and the second feedback resistor to the second resistance value, At least one of the second resistance values may be changed.

  According to another aspect of the present invention, there is provided a control circuit for detecting a counter electromotive voltage generated in a voice coil motor and driving the voice coil motor based on at least the counter electromotive voltage. The control circuit includes a detection resistor connected in series with the voice coil motor, a first amplifier that amplifies a detection voltage generated at both ends of the detection resistor, and a first amplifier that further amplifies the detection voltage amplified by the first amplifier. When the rotation of the two amplifiers and the voice coil motor is stopped, at least the second amplifier so that the motor voltage generated at both ends of the voice coil motor matches the detection voltage amplified by the first and second amplifiers. A voltage corresponding to the difference between the calibration circuit for adjusting the amplification factor, the detection voltage amplified by the first and second amplifiers, and the motor voltage generated at both ends of the voice coil motor is used as a back electromotive voltage, and the voice coil And a drive circuit for controlling rotation of the motor.

  The control circuit may be integrated on a single semiconductor substrate. “Integrated integration” includes the case where all of the circuit components are formed on a semiconductor substrate and the case where the main components of the circuit are integrated. A resistor, a capacitor, or the like may be provided outside the semiconductor substrate. By integrating the control circuit as one LSI, the circuit area can be reduced.

Yet another embodiment of the present invention is a disk device. This apparatus includes a head for reading information from a disk, a voice coil motor for moving the position of the head, and a control circuit according to any one of the above-described modes for driving the voice coil motor.
According to this aspect, since stable calibration is realized, control of the head can be stabilized.

  According to the present invention, accurate calibration can be realized.

  The present invention will be described below based on preferred embodiments with reference to the drawings. The same or equivalent components, members, and processes shown in the drawings are denoted by the same reference numerals, and repeated descriptions are omitted as appropriate. The embodiments do not limit the invention but are exemplifications, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

  FIG. 1 is a block diagram showing an overall configuration of a disk device 1000 in which a motor control circuit 100 according to an embodiment is preferably used. The disk device 1000 is a magnetic disk device such as a hard disk, and includes a voice coil motor (hereinafter referred to as VCM) 1, a head 2, a disk 3, a spindle motor 4, and a motor control circuit 100. The spindle motor 4 is configured to be able to rotate the disk 3, and the rotation speed of the spindle motor 4 is controlled by a motor control circuit 100. The head drive circuit 5 controls the current flowing through the head 2 to write data to the disk 3 or detect a signal generated according to the magnetic field received by the head 2 from the disk 3. Read data. The head 2 is attached to the carriage 6 and can be moved to a desired position on the disk 3 by moving the carriage 6. The VCM 1 is provided for moving the carriage 6.

  FIG. 2 is a block diagram showing a configuration of the motor control circuit 100 according to the embodiment. The motor control circuit 100 includes a detection resistor Rs, a first amplifier AMP1, a second amplifier AMP2, a third amplifier AMP3, a first drive circuit 10, a second drive circuit 12, a calibration circuit 14, and an output stage 16 as functional blocks. Prepare. FIG. 2 is simplified for explaining the function of the motor control circuit 100 and does not represent all the functions of the motor control circuit 100 according to the embodiment. In the following description using FIG. 2, it is assumed that the connection point between the VCM 1 and the detection resistor Rs is a virtual reference voltage.

  The motor control circuit 100 detects the counter electromotive voltage VBEMF generated in the VCM 1 and drives the VCM 1 based on the detected counter electromotive voltage VBEMF in a mode for performing a retraction operation (hereinafter referred to as a retraction mode). Further, the motor control circuit 100 performs feedback based on the current flowing through the VCM 1 in an operation other than the retraction operation, that is, a mode in which the head is moved during normal data writing and data reading (hereinafter referred to as normal mode). , VCM1 is driven.

  The detection resistor Rs is connected in series with the VCM1. The output stage 16 is a block that supplies a drive current Idrv to a series circuit formed by the VCM 1 and the detection resistor Rs and controls the rotation of the VCM 1. The output stage 16 includes a group of transistors such as an H bridge circuit.

  In the detection resistor Rs, a voltage drop Idrv × Rs (hereinafter, this voltage drop is referred to as a detection voltage Vs) proportional to the drive current Idrv supplied from the output stage 16 is generated. The first amplifier AMP1 amplifies the voltage generated at both ends of the detection resistor Rs, that is, the detection voltage Vs with the first amplification factor g1. In the normal mode, the first drive circuit 10 drives VCM1 based on the output voltage of the first amplifier AMP1 (hereinafter referred to as the detection voltage Vs1). For example, the first drive circuit 10 adjusts the turn-on degree of the transistor in the output stage 16 by feedback so that the output voltage Vs1 of the first amplifier AMP1 matches the voltage indicating the torque of the VCM1, The drive current Idrv is controlled. The detailed configurations of the first drive circuit 10 and the output stage 16 are not described because known techniques may be used. The amplification factor g1 of the first amplifier AMP1 is set according to the magnitude of the drive current Idrv and the resistance value of the detection resistor Rs. The amplification factor g1 of the first amplifier AMP1 is set to several times to several tens of times, for example, about 5 times.

The second amplifier AMP2 further amplifies the detection voltage Vs amplified by the first amplifier AMP1, that is, the voltage Vs1, with the second amplification factor g2. The second amplifier AMP2 is a variable gain amplifier, and the second amplification factor g2 is configured to be adjustable. Hereinafter, the voltage output from the second amplifier AMP2 is referred to as Vs2. In FIG.
Vs1 = g1 × Vs (1a)
Vs2 = g2 * Vs1 = g1 * g2 * Idrv * Rs (1b)
Is true.

In FIG. 2, the third amplifier AMP3 represents a function as an amplifier or a comparator, and should not be interpreted as being limited to any function.
For the second drive circuit 12, the third amplifier AMP3 functions as an amplifier that amplifies the difference between the two input voltages. The voltage Vs2 is input to one input terminal of the third amplifier AMP3, and the motor voltage Vvcm is input to the other input terminal. When the amplification factor of the third amplifier AMP3 is g3, the output voltage is
Vx1 = g3 × (Vs2−Vvcm) (2)
It is expressed.

Here, the motor voltage Vvcm is given by the sum of the voltage drop generated in the internal resistance Ra and the internal coil L1. When the voltage generated in the internal coil L1 is written as a back electromotive voltage Vbemf,
Vvcm = Idrv × Ra + Vbemf (3)
Given in. Substituting equations (1b) and (3) into equation (2),
Vx1 = g3 × (g1 × g2 × Idrv × Rs−Idrv × Ra−Vbemf)
(4)
Get. The amplification factor g2 of the second amplifier AMP2 is adjusted by the later-described calibration so that the first term (g1 × g2 × Idrv × Rs) and the second term (Idrv × Ra) on the right side of the equation (4) are canceled. Is done. Therefore, in the calibrated state,
Vx1 = −Vbemf × g3 (5)
Thus, a voltage proportional to the back electromotive voltage Vbemf generated in the VCM1 is generated by the third amplifier AMP3.

  In the retraction mode, the second drive circuit 12 adjusts the degree of ON of the transistors in the output stage 16 based on the voltage Vx1 output from the third amplifier AMP3, that is, the voltage corresponding to the back electromotive voltage Vbemf. Then, the drive current Idrv flowing through the VCM1 is controlled. That is, the second drive circuit 12 uses, as a back electromotive voltage, a voltage corresponding to the difference between the detection voltage Vs2 amplified by the first amplifier AMP1 and the second amplifier AMP2 and the motor voltage Vvcm generated at both ends of the VCM1. Controls the rotation of VCM1.

  Next, the calibration operation will be described. In the calibration circuit 14, the motor voltage Vvcm generated at both ends of the VCM1 matches the detection voltage Vs amplified by the first amplifier AMP1 and the second amplifier AMP2, that is, the voltage Vs2 in a state where the rotation of the VCM1 is stopped. Thus, at least the amplification factor g2 of the second amplifier AMP2 is adjusted.

In a state where the rotation of the VCM 1 is stopped, the counter electromotive voltage Vbemf generated in the internal coil L1 of the VCM 1 is 0, so that the motor voltage Vvcm becomes equal to the voltage drop Idrv × Ra generated in the internal resistance Ra. That is, the calibration circuit 14 adjusts the amplification factor g2 of the second amplifier AMP2 so that the voltage Vs2 becomes equal to the voltage drop Idrv × Ra. As a result of this calibration process,
Idrv * Ra = g1 * g2 * Idrv * Rs
That is,
Ra = g1 * g2 * Rs
Therefore, the voltage Vx1 that does not depend on the drive current Idrv can be extracted as the output of the third amplifier AMP3 as represented by the equation (5). When the ratio of the detection resistance Rs and the internal resistance Ra is about 100 times and the amplification factor g1 of the first amplifier AMP1 is fixed at 5 times, the amplification factor of the second amplifier AMP2 is adjusted around 20 times as a center value. The If only the second amplifier AMP2 is used for the calibration process, it is necessary to adjust the amplification factor g2 with a center value of 100 times. On the other hand, in this embodiment, the amplification factor is low. Is set.

For the calibration circuit 14, the third amplifier AMP3 may function as a comparator. In the calibration period in which calibration is performed, the calibration circuit 14 sweeps the amplification factor g2 of the second amplifier AMP2.
By changing the amplification factor g2, the output voltage Vs2 of the second amplifier AMP2 gradually changes, and at a certain point, Vs2 = Vvcm is established. At this point, since the output of the third amplifier AMP3 functioning as a comparator causes a level change, the calibration circuit 14
Idrv * Ra = g1 * g2 * Idrv * Rs
The amplification factor g2 that establishes can be detected.

Note that the calibration process may be performed based on the output voltage Vx1 of the third amplifier AMP3 as an amplifier circuit. In this case, the calibration circuit 14 may monitor the output voltage Vx1 of the third amplifier AMP3 and detect a point where Vx1 = 0. Because in equation (4), when Vbemf = 0, Vx1 = 0 is
Idrv * Ra = g1 * g2 * Idrv * Rs
Because it means. One skilled in the art will readily appreciate that other embodiments of the circuit may be compared to another reference voltage rather than 0V.

The configuration and operation of the motor control circuit 100 according to the present embodiment have been described above based on the block diagram of FIG.
According to the motor control circuit 100 according to the present embodiment, the voltage Vx1 corresponding to the back electromotive voltage Vbemf generated in the VCM1 can be suitably generated. In the retraction mode, the VCM1 corresponding to the back electromotive voltage Vbemf Drive can be realized.

  Further, in the present embodiment, the detection voltage Vs generated in the detection resistor Rs is amplified via at least two stages of amplifiers, the first amplifier AMP1 and the second amplifier AMP2, and is used for calibration processing, so that Has the advantage of

  In general, the amplification factor of an amplifier is determined by the ratio of input resistance and feedback resistance. Therefore, when the amplification factor is large, the ratio of the resistance is increased, and variation in resistance value of each resistor significantly affects the amplification factor. Accordingly, when the detection voltage Vs is amplified by only one stage amplifier (for example, only the second amplifier AMP2) and used for calibration, it is necessary to set the amplification factor of the amplifier high, resulting in an error in the amplification factor. It becomes easy. If an error occurs in the amplification factor, an error occurs in the calibration, so that the back electromotive voltage Vbemf cannot be extracted.

  On the other hand, in the present embodiment, the detection voltage Vs is amplified by the two-stage amplifiers AMP1 and AMP2, so that the amplification factor g2 of the second amplifier AMP2 is set lower than that in the case of amplifying by one stage. can do. As a result, errors caused by variations in resistance values, offsets of operational amplifiers, and the like can be reduced, and a more accurate calibration process can be realized.

  Furthermore, in the embodiment, since one of a plurality of amplifiers that amplify the detection voltage Vs is shared with the first amplifier AMP1 used in the normal mode, an increase in circuit scale can be suppressed.

  In the circuit of FIG. 2, the output voltage Vs1 of the first amplifier AMP1 is supplied to the first drive circuit 10 to drive the VCM1, but the present invention is not limited to this. For example, another first amplifier AMP1 ′ for amplifying the detection voltage Vs generated in the detection resistor Rs is provided in parallel with the first amplifier AMP1, and the output of the first amplifier AMP1 is input to the first drive circuit 10. In addition, the output of the other first amplifier AMP1 ′ may be input to the second amplifier AMP2. In this case, since the amplification factors of the two first amplifiers AMP1 and AMP1 'can be set independently, more accurate calibration processing and driving in the normal mode can be realized.

  Hereinafter, a specific configuration example of the motor control circuit 100 according to the embodiment will be described. FIG. 3 is a circuit diagram showing a configuration of the motor control circuit 100 according to the embodiment. The motor control circuit 100 is configured as a functional IC on a single semiconductor substrate as a single unit or including other functional blocks.

  The first amplifier AMP1 includes a first operational amplifier OP1, a first input resistor Ri1, a second input resistor Ri2, a third input resistor Ri3, and a first feedback resistor Rfb1, and is configured as an inverting amplifier circuit. The first input resistor Ri1 is provided between the inverting input terminal of the first operational amplifier OP1 and one end 30 of the detection resistor Rs. The first feedback resistor Rfb1 is provided between the inverting input terminal of the first operational amplifier OP1 and its output terminal. The second input resistor Ri2 is provided between the non-inverting input terminal of the first operational amplifier OP1 and the other end 31 of the detection resistor Rs. The third input resistor Ri3 is provided between the non-inverting input terminal of the first operational amplifier OP1 and the terminal 32 where the reference voltage Vref appears.

  The first amplifier AMP1 amplifies the voltage Vsa at one end of the detection resistor Rs with reference to a voltage obtained by dividing the voltage Vsb at the other end of the detection resistor Rs and a predetermined reference voltage Vref. The amplification factor of the first amplifier AMP1 is set by the ratio of the resistance values of the first input resistor Ri1 and the first feedback resistor Rfb1.

  The second amplifier AMP2 includes a second operational amplifier OP2, a fourth input resistor Ri4, a fifth input resistor Ri5, a sixth input resistor Ri6, and a second feedback resistor Rfb2, and is configured as a non-inverting amplifier circuit. The fourth input resistor Ri4 is provided between the non-inverting input terminal of the second operational amplifier OP2 and the output terminal of the first operational amplifier OP1. The fifth input resistor Ri5 is provided between the non-inverting input terminal of the second operational amplifier OP2 and the other end 31 of the detection resistor Rs. The sixth input resistor Ri6 is provided between the inverting input terminal of the second operational amplifier OP2 and the terminal 33 where the reference voltage Vref appears. The second feedback resistor Rfb2 is provided between the inverting input terminal of the second operational amplifier OP2 and its output terminal.

  The second amplifier AMP2 amplifies a voltage obtained by dividing the output voltage Vs1 of the first operational amplifier AMP1 and the reference voltage Vref with reference to the reference voltage Vref. The amplification factor g2 of the second amplifier AMP2 is set by the ratio of the resistance values of the sixth input resistor Ri6 and the second feedback resistor Rfb2. The fourth input resistor Ri4, the fifth input resistor Ri5, the sixth input resistor Ri6, and the second feedback resistor Rfb2 are configured as variable resistors. The calibration circuit 14 changes the gain g2 of the second amplifier AMP2 by changing at least one resistance value of the fourth input resistor Ri4, the fifth input resistor Ri5, the sixth input resistor Ri6, and the second feedback resistor Rfb2. Adjust.

  In the present embodiment, the calibration circuit 14 sets the resistance values of the fourth input resistor Ri4 and the sixth input resistor Ri6 equally to the first resistance value Rx1. In addition, the calibration circuit 14 sets the resistance values of the fifth input resistor Ri5 and the second feedback resistor Rfb2 equally to the second resistance value Rx2. At this time, the amplification factor g2 of the second amplifier AMP2 is given by g2 = Rx2 / Rx1. The calibration circuit 14 may adjust the amplification factor g2 by changing at least one of the first resistance value Rx1 and the second resistance value Rx2 and changing the ratio of the resistance values. The configuration of the variable resistor is not particularly limited. For example, a resistor network in which a plurality of resistors are connected in series or in parallel and a plurality of switch elements connected in series or in parallel with each resistor are provided, and the switch elements are turned on / off. May change the impedance of the resistor network. In this case, the calibration circuit 14 can change the amplification factor of the second amplifier AMP2 by switching on and off of the switch element.

The third amplifier AMP3 includes a third operational amplifier OP3, a seventh input resistor Ri7, an eighth input resistor Ri8, a ninth input resistor Ri9, and a third feedback resistor Rfb3.
The seventh input resistor Ri7 is provided between the output terminal of the second operational amplifier OP2 and the inverting input terminal of the third operational amplifier OP3. The eighth input resistor Ri8 is a terminal of the VCM1, and is provided between the terminal 34 opposite to the detection resistor Rs and the non-inverting input terminal of the third operational amplifier OP3. The ninth input resistor Ri9 is provided between the terminal 35 where the reference voltage Vref appears and the non-inverting input terminal of the third operational amplifier OP3. The third feedback resistor Rfb3 is provided between the output terminal of the third operational amplifier OP3 and its inverting input terminal.

In the circuit of FIG. 3, the output voltage Vx1 of the third amplifier AMP is
Vx1 = −g2 × (−Idrv × g1 × g2 × Rs + Vvcm) + Vref
= −g2 × (−Idrv × g1 × g2 × Rs + Idrv × Ra + Vbemf)
+ Vref (6)
As given. That is, the voltage Vx1 output from the third amplifier AMP3 is a voltage proportional to the difference voltage between the motor voltage Vvcm generated at both ends of the VCM1 and the detection voltage Vs2 amplified by the first amplifier AMP1 and the second amplifier AMP2. Become.

  The calibration circuit 14 includes a comparator 20 and a gain control unit 22. The gain control unit 22 sweeps the amplification factor g2 of the second amplifier AMP2 during the calibration period. The comparator 20 compares the output voltage Vx1 of the third amplifier AMP3 with the reference voltage Vref. When the level of the output signal of the comparator 20 changes, the gain control unit 22 stops sweeping the amplification factor g2 and completes the calibration process.

The operation of the motor control circuit 100 of FIG. 3 configured as described above will be described. In the calibration period of the retraction mode, the drive current Idrv is supplied to the VCM 1 while the rotation of the VCM 1 is stopped. At this time, since Vbemf = 0, the output voltage Vx1 of the third amplifier AMP3 is
Vx1 = −g2 × (−Idrv × g1 × g2 × Rs + Idrv × Ra) + Vref
... (7)
Given in.

In this state, when the gain g2 is swept by the gain control unit 22, Vx1 = Vref at a certain time, that is,
−Idrv × g1 × g2 × Rs + Idrv × Ra = 0 (8)
Holds. At this time, since Vx1 crosses Vref, the output level of the comparator 20 is inverted. When the output signal level of the comparator 20 changes, the gain controller 22 stops the sweep of the gain g2 and completes the calibration.

According to the motor control circuit 100 of FIG. 3, the circuit operation described in FIG. 2 and the effects of the present embodiment can be realized.
Further, by configuring the first amplifier AMP1 and the second amplifier AMP2 as shown in FIG. 3, it is possible to suitably generate a voltage proportional to the detection voltage Vs as the output voltage Vs2 of the second amplifier AMP2.

In an embodiment, at least one of the reference voltage Vref used in the third amplifier AMP3 and the reference voltage Vref used in the comparator 20 may be finely adjusted.
If the circuit is in an ideal state, it is desirable that the two reference voltages Vref are equal. However, in an actual circuit, an offset voltage is generated due to variations in transistors and resistances. Therefore, the circuit of FIG. 3 includes a variable voltage source 36 for finely adjusting the reference voltage Vref of the third amplifier AMP3 in order to correct the offset voltage. The variable voltage source 36 outputs a voltage obtained by adding the offset voltage Vofs to the reference voltage Vref used in the comparator 20 to the third operational amplifier OP3.

  For example, the offset voltage Vofs may be set before the circuit is shipped. In the actual operation, the offset voltage Vofs may be changed together with the sweep of the amplification factor g2 of the second amplifier AMP2 during the calibration period. As a result, a component including the drive current Idrv that cannot be removed by adjusting the amplification factor g2 of the second amplifier AMP2 can be more completely removed from the output voltage Vx1 of the third amplifier AMP3 given by Equation (6). it can.

  In the circuit of FIG. 3, the case where the reference voltage on the third amplifier AMP3 side is adjusted has been described. However, the same effect can be obtained by adjusting the reference voltage on the comparator 20 side. By changing either the first reference voltage or the second reference voltage, an offset error generated in the circuit can be canceled, and accurate calibration can be performed.

  The present invention has been described based on the embodiments. This embodiment is an exemplification, and it will be understood by those skilled in the art that various modifications can be made to combinations of the respective constituent elements and processing processes, and such modifications are also within the scope of the present invention. is there.

  The polarity of amplification of the first amplifier AMP1 to the third amplifier AMP3 described in the embodiment is an example, and inversion and non-inversion can be switched as appropriate.

It is a block diagram which shows the structure of the whole disk apparatus in which the motor control circuit which concerns on embodiment is used suitably. It is a block diagram which shows the structure of the motor control circuit which concerns on embodiment. It is a circuit diagram which shows concretely the example of composition of the motor control circuit concerning an embodiment.

Explanation of symbols

  1 VCM, 2 heads, 3 disks, 4 spindle motor, 5 head drive circuit, 6 carriage, Rs detection resistor, Vs detection voltage, 10 first drive circuit, 12 second drive circuit, 14 calibration circuit, 16 output stage, 20 comparator, 22 gain control unit, 100 motor control circuit, 1000 disk device, AMP1 first amplifier, AMP2 second amplifier, AMP3 third amplifier, OP1 first operational amplifier, OP2 second operational amplifier, OP3 third operational amplifier, Ri1 first input resistor, Ri2 second input resistor, Ri3 third input resistor, Ri4 fourth input resistor, Ri5 fifth input resistor, Ri6 sixth input resistor, Ri7 seventh input resistor, Ri8 eighth input resistor, Ri9 first 9 input resistance, Rfb1 No. Feedback resistor, Rfb2 second feedback resistor, RFB3 third feedback resistor.

Claims (11)

A control circuit for detecting a counter electromotive voltage generated in the voice coil motor and driving the voice coil motor based on at least the counter electromotive voltage;
A detection resistor connected in series with the voice coil motor;
A first amplifier for amplifying a detection voltage generated at both ends of the detection resistor;
A first driving circuit for driving the voice coil motor based on an output voltage of the first amplifier;
A second amplifier for further amplifying the detection voltage amplified by the first amplifier;
In a state where the rotation of the voice coil motor is stopped, at least the second amplifier so that the motor voltage generated at both ends of the voice coil motor matches the detection voltage amplified by the first and second amplifiers. A calibration circuit for adjusting the amplification factor of
The voltage of the detected voltage amplified by the first and second amplifiers and the voltage corresponding to the difference between the motor voltages generated at both ends of the voice coil motor are used as the counter electromotive voltage, and the rotation of the voice coil motor is performed. A second drive circuit to be controlled;
With
A control circuit switching between driving by the first driving circuit and driving by the second driving circuit according to an operation mode. The calibration circuit includes:
A gain controller for sweeping the amplification factor of the second amplifier;
A comparator that detects that a voltage according to a motor voltage generated at both ends of the voice coil motor is equal to a voltage according to the detection voltage amplified by the first and second amplifiers;
Including
The control circuit according to claim 1, wherein the gain control unit fixes the amplification factor of the second amplifier when the comparator detects that two voltages are equal. A third amplifier for amplifying the detection voltage amplified by the first and second amplifiers based on a predetermined reference voltage;
The comparator compares the voltage output from the third amplifier with the predetermined reference voltage;
The control circuit according to claim 2, wherein the gain control unit fixes an amplification factor of the second amplifier when an output of the comparator changes. A third amplifier for amplifying the detection voltage amplified by the first and second amplifiers based on a predetermined first reference voltage;
The comparator compares the voltage output from the third amplifier with a predetermined second reference voltage;
The gain control unit fixes the amplification factor of the second amplifier when the output of the comparator changes,
The control circuit according to claim 2, wherein at least one of the first reference voltage used in the third amplifier and the second reference voltage used in the comparator is configured to be adjustable. The first amplifier includes:
A first operational amplifier that amplifies the voltage at one end of the detection resistor based on a voltage obtained by dividing the voltage at the other end of the detection resistor and a predetermined reference voltage;
The second amplifier includes:
2. The control circuit according to claim 1, further comprising a second operational amplifier that amplifies a voltage obtained by dividing the output voltage of the first operational amplifier and the reference voltage with reference to the reference voltage. The first amplifier includes:
A first input resistor provided between an inverting input terminal of the first operational amplifier and one end of the detection resistor;
A first feedback resistor provided between the inverting input terminal of the first operational amplifier and its output terminal;
A second input resistor provided between a non-inverting input terminal of the first operational amplifier and the other end of the detection resistor;
A third input resistor provided between a non-inverting input terminal of the first operational amplifier and a terminal where the reference voltage appears;
An inverting amplifier circuit including
The second amplifier includes:
A fourth input resistor provided between a non-inverting input terminal of the second operational amplifier and an output terminal of the first operational amplifier;
A fifth input resistor provided between a non-inverting input terminal of the second operational amplifier and the other end of the detection resistor;
A sixth input resistor provided between an inverting input terminal of the second operational amplifier and a terminal at which the reference voltage appears;
A second feedback resistor provided between the inverting input terminal of the second operational amplifier and its output terminal;
The control circuit according to claim 5, wherein the control circuit includes a non-inverting amplifier circuit. The fourth, fifth and sixth input resistors and the second feedback resistor are configured as variable resistors,
The calibration circuit adjusts an amplification factor of the second amplifier by changing a resistance value of at least one of the fourth, fifth, and sixth input resistors and the second feedback resistor. The control circuit according to claim 6. The calibration circuit includes:
A resistance value of the fourth input resistor and the sixth input resistor is set to a first resistance value;
The resistance values of the fifth input resistor and the second feedback resistor are set to the second resistance value,
The control circuit according to claim 7, wherein at least one of the first and second resistance values is changed. A control circuit for detecting a counter electromotive voltage generated in the voice coil motor and driving the voice coil motor based on at least the counter electromotive voltage;
A detection resistor connected in series with the voice coil motor;
A first amplifier for amplifying a detection voltage generated at both ends of the detection resistor;
A second amplifier for further amplifying the detection voltage amplified by the first amplifier;
In a state where the rotation of the voice coil motor is stopped, at least the second amplifier so that the motor voltage generated at both ends of the voice coil motor matches the detection voltage amplified by the first and second amplifiers. A calibration circuit for adjusting the amplification factor of
The voltage of the detected voltage amplified by the first and second amplifiers and the voltage corresponding to the difference between the motor voltages generated at both ends of the voice coil motor are used as the counter electromotive voltage, and the rotation of the voice coil motor is performed. A driving circuit to be controlled;
A control circuit comprising:   10. The control circuit according to claim 1, wherein the control circuit is integrated on a single semiconductor substrate. A head for reading information from the disk;
A voice coil motor for moving the position of the head;
The control circuit according to any one of claims 1 to 9, which drives the voice coil motor;
A disk device comprising:

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