JP4701603B2 - Display device and driving method thereof - Google Patents

Display device and driving method thereof Download PDF

Info

Publication number
JP4701603B2
JP4701603B2 JP2003383714A JP2003383714A JP4701603B2 JP 4701603 B2 JP4701603 B2 JP 4701603B2 JP 2003383714 A JP2003383714 A JP 2003383714A JP 2003383714 A JP2003383714 A JP 2003383714A JP 4701603 B2 JP4701603 B2 JP 4701603B2
Authority
JP
Japan
Prior art keywords
light receiving
switch means
voltage
circuit
end
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2003383714A
Other languages
Japanese (ja)
Other versions
JP2005148286A (en
Inventor
和夫 中村
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP2003383714A priority Critical patent/JP4701603B2/en
Publication of JP2005148286A publication Critical patent/JP2005148286A/en
Application granted granted Critical
Publication of JP4701603B2 publication Critical patent/JP4701603B2/en
Application status is Expired - Fee Related legal-status Critical
Anticipated expiration legal-status Critical

Links

Images

Description

  The present invention relates to a display device and a driving method thereof, and in particular, an active matrix display device in which pixels including self-luminous elements (hereinafter referred to as “self-luminous elements”) as display elements are arranged in a matrix, and the same The present invention relates to a driving method.

  As a self-luminous element, there is, for example, an organic EL (electroluminescence) element that utilizes a phenomenon in which an organic thin film emits light when an electric field is applied. An organic EL display device using this organic EL element as a display element of a pixel has low power consumption because the organic EL element can obtain a luminance of several hundred nits with a driving voltage as low as 10 V or less, and is self-luminous. The liquid crystal display device does not require an illuminating device that is essential for the liquid crystal display device, can be easily reduced in weight and thickness, and the response speed of the organic EL element is as high as about several μs. Compared to a hold-type display device typified by a display device, there is a problem that an afterimage problem does not occur when displaying a moving image, and the display performance is excellent.

  Thus, in recent years, organic EL display devices with features such as low power consumption, easy weight reduction and thinning, and excellent display performance when displaying moving images have been particularly reduced in power consumption and weight. In addition, it is promising as a flat panel display suitable for use as a display device of a mobile terminal device represented by a mobile phone or a personal digital assistant (PDA) that is required to be thin. Among these organic EL display devices, in particular, active matrix organic EL display devices using a thin film transistor (TFT) having polycrystalline silicon as an active layer are actively developed as pixel drive elements.

  On the other hand, in a mobile device, a contact-type touch panel using a resistive thin film is generally used as a coordinate detection device, and is widely used as an information input means (for example, see Non-Patent Document 1).

Magazine "Mechatronics" Technical Research Committee, 1993, VOL18, No12, p. 36-37

  However, since the contact-type touch panel is a method for detecting a potential change at a contact point, it is impossible to detect two or more contact points. In addition, since a configuration in which a touch panel is disposed on the display surface is unavoidable, there is a problem that the thickness of the device is inevitably increased and the light emission luminance of the display unit is decreased.

  In recent years, mobile phones equipped with a CCD sensor or CMOS sensor and equipped with a camera function have been widely used, and mobile phones with a built-in fingerprint sensor for personal authentication have also appeared. However, since these sensors are not integrated with the image display unit, there is a problem that the mounting density of the device is increased.

  The present invention has been made in view of the above problems, and the object of the present invention is to capture image information without increasing the thickness of the device or reducing the light emission luminance of the display unit. An object of the present invention is to provide a display device and a driving method thereof.

  In order to achieve the above object, in the present invention, in a display device having a pixel array unit in which pixels including a light emitting circuit and a light receiving circuit are arranged in a matrix, a signal obtained by receiving light with a light receiving element of the light receiving circuit. Is converted into a digital signal and output in units of pixels.

  Each pixel of the pixel array section includes a light emitting circuit and a light receiving circuit, and thus has a light receiving function in addition to an original light emitting function (display function). Then, by converting the signal obtained by receiving light with the light receiving element into a digital signal and outputting it, the image information is taken in pixel units and output as digital data without providing a CCD sensor or CMOS sensor outside the display device. Or, coordinate information can be taken in pixel units and output as digital data without providing a touch panel.

  According to the present invention, image information can be captured without providing a CCD sensor or a CMOS sensor or a touch panel, and the captured image information can be output as digital data. A system can be configured at low cost without increasing the thickness or reducing the light emission luminance of the display unit.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a schematic configuration diagram illustrating a display device according to an embodiment of the present invention, for example, an active matrix organic EL display device in which pixels including organic EL elements that are self-luminous elements as display elements are arranged in a matrix. It is.

  As is apparent from FIG. 1, the active matrix organic EL display device 10 according to the present embodiment has a large number of pixels 11 including light emitting circuits and light receiving circuits (both not shown) arranged on a substrate 12 in a matrix. The pixel array section (display area section) 13 and the peripheral drive circuit for supplying a video signal to each pixel 11 of the pixel array section 13 are divided into, for example, four horizontal drive circuits 14-1. 14-4 and its control circuit board 15, the vertical drive circuits 16-1 to 16-3 divided into three, for example, that select each pixel 11 of the pixel array section 13 in units of rows, and its control circuit board 17 The light receiving signal processing substrate 18 for processing the light receiving signal output from the light receiving circuit of each pixel 11 is provided.

  In the active matrix organic EL display device 10 having the above configuration, the pixel 11 includes a light emitting circuit 22 and a light receiving circuit 23 each having an organic EL element 21 (see FIG. 4) as a light emitting element, as shown in FIG. The organic EL light emitting layer 24 is positioned above the circuits 22 and 23. The horizontal drive circuits 14-1 to 14-4 are integrated into an IC. The number of divisions of the horizontal drive circuits 14-1 to 14-4 is not limited to four, and can be set to any number of divisions including one. The vertical drive circuits 16-1 to 16-3 are also integrated into an IC, and the number of divisions can be set to any number including one. The received light signal processing substrate 18 is electrically connected to the substrate 12 on which the pixel array unit 13 is mounted via, for example, four flexible cables 19-1 to 19-4.

  In the pixel array section 13, control line groups 25-1 to 25-m are wired for each row with respect to the arrangement of the pixels 11 of m rows and n columns, and video signal lines 26-1 to 26- are provided for each column. n and light receiving signal lines 27-1 to 27-n are wired. As will be described later, each of the control line groups 25-1 to 25-m includes, for example, five first to fifth control lines 25A to 25D, and one end of each of the control line groups 25-1 to 25-3 is vertical drive circuits 16-1 to 16-3. Are connected in line units.

  The vertical drive circuits 16-1 to 16-3 are mainly constituted by shift registers, and when driving the light emitting circuit 22 of the pixel 11, the first control lines 25A-1 to 25A-m are set to a predetermined scanning cycle. In this manner, the pixels 11 to be driven for light emission are sequentially selected in units of rows. At this time, a video signal is supplied to each pixel 11 of the selected row from the horizontal drive circuits 14-1 to 14-4 through the video signal lines 26-1 to 26-n. Further, when the vertical drive circuits 16-1 to 16-3 drive the light receiving circuit 23 of the pixel 11, the fourth and fifth control lines 25D-1 to 25D-m and 25E-1 to 25E-m are predetermined. In this scanning cycle, the pixels 11 to be driven to emit light are sequentially selected in units of rows. At this time, the light receiving signal of the light receiving circuit 23 is output from each pixel 11 of the selected row.

(Example 1)
FIG. 4 is a circuit diagram illustrating a circuit configuration of the pixel 11 according to the first embodiment. In the pixel circuit 30 according to the present embodiment, attention is paid to the fact that the organic EL element 21 that is the light emitting element of the light emitting circuit 22 functions as a light receiving element in the reverse bias state, and the organic EL element 21 is used as the light receiving element of the light receiving circuit 23. I am trying to use it as both.

  In addition to the organic EL element 21, the light emitting circuit 22 includes thin film transistors 221 to 224 and a storage capacitor 225 as drive elements. Incidentally, a thin film transistor (hereinafter referred to as “TFT”) has polycrystalline silicon as an active layer, and can be formed with a small element size for each pixel due to its high driving capability, which is advantageous for high definition of an organic EL display device. It is.

  The organic EL element 21 has a cathode connected to, for example, the ground. The TFT 221 is a video signal sampling transistor, which is composed of, for example, an N-channel transistor, and has a gate corresponding to the first control line 25A (one of each of the five control line groups 25-1 to 25-m in FIG. 3). ) Are connected to video signal lines 26 (corresponding to the data lines 26-1 to 26-n in FIG. 1), respectively.

  The TFT 222 is a driving transistor for the organic EL element 21 and is composed of, for example, a P-channel transistor, and has a gate connected to the drain of the TFT 221 and a source connected to the positive power supply VDD, for example. The TFT 223 is a transistor for controlling the light emission period of the organic EL element 21 and is made of, for example, an N-channel transistor, and has a gate of the second control line 25B (the five control line groups 25-1 to 25-m in FIG. 3). The drain is connected to the drain of the TFT 222, and the source is connected to the anode of the organic EL element 21. The storage capacitor 224 is connected between the gate and source of the TFT 222.

  The light receiving circuit 23 includes, for example, five N-channel TFTs 231 to 235, a holding capacitor 236, and an inverting amplifier 237, and the organic EL element 21 is placed in a reverse bias state during the light receiving period, thereby making the organic EL element 21 a light receiving element. It is the composition used as. Instead of the inverting amplifier 237, an inverter with an amplification factor of 1 can be used.

  The TFT 231 is a light emission reset transistor, which is made of, for example, an N-channel transistor, and has a gate corresponding to the third control line 25C (corresponding to one of each of the five control line groups 25-1 to 25-m in FIG. 3). The drain is connected to the anode of the organic EL element 21 and the source is connected to the bias power source Vb. Here, the bias power supply Vb is set so that the organic EL element 21 is in a reverse bias state when receiving light, that is, the anode voltage is lower than the cathode voltage. In the case of this example, since the cathode potential is the ground level (0 [V]), the bias power source Vb is a negative power source. The TFT 232 is a light receiving signal current control transistor, the gate is the fourth control line 25D (corresponding to each one of the control line groups 25-1 to 25-m in FIG. 3), and the source is the organic EL element 21. Each is connected to the anode.

  The TFT 233 is a reference voltage control transistor, and has a gate connected to the fifth control line 25E (corresponding to one of the control line groups 25-1 to 25-m in FIG. 3) and a drain connected to the source of the TFT 232, respectively. The reference voltage Vref is applied to the source. One end of the storage capacitor 236 is connected to a common connection point (node N11) of the source of the TFT 232 and the drain of the TFT 233. The input terminal of the inverting amplifier 237 is connected to the other end (node N12) of the storage capacitor 236. The TFT 234 has a gate connected to the fourth control line 25D, a drain connected to the input terminal of the inverting amplifier 237, and a source connected to the output terminal (node N13) of the inverting amplifier 237. The TFT 235 has a gate connected to the fifth control line 25E, a drain connected to the output terminal of the inverting amplifier 237, and a source connected to the light receiving signal line 27 (corresponding to the light receiving signal lines 27-1 to 27-n in FIG. 3). ing.

  In the circuit configuration of the light receiving circuit 23, the TFTs 232 to 234, the holding capacitor 236, and the inverting amplifier 237 constitute an A / D (analog-digital) conversion circuit 238 having a comparison circuit configuration. That is, the light receiving circuit 23 incorporates an A / D conversion circuit 238 for each pixel, and when the organic EL element 21 is used as a light receiving element, an analog light reception signal obtained by receiving light from the organic EL element 21 is digitally received. The signal is converted into a signal and output to the light receiving signal line 27.

  Next, the operation of the active matrix organic EL display device 10 having the pixel circuit 30 according to the first embodiment having the above configuration will be described. FIG. 5 is a timing chart showing the operation of the pixel circuit 30 in one frame period. One frame period is divided into a light emitting period in which a light emitting operation by the light emitting circuit 22 is performed and a light receiving period in which a light receiving operation by the light receiving circuit 23 is performed. However, the order of the light emission period and the light reception period can be reversed.

  First, the operation of the light receiving circuit 22 during the light receiving period will be described. In the pixel circuit 30 shown in FIG. 4, the TFT 221 receives the write scanning signal WS from the vertical drive circuits 16-1 to 16-3 (see FIGS. 1 and 3) through the first control line 25A every horizontal sampling period. The video signal Sig supplied through the video signal line 26 is sampled by being given to the gate. The sampled video signal Sig is supplied to the gate of the TFT 222 and held by the holding capacitor 224.

  After that, when the light emission control signal LON becomes approximately VDD level (hereinafter referred to as “H” level) through the second control line 25B from the vertical drive circuits 16-1 to 16-3, and the TFT 223 is turned on, The TFT 222 supplies a drive current corresponding to the signal level of the video signal Sig to the organic EL element 21 via the TFT 223, and causes the organic EL element 21 to emit light with a luminance corresponding to the signal level of the video signal Sig. Image display is performed by sequentially performing the light emission driving in units of rows. When the light emission driving of each pixel 11 in the final row (m row) is completed, the light receiving period starts.

  Next, the operation of the light receiving circuit 23 during the light receiving period will be described. In the light receiving period, first, reset signals RESET # 1 to #m of “H” level are given to all the pixels from the vertical drive circuits 16-1 to 16-3 through the third control line 25C. A period in which the reset signals RESET # 1 to #m are in the “H” level state is a reset period. In this reset period, the TFTs 231 of all the pixels are turned on, and the bias voltage Vb is applied to the anode of the organic EL element 21. Here, since the bias voltage Vb is a negative voltage, the organic EL element 21 is in a reverse bias state. When the cathode potential is Vc (in this example, the ground level), the capacitance between the terminals of the organic EL element 21 is: A potential Vb−Vc <0 is charged.

  When the reset period ends, the imaging period starts. During this imaging period, the leakage current changes depending on the amount of light incident on the organic EL element 21, whereby the terminal voltage of the organic EL element 21 changes. The leakage current increases almost linearly with the incident light energy. Therefore, the anode voltage of the organic EL element 21 of each pixel at the end of the imaging period becomes a potential corresponding to the light intensity. That is, the anode voltage approaches the cathode potential Vc in the pixel to which high energy light is incident, and conversely, the pixel to which the low energy light is incident has a potential close to the anode voltage at reset.

  When the imaging period ends, the data reading period starts. The operation of the light receiving circuit 23 during this data reading period will be described in detail with reference to the timing chart of FIG. In FIG. 6, in correspondence with FIG. 4, A indicates the potential of the node N <b> 11, B indicates the potential of the node N <b> 12, and C indicates the potential of the node N <b> 13.

  In the data read period, when the read signal READ supplied from the vertical drive circuits 16-1 to 16-3 through the fourth control line 25D is substantially at the ground level (hereinafter referred to as “L” level), the TFT 232 235 is in the off state. At this time, since the non-read signal xREAD, which is an inverted signal of the read signal READ, is in the “H” level, the TFTs 233 and 234 are in the on state. Since the TFT 233 is in the on state, the reference voltage Vref is supplied to the node N11 through the TFT 233, and the potential A of the node N11 becomes the reference voltage Vref.

  Since the input / output terminal of the inverting amplifier 237 is short-circuited by the TFT 234, the potential B of the node N12 is equal to the potential C of the node N13, and this potential becomes the operating point voltage Vinv of the inverting amplifier 237. At this time, the voltage Vc2 between the terminals of the storage capacitor 236 becomes Vc2 = Vinv−Vref, and the storage capacitor 236 holds this potential difference.

  Next, when the read signal READ becomes “H” level and the non-read signal xREAD becomes “L” level, the TFTs 232 and 235 are turned on and the TFTs 233 and 234 are turned off. Then, the potential A of the node N11 becomes equal to the input potential Vin. At this time, the potential B of the node N12 is Vinv + (Vin−Vref) because the voltage between the terminals is held by the storage capacitor 236. In this example, since the potential B of the node N12 becomes higher than the operating point voltage Vinv of the inverting amplifier 237, the potential C of the node N13, that is, the output potential of the inverting amplifier 237 becomes “L” level, and the output voltage is output via the TFT 235. It is output to the light receiving signal line 27 as Vout.

  As described above, in the A / D conversion circuit 238 having the comparison circuit configuration including the TFTs 232 to 234, the storage capacitor 236, and the inverting amplifier 237, the output potential of the inverting amplifier 237 is “L” due to the magnitude relationship between the input potential Vin and the reference voltage Vref. Since it settles at either the “level” or the “H” level, the comparison operation of the input potential Vin with respect to the reference voltage Vref becomes possible. In the light receiving circuit 23 according to the present embodiment, the A / D conversion circuit 238 converts the terminal potential of the organic EL element 21 during light reception into 1-bit digital data, and the light receiving signal line 27 is used as the light receiving signal of the pixel 11. Output to the outside via.

(Example 2)
FIG. 7 is a circuit diagram illustrating a circuit configuration of the pixel 11 according to the second embodiment. In the drawing, the same parts as those in FIG. 4 are denoted by the same reference numerals.

  In the pixel circuit 30 according to the first embodiment described above, paying attention to the fact that the organic EL element 21 which is the light emitting element of the light emitting circuit 22 functions as a light receiving element in the reverse bias state, the organic EL element 21 is used as the light receiving circuit 23. The pixel circuit 40 according to the present embodiment adopts a configuration in which the light receiving circuit 23 'has a dedicated light receiving element, whereas the configuration also used as the light receiving element is adopted. Accordingly, since the configuration other than the configuration of the light receiving circuit 23 ′ is the same as that of the pixel circuit 30 according to the first embodiment, the description of the overlapping portions will be omitted.

  In the pixel circuit 40 according to the present embodiment, a photodiode 239 is provided as a dedicated light receiving element for the light receiving circuit 23 ', and the light emitting circuit 22 and the light receiving circuit 23' are separated. As the photodiode 239, a so-called diode-connected photodiode in which the drain and gate of an amorphous silicon or polycrystalline silicon TFT are connected, a PIN (positive intrinsic negative) diode, or the like can be used.

  The circuit operation of the pixel circuit 40 according to the second embodiment having the above-described configuration is the same as the circuit operation of the pixel circuit 30 according to the first embodiment based on the timing charts of FIGS. 5 and 6. Note that, by adopting a configuration in which the light receiving circuit 23 is provided with a dedicated light receiving element, the circuit element is increased by one, but the light emitting operation and the light receiving operation are sequentially performed as in the pixel circuit 30 according to the first embodiment. There is an advantage that both operations can be performed asynchronously.

  In the light receiving circuits 23 and 23 'according to the first and second embodiments, the voltage value of the reference voltage Vref is fixed, and the reference voltage Vref and the input voltage Vin are compared to convert to 1-bit digital data. Although the case has been described as an example, the light reception operation is performed a plurality of times, and the light reception signal is captured by the TFT 232 at different timings corresponding to each light reception operation, while the voltage value of the reference voltage Vref is changed at each capture timing, It is also possible to configure to convert into multi-bit digital data by performing a comparison operation. By adopting this configuration, data corresponding to the amount of received light, that is, gradation data can be obtained as information of the pixels 11.

  As described above, in the organic EL display device 10 in which the pixels 11 including the light emitting circuit 22 and the light receiving circuit 23 (23 ′) are arranged in a matrix, the A / D conversion circuit 238 is built in each pixel 11, and By converting the light reception signal into a digital light reception signal by the A / D conversion circuit 238 and outputting it, image information can be captured and captured without a CCD sensor, CMOS sensor, or touch panel. Since the image information can be output to the outside as digital data, the system can be configured at low cost without increasing the thickness of the device or reducing the light emission luminance of the display unit.

  In particular, since the organic EL element 21 which is a light emitting element is used as a light receiving element by putting the organic EL element 21 in a reverse bias state, the number of elements constituting the pixel circuit 20 can be reduced. The configuration can be simplified, which is advantageous for miniaturization of the pixel 11.

  Further, since the A / D conversion circuit 238 incorporated in the light receiving circuit 23 (23 ′) has a simple configuration of a comparison circuit configuration for comparing the input voltage Vin with the reference voltage Vref, the A / D conversion circuit Since 238 can be arranged for each pixel, it is not necessary to provide an A / D conversion circuit on the light receiving signal processing substrate 18 side, and the external system can be simplified.

  In the above embodiment, the A / D conversion circuit 238 of the light receiving circuits 23 and 23 ′ is described as an example using a comparison circuit configuration that compares the input voltage Vin with the reference voltage Vref. The circuit configuration is not limited to this, and any circuit system may be used as long as the circuit configuration can be arranged for each pixel of the pixel array unit 13.

  Since the display device according to the present invention can be used not only as a screen display unit but also as a coordinate detection device or an imaging device, it can be mounted on a mobile device as a screen display unit and coordinate detection device. In addition, it can be mounted as a screen display unit and an imaging device in a terminal device such as a mobile phone having a camera function.

1 is a block diagram illustrating an outline of a configuration of an active matrix organic EL display device according to an embodiment of the present invention. It is a top view which shows the outline of a structure of a pixel. It is a block diagram which shows the structure of a pixel array part. 3 is a circuit diagram illustrating a circuit configuration of a pixel circuit according to Embodiment 1. FIG. 3 is a timing chart illustrating an operation in one frame period of the pixel circuit according to the first embodiment. 6 is a timing chart for explaining the operation of the light receiving circuit during a data reading period. 6 is a circuit diagram illustrating a circuit configuration of a pixel circuit according to Embodiment 2. FIG.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Active matrix type organic EL display device, 11 ... Pixel, 13 ... Pixel array part, 14-1 to 14-4 ... Horizontal drive circuit, 16-1 to 16-3 ... Vertical drive circuit, 21 ... Organic EL element, 22 ... Light emitting circuit, 23, 23 '... Light receiving circuit, 30, 40 ... Pixel circuit, 238 ... A / D conversion circuit

Claims (7)

  1. A display device having a pixel array unit in which pixels including a light emitting circuit and a light receiving circuit are arranged in a matrix,
    The light receiving circuit is
    It has an analog-digital conversion circuit that converts a light reception signal obtained by receiving light with a light receiving element into a digital signal and outputs it in pixel units,
    The analog-digital conversion means includes
    First switch means for taking in a voltage corresponding to the current flowing in the light receiving element of the light receiving circuit;
    A holding capacitor having one end connected to the output end of the first switch means;
    An inverting amplifier having an input terminal connected to the other end of the storage capacitor;
    Second switch means for selectively short-circuiting the input / output terminals of the inverting amplifier;
    Third switch means for applying a reference voltage to one end of the holding capacitor;
    In the off state of the first switch means, the voltage at one end of the storage capacitor is set as the reference voltage by turning on the third switch means, and the second switch means is turned on. The voltage at the other end of the holding capacitor is the operating point voltage of the inverting amplifier,
    Thereafter, the first switch means is turned on, and the third switch means and the second switch means are turned off, so that the voltage at one end of the holding capacitor is changed to the current flowing through the light receiving element. A series of operations for obtaining multi-bit digital data as an output of the inverting amplifier by comparing the voltage at the other end of the storage capacitor and the operating point voltage at this time, A display device that changes sequentially.
  2. The light emitting circuit has an organic EL element as a light emitting element,
    The display device according to claim 1, wherein the light receiving circuit uses the organic EL element as the light receiving element by placing the organic EL element in a reverse bias state during a light receiving period.
  3. The display device according to claim 1, wherein the light receiving circuit uses a diode formed of amorphous or polycrystalline silicon as the light receiving element.
  4. A pixel array unit in which pixels including a light emitting circuit and a light receiving circuit are arranged in a matrix;
    The light receiving circuit is
    It has an analog-digital conversion circuit that converts a light reception signal obtained by receiving light with a light receiving element into a digital signal and outputs it in pixel units,
    The analog-digital conversion means includes
    First switch means for taking in a voltage corresponding to the current flowing in the light receiving element of the light receiving circuit;
    A holding capacitor having one end connected to the output end of the first switch means;
    An inverting amplifier having an input terminal connected to the other end of the storage capacitor;
    Second switch means for selectively short-circuiting the input / output terminals of the inverting amplifier;
    And a third switch means for applying a reference voltage to one end of the storage capacitor.
    In the off state of the first switch means, the voltage at one end of the storage capacitor is set as the reference voltage by turning on the third switch means, and the second switch means is turned on. The voltage at the other end of the holding capacitor is the operating point voltage of the inverting amplifier,
    Thereafter, the first switch means is turned on, and the third switch means and the second switch means are turned off, so that the voltage at one end of the holding capacitor is changed to the current flowing through the light receiving element. A series of operations for obtaining multi-bit digital data as an output of the inverting amplifier by comparing the voltage at the other end of the storage capacitor and the operating point voltage at this time, A method of driving a display device that is sequentially performed by changing.
  5. The light emitting circuit has an organic EL element as a light emitting element,
    The display device driving method according to claim 4, wherein the light receiving circuit uses the organic EL element as the light receiving element by placing the organic EL element in a reverse bias state during a light receiving period.
  6. The display device driving method according to claim 4, wherein the light receiving circuit uses a diode formed of amorphous or polycrystalline silicon as the light receiving element.
  7. The method for driving a display device according to claim 4, wherein the light reception signal is converted into a digital signal by comparing a voltage corresponding to a current flowing through the light receiving element of the light receiving circuit with a reference voltage.
JP2003383714A 2003-11-13 2003-11-13 Display device and driving method thereof Expired - Fee Related JP4701603B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003383714A JP4701603B2 (en) 2003-11-13 2003-11-13 Display device and driving method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003383714A JP4701603B2 (en) 2003-11-13 2003-11-13 Display device and driving method thereof

Publications (2)

Publication Number Publication Date
JP2005148286A JP2005148286A (en) 2005-06-09
JP4701603B2 true JP4701603B2 (en) 2011-06-15

Family

ID=34692352

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003383714A Expired - Fee Related JP4701603B2 (en) 2003-11-13 2003-11-13 Display device and driving method thereof

Country Status (1)

Country Link
JP (1) JP4701603B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105139793A (en) * 2015-08-28 2015-12-09 京东方科技集团股份有限公司 Array substrate, driving method therefor, display panel, and display device
US20170289805A1 (en) * 2016-03-30 2017-10-05 Motorola Mobility Llc Embedded active matrix organic light emitting diode (amoled) fingerprint sensor and self-compensating amoled
WO2017188715A2 (en) * 2016-04-28 2017-11-02 크루셜텍 (주) Light-emitting fingerprint recognition panel capable of applying under glass and fingerprint recognition display apparatus comprising same

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001292276A (en) * 2000-01-31 2001-10-19 Semiconductor Energy Lab Co Ltd Contact area sensor and display device provided with the same
JP2001304962A (en) * 2000-04-26 2001-10-31 Sony Corp Optical detecting device and range finding device using it
JP2001345701A (en) * 2000-06-01 2001-12-14 Fujitsu Ltd Analog-to-digital converter
JP2002111961A (en) * 2000-09-29 2002-04-12 Seiko Epson Corp Image-inputting device
JP2004153327A (en) * 2002-10-28 2004-05-27 Toshiba Matsushita Display Technology Co Ltd Display

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2821888B2 (en) * 1988-10-06 1998-11-05 キヤノン株式会社 Controller of the power supply circuit
JP3405608B2 (en) * 1993-09-17 2003-05-12 株式会社東芝 Organic EL device
JPH1093434A (en) * 1996-09-11 1998-04-10 Canon Inc Comparator and power supply controller
JP4013293B2 (en) * 1997-09-01 2007-11-28 セイコーエプソン株式会社 Display device combined type image sensor device and active matrix display device
GB0201260D0 (en) * 2002-01-21 2002-03-06 Europ Org For Nuclear Research A sensing and imaging device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001292276A (en) * 2000-01-31 2001-10-19 Semiconductor Energy Lab Co Ltd Contact area sensor and display device provided with the same
JP2001304962A (en) * 2000-04-26 2001-10-31 Sony Corp Optical detecting device and range finding device using it
JP2001345701A (en) * 2000-06-01 2001-12-14 Fujitsu Ltd Analog-to-digital converter
JP2002111961A (en) * 2000-09-29 2002-04-12 Seiko Epson Corp Image-inputting device
JP2004153327A (en) * 2002-10-28 2004-05-27 Toshiba Matsushita Display Technology Co Ltd Display

Also Published As

Publication number Publication date
JP2005148286A (en) 2005-06-09

Similar Documents

Publication Publication Date Title
CN100576024C (en) Photosensitive display panel
KR100411555B1 (en) Emissive display using organic electroluminescent devices
US7787039B2 (en) MOS sensor and drive method thereof
JP4133339B2 (en) Self-luminous display device
US7071669B2 (en) Reference voltage generation circuit, display driver circuit, display device, and method of generating reference voltage
US7750875B2 (en) Organic light-emitting diode display device and driving method thereof
JP5079073B2 (en) Semiconductor device and electronic equipment
JP3800050B2 (en) Display device drive circuit
TWI222323B (en) Image sensor providing improved image quality
US6611248B2 (en) Shift register and electronic apparatus
JP2009065139A (en) Semiconductor device
JP6002828B2 (en) Semiconductor device
JP6007215B2 (en) Semiconductor device
EP1170718B1 (en) Current sampling circuit for organic electroluminescent display
US7737962B2 (en) Display device
KR20100027986A (en) Pixel circuit, light emitting display device and driving method thereof
US9769396B2 (en) Solid-state image pickup apparatus, signal processing method for a solid-state image pickup apparatus, and electronic apparatus
TWI381520B (en) Optical sensor with photo tft
US20010030704A1 (en) Semiconductor device and method of driving the same
US20070195020A1 (en) Method and System for Light Emitting Device Displays
JP5107824B2 (en) Display device and drive control method thereof
JP2005156697A (en) Image display device
JP2010045843A (en) High sensitivity image sensor arrays
DE102014118997A1 (en) Organic light-emitting display device and method for driving the same
KR20080107295A (en) A/d conversion circuit, control method thereof, solid-state imaging device, and imaging apparatus

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20060808

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A821

Effective date: 20091008

RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20091008

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20091028

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100126

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100315

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100525

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100630

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20101005

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20101101

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20110208

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20110221

LAPS Cancellation because of no payment of annual fees