JP4661871B2 - Discharge lamp lighting device and lighting fixture - Google Patents

Discharge lamp lighting device and lighting fixture Download PDF

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JP4661871B2
JP4661871B2 JP2008002718A JP2008002718A JP4661871B2 JP 4661871 B2 JP4661871 B2 JP 4661871B2 JP 2008002718 A JP2008002718 A JP 2008002718A JP 2008002718 A JP2008002718 A JP 2008002718A JP 4661871 B2 JP4661871 B2 JP 4661871B2
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control
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JP2008103357A (en
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勝己 佐藤
勝信 濱本
敏也 神舎
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パナソニック電工株式会社
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Description

  The present invention relates to a discharge lamp lighting device for lighting a discharge lamp with high frequency power.

  An example of a conventional discharge lamp lighting device is shown in FIG. In this lighting device, an AC power supply AC consisting of a commercial power supply, a noise-preventing filter choke L3 connected in series to one end of the AC power supply AC, and four diodes are bridge-connected to generate a full-wave output from the AC power supply AC. A rectifier DB that rectifies, a DC power supply circuit 1 that converts a full-wave rectified output of the rectifier DB into a desired DC voltage, an inverter circuit 2 that converts a DC voltage output from the DC power supply circuit 1 into a high-frequency voltage, and at least one lamp , A load circuit 3 that is supplied with a high-frequency voltage from the inverter circuit 2 and is lit by the discharge lamp La, an integrated circuit for chopper control (PFC control circuit) 400, an integrated circuit for inverter control 4, and a control It comprises a power supply E1.

DC power supply circuit 1 includes a series circuit of an inductor L2 and a diode D 1 connected in series to the high-voltage output side of the rectifier DB, a capacitor C4 connected in parallel between the output terminals of the rectifier DB, parallel to the capacitor C4 via the inductor L2 It consists of a connected switching element Q3 and a smoothing capacitor C3 connected in parallel to the switching element Q3 via a diode D1, and chopping the full-wave rectified voltage by turning on and off the switching element Q3 to obtain a desired DC voltage. A boost chopper circuit is obtained.

  The inverter circuit 2 is a half-bridge type inverter circuit in which a series circuit of switching elements Q1 and Q2 made of a MOSFET is connected between both ends of the smoothing capacitor C3. When the switching elements Q1 and Q2 are alternately turned on and off, The DC voltage output from the DC power supply circuit 1 is converted into a high-frequency voltage.

  The load circuit 3 includes a series circuit of a resonance inductor L1, a resonance capacitor C1, and a DC cut capacitor C2 connected between the drain and source of the switching element Q2 on the low voltage side, and a discharge lamp La connected in parallel to the resonance capacitor C1. The discharge lamp La is turned on when a high frequency voltage is supplied from the inverter circuit 2.

  The chopper control integrated circuit 400 includes a PFC control circuit, and controls the on / off state of the switching element Q3 to control the output voltage of the step-up chopper circuit to be constant regardless of fluctuations in the input voltage and the load weight. In addition, the input current waveform of the rectifier DB can be improved to a sine wave similar to the input voltage waveform. For example, a general-purpose power factor improving integrated circuit such as MC33262 manufactured by Motorola is used.

  The inverter control integrated circuit 4 is formed of a so-called HVIC (High Voltage IC) and includes an inverter control circuit 44 and a drive circuit 443. The inverter control circuit 44 outputs a control signal for the on / off time of the switching elements Q1 and Q2 of the inverter circuit 2, and the drive circuit 443 outputs a drive signal according to the control signal output from the inverter control circuit 44. The switching elements Q1 and Q2 of the inverter circuit 2 are directly driven. The switching elements Q1 and Q2 are alternately turned on / off to alternately supply power from the smoothing capacitor C3 to the discharge lamp La and alternately supply power to the discharge lamp La using the DC cut capacitor C2 as a power source. By repeating the above, a high frequency voltage is applied to the discharge lamp La and a high frequency alternating current flows.

Further, the inverter control integrated circuit 4 is supplied with a detection signal S11 at the end of the life of the discharge lamp La, an abnormality detection function for stopping the oscillation of the inverter circuit 2, and a control for changing the output of the discharge lamp La by the external signal S10. An optical function and the like are provided, and these circuits are included in one chip.
Note that the DC low voltage Vcc supplied from the DC voltage source E1 is used as a power source for the chopper control integrated circuit 400 and the inverter control integrated circuit 4.

Next, FIG. 43 shows another conventional circuit configuration. This discharge lamp lighting device has been proposed in Japanese Patent No. 3106592, and the circuit configuration is substantially the same as that of the conventional example shown in FIG. 42. Omitted.
In this conventional example, windings L2a and L2b magnetically coupled to the inductor L2 of the DC power supply circuit 1 are provided, and the power supply voltages Vcc1 and Vcc2 of the chopper control integrated circuit 400 and the inverter control integrated circuit 4 are wound. The capacitors C10 and C11 are supplied with voltages charged from L2a and L2b.

  At the end of the life of the discharge lamp La, etc., the inverter control integrated circuit 4 itself is reset (initialized) using the detection signal S11 as a reset signal to stop the oscillation operation of the inverter circuit 2, and the reset signal is The signal is also input to the chopper control integrated circuit 400 via the reset circuit 46 to stop the chopper operation of the DC power supply circuit 1. As a result, waste of power when oscillation is stopped can be reduced, and safety can be improved.

  In these conventional examples, it is necessary to provide separate integrated circuits 400 and 4 for controlling the DC power supply circuit 1 and the inverter circuit 2, respectively, and there are restrictions on the pattern wiring of the printed circuit board on which these components are mounted. Further, as in the conventional example shown in FIG. 43, when the DC power supply circuit 1 is also stopped when the inverter circuit 2 is stopped at the end of the life of the discharge lamp La, parts for controlling this operation are further required. Further, it becomes more difficult to reduce the size of the discharge lamp lighting device. As a result, there is a problem that these control circuits are easily affected by external noise, and malfunction is likely to occur.

  The discharge lamp lighting device proposed in Japanese Patent Application No. 2001-401532 has solved this problem. The circuit configuration of this example is almost the same as the configuration shown in FIGS. 42 and 43, and the operation thereof is also almost the same, so detailed description will be omitted, but the feature of this example is that the integrated circuit 4 for inverter control The chopper control integrated circuit 400 is constituted by one integrated circuit, and the following basic control required for the discharge lamp lighting device is realized by one control integrated circuit.

1) PFC control that improves the input current waveform to a sine wave similar to the input voltage waveform 2) Timer control that determines the time for the discharge lamp to pre-heat, start voltage application, and transition to lighting 3) Each of the above operating states Inverter output control for determining the inverter circuit output at 4) Output correction control for dimming or turning off the light output of the discharge lamp according to a signal input from the outside or the like, or detecting the lighting state of the discharge lamp Output correction control that performs dimming to vary the light output of the discharge lamp by feedback control 5) Detects a power failure (or instantaneous voltage drop) state, a discharge lamp not mounted state, and a life state of the discharge lamp. Abnormality detection control with variable operating state

  By realizing these basic controls with one control integrated circuit, it is possible to facilitate the mounting and pattern wiring of each circuit element constituting the discharge lamp lighting device on a printed circuit board. In addition, since each control circuit is not easily affected by external noise, there is almost no delay time of the control signal at the time of abnormality due to countermeasures against malfunctions, and the transient stress on each circuit element can be greatly reduced, and the conventional discharge lamp lighting Significant miniaturization can be achieved without impairing the functions required of the apparatus.

  However, in recent years, more advanced control has been demanded for discharge lamp lighting devices, lighting fixtures including the same, and lighting devices. As an example, an illumination device disclosed in Japanese Patent Laid-Open No. 2001-15276 has been proposed, and FIG. 44 shows a circuit configuration. The discharge lamp lighting device U1 of this example uses a step-up chopper circuit and an inverter circuit as in the conventional example, and supplies high-frequency power output from the inverter circuit to the discharge lamp La that is a load. Further, the power supplied to the discharge lamp La can be adjusted by varying the on / off cycle of the switching elements Q1, Q2 that are alternately turned on / off. The unit U2 including the lighting time detector 13 and the illuminance correction device 15 outputs a dimming signal to the discharge lamp lighting device U1. The lighting time detection unit 13 detects the voltage of the AC power supply AC by resistance voltage division, and uses the lighting time timer 14 to measure a period during which the voltage of the smoothing capacitor C8 connected to the output terminal of the rectifier DB2 is equal to or greater than a predetermined value. The illuminance correction device 15 is configured by a microcomputer together with the lighting time timer 14. The microcomputer is provided with a nonvolatile memory 17 that is an EEPROM that reads and writes the time measured by the lighting time timer 14 and stores a correction table used in the illuminance correction device 15. The correction table is a table in which the usage time of the discharge lamp La is associated with the dimming ratio for correction, and the use timed by the lighting time timer 14 in the dimming ratio setting unit 18 provided in the illuminance correction device 15. The dimming ratio of the discharge lamp La is determined by reading the dimming ratio from the nonvolatile memory 17 using time.

  The above operation is shown in the flowchart of FIG. As a time-dependent characteristic of the discharge lamp, the luminous flux of the discharge lamp decreases with the use time as shown in FIG. 46 (a). For example, as shown in FIG. 46 (b), dimming is performed at the initial stage of replacement of the discharge lamp. When the light is turned on and close to full lighting as the usage time is counted, the light output can be kept substantially constant as shown in FIG. With this operation, in this conventional example, it is possible to prevent a decrease in light output due to the time-lapse characteristics of the discharge lamp, and since dimming lighting is performed at the initial stage of replacement of the discharge lamp, energy saving can also be achieved.

Here, the reset of the storage data of the EEPROM that reads and writes the time measured by the lighting time timer will be described. In this conventional example, the following reset means is proposed.
[1] Reset when the voltage across the discharge lamp is detected and determined to be in the life state.
[2] It is detected whether or not the discharge lamp is connected to the lighting device, and is reset when it is determined that there is no load.
[3] Reset is performed when it is determined that there is no load when the AC power supply AC is not turned on.
[4] Reset by a reset switch mechanically operated from the outside of the lighting device.
Hereinafter, the problem of these reset means will be described.

  First, the means [1] resets when the voltage at both ends of the discharge lamp is detected and determined to be in the life state. The lighting time detector for detecting the lighting time and the life of the discharge lamp are detected to detect the life state. Therefore, there is a problem that the number of parts increases and it is difficult to reduce the size of the discharge lamp lighting device.

  Further, when the control integrated circuit as described above has a function of detecting the life of the discharge lamp and stopping the inverter operation, before the operation of the inverter is stopped by the control integrated circuit at the end of the discharge lamp life. In addition, it is necessary to reliably reset the data stored in the EEPROM. By the way, the level for determining the life state of the discharge lamp has individual variations between the discharge lamp lighting device and the illuminance correction device. Therefore, the stored data of the EEPROM must be reset considerably before the discharge lamp reaches the end of its life. I must. Therefore, in the discharge lamp lighting device after resetting the stored data in the EEPROM, the discharge lamp is lit in the initial state shown in FIG. 46 (b), and the originally intended light output cannot be controlled. .

  In addition, in the control integrated circuit as described above, when the discharge lamp is provided with a function for stopping the operation of the inverter when there is no load connected to the lighting device, the inverter circuit is operated and the discharge lamp is turned on. Since there is no distinction between the current state and the state in which the operation of the inverter is stopped when there is no load, the time measured by the lighting time timer may store the wrong lighting time. Therefore, the lighting time detection unit for detecting the lighting time is provided with a detection circuit for detecting a no-load state, and when the inverter circuit stops operating in response to the detection signal, the timing operation is stopped or the EEPROM is read. Therefore, there is a problem that the number of parts increases and the printed circuit board wiring becomes complicated.

  Next, means [2] detects whether or not the discharge lamp is connected to the lighting device, and resets it when it is determined that there is no load. Since the circuit for discriminating the no-load state by detecting the connection between the lighting time detector for detecting the discharge and the discharge lamp is a separate configuration, there is a problem that the number of parts increases and it is difficult to miniaturize the discharge lamp lighting device .

  Further, if the control integrated circuit as described above has a function of detecting the life of the discharge lamp and stopping the operation of the inverter, the inverter circuit is operated and the discharge lamp is lit, Since it cannot be distinguished from the state in which the inverter circuit stops operating at the end of the life of the lamp, the time measured by the lighting time timer may store the wrong time as in the case [1].

  If the lamp is replaced while the AC power supply is cut off, the stored data in the EEPROM is not reset, so that the predetermined light output is not obtained. In addition, in order to reset the stored data in the EEPROM in the no-load state regardless of the presence or absence of the AC power supply, a battery-like means for supplying a stable power supply voltage to the no-load detection circuit in the discharge lamp lighting device and the illuminance correction device Therefore, the lighting device becomes large and expensive.

  Next, the means [3] is for resetting when it is determined that there is no load when the AC power supply AC is not turned on. Like the means [2], no load is provided in the discharge lamp lighting device. A battery-like means for supplying a stable power supply voltage to the detection circuit and the illuminance correction device is required.

Next, the means [4] resets by a mechanically operated reset switch. As a lighting fixture concerning this example, Unexamined-Japanese-Patent No. 2001-338883 is proposed, and the structure of a lighting fixture is shown in FIG. As shown in the figure, a reset switch S2 is provided on the surface of the luminaire main body 50, and is connected to a discharge lamp lighting device 54 via a wiring 53 in the luminaire. In the discharge lamp lighting device equipped with the control integrated circuit as described above, there is an advantage that the stored data of the EEPROM can be surely reset regardless of the function provided in the control integrated circuit, but the installation of the switch S2 and the switch S2 And the wiring 53 between the discharge lamp lighting device 54 and the connection of the switch wiring 53 in the discharge lamp lighting device 54 are required.
Japanese Patent Laid-Open No. 11-238590

  The present invention has been made in view of the above points, and it is an object of the present invention to provide a small discharge lamp lighting device with a small number of parts even when a microcomputer or the like is mounted to perform more complicated control. And

  In the discharge lamp lighting device of the present invention, in order to solve the above problems, a rectifier that rectifies an AC power supply and a DC power supply that has at least one smoothing capacitor and is connected to an output terminal of the rectifier A circuit, an inverter circuit connected to the output terminal of the DC power supply circuit and having two switching elements connected in series, wherein the switching element is alternately turned on / off, and at least one resonance inductor , A resonance capacitor, a discharge lamp, a high-frequency voltage output from the inverter circuit, a load circuit that lights the discharge lamp by a resonance action, and a control integrated circuit that drives and controls the switching element of the inverter circuit A discharge lamp lighting device comprising: a circuit; and a control power supply circuit that supplies a control power to the control integrated circuit. A no-load detection circuit that outputs the lamp and a lamp life detection circuit that detects the life of the discharge lamp, and the control integrated circuit applies a starting voltage to the discharge lamp in a pre-preheating state in which the filament of the discharge lamp is pre-heated. First timer means for determining a state switching time for sequentially switching to a starting state and a lighting state in which the discharge lamp is lit at a predetermined output, and a switching element of the inverter circuit in accordance with a control signal input from the first timer means First control means for determining an on / off period and outputting a drive signal to the switching element of the inverter circuit, and input from the outside of the control integrated circuit, to perform dimming control of the discharge lamp or stop control of the inverter circuit Therefore, according to the control signal, the second control means for controlling the change of the drive signal cycle output from the first control means or the stop of the drive signal, and no load A first abnormality determining means for inputting a detection signal from the output circuit and determining whether or not an abnormal state; and a first output suppressing means for stopping the operation of the inverter circuit when it is determined as an abnormal state; A second abnormality determination means for inputting a detection signal from the lamp life detection circuit and determining whether or not an abnormal state is detected; and a second abnormality determining means for suppressing or stopping the output of the inverter circuit when the abnormal state is determined. 2 output suppression means, an operation state output means for outputting a predetermined state signal corresponding to the operation state of the control integrated circuit, and an arbitrary period from the initial state of the first timer means to the state switching time at which the starting state ends. Up to the time of (2), an abnormality determination prohibition period for stopping at least one of the second abnormality determination means and the second output suppression means, and a state signal from the operation state output means outside the control integrated circuit. The An operation setting circuit is provided for inputting and outputting a control signal to the second control means of the control integrated circuit. The operation state output means includes at least a lighting state and a first output suppression means in operation. And a state signal corresponding to the second output suppression state in which the second output suppression means is operating.

According to the present invention, the operation state output means is provided in the control integrated circuit of the discharge lamp lighting device, and at least the lighting state and the first output suppression state in which the first output suppression means is operating when no load is detected, by outputting a status signal corresponding to the second output suppression status in which the second output suppression means during lamp life detection is operating, the operation consists of a control for controlling the inverter circuit integrated circuit and microcomputer setting circuit almost able to determine simultaneously the no-load state is abnormal connection is load discharge lamp, also, the operation setting circuit composed of a control integrated circuit and a microcomputer for controlling the inverter circuit reaches the discharge lamp life The lamp life state can be determined almost simultaneously , and the stored data of the nonvolatile memory constituting the operation setting circuit can be easily reset .

The basic structure of the discharge lamp lighting device of the present invention is shown in FIG. The basic configuration is almost the same as the conventional example, and is connected to an AC power supply AC, a rectifier DB that inputs and rectifies the AC power supply AC, a DC power supply circuit 1 that smoothes the output of the rectifier DB, and an output terminal of the DC power supply circuit 1. An inverter circuit 2 constituted by a series circuit of switching elements Q1 and Q2, a load circuit 3 including at least one resonance inductor L1, a resonance capacitor C1, and a discharge lamp La, and the inverter circuit 2 or the load circuit 3 A control power supply circuit 5 connected to any arbitrary point and supplying control power to a control integrated circuit 4 to be described later, and a drive signal output terminal for directly turning on / off the switching elements Q1 and Q2 are provided. A control integrated circuit 4 constituting one integrated circuit capable of controlling the time is provided, and the switching elements Q1 and Q2 are turned on and off alternately to release them. The lamp La lights. The control integrated circuit 4 inputs a control signal output from the operation setting circuit 6, and the operation setting circuit 6 inputs a state signal corresponding to the operation state of the control integrated circuit 4 output from the control integrated circuit 4. .
Hereinafter, detailed configurations and operations of the control integrated circuit 4 and the operation setting circuit 6 will be described.

(Embodiment 1)
FIG. 2 shows a specific circuit of the control integrated circuit 4. The control integrated circuit 4 of this embodiment includes a control power supply terminal T5 that inputs a control power supply voltage supplied from the control power supply circuit 5, and a control power supply detection circuit that detects a control power supply level input from the control power supply terminal T5. 40, an oscillator OSC that generates a basic clock signal, a counter circuit CNT1 that counts the clock signal and outputs a signal when a predetermined count is reached, and a counter circuit CNT1 The inverter control circuit 44 that switches the on / off time of the switching elements Q1 and Q2 of the inverter circuit 2 according to the signal and outputs a drive signal to the switching elements Q1 and Q2 of the inverter circuit 2 and the signal from the counter circuit CNT1 are input An operation state output circuit 43 that outputs a predetermined signal corresponding to the signal to the operation setting circuit 6; An output control circuit 41 that receives a signal output from the operation setting circuit 6, outputs a signal corresponding to the input signal to the inverter control circuit 44, and controls the on / off time of the switching elements Q 1 and Q 2 of the inverter circuit 2. It consists of and.

  First, the basic operation of the inverter control circuit 44 will be described. In the figure, the inverter is abbreviated as INV. The inverter control circuit 44 inputs a state switching circuit 441 that outputs a switching signal of on / off cycles of the switching elements Q1 and Q2 in accordance with a signal output from the counter circuit CNT1, and a signal of the state switching circuit 441 and performs switching. An inverter cycle setting circuit 442 for determining on / off cycles of the elements Q1, Q2, and a drive circuit 443 for outputting a drive signal for controlling on / off of the switching elements Q1, Q2 at a cycle determined by the inverter cycle setting circuit 442; It consists of

FIG. 3 shows a circuit example showing the inverter control circuit 44 more specifically. The inverter control circuit 44 determines the on / off cycle of the switching elements Q1 and Q2 based on the resistance values of the resistors Rosc1, Rosc2, and Rosc3 connected inside or outside the control integrated circuit 4 and the capacitance of the capacitor Cpls. . Resistors Rosc1, Rosc2, and Rosc3 are connected to an output terminal of a buffer circuit mainly composed of an operational amplifier OP1. (This buffer circuit controls the base potential of the emitter follower transistor by the output of the operational amplifier OP1, and operates so that the voltage Vth2 at the positive input terminal of the operational amplifier OP1 becomes equal to the emitter potential of the transistor.) Is approximately equal to the input threshold voltage Vth2, and thus the current IRosc flowing through the resistors Rosc1, Rosc2, and Rosc3 can be approximated by the following equation.
IRosc = Vth2 / (Rosc1 + Rosc2 + Rosc3)

  The current IRosc determines the charging current value and discharging current value of the capacitor Cpls through the mirror circuits M1, M2, and M3. When switch element SW1 is on, charging current ICpls (source) flows to capacitor Cpls through mirror circuit M2. When the switch element SW1 is turned off, the charging path is cut off by turning off the switch element SW1, and the discharge current ICpls (sink) flows through the mirror circuit M3.

  The waveform of the charge / discharge voltage of the capacitor Cpls is input to the negative terminal of the comparator CP3. One of threshold values Vth3 and Vth4 is selected and inputted to the + terminal of the comparator CP3 by an analog switch circuit. Thereby, the voltage waveform of the capacitor Cpls becomes a triangular wave as shown in FIG. The output signal of the comparator CP3 is a rectangular wave signal having the same cycle as the charge / discharge cycle of the capacitor Cpls, and is output to the drive circuit 443 to drive the switching elements Q1 and Q2 of the inverter circuit 2.

  Here, when the switch element SW2 is turned on, the charging current to the capacitor Cpls flows into the switch element SW2, and the voltage waveform of the capacitor Cpls maintains approximately 0 V. Therefore, the signal output to the drive circuit 443 is “L”. "The state (Low level state) is maintained. In this case, the switching elements Q1 and Q2 of the inverter circuit 2 are turned off.

  Next, the basic operation of the control integrated circuit 4 will be described with reference to the timing chart shown in FIG. When the control power is supplied from the control power circuit 5, the control power level rises. The control power supply supplies power to each circuit, and a signal obtained by resistance-dividing the control power supply is input to the + terminal of the comparator CP1 constituting the control power supply detection circuit 40 (see FIG. 2). A reference voltage generated by a resistor and a Zener diode is input to the negative terminal of the comparator CP1, and is compared with the signal input to the positive terminal. When the control power supply level rises and the resistance voltage dividing signal becomes higher than the reference voltage, the output of the comparator CP1 is inverted to be in the “H” state (High level state).

  The output signal of the comparator CP1 is input to the counter circuit CNT1 and the state switching circuit 441 via the AND element AND1. In the present embodiment, when the STOP input of the counter circuit CNT1 is “L”, the count operation is stopped and reset to the initial state. Therefore, when the control power supply level is low, the operation of the counter circuit CNT1 is stopped. When the control power supply level increases, the count operation for counting the clock signal input from the oscillator OSC is started. Although the detailed circuit of the output signal stage of the counter circuit CNT1 is not particularly illustrated, a signal that rises with a predetermined count number is generated by combining logic elements such as an AND circuit and an OR circuit, and the signal is input to the flip-flop circuit and data Latch it. With such a configuration, the output signals OUT1, OUT2, and OUT3 of the counter circuit CNT1 have waveforms shown in FIG.

  Now, when OUT1 = “H” and OUT2 = OUT3 = “L”, the inverter circuit starts operation and becomes “preceding preheating state”, and when OUT1 = OUT2 = “H” and OUT3 = “L”, the inverter circuit The operating frequency of the inverter circuit is switched to the “starting state”, and when OUT1 = OUT2 = OUT3 = “H”, the operating frequency of the inverter circuit is switched to the “lighting state”.

Although the basic operation of the inverter control circuit 4 has been described with reference to FIGS. 3 and 4, the frequency switching of the inverter circuit 2 in the preceding preheating state, the starting state , and the lighting state may be performed as shown in FIG. That is, first, the operation start of the inverter circuit 2 will be described. The output signal OUT1 of the counter circuit CNT1 and the output signal of the AND element AND1 are input to the NAND element NAND1, and both of the two inputs to the NAND element NAND1 are “ In the case of “H”, the output is “L”. As a result, the switch element SW2 is turned off, and the above-described charge / discharge operation for the capacitor Cpls becomes possible.

  At this time, the OUT2 signal is input to the switch element SW4 via the inverting element (NOT circuit), and the OUT3 signal is input to the switch SW3 via the inverting element (NOT circuit). When OUT2 = OUT3 = “L” The switch elements SW3 and SW4 are both turned on. When the switch elements SW3 and SW4 are both turned on, there is no equivalent of the resistors Rosc2 and Rosc3, and the current IRosc flowing through the resistor Rosc1 is determined only by the resistance value of the resistor Rosc1. When the current value of the current IRosc flowing through the resistor Rosc1 is large, the period of the triangular waveform (see FIG. 4) that is the voltage across the capacitor Cpls is shortened, so that the inverter circuit 2 operates at a high frequency. This is the operation in the preceding preheating state.

  Next, in the starting state, since the switch element SW3 is on and the switch element SW4 is off, there is no equivalent resistor Rosc3, and the inverter circuit 2 is based on the value of the current flowing through the series resistance of the resistors Rosc1 and Rosc2. The operating frequency is determined. This operating frequency is lower than the operating frequency in the preceding preheating state.

  Further, in the lighting state, the switch elements SW3 and SW4 are both off, and the operating frequency of the inverter circuit 2 is determined based on the current value flowing through the series resistance of the resistors Rosc1, Rosc2, and Rosc3. This operating frequency is even lower than the starting operating frequency.

  By performing the above control, the discharge lamp La is preheated by the resonance action of the resonance inductor L1 and the resonance capacitor C1 constituting the load circuit 3 of FIG. 1, and then a predetermined starting voltage is applied. Then, the discharge lamp La is turned on with a predetermined output.

  Next, the operation state output circuit 43 will be described. The operation state output circuit 43 is composed of a plurality of analog switches, and in the example of FIG. 2, an output signal OUT3 that is output from the timer circuit 42 and switches the operation state of the inverter circuit 2 to a lighting state is input. The analog switch circuit composed of a plurality of analog switches is turned on or off in response to the signal OUT3, outputs a predetermined threshold value mode2 when OUT3 = "H", and outputs when the OUT3 = "L" A predetermined threshold value mode1 is output. As a result, as shown in FIG. 5, the output signal of the operation state output circuit 43 becomes mode 1 (0 V in the drawing) in the preceding preheating state and the start state, and becomes mode 2 in the lighting state. The output of the analog switch circuit is output to the outside of the control integrated circuit 4 by one line and is input to the operation setting circuit 6.

  The configuration of the operation setting circuit 6 may be any configuration as long as it includes a microcomputer as described in the conventional example. When control power is supplied to the control integrated circuit 4, the control power supply to the operation setting circuit 6 is performed via the voltage regulator RG1, and the operation setting circuit 6 starts its operation. For example, the operation setting circuit 6 measures and stores the lighting time in the same manner as in the conventional example, and outputs an “L” signal when the predetermined elapsed time T1 has not been reached, and reaches the predetermined elapsed time T1. In this case, an “H” signal is output.

  The output signal of the operation setting circuit 6 is input to the output control circuit 41 of the control integrated circuit 4. The output control circuit 41 includes a comparator CP2, and compares a predetermined threshold value Vth1 with the output signal of the operation setting circuit 6. When the output signal of the operation setting circuit 6 is “H”, the output of the comparator CP2 is “L”. The output of the comparator CP2 is one input of the AND element AND1, and when the output of the comparator CP2 becomes “L”, the output of the AND element AND1 becomes “L”. As described above, when the STOP input of the counter circuit CNT1 constituting the timer circuit 42 is “L”, the counter circuit CNT1 stops the count operation and is reset to the initial state. Therefore, the output signal OUT1 of the counter circuit CNT1 is “ L "and the switching elements Q1 and Q2 of the inverter circuit 2 are turned off. Therefore, the inverter circuit 2 maintains the stopped state by the output of the operation setting circuit 6.

  In the present embodiment, an operation state output circuit 43 is provided in the control integrated circuit 4, and a predetermined threshold signal corresponding to the operation state determined by the timer circuit 42 is output by one line, so that The detection unit that detects the lighting state of the discharge lamp and the detection signal wiring are not required, the number of parts can be reduced, and the wiring of the printed circuit board on which the circuit elements are mounted can be reduced and simplified. It is possible to further downsize the apparatus.

  In this embodiment, the inverter circuit 2 is stopped by the timing and storage operation in the operation setting circuit 6, but a conventional integrated circuit for control having a function of changing the operating frequency of the inverter circuit 2 is used. When the same microcomputer and EEPROM as in the examples (FIGS. 44 and 45) are used, the same control as in the conventional example (see FIG. 46) can be performed.

(Embodiment 2)
A circuit diagram of the control integrated circuit 4 according to the second embodiment of the present invention is shown in FIG. The operation waveform diagram is shown in FIG. Similarly to the first embodiment, the control integrated circuit 4 of the present embodiment also has a control power supply terminal T5 for inputting a control power supply voltage supplied from the control power supply circuit 5, and a control power supply level input from the control power supply terminal T5. A control power source detection circuit 40 for detecting the clock signal, an oscillator OSC for generating a basic clock signal, and a timer circuit 42 comprising a counter circuit CNT1 for counting the clock signal and outputting a signal when a predetermined count is reached, An inverter control circuit 44 for switching on / off times of the switching elements Q1, Q2 of the inverter circuit 2 in accordance with a signal from the counter circuit CNT1 and outputting a drive signal to the switching elements Q1, Q2 of the inverter circuit 2, and a counter circuit An operation state in which a signal from the CNT 1 is input and a predetermined signal corresponding to the signal is output to the operation setting circuit 6 A signal output from the output circuit 43 and the operation setting circuit 6 is input, a signal corresponding to the input signal is output to the inverter control circuit 44, and the on / off times of the switching elements Q1 and Q2 of the inverter circuit 2 are controlled. The operation control circuit 41 is different from the first embodiment in the configuration of the operation state output circuit 43. The basic operations of the timer circuit 42 and the inverter control circuit 44 are the same as those in the first embodiment, and signals OUT1, OUT2, and OUT3 for controlling the pre-heating, starting and lighting of the discharge lamp La are output from the counter circuit CNT1. The

  The operation state output circuit 43 of the present embodiment is an analog switch circuit composed of a plurality of analog switches. The analog switch circuit includes an output signal of the AND element AND1 that inputs the output of the control power supply detection circuit 40 and the output of the output control circuit 41, and a signal for switching the operation of the inverter circuit 2 output from the counter circuit CNT1 to the start state. OUT2 is input. The output signal of the operation state output circuit 43 comprising the analog switch circuit is a predetermined threshold value mode1 (0 V in the figure) when the output signal of the AND element AND1 is “L” and the signal OUT2 is “L”. When the output signal of the AND element AND1 is “H” and the signal OUT2 is “L”, the predetermined threshold value mode3 is output, and the output signal of the AND element AND1 is “H” and the signal OUT2 = When “H”, a predetermined threshold value mode 2 is output. The output signal of the operation state output circuit 43 is input to the operation setting circuit 6 as in the first embodiment.

  The operation of the operation setting circuit 6 according to the present embodiment is performed by accumulating the number of times when the output signal of the operation state output circuit 43 is mode 3, that is, when the operation of the inverter circuit 2 is in the preceding preheating state. When the output signal is mode 2, that is, when the operation of the inverter circuit 2 is in the start / lighting state, the lighting time may be measured and stored as in the first embodiment.

  A signal output from the operation setting circuit 6 to the output control circuit 41 of the control integrated circuit 4 is stored in the EEPROM as a data table in which the cumulative number of the preceding preheating states and the lighting time are set in accordance with the measured time. It may be stored, and “H” may be output when the cumulative number of preceding preheating states and the timing of the lighting time satisfy predetermined conditions. When the signal output from the operation setting circuit 6 to the output control circuit 41 of the control integrated circuit 4 becomes “H”, the inverter circuit 2 maintains the stopped state as in the first embodiment.

  In the present embodiment, an operation state output circuit 43 is provided in the control integrated circuit 4, and a predetermined threshold value signal corresponding to the operation state determined by the timer circuit 42 is output by one line, so that Similarly, wiring of a printed circuit board on which circuit elements are mounted can be reduced and simplified. Further, since the operation setting circuit 6 can recognize that the inverter circuit 2 is in the pre-heated state or the start / light-on state, more complicated control according to the operation state of the inverter circuit 2 can be performed. .

(Embodiment 3)
A circuit diagram of the control integrated circuit according to the third embodiment of the present invention is shown in FIG. A specific example of the inverter control circuit 44 of the present embodiment is shown in FIG. The inverter control circuit 44 of the present embodiment shown in FIG. 9 has the same configuration and operation as the inverter control circuit 44 of the first embodiment shown in FIG. 3 except that the resistor Rosc4 and the resistor Rosc4 are parallel to the resistor Rosc3. This is that a series circuit of the switch element SW5 is connected.

  The output signal of the comparator CP2 constituting the output control circuit 41 is input to the switch element SW5 via an inverting element (NOT circuit). When the output of the comparator CP2 is “H”, the switch element SW5 is turned off. When the output of the comparator CP2 = “L”, the switch element SW5 is turned on. When the switch element SW5 is turned on, equivalently, the resistor Rosc4 is connected in parallel to the resistor Rosc3, and the drive frequency of the switching elements Q1 and Q2 of the inverter circuit 2 is increased as described above. As a result, the dimming control is performed in which the value of the lamp current flowing through the discharge lamp La is lowered by the resonance action of the resonance inductor L1 and the resonance capacitor C1 constituting the load circuit 3, and the light output is reduced.

  The operation state output circuit 43 of the present embodiment is also an analog switch circuit composed of a plurality of analog switches. In this embodiment, as an input signal to the operation state output circuit 43, an output of the output control circuit 41 and a signal OUT3 for switching the operation state of the inverter circuit 2 output from the counter circuit CNT1 to the lighting state are input. Yes. The output signal of the operation state output circuit 43 outputs a predetermined threshold value mode1 when the output of the output control circuit 41 = “L” and the signal OUT3 = “L”, and the output of the output control circuit 41 = “L”. When the signal OUT3 = “H”, the predetermined threshold value mode3 is output, and when the output of the output control circuit 41 = “H” and the signal OUT3 = “H”, the predetermined threshold value mode2 is output. Yes. Therefore, when the operation state of the inverter circuit 2 is the pre-heating state / starting state, the output signal of the operation state output circuit 43 is mode1, and when the operation state of the inverter circuit 2 is the lighting state, the output signal of the operation state output circuit 43 Becomes mode2, and when the operation state of the inverter circuit 2 is the dimming state, the output signal of the operation state output circuit 43 becomes mode3. The output signal of the operation state output circuit 43 is input to the operation setting circuit 6 through one line as in the first and second embodiments.

  The operation setting circuit 6 of the present embodiment sets the output of the operation setting circuit 6 to “H” so that dimming is performed at the beginning of replacement of the discharge lamp La. At this time, the state signal output from the operation state output circuit 43 is mode 3, and the operation setting circuit 6 measures and stores the lighting time in the dimming state. When the lighting time in the dimming state reaches the predetermined time T1, the output signal of the operation setting circuit 6 is switched to “L” to make it all in the lighting state. At this time, the state signal output from the operation state output circuit is mode 2 Then, the lighting time of all lighting states is measured and stored. When the accumulated time of dimming lighting and full lighting reaches a predetermined time T2, the output signal of the operation setting circuit 6 is switched to “H” again to be in the dimming state. In addition, the state signal output from the operation state output circuit 43 in the preheating state and the start state is mode1, but at this time, the timing operation in the operation setting circuit 6 may be stopped.

  In the first embodiment and the second embodiment, the operation of the inverter circuit 2 is stopped according to the signal output from the operation setting circuit 6, but in this embodiment, the light control is performed instead of stopping the inverter circuit 2. Since the control is performed and a predetermined threshold value signal corresponding to the dimming state is output from one line from the operation state output circuit 43 of the control integrated circuit 4, the adjustment is performed together with the effects of the first and second embodiments. More complicated control according to the optical operation state can be performed.

(Embodiment 4)
FIG. 10 shows a discharge lamp lighting device according to Embodiment 4 of the present invention. The difference from the basic configuration shown in FIG. 1 is that a switching current detection resistor R1 is inserted between the switching element Q2 of the inverter circuit 2 and the ground, and a detection signal from the resistor R1 is sent to the control integrated circuit via the resistor R2. 4, the configuration and operation of the inverter circuit 2 and the load circuit 3 are the same.

  FIG. 11 shows the control integrated circuit 4 of the present embodiment. The control integrated circuit 4 of the present embodiment is different from the control integrated circuit 4 (FIG. 8) of the third embodiment in the configuration of the output control circuit 41. That is, the output control circuit 41 of the present embodiment includes a comparator CP2 and an operational amplifier OP2, and the detection signal from the resistor R1 is input to the negative terminal of the operational amplifier OP2 and to the positive input terminal of the operational amplifier OP2. The signal output from the operation setting circuit 6 is input. Between the output terminal and the negative input terminal of the operational amplifier OP2, there is a configuration of an integration circuit in which a parallel circuit of a resistor and a capacitor connected inside or outside the control integrated circuit 4 is connected as a feedback impedance.

  Here, the signal output from the operation setting circuit 6 in the present embodiment is a signal as shown in FIG. 12, and gradually changes the lighting time of the discharge lamp La according to the time measured and stored. The detection signal of the resistor R1 input to the negative input terminal of the operational amplifier OP2 and the output signal of the operation setting circuit 6 input to the positive input terminal of the operational amplifier OP2 have a relationship as shown in FIG. The output voltage of the integrating circuit mainly composed of the operational amplifier OP2 is varied by varying the level of the signal output from the input terminal, that is, the level of the DC signal input to the + input terminal of the operational amplifier OP2. The output terminal of the operational amplifier OP2 is connected to the inverter cycle setting circuit 442 via the resistor R3 and the diode D0. Specifically, the anode side of the diode D0 may be connected to the series circuit of the resistors Rosc1, Rosc2, and Rosc3 of the inverter control circuit 44 shown in FIG. The output voltage of the buffer circuit mainly composed of the operational amplifier OP1 is applied to the series circuit of the resistors Rosc1, Rosc2, and Rosc3 of the inverter control circuit 44, and the applied voltage is substantially equal to the predetermined threshold voltage Vth2. . Therefore, when the output voltage of the operational amplifier OP2 of the output control circuit 41 is lower than the threshold voltage Vth2, the current IRosc flowing through the inverter control circuit 44 increases, so that the drive frequency of the switching elements Q1 and Q2 of the inverter circuit 2 is It becomes higher, and the dimming control can be performed as in the third embodiment.

  In the present embodiment, the signal output from the operation setting circuit 6 is set as shown in FIG. 12, and the signal is changed according to the lighting time of the discharge lamp La, as in the conventional example (FIG. 46). Regardless of the usage time of the electric lamp La, the light output can be controlled to be substantially constant. The output signal of the operation setting circuit 6 is input to the negative input terminal of the comparator CP2 constituting the output control circuit 41, and a predetermined threshold value Vth1 input to the positive input terminal of the comparator CP2. To be compared. When the output signal of the operation setting circuit 6 changes according to the lighting time of the discharge lamp La and the signal level becomes higher than the threshold value Vth1, the output signal of the comparator CP2 becomes “L”.

  The operation state output circuit 43 of the present embodiment is also an analog switch circuit composed of a plurality of analog switches as shown in FIG. In the present embodiment, as an input signal to the operation state output circuit 43, an output of the comparator CP2 of the output control circuit 41 and a signal OUT3 for switching the operation of the inverter circuit 2 output from the counter circuit CNT1 to the lighting state are input. is doing. The output signal of the operation state output circuit 43 outputs a predetermined threshold value mode1 when the comparator CP2 output = “H” and the signal OUT3 = “L”, the comparator CP2 output = “H”, and the signal OUT3 = The predetermined threshold value mode2 is output when “H”, and the predetermined threshold value mode3 is output when the output of the comparator CP2 = “L” and the signal OUT3 = “H”. Therefore, when the operation state of the inverter circuit 2 is the preceding preheating state / starting state, the output signal of the operation state output circuit 43 is mode1, and when the operation state of the inverter circuit 2 is the lighting state including the dimming state, the operation state The output signal of the output circuit 43 is mode2. Further, as described above, when the output signal of the operation setting circuit 6 changes according to the lighting time of the discharge lamp La and the signal level becomes higher than the threshold value Vth1, the output signal of the operation state output circuit 43 becomes mode3. .

  The operation of the operation setting circuit 6 in this embodiment is performed by changing the input voltage to the output control circuit 41 of the control integrated circuit 4 according to the lighting time of the discharge lamp La similar to the conventional example. In addition to the operation of controlling the light output to be substantially constant regardless of the usage time, when the time counting time of the lighting time of the discharge lamp La reaches a predetermined time, that is, the state signal mode3 output from the control integrated circuit 4 is When inputting, every time the discharge lamp La shifts from the starting state to the lighting state, for example, by arbitrarily changing the dimming ratio only for a certain period, the user of the discharge lamp lighting device and the lighting fixture using the same It is also possible to add control for notifying the lamp replacement time.

  Also in the present embodiment, since the predetermined threshold signal corresponding to the lighting state is output from one line from the operation state output circuit 43 of the control integrated circuit 4, it is released in the same manner as in the previous embodiments. This has the effect of reducing the size of the electric lamp lighting device, and can easily perform the same control as in the conventional example.

(Embodiment 5)
FIG. 14 shows the configuration of a discharge lamp lighting device according to Embodiment 5 of the present invention. The difference from the fourth embodiment shown in FIG. 10 is that the output terminal of the DC power supply circuit 1 and the control integrated circuit 4 are connected. The inverter circuit 2, the load circuit 3, and the control integrated circuit are different. The configuration and operation of 4 are almost the same.

  FIG. 15 shows the configuration of the control integrated circuit 4 of the present embodiment. The difference from the control integrated circuit 4 of the fourth embodiment shown in FIG. 11 is that it has a starting circuit 45 connected to the output terminal of the DC power supply circuit 1. The starting circuit 45 only needs to be composed of a high-breakdown-voltage switch element and a control circuit for turning on / off the switch element. Supply current. The inverted signal of the output OUT0 of the timer circuit 42 (output of the inverting element INV2), the output of the control power supply detection circuit 40, and the inverted signal of the output signal b of the operation setting circuit 6 (output of the inverting element INV4) are 3-input AND elements. The signal is input to AND2, and the output of the AND element AND2 is input to the operation state output circuit 43 via a logic circuit including OR elements OR1 and OR2 and an inverting element INV3.

  Further, the output control circuit 41 of the present embodiment is composed of the operational amplifier OP2, and as in the fourth embodiment, the detection signal at the resistor R1 is input to the negative input terminal of the operational amplifier OP2, and the positive input of the operational amplifier OP2 is input. An output signal a output from the operation setting circuit 6 is input to the terminal. Further, since the output terminal of the operational amplifier OP2 is connected to the inverter cycle setting circuit 442 via the resistor R3 and the diode D0, the DC signal level of the output signal a output from the operation setting circuit 6 is set as in the fourth embodiment. Dimming control can be performed by making it variable.

  A detailed operation will be described with reference to the timing chart of FIG. First, immediately after the discharge lamp La is replaced, the time counted by the operation setting circuit 6 is reset. At this time, it is assumed that the output signal b of the operation setting circuit 6 is “H”. When the AC power supply AC is turned on, the smoothing capacitor constituting the DC power supply circuit 1 is charged with voltage. When the starting circuit 45 is turned on, power supply to the control power supply of the control integrated circuit 4 is started. Immediately after the supply of power to the control power supply is started, the level of the control power supply is low, so the output of the comparator CP1 of the control power supply detection circuit 40 is “L”. At this time, since the counter circuit CNT1 constituting the timer circuit 42 is reset, the output signals OUT0, OUT1, OUT2, and OUT3 of the timer circuit 42 are “L”. Further, since the OR1 output = “L” is input to the analog switch circuit constituting the operation state output circuit 43, a predetermined threshold value mode1 is output. In FIG. 16, the predetermined threshold value mode1 = 0V.

  The power supply continues through the starting circuit 45, and the level of the control power supply rises. When the control power supply level reaches a predetermined level determined by the control power supply detection circuit 40, the output of the comparator CP1 of the control power supply detection circuit 40 becomes “H”, and the counter circuit CNT1 constituting the timer circuit 42 starts counting operation. If the outputs OUT0 and OUT1 of the counter circuit CNT1 rise at the same timing, the output signal b of the operation setting circuit 6 is “H” and the output of the inverting element INV4 is “L” at the initial operation of the counter circuit CNT1. The AND element AND2 output = “L” regardless of the level of the output signal OUT0 of the counter circuit CNT1. Therefore, the OR element OR1 output = “L” is maintained, and the output of the operation state output circuit 43 maintains the predetermined threshold value mode1. When the operation of the counter circuit CNT1 proceeds and the output OUT3 = “H”, the OR element OR1 output = “H” and the OR2 output = “H”, so that the output of the operation state output circuit 43 is a predetermined threshold value mode2. It becomes.

  Here, the control power supply supplied to the control integrated circuit 4 when the output OUT0 of the counter circuit CNT1 is switched from “L” to “H” and the activation circuit 45 is turned off will be described. At the timing of turning off the high-breakdown-voltage switch element constituting the starter circuit 45, the inverter control circuit 44 starts operating in a preheated state as in the first to fourth embodiments.

  Here, as the control power supply circuit 5, circuits shown in FIGS. 17 and 18 are generally known. In FIG. 17, the control power is supplied through the capacitor C7 connected in parallel to the switching element Q2 when the switching elements Q1 and Q2 of the inverter circuit 2 are turned on and off. In FIG. 18, the inverter circuit 2 operates. As a result, a resonance current flows through the load circuit 3, and a voltage induced in the secondary winding of the resonance inductor L1 is supplied as a control power source. Regardless of which circuit is used, when the inverter circuit 2 starts operating in a preheated state, control power is supplied from the control power circuit 5 to the control integrated circuit 4, and even if the start-up circuit 45 is turned off. It can be seen that the control power is stably supplied.

  Now, it is assumed that the time counted in the operation setting circuit 6 reaches a predetermined time T1, and the output signal b of the operation setting circuit 6 in this case is controlled to output “L”. At this time, when the AC power supply AC is turned on, immediately after the power supply to the control power supply is started via the activation circuit 45, the level of the control power supply is low, so the output of the comparator CP1 of the control power supply detection circuit 40 is “L”. is there. Similarly to the above description, the counter circuit CNT1 constituting the timer circuit 42 is reset, and the output signals OUT0, OUT1, OUT2, and OUT3 of the timer circuit 42 are “L”. Since the OR1 output = “L” is input to the analog switch circuit constituting the operation state output circuit 43, a predetermined threshold value mode1 is output.

  The power supply continues through the starter circuit 45, the level of the control power supply rises, the output of the comparator CP1 of the control power supply detection circuit 40 becomes “H”, and the counter circuit CNT1 constituting the timer circuit 42 counts. Although the operation starts, since the output signal b of the operation setting circuit 6 is “L” and the output of the inverting element INV4 is “H”, the output signal OUT0 of the counter circuit CNT1 is “L”, that is, the output of the inverting element INV2 is “ In the case of “H”, the output of the AND element AND2 becomes “H”. Therefore, the OR element OR1 output = “H”, the OR2 output = “L”, and the operation state output circuit 43 outputs a predetermined threshold value mode3.

  The operation of the operation setting circuit 6 in the present embodiment stores the usage time of the discharge lamp La as in the conventional example and the fourth embodiment, and the light output is substantially constant regardless of the usage time of the discharge lamp La. Can be controlled. Further, when the time count time of the lighting time of the discharge lamp La reaches a predetermined time T1, the state signal mode3 output from the control integrated circuit 4 is input every time the AC power is turned on. Therefore, the AC power supply is repeatedly turned on until the control integrated circuit 4 shifts to the lighting state, that is, until the state signal mode2 is output. For example, when the state signal mode3 is input three times in succession, It is also possible to perform an initial reset process for the time counting time.

  Also in the present embodiment, since the predetermined threshold signal corresponding to the lighting state is output from one line from the operation state output circuit 43 of the control integrated circuit 4, it is released in the same manner as in the previous embodiments. This has the effect of reducing the size of the lighting device. Furthermore, reset control similar to the conventional example can be easily performed, and the reset switch S2 (see FIG. 47) added to the lighting fixture can be deleted.

(Embodiment 6)
The configuration of the discharge lamp lighting device according to Embodiment 6 of the present invention is shown in FIG. The difference from the fifth embodiment shown in FIG. 14 is that a no-load detection circuit 7 for detecting whether or not the discharge lamp La is mounted is provided, and the operation setting circuit 6 inputs a signal from the outside of the discharge lamp lighting device. The control integrated circuit 4 includes a no-load determination circuit 471 that receives the output signal of the no-load detection circuit 7 and a no-load suppression circuit 472 that stops the operation of the inverter circuit 2 in accordance with the output of the no-load determination circuit 471. This is the point that is added.

  The configuration of the control integrated circuit 4 of this embodiment is shown in FIG. The basic operation of the present embodiment is the same as that of the fifth embodiment, and the starter circuit 45 is operated according to the signal output from the timer circuit 42, and the inverter circuit 2 is preheated, started, and lit. Further, dimming control is performed according to the signal level output from the operation setting circuit 6 to the output control circuit 41 of the control integrated circuit 4. The signal input from the no-load detection circuit 7 is input to the no-load determination circuit 471 configured by the comparator CP4. When the discharge lamp La is normally connected and the signal input from the no-load detection circuit 7 is higher than the predetermined threshold value Vth5, the output of the comparator CP4 becomes “H”. Since the output of the comparator CP4 and the output of the control power supply detection circuit 40 are input to the 2-input AND element AND1, the output of the AND element AND1 when the discharge lamp La is connected is “H”, and the timer circuit 42 Performs a counting operation. When the discharge lamp La is not connected, the signal input from the no-load detection circuit 7 becomes lower than the predetermined threshold value Vth5, and the output of the comparator CP4 becomes “L”. Therefore, the output of the two-input AND element AND1 becomes “L”, and the timer circuit 42 inputs a reset signal and stops its operation. In the present embodiment, the inverter circuit 2 is stopped when the discharge lamp La is not connected by the output signal of the AND element AND1.

  The operation state output circuit 43 of the present embodiment inputs an AND element AND1 that inputs the output of the control power supply detection circuit 40 and the output of the no-load determination circuit 471, the output of the AND element AND1, and the output OUT3 of the timer circuit 42. The output signal of the AND element AND3 is input. The output signal of the operation state output circuit 43 outputs a predetermined threshold value mode1 (0V in the figure) when AND1 output = “L” and AND3 output = “L”, and AND1 output = “H”. When AND3 output = “L”, a predetermined threshold value mode3 is output, and when AND1 output = “H” and AND3 output = “H”, a predetermined threshold value mode2 is output. That is, the output signal of the operation state output circuit is mode3 when the operation state of the inverter circuit 2 is the preceding preheating state / starting state, and the output signal of the operation state output circuit is mode2 when the operation state is the lighting state. Further, the output signal of the operation state output circuit 43 in the no-load state where the discharge lamp La is not connected is mode1.

  The signal input from the outside of the discharge lamp lighting device may be a dimming signal for controlling the light output of the discharge lamp La to a predetermined level, for example. In the preceding preheating state and the starting state controlled by the control integrated circuit 4, an appropriate preceding preheating current value and starting voltage value are determined according to the type of the discharge lamp La used. In the starting state, it is desirable to perform a constant inverter circuit operation regardless of the input dimming signal.

  Therefore, as shown in the timing chart of FIG. 21, the operation setting circuit 6 outputs the dimming signal to the output control circuit 41 in the preceding preheating state and the starting state, that is, when the state signal mode3 is input. And the dimming signal may be controlled to be output when the lighting state, that is, the state signal mode2 is input. Further, when the discharge lamp La is not connected, for example, the microcomputer configuring the operation setting circuit 6 may be put in a sleep state and control may be performed to reduce current consumption.

  The configuration of the control power source 5 described in the fifth embodiment can supply a relatively large current as the control power source only when the inverter circuit 2 is operating. However, when the inverter circuit 2 is stopped, It is necessary to supply power via the startup circuit 45 of the integrated circuit 4. When the inverter circuit 2 is stopped and the microcomputer constituting the operation setting circuit 6 continues to operate and consumes a large current, the current capacity of the high voltage switch element constituting the control integrated circuit 4 is also increased. A relatively large size is required, and the package shape of the control integrated circuit 4 needs to be increased. However, if the microcomputer circuit is controlled so that the current consumption of the microcomputer is reduced when the inverter circuit 2 is stopped, there is no such problem, and the discharge lamp lighting device can be reduced in size as in the previous embodiments.

  In addition, in the control integrated circuit 4 that controls the inverter circuit 2, no load detection is performed, and when it is determined that there is no load, a state signal corresponding to the state is output. 6 can be determined to be in a no-load state almost simultaneously, and the operation setting circuit 6 is not mistaken for another state. The signal input from the outside of the discharge lamp lighting device to the operation setting circuit 6 may be output signals of various sensors such as human detection and light amount detection.

(Embodiment 7)
The configuration of the discharge lamp lighting device according to Embodiment 7 of the present invention is shown in FIG. A difference from the fifth embodiment shown in FIG. 14 is that a lamp life detection circuit 8 for detecting the life of the discharge lamp La is provided, and the control integrated circuit 4 receives a life determination by inputting an output signal of the lamp life detection circuit 8. The circuit 481 and the life suppression circuit 482 for controlling the operation of the inverter circuit 2 according to the output of the life determination circuit 481 are added.

  The configuration of the control integrated circuit 4 of this embodiment is shown in FIG. The basic operation of the present embodiment is the same as that of the fifth and sixth embodiments. The starter circuit 45 is operated in accordance with the signal output from the timer circuit 42, the inverter control circuit 44 is operated, and the inverter circuit 2 is operated. Preheating, starting and lighting control. Further, dimming control is performed according to the signal level output from the operation setting circuit 6 to the output control circuit 41 of the control integrated circuit 4. The signal output from the lamp life detection circuit 8 may be, for example, a signal proportional to the voltage across the discharge lamp La, and is input to the life determination circuit 481 configured by the comparator CP5. The output of the comparator CP5 and the output OUT3 of the timer circuit 42 are input to the AND element AND4, and the output of the AND element AND4 is input to the life suppression circuit 482.

  As described in the sixth embodiment, when the control integrated circuit 4 is operating in the preheated state and the starting state, the discharge lamp La is not yet lit, and the voltage across the discharge lamp La is higher than that during lighting. A voltage is easily applied. Therefore, in order to prevent the life discriminating circuit 481 from erroneously discriminating in the preheating state and the starting state, the output of the AND element AND4 is also set to “L” when the output OUT3 of the timer circuit 42 is “L”. After the transition to the lighting state, when the discharge lamp La is normal and the signal input from the lamp life detection circuit 8 is lower than the predetermined threshold value Vth6, the output of the comparator CP4 becomes “L”. The output of the element AND4 is “L”. The output of the AND element AND4 is input to the set input terminal S of the latch circuit constituting the life suppression circuit 482. Therefore, when the output of the AND element AND4 is “L”, the output OUT4 of the latch circuit is also “L”, and the “H” signal inverted by the inverting element INV5 is output.

  Next, when the discharge lamp La reaches the end of its life, the voltage across the discharge lamp La rises, so that the output of the comparator CP4 becomes “H” and the output of the AND element AND4 also becomes “H”. Since the output of the AND element AND4 is input to the set input terminal S of the latch circuit constituting the life suppression circuit 482, the output OUT4 of the latch circuit also becomes “H”, and the “L” signal inverted by the inverting element INV5 Is output.

  Since the output of the life suppression circuit 482 and the output of the control power supply detection circuit 40 are input to the 2-input AND element AND1, the operations of the timer circuit 42 and the inverter control circuit 44 are stopped as in the sixth embodiment.

  Note that the reset input terminal R of the latch circuit of the life suppression circuit 482 is not particularly illustrated, but the configuration is such that the latch circuit is reset according to the output signal of the no-load determination circuit 471 described in the sixth embodiment. It is good.

  The operation state output circuit 43 of the present embodiment includes an output of the OR element OR3 that inputs the latch circuit output OUT4 of the life suppression circuit 482 and the output OUT1 of the timer circuit 42, the output of the life suppression circuit 482, and the timer circuit 42. The output of the AND element AND3 receiving the output OUT1 is input. The output signal of the operation state output circuit 43 outputs a predetermined threshold value mode1 when OR3 output = “L” and AND3 output = “L”, and OR3 output = “H” and AND3 output = “H”. In this case, the predetermined threshold value mode2 is output, and when the OR3 output = "H" and the AND3 output = "L", the predetermined threshold value mode3 is output.

  That is, the output signal of the operation state output circuit 43 is mode1 when the operation state of the inverter circuit 2 is the preceding preheating state / starting state, and the output signal of the operation state output circuit 43 is mode2 when the operation state is the lighting state. Further, the output signal of the operation state output circuit 43 when the discharge lamp La reaches the end of life is mode3.

  The operation of the operation setting circuit 6 in the present embodiment stores the usage time of the discharge lamp La as in the conventional example and the fourth and fifth embodiments when the state signal mode2 is input, and the discharge lamp The light output can be controlled to be substantially constant regardless of the usage time of La. Further, when the discharge lamp La reaches the end of its life, that is, when the state signal mode3 is inputted, the time counting time can be reset initially. In the control integrated circuit 4 for controlling the inverter circuit 2, the lamp life is detected, and when it is determined that the lamp life is reached, a state signal corresponding to the state is output. Can be determined to be in the lamp life state almost simultaneously, and the operation setting circuit 6 is not mistaken for other states. For example, if the no-load state is determined by the no-load detection circuit 7 described in the sixth embodiment and the state signal of the no-load state is set to a level different from the state signal, the no-load state and the lamp life state are determined. There is no risk of misjudgment.

  Also in the present embodiment, since the predetermined threshold signal corresponding to the lighting state is output from one line from the operation state output circuit 43 of the control integrated circuit 4, it is released in the same manner as in the previous embodiments. This has the effect of reducing the size of the lighting device. Furthermore, reset control similar to the conventional example can be easily performed, and the reset switch S2 (see FIG. 47) added to the lighting fixture can be deleted.

(Embodiment 8)
FIG. 24 shows a control integrated circuit according to the eighth embodiment of the present invention. The operation waveform diagram is shown in FIG. Note that, as a basic configuration of the discharge lamp lighting device of the present embodiment, the lamp life detection circuit 8 may be provided as in the seventh embodiment (FIG. 22). The basic operation of the present embodiment is the same as that of the seventh embodiment. In response to the signal output from the timer circuit 42, the start circuit 45 is operated, the inverter control circuit 44 is operated, and the inverter circuit 2 is preheated. Start and lighting control. Further, dimming control is performed according to the signal level output from the operation setting circuit 6 to the output control circuit 41 of the control integrated circuit 4.

  The signal output from the lamp life detection circuit 8 may be a signal proportional to the voltage across the discharge lamp La as in the seventh embodiment, and is input to the life determination circuit 481 configured by the comparator CP5. The output of the comparator CP5 and the output OUT3 of the timer circuit 42 are input to the AND element AND4. When the output OUT3 of the timer circuit 42 = “L”, the output of the AND element AND4 is also “L”. After the transition to the lighting state, when the discharge lamp La is normal and the signal input from the lamp life detection circuit 8 is lower than the predetermined threshold value Vth6, the output of the comparator CP4 becomes “L”. The output of the element AND4 is “L”. The output of the AND element AND4 is input to the set input terminal S of the latch circuit constituting the life suppression circuit 482 as in the sixth embodiment, and when the output of the AND element AND4 is “L”, the output OUT4 of the latch circuit Becomes “L”, and the “H” signal inverted by the inverting element INV2 is output. When the discharge lamp La reaches the end of its life, the output of the comparator CP4 becomes “H” and the output of the AND element AND4 also becomes “H”. Therefore, the output OUT4 of the latch circuit that constitutes the lifetime suppressing circuit 482 also becomes “H”, and the “L” signal inverted by the inverting element INV2 is output.

  The output signal of the inverting element INV5 is input to the NOR element NOR1 that constitutes the NAND circuit NAND2 and the timer circuit 461. When the output of the life suppression circuit 482, that is, the output of the inverting element INV5 becomes “L”, the output of the NAND element NAND2 becomes “H”, and all the latch circuits in the output stage of the timer circuit 42 are reset. As a result, the output signals OUT0, OUT1, OUT2, and OUT3 of the timer circuit 42 all become “L”, and the drive signals for the switching elements Q1 and Q2 output from the inverter control circuit 44 are stopped.

  On the other hand, in the timer circuit 461, when the input reset signal = “L”, the output of the life suppression circuit 482 and the output of the NOR element NOR1 that inputs the reset signal become “H”. The counter circuit CNT2 constituting the timer circuit 461 has the same configuration as that of the counter circuit CNT1 of the timer circuit 42. The counter circuit CNT2 starts the counting operation when the STOP signal is “H”, and determines the number of input clock signals. When the count reaches a predetermined number of times, the output OUT5 becomes “H”. Since the output OUT5 is “L” during the counting operation of the counter circuit CNT2, the reset input terminal R of the latch circuit of the life suppression circuit 482 becomes “L”. When the count operation of the counter circuit CNT2 is completed, since the output OUT5 is “H”, the reset input terminal R of the latch circuit of the life suppression circuit 482 becomes “H”, and the output of the latch circuit of the life suppression circuit 482 is “L”. " Therefore, the output of the life suppression circuit 482 becomes “H”, the output of the NAND element NAND2 becomes “L”, and the reset state of the latch circuit of the timer circuit 42 is released.

  Also, at the timing when the output of the life suppression circuit 482 becomes “H”, the output of the one-shot circuit oneshot that outputs the “L” signal only for a short time, the output of the AND element AND5 becomes “L” for a short time, and the counter circuit Input to the STOP input of CNT1 causes the timer circuit 42 to resume its operation from the initial state.

  Further, the output signal of the life determination circuit 481 is input to the clock input terminal CLK of the counter circuit CNT3 that constitutes the stop maintaining circuit 462. The counter circuit CNT3 constituting the stop maintaining circuit 462 has the same configuration as the counter circuit CNT1 of the timer circuit 42. For example, when the output signal of the life determination circuit 481 is input three times, the output OUT6 is set to “H”. Configured.

  Since the output OUT6 of the counter circuit CNT3 constituting the stop maintaining circuit 462 is input to the AND element AND5 via the inverting element INV6, when the output OUT6 of the counter circuit CNT3 = “H”, the output of the AND element AND5 is also “L”. ", The timer circuit 42 and the inverter control circuit 44 stop operating, and the inverter control circuit 44 maintains the stopped state unless the output OUT6 of the counter circuit CNT3 constituting the stop maintaining circuit 462 is reset.

  The operation state output circuit 43 of the present embodiment includes the output of the OR element OR3 that receives the counter circuit CNT3 output OUT6 of the stop maintaining circuit 462 and the output OUT1 of the timer circuit 42, the output of the stop maintaining circuit 462, and the timer circuit 42. The output OUT1 of the AND element AND3 is input. The output signal of the operation state output circuit 43 outputs a predetermined threshold value mode1 when OR3 output = “L” and AND3 output = “L”, and OR3 output = “H” and AND3 output = “H”. In this case, the predetermined threshold value mode2 is output, and when the OR3 output = "H" and the AND3 output = "L", the predetermined threshold value mode3 is output.

  That is, the output signal of the operation state output circuit 43 is mode2 when the operation state of the inverter circuit 2 is the preceding preheating state, the start state, and the lighting state, and when the life suppression circuit 482 is operating, the operation state output circuit 43 The output signal is mode1. Further, when the stop maintaining circuit 462 operates and the inverter control circuit 44 maintains the stop state, the output signal of the operation state output circuit 43 becomes mode3.

  In the operation of the operation setting circuit 6 in the present embodiment, as in the case of the seventh embodiment, when the state signal mode3 is input, the time count time may be initialized. Also in the present embodiment, since the predetermined threshold signal corresponding to the lighting state is output from one line from the operation state output circuit 43 of the control integrated circuit 4, it is released in the same manner as in the previous embodiments. This has the effect of reducing the size of the lighting device.

  Further, the reset control similar to the conventional example can be easily performed, and in the seventh embodiment, the time count time is initially reset by determining the life once, so there is a high risk of data reset due to misuse or the like. However, in the present embodiment, since the initial reset process is performed after the inverter circuit 2 is operated several times, there is no possibility of erroneous data reset.

  In the seventh embodiment and the above description, the inverter control circuit 44 is stopped when the discharge lamp La reaches the end of its life. However, as shown in FIG. 26, the switching element is switched according to the output of the life suppression circuit 482. When the output of the life suppression circuit 482 is “H”, the output signal of the operation setting circuit 6 is transmitted to the output control circuit 41, and when the output of the life suppression circuit 482 is “L”, the predetermined threshold is set. The value signal Vth7 may be transmitted to the output control circuit 41. As a result, the ON / OFF cycle of the inverter circuit 2 controlled by the inverter control circuit 44 can be shortened during operation of the life suppression circuit 482, and the output of the inverter circuit 2 can be suppressed to a low output.

(Embodiment 9)
FIG. 27 shows the configuration of a discharge lamp lighting device according to Embodiment 9 of the present invention. The difference from the sixth embodiment shown in FIG. 19 is that a low power supply detection circuit 9 is provided at the output terminal of the rectifier DB, and the control integrated circuit 4 receives the output signal of the low power supply detection circuit 9. 491 and a low power supply suppression circuit 492 for stopping the operation of the inverter circuit 2 in accordance with the output of the low power supply determination circuit 491. The specific configuration of the control integrated circuit 4 may be considered to be the same as that of the sixth embodiment, and the signal output from the low power supply detection circuit 9 is compared with a predetermined threshold by the comparator, and the output of the comparator Accordingly, the inverter control circuit 44 may be stopped and the signal output from the operation state output circuit 43 may be switched. When the input voltage of the AC power supply AC decreases, the power supply from the control power supply circuit 5 tends to decrease, and the starter circuit 45 of the control integrated circuit 4 cannot perform sufficient supply. In such a case, for example, if the control power supply is insufficient during writing or reading of data in a microcomputer or EEPROM constituting the operation setting circuit 6, there is a possibility that the operation setting circuit 6 may malfunction. Therefore, when the level of the AC power supply AC is lowered and a state signal indicating that the power supply drop is detected in the low power supply detection circuit 9 is input, the processing of the operation setting circuit 6 may be controlled to stop.

(Embodiment 10)
The configuration of the discharge lamp lighting device according to Embodiment 10 of the present invention is shown in FIG. In the present embodiment, the DC power supply circuit 1 has a boost chopper configuration, and the control integrated circuit 4 includes a PFC control circuit 400 that outputs a drive signal to the switching element Q3 that constitutes the DC power supply circuit 1. Yes. Further, the output terminal of the DC power supply circuit 1 is provided with a smoothing output detection circuit 10 for detecting the output voltage of the DC power supply circuit 1, and the output signal of the smoothing output detection circuit 10 is an output decrease determination circuit of the control integrated circuit 4. 401 is input.

  FIG. 29 shows the control integrated circuit 4 of the present embodiment. Further, FIG. 30 shows an operation waveform diagram thereof. The basic operation of the present embodiment is the same as that of the fifth to ninth embodiments. The starter circuit 45 is operated according to the output signal OUT0 output from the timer circuit 42. When the OUT1 signal becomes “H”, the inverter control circuit 44 starts operating the inverter circuit 2. Further, dimming control is performed according to the signal level output from the operation setting circuit 6 to the output control circuit 41 of the control integrated circuit 4.

  Furthermore, in the present embodiment, an AND element AND9 that inputs the output signal OUT1 output from the timer circuit 42 and the output of the PFC cycle setting circuit 404 that determines the ON / OFF period of the switching element Q3 that constitutes the DC power supply circuit 1 is input. Is input to the drive circuit 403, and a drive signal is output to the switching element Q3. Therefore, when the output OUT1 of the timer circuit 42 is “L”, that is, when the inverter control circuit 44 is stopped, the output of the AND element AND9 is also “L”, and the drive signal is not output to the switching element Q3. When the output OUT1 of the timer circuit 42 is “H”, that is, when the inverter control circuit 44 starts oscillating, the output of the AND element AND9 is equal to the output of the PFC cycle setting circuit 404, and the drive signal is output to the switching element Q3. Is done.

  Although not shown here, the PFC cycle setting circuit 404 includes an error amplifier, and compares the signal output from the smooth output detection circuit 10 with a predetermined threshold value output from the reference power supply 410. Any configuration may be used as long as the on / off time of the switching element Q3 is determined based on the comparison result.

  The output signal of the smooth output detection circuit 10 is input to the comparator CP6 that constitutes the output decrease determination circuit 401, and is compared with a predetermined threshold value Vth8. The output of the AND element AND6 that inputs the output of the comparator CP6 and the output OUT2 of the timer circuit 42 is input to the 2-input AND element AND7, and the output OUT3 of the timer circuit 42 is input to the other input of the 2-input AND element AND7. Is done. In the preceding preheating state, since the output OUT2 of the timer circuit 42 is “L”, the output of the AND element AND6 is “L” and the output of the AND element AND7 is also “L”. In the starting state, the output OUT2 of the timer circuit 42 becomes “H”, and the output of the AND element AND6 becomes equal to the output of the comparator CP6.

  When the output signal of the smooth output detection circuit 10 is higher than the predetermined threshold value Vth8, the output of the AND element AND6 becomes “H”. Therefore, the output OUT3 of the timer circuit 42 becomes "H", the output of the AND element AND7 also becomes "H", and the lighting state is shifted.

  Now, when the output level of the DC power supply circuit 1 decreases and the output signal of the smooth output detection circuit 10 also decreases and becomes lower than the predetermined threshold value Vth8, the output of the AND element AND7 maintains "L". The signal output from the inverter cycle setting circuit 442 is equal to the signal in the starting state, and the operating frequency of the inverter circuit 2 is increased, whereby the output of the inverter circuit 2 is suppressed.

  The operation state output circuit 43 of the present embodiment includes an output of the comparator CP6 that constitutes the output decrease determination circuit 401, an output of the control power supply detection circuit 40, an output of the control power supply detection circuit 40, and an output OUT3 of the timer circuit 42. And the output of the comparator CP6 constituting the output decrease determination circuit 401 and the output of the control power supply detection circuit 40 are input to the AND element AND8. The output signal of the operation state output circuit 43 outputs a predetermined threshold value mode1 when AND3 output = “L” and AND8 output = “L”, and AND3 output = “L” and AND8 output = “H”. In this case, a predetermined threshold value mode3 is output, and when AND3 output = “H” and AND8 output = “H”, a predetermined threshold value mode2 is output, AND3 output = “H”, AND8 output = “L”. In the case of "", a predetermined threshold value mode1 is output.

  That is, when the operation state of the inverter circuit 2 is the pre-heating state or the start state, the output signal of the operation state output circuit 43 in the output reduction state where the output level of the DC power supply circuit 1 is reduced is mode1, and the output of the DC power supply circuit 1 is The output signal of the operation state output circuit 43 in the normal state is mode3, and in the lighting state, the output signal of the operation state output circuit 43 in the output decrease state in which the output level of the DC power supply circuit 1 is reduced is mode1, DC power supply The output signal of the operation state output circuit 43 in which the output level of the circuit 1 is normal is mode2.

  Further, the output signal of the operation state output circuit 43 when the discharge lamp La is at the end of its life state is mode2. The operation of the operation setting circuit 6 in this embodiment is such that the number of times the state signal mode3 is input is counted and stored, and the time in which the state signal mode2 is input, that is, the time in the lighting state is counted and stored. And the control of the operation setting circuit 6 may be controlled to stop.

  Here, the state signals mode1, mode2, and mode3 and a threshold signal setting method in each detection will be described. As shown in FIG. 29, the control power supply of the control integrated circuit 4 is input to the reference power supply circuit 410. The reference power supply circuit 410 only needs to be composed of a Zener diode, a buffer circuit, and the like. The reference power supply circuit 410 outputs a stable output level regardless of the level of the control power supply and is supplied as the power supply for each control unit. A desired DC signal can be obtained by connecting a plurality of resistors in series to the output terminal of the stable reference power supply at this level. The DC signal generated by this resistance voltage division may be used as the state signals mode1, mode2, mode3, and the threshold signal in each detection.

  Also in the present embodiment, as in the ninth embodiment, it is possible to prevent a malfunction occurring in the operation setting circuit 6 due to insufficient control power supply due to a decrease in the output level of the DC power supply circuit 1. Furthermore, it has the effect that the discharge lamp lighting device can be reduced in size as in the previous embodiments.

(Embodiment 11)
FIG. 31 shows a specific configuration of the oscillator OSC constituting the timer circuit 42 of the control integrated circuit 4 according to the eleventh embodiment of the present invention. The circuit configuration and basic operation are the same as those of the inverter cycle setting circuit 442 shown in FIGS. 3 and 9, and depend on the resistance value of the resistor Rtim connected inside or outside the control integrated circuit 4 and the capacitance of the capacitor Ctim. The period of the clock signal output from the oscillator OSC is determined. The waveform at both ends of the capacitor Ctim becomes a triangular waveform like the capacitor Cpls waveform shown in FIG. 4, and the output signal of the comparator CP7 is used as a clock signal. Further, for example, by inputting the output signal of the control power supply detection circuit 40 to the switch element SW7 connected in parallel with the capacitor Ctim via an inverting element (NOT circuit), the output of the capacitor Ctim It is possible to oscillate a triangular voltage waveform and output a clock signal, or to stop charging by stopping charging the capacitor Ctim.

  Here, when the voltage waveform of the triangular waveform of the capacitor Ctim is input to the comparator CP8 and the output of the analog switch circuit is input to the other input of the comparator CP8, the state signal output from the operation state output circuit 43 is constant. It is also possible to make a rectangular wave signal having a period of

  When the state signal output from the operation state output circuit 43 is a DC signal, the microcomputer used for the operation setting circuit 6 requires an A / D conversion circuit that converts an analog value into a digital value. A device that inputs a duty signal as a signal does not require an A / D conversion circuit, and can determine the state of the state signal “H” or “L” and the period of the state signal “H” or “L”. Well, you can use an inexpensive microcomputer.

(Embodiment 12)
FIG. 32 shows another specific configuration example of the oscillator OSC constituting the timer circuit 42 of the control integrated circuit 4 according to the twelfth embodiment of the present invention. The circuit configuration and the operation of the present embodiment are almost the same as those of the eleventh embodiment, and the state signal a output from the comparator CP8 depends on the input signals a and b input to the operation state output circuit 43. Variable duty ratio. In this embodiment, the input signal c input to the operation state output circuit 43 is output as it is as the state signal b. Here, the input signals a, b, and c input to the operation state output circuit 43 are “H” or “L” signals output from the logic circuits described in the above embodiments.

  In the first to eleventh embodiments, the state signal output from the operation state output circuit 43 to the operation setting circuit 6 is wired with one line. Control can be performed.

(Embodiment 13)
FIG. 33 shows the control integrated circuit 4 according to the thirteenth embodiment of the present invention. The configuration and operation of the present embodiment are almost the same as those of the tenth embodiment, and the basic configuration may be the same as that of the tenth embodiment. The control integrated circuit 4 of the present embodiment outputs the output of the reference power supply to the outside of the integrated circuit 4 via the switch element SW8. The switch element SW8 is turned on / off by the output OUT0 of the timer circuit 42, and is turned off when OUT0 = “L”, and turned on when OUT0 = “H”. This reference voltage is input to the input b of the operation setting circuit 6 via the switch element SW9, and is used as a status signal when the starter circuit 45 is operated. When OUT0 = “L”, that is, for control. What is necessary is just to control the microcomputer which comprises the operation setting circuit 6 to be in a sleep state in the state which the starting circuit 45 of the integrated circuit 4 is operating. Also in the present embodiment, since the state signal output from the operation state output circuit 43 to the operation setting circuit 6 is wired with two lines, control corresponding to a plurality of states is performed similarly to the twelfth embodiment. be able to.

(Embodiment 14)
FIG. 34 shows the control integrated circuit 4 according to the fourteenth embodiment of the present invention. The configuration and operation of the present embodiment are the same as those of the thirteenth embodiment, and the basic configuration may be the same as that of the tenth embodiment. The control integrated circuit 4 of the present embodiment outputs the output of the reference power supply to the outside of the integrated circuit 4 via the switch element SW8 as in the thirteenth embodiment, and is used as a control power supply for the operation setting circuit 6. is doing.

  For example, when the timer circuit 42 is reset in the no-load state by the no-load detection described in the sixth embodiment, the output OUT0 of the timer circuit 42 is maintained at “L”, so that the power supply to the operation setting circuit 6 is supplied. Can be stopped, and current consumption in the control integrated circuit 4 and the operation setting circuit 6 can be minimized.

  In the thirteenth embodiment, the microcomputer is controlled to be in the sleep state by the input state signal to reduce power consumption. However, in this embodiment, the same effect is achieved by stopping the supply of control power. ing.

  In this embodiment, since the state signal output from the operation state output circuit 43 to the operation setting circuit 6 is wired by one line, the same effects as those of the first to eleventh embodiments are obtained.

(Embodiment 15)
FIG. 35 shows a circuit diagram of the discharge lamp lighting device according to Embodiment 15 of the present invention. The present embodiment includes the no-load detection circuit 7 described in the sixth embodiment, the low power supply detection circuit 9 described in the ninth embodiment, and the smooth output detection circuit 10 described in the tenth embodiment. The integrated circuit 4 receives a signal from each detection circuit, determines that it is abnormal, and stops the inverter control circuit 44. The no-load determination circuit 471, the no-load suppression circuit 472, the low power source determination circuit 491, the low power source suppression circuit 492, the output A decrease determination circuit 401 and an output decrease suppression circuit 402 are provided.

  The outputs of the no-load suppression circuit 472, the low power supply suppression circuit 492, and the output decrease suppression circuit 402 are input to the OR element OR6. The output signal of the OR element OR6 stops the inverter control circuit 44 and also outputs to the operation state output circuit 43. Entered. Therefore, the state signal output from the operation state output circuit 43 in the no-load suppression state, the low power supply suppression state, and the output decrease suppression state is the same signal. Also in this embodiment, when a state signal in the no-load suppression state, the low power supply suppression state, and the output decrease suppression state is input, the microcomputer may be controlled to enter the sleep state to reduce power consumption.

(Embodiment 16)
FIG. 36 shows a circuit diagram of the discharge lamp lighting device according to Embodiment 16 of the present invention. In the present embodiment, the no-load detection circuit 7 described in the sixth embodiment and the lamp life detection circuit 8 described in the seventh embodiment are provided, and the control integrated circuit 4 inputs the signals of the respective detection circuits. Thus, a no-load discrimination circuit 471, a no-load suppression circuit 472, a lifetime determination circuit 481, and a lifetime suppression circuit 482 that are determined to be abnormal and stop the inverter circuit 2 or suppress the output from the inverter circuit 2 are provided.

  The output of the no-load suppression circuit 472 and the output of the life suppression circuit 482 are input to the OR element OR7, and the output of the OR element OR7 is input to the inverter control circuit 44. Thus, control is performed to stop the operation of the inverter control circuit 44 in the no-load state and the life suppression state in which the lamp life is detected.

  In this embodiment, the output of the no-load suppression circuit 472 is input to the timer circuit 463, and the output of the timer circuit 463 is input to the inverting element INV8. The output of the AND element AND9 that inputs the output of the inverting element INV8 and the output of the no-load suppression circuit 472 is input to the OR element OR8. The output of the life suppression circuit 482 is input to the other input of the OR element OR8, and the output of the OR element OR8 is input to the operation state output circuit 43. The timer circuit 463 may have a configuration similar to that of the timer circuit 42 and the timer circuit 461. The output of the oscillator OSC of the timer circuit 42 is input as a clock signal, and a predetermined count number is counted, and then rises to “H”. . The output of the no-load suppression circuit 472 is input to the STOP input of the counter circuit in the timer circuit 463. When the output of the no-load suppression circuit 472 is “H”, the count operation is performed.

  FIG. 37 shows an operation state output signal when the life suppression circuit 482 operates, and FIG. 38 shows an operation state output signal when the no-load suppression circuit 472 operates. When the life suppression circuit 482 operates, the output of the OR element OR8 becomes “H”, and the operation state output circuit 43 outputs a predetermined state output mode3 according to the output signal of the OR element OR8.

  When the no-load suppression circuit 472 operates, the timer circuit 463 starts operating simultaneously with the output signal of the no-load suppression circuit 472 becoming “H”. At this time, since the output of the timer circuit 463 is “L”, the output of the AND element AND9 is “H”, and therefore the output of the OR element OR8 is also “H”. The output of the operation state output circuit 43 at this time is the same as when the life suppression circuit 482 is operated, and outputs a predetermined state signal mode3.

  When a predetermined count operation is performed and the output of the timer circuit 463 becomes “H”, the output of the AND element AND9 becomes “L”, so the output of the OR element OR8 also becomes “L”. The output of the operation state output circuit 43 at this time outputs a predetermined state signal mode1. The operation setting circuit 6 is controlled to perform a process of resetting the time measurement data when the mode 3 signal is input during a predetermined period.

  By performing the operation as described above, when the discharge lamp La is removed and the AC power supply AC is turned on in a no-load state, the operation state output circuit 43 outputs the state signal mode3. For example, if the operation setting circuit 6 performs a process of resetting time data when the state signal of mode 3 is determined three times or more every time the AC power supply AC is turned on, the data can be reset easily.

  In addition, as described in the seventh embodiment, when resetting the timekeeping data in the stop-maintenance state, the state signal in the stop-maintenance state and the no-load state only during a predetermined period when the timer circuit 463 is operating. The state signals may be the same signal.

(Embodiment 17)
FIG. 39 shows a control integrated circuit according to the seventeenth embodiment of the present invention. Instead of the oscillator OSC of the timer circuit 42, the clock signal generated by the operation setting circuit 6 is input. Other configurations and operations are the same as those in the eighth embodiment. With this configuration, the cycle of the clock signal can be changed according to the state signal output from the operation state output circuit 43.

  Now, it is assumed that the state signal mode1 is output in the preheating state, the state signal mode2 is output in the starting state, and the state signal mode3 is output in the lighting state, and the clock generated by the operation setting circuit 6 corresponding to the state signal The signal periods are Tpre, Tstr, and Tosc, respectively. By changing the period of the clock signal, the preheating state time Tpre × n and the starting state time Tpre × m can be arbitrarily set individually, and the starting state time can be shortened in conjunction with an external signal. Such control can also be performed.

  For example, when a human sensor signal is input, the start time is shortened when the sensor is detected, and control to shift to the lighting state in a relatively short time may be performed.

(Embodiment 18)
A specific configuration of the operation setting circuit 6 according to the eighteenth embodiment of the present invention is shown in FIG. The state signal output from the control integrated circuit 4 is input to the A / D converter 61 of the operation setting circuit 6 and converts the analog signal into a digital signal. The state signal converted into the digital signal is subjected to the following three state determination processing by the state determination processing unit 62.

Operation state A: Since the control integrated circuit 4 is operating normally, the lighting time count processing unit 63 counts the normal time and performs a process of storing the time measurement result in the nonvolatile memory 66.
Operation state B: Since the process for resetting the stored data has been performed by the discharge lamp lighting device, the lighting time reset processing unit 64 performs a process for resetting the stored data in the nonvolatile memory 66.
Operation state C: Since there is a possibility that the control power is not normally supplied in the discharge lamp lighting device, the sleep state transition processing unit 65 interrupts the above processing and shifts to the sleep state.

  The dimming ratio selection unit 67 selects the dimming ratio based on the table as shown in FIG. 47B stored in the non-volatile memory 66 and the storage data of the lighting time. The dimming signal generation unit 68 generates a dimming signal according to the selected dimming ratio and outputs it to the output control circuit 41 of the control integrated circuit 4. As a result, the control as described in the conventional example can be performed, the malfunction can be prevented, and the size can be reduced.

  Further, in the lighting fixture using the discharge lamp lighting device of the fifth, eighth, and sixteenth embodiments, there is no fear of malfunction as in the conventional example, and as shown in FIG. 41, the reset switch S2 (see FIG. 47) is connected to the lighting fixture. ) Is not required to be added, and a significant cost reduction can be achieved.

It is a circuit diagram which shows the discharge lamp lighting device of Embodiment 1 of this invention. 1 is a circuit diagram showing a control integrated circuit according to a first embodiment of the present invention. It is a circuit diagram which shows the specific example of the inverter control circuit of Embodiment 1 of this invention. It is a wave form diagram which shows the charging / discharging operation | movement of the capacitor | condenser in the inverter period setting circuit of Embodiment 1 of this invention. It is an operation waveform diagram for demonstrating operation | movement of the control integrated circuit of Embodiment 1 of this invention. It is a circuit diagram which shows the integrated circuit for control of Embodiment 2 of this invention. It is an operation | movement waveform diagram for demonstrating operation | movement of the control integrated circuit of Embodiment 2 of this invention. It is a circuit diagram which shows the integrated circuit for control of Embodiment 3 of this invention. It is a circuit diagram which shows the specific example of the inverter control circuit of Embodiment 3 of this invention. It is a circuit diagram which shows the discharge lamp lighting device of Embodiment 4 of this invention. It is a circuit diagram which shows the integrated circuit for control of Embodiment 4 of this invention. It is an operation | movement waveform diagram which shows operation | movement of the operation setting circuit of Embodiment 4 of this invention. It is an operation | movement waveform diagram which shows operation | movement of the output control circuit of Embodiment 4 of this invention. It is a circuit diagram which shows the discharge lamp lighting device of Embodiment 5 of this invention. It is a circuit diagram which shows the integrated circuit for control of Embodiment 5 of this invention. It is an operation | movement waveform diagram for demonstrating operation | movement of the control integrated circuit of Embodiment 5 of this invention. It is a circuit diagram which shows an example of the control power supply circuit of Embodiment 5 of this invention. It is a circuit diagram which shows another example of the control power supply circuit of Embodiment 5 of this invention. It is a circuit diagram which shows the discharge lamp lighting device of Embodiment 6 of this invention. It is a circuit diagram which shows the control integrated circuit of Embodiment 6 of this invention. It is an operation | movement waveform diagram for demonstrating operation | movement of the control integrated circuit of Embodiment 6 of this invention. It is a circuit diagram which shows the discharge lamp lighting device of Embodiment 7 of this invention. It is a circuit diagram which shows the control integrated circuit of Embodiment 7 of this invention. It is a circuit diagram which shows the control integrated circuit of Embodiment 8 of this invention. It is an operation | movement waveform diagram for demonstrating operation | movement of the control integrated circuit of Embodiment 8 of this invention. It is a circuit diagram which shows the principal part structure of the modification of the integrated circuit for control of Embodiment 8 of this invention. It is a circuit diagram which shows the discharge lamp lighting device of Embodiment 9 of this invention. It is a circuit diagram which shows the discharge lamp lighting device of Embodiment 10 of this invention. It is a circuit diagram which shows the control integrated circuit of Embodiment 10 of this invention. It is an operation | movement waveform diagram for demonstrating operation | movement of the control integrated circuit of Embodiment 10 of this invention. FIG. 38 is a circuit diagram showing a specific configuration of an oscillator constituting the timer circuit of the control integrated circuit according to the eleventh embodiment of the present invention. It is a circuit diagram which shows the specific structure of the oscillator which comprises the timer circuit of the control integrated circuit of Embodiment 12 of this invention. It is a circuit diagram which shows the control integrated circuit of Embodiment 13 of this invention. It is a circuit diagram which shows the integrated circuit for control of Embodiment 14 of this invention. It is a circuit diagram which shows the discharge lamp lighting device of Embodiment 15 of this invention. It is a circuit diagram which shows the discharge lamp lighting device of Embodiment 16 of this invention. It is a wave form diagram which shows the operation state output signal when the lifetime suppression circuit of Embodiment 16 of this invention operate | moves. It is a wave form diagram which shows the operation state output signal when the no-load suppression circuit of Embodiment 16 of this invention operate | moves. It is a circuit diagram which shows the integrated circuit for control of Embodiment 17 of this invention. It is a circuit diagram which shows the specific structure of the operation state output circuit of Embodiment 18 of this invention. It is a perspective view which shows the external appearance of the lighting fixture using the discharge lamp lighting device of Embodiment 5, 8, and 16 of this invention. FIG. 6 is a circuit diagram of Conventional Example 1. FIG. 10 is a circuit diagram of Conventional Example 2. FIG. 10 is a circuit diagram of Conventional Example 3. 10 is a flowchart showing the operation of Conventional Example 3. It is operation | movement explanatory drawing of the initial illumination intensity correction by the prior art example 3. It is a perspective view which shows the external appearance of the lighting fixture using the conventional discharge lamp lighting device.

Explanation of symbols

La discharge lamp AC AC power supply DB full wave rectifier 1 DC power supply circuit 2 inverter circuit 3 load circuit 4 control integrated circuit 5 control power supply circuit 6 operation setting circuit 40 control power supply detection circuit 41 output control circuit 42 timer circuit 43 operation state output circuit 44 Inverter control circuit 45 Start-up circuit

Claims (14)

  1. A rectifier for rectifying the AC power supply;
    A DC power supply circuit having at least one smoothing capacitor and connected to an output terminal of the rectifier;
    An inverter circuit connected to the output terminal of the DC power supply circuit, having a series circuit of two switching elements connected in series, and alternately turning on and off the switching elements;
    A load circuit that has at least one resonance inductor, a resonance capacitor, and a discharge lamp, inputs a high-frequency voltage output from the inverter circuit, and lights the discharge lamp by a resonance action;
    A control integrated circuit for driving and controlling the switching element of the inverter circuit;
    A control power supply circuit for supplying control power to the control integrated circuit;
    In a discharge lamp lighting device comprising:
    Equipped with a no-load detection circuit that detects whether the discharge lamp is connected and a lamp life detection circuit that detects the life of the discharge lamp,
    The control integrated circuit includes:
    First timer means for determining a state pre-heating state in which the filament of the discharge lamp is pre-heated, a starting state in which a starting voltage is applied to the discharge lamp, and a state switching time for sequentially switching to a lighting state in which the discharge lamp is lit at a predetermined output. When,
    First control means for determining an on / off period of the switching element of the inverter circuit according to a control signal input from the first timer means, and outputting a drive signal to the switching element of the inverter circuit;
    Depending on the control signal that is input from outside the control integrated circuit and performs dimming control of the discharge lamp or stop control of the inverter circuit, the drive signal cycle output from the first control means is variable, or the drive signal A second control means for controlling the stop;
    A first abnormality determination means for inputting a detection signal from the no-load detection circuit and determining whether or not an abnormal state;
    First output suppression means for stopping the operation of the inverter circuit when it is determined as an abnormal state;
    A second abnormality determining means for inputting a detection signal from the lamp life detecting circuit and determining whether or not an abnormal state;
    A second output suppression means for suppressing or stopping the output of the inverter circuit when it is determined as an abnormal state;
    An operation state output means for outputting a predetermined state signal corresponding to the operation state of the control integrated circuit;
    From the initial state of the first timer means to an arbitrary time from the start state to the state switching time, an abnormality determination prohibition period for stopping at least one of the second abnormality determination means and the second output suppression means is provided. Prepared,
    An operation setting circuit for inputting a state signal from the operation state output unit to the outside of the control integrated circuit and outputting a control signal to the second control unit of the control integrated circuit;
    The operation state output means corresponds to at least a lighting state, a first output suppression state in which the first output suppression means is operating, and a second output suppression state in which the second output suppression means is operating. A discharge lamp lighting device that outputs a status signal.
  2. The control integrated circuit includes second timer means for determining an output suppression time during which the second output suppression means is operating, and after the output suppression time has elapsed, the second output suppression state ends and the first output suppression state ends. The timer means starts operation from the initial state, and includes a stop maintaining means for maintaining the inverter circuit stop when the number of operations of the second output suppression means reaches a predetermined number of times. 2. A state signal corresponding to the second output suppression state in which the output suppression means is operating and a state signal corresponding to the stop maintenance state in which the stop maintaining means is operating are output. The discharge lamp lighting device described.
  3. The first timer means and the second timer means input a reference clock signal having a fixed period, and determine the state switching time and the output suppression time by counting the number of times the reference clock signal is input. 3. The discharge lamp lighting device according to claim 2 , wherein the reference clock signal is generated by the operation setting circuit, and the clock cycle is varied in accordance with the state signal.
  4. The operation setting circuit receives a status signal from the control integrated circuit, converts an analog signal into a digital signal, and an accumulated time according to at least the status signal in which the control integrated circuit is in a lighting state. Time control means for timing, storage means for storing the accumulated time, and a control signal for dimming control of the discharge lamp in accordance with the accumulated time stored in the storage means, the second control of the control integrated circuit An operation correcting means for outputting to the means, a reset means for initially resetting the accumulated time in the storage means in response to a state signal corresponding to the second output suppression state or the stop maintaining state, and a first output suppression state. 4. The discharge lamp lighting device according to claim 2, further comprising sleep means for stopping the operation of the operation setting circuit in accordance with a corresponding state signal .
  5. The state signal during the predetermined period immediately after the transition to the first output suppression state is equal to the state signal corresponding to the second output suppression state or the state signal corresponding to the stop maintaining state, and the first output after the predetermined period has elapsed. The discharge lamp lighting device according to any one of claims 2 to 4 , wherein the state signal corresponding to the suppression state is a state signal corresponding to the second output suppression state or a signal different from the stop maintaining state. .
  6. A low power supply detection circuit for detecting a drop in the supply voltage from the AC power supply is provided, and the integrated circuit for control inputs a detection signal from the low power supply detection circuit to determine whether or not an abnormal state exists. An abnormality determining means; and a third output suppressing means for suppressing or stopping the output of the inverter circuit when it is determined as an abnormal state, and the third output suppressing means is operating as the operating state output means. The discharge lamp lighting device according to any one of claims 1 to 5 , wherein a state signal corresponding to the third output suppression state is output.
  7. The DC power supply circuit includes at least one switching element, and includes a smoothing output detection circuit that detects an output voltage of the DC power supply circuit, and the integrated circuit for control inputs a detection signal from the smoothing output detection circuit, An error amplifier that performs comparison with a predetermined threshold value, a third control circuit that controls the on / off period of the switching element of the DC power supply circuit according to the output signal of the error amplifier and outputs a drive signal to the switching element of the DC power supply circuit The control means, a fourth abnormality determining means for inputting a detection signal from the smooth output detecting circuit and determining whether or not an abnormal state is detected, and to the switching element of the DC power supply circuit when the abnormal state is determined A fourth output suppression means for stopping the output of the drive signal or suppressing the output of the inverter circuit, and the operating state output means is the fourth output suppression means operating. The discharge lamp lighting device according to any one of claims 1 to 6, characterized in that for outputting a status signal corresponding to the output suppression state of.
  8. 8. The discharge lamp lighting device according to claim 6, wherein state signals corresponding to at least the first output suppression state, the third output suppression state, and the fourth output suppression state are equal.
  9. State signal outputted from the operation status output unit corresponds to the operating state of the at least three control integrated circuit, release according to any one of claims 1 to 8, characterized in that a DC voltage signal Electric light lighting device.
  10. State signal outputted from the operation status output unit corresponds to the operating state of the at least three control integrated circuit, a discharge lamp according to any one of claims 1 to 8, characterized in that the duty signal Lighting device.
  11. The discharge lamp lighting device according to any one of claims 1 to 8 , wherein the status signal output from the operating status output means includes a duty signal and a DC voltage signal.
  12. The control integrated circuit includes a reference voltage generation unit, and a voltage output from the reference voltage generation unit to the outside of the control integrated circuit is output after a state switching time for starting a preheating state and input to the operation setting circuit. Te, a discharge lamp lighting device according to any one of claims 1 to 11, wherein Rukoto to initiate the operation of the operation setting circuit.
  13. 13. The discharge lamp lighting device according to claim 12 , wherein a voltage output from the reference voltage generating means to the outside of the control integrated circuit is supplied as a control power source for the operation setting circuit.
  14. A lighting fixture comprising the discharge lamp lighting device according to any one of claims 1 to 13 in a fixture main body.
JP2008002718A 2008-01-10 2008-01-10 Discharge lamp lighting device and lighting fixture Expired - Fee Related JP4661871B2 (en)

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0359996A (en) * 1989-07-26 1991-03-14 Matsushita Electric Works Ltd Discharge lamp lighting device
JPH06283288A (en) * 1993-03-26 1994-10-07 Mitsubishi Denki Shomei Kk Discharge lamp lighting device
JPH10326682A (en) * 1997-05-27 1998-12-08 Matsushita Electric Works Ltd Discharge lamp lighting device
JPH11214189A (en) * 1998-01-27 1999-08-06 Matsushita Electric Works Ltd Discharge lamp lighting device
JP2000166245A (en) * 1998-11-25 2000-06-16 Matsushita Electric Works Ltd Power supply
JP2000200691A (en) * 1998-12-29 2000-07-18 Hitachi Lighting Ltd Fluorescent lamp lighting device
JP2002319498A (en) * 2001-02-13 2002-10-31 Koito Mfg Co Ltd Discharge lamp lighting circuit

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0359996A (en) * 1989-07-26 1991-03-14 Matsushita Electric Works Ltd Discharge lamp lighting device
JPH06283288A (en) * 1993-03-26 1994-10-07 Mitsubishi Denki Shomei Kk Discharge lamp lighting device
JPH10326682A (en) * 1997-05-27 1998-12-08 Matsushita Electric Works Ltd Discharge lamp lighting device
JPH11214189A (en) * 1998-01-27 1999-08-06 Matsushita Electric Works Ltd Discharge lamp lighting device
JP2000166245A (en) * 1998-11-25 2000-06-16 Matsushita Electric Works Ltd Power supply
JP2000200691A (en) * 1998-12-29 2000-07-18 Hitachi Lighting Ltd Fluorescent lamp lighting device
JP2002319498A (en) * 2001-02-13 2002-10-31 Koito Mfg Co Ltd Discharge lamp lighting circuit

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