JP4653703B2 - FET sensor - Google Patents

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JP4653703B2
JP4653703B2 JP2006199462A JP2006199462A JP4653703B2 JP 4653703 B2 JP4653703 B2 JP 4653703B2 JP 2006199462 A JP2006199462 A JP 2006199462A JP 2006199462 A JP2006199462 A JP 2006199462A JP 4653703 B2 JP4653703 B2 JP 4653703B2
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修司 高松
幹人 山貫
康史 上田
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Description

本発明は、ＦＥＴ（電界効果トランジスター）を用い、そのゲート部にアルミナ膜等のイオン感応膜を成膜（被着）して被検液中のイオン濃度を測定するイオンセンサや、前記ゲート部に酵素膜等の生体反応膜を成膜してなるバイオセンサ等として利用されるＦＥＴセンサに関する。   The present invention uses an FET (field effect transistor), and an ion sensor that measures (deposits) an ion-sensitive film such as an alumina film on the gate portion thereof to measure the ion concentration in a test solution, and the gate portion. The present invention relates to an FET sensor used as a biosensor or the like formed by forming a bioreactive film such as an enzyme film on the substrate.

この種のＦＥＴセンサの代表例として、ＩＳＦＥＴ（ｉｏｎ ｓｅｎｓｉｔｉｖｅ ＦＥＴ）を用いて構成されるイオンセンサについて検討してみると、現在の半導体技術の進歩によりＩＳＦＥＴ自体の小型化、微細化は容易であるが、測定電位の基準となる比較電極として、ＫＣｌ／ＡｇＣｌ／Ａｇ（銀−塩化銀電極）構造の液絡式の比較電極を用いたものでは、センサ全体の小型化に自ずと限界があった。   As a representative example of this type of FET sensor, when an ion sensor configured using an ISFET (ion sensitive FET) is examined, it is easy to reduce the size and miniaturization of the ISFET itself due to the progress of current semiconductor technology. However, in the case of using a liquid crystal type comparison electrode having a KCl / AgCl / Ag (silver-silver chloride electrode) structure as a reference electrode serving as a reference for the measurement potential, there is a limit to downsizing the entire sensor.

このような小型化の阻害要因となっている液絡式の比較電極を用いないでイオン濃度を測定できるようにしたイオンセンサとして、従来、ＦＥＴのゲート部にイオン感応膜を被着してなる測定用ＩＳＦＥＴとＦＥＴのゲート部にイオン不感応膜を被着してなる参照用ＩＳＦＥＴ及び擬似比較電極を設け、これらを被検液などの被測定対象に同時に接触させることにより、前記擬似比較電極に対する前記両ＩＳＦＥＴの検出電位の差を演算処理してイオン濃度を出力（測定）するように構成したものが提案されている（例えば、特許文献１参照）。   Conventionally, an ion-sensitive film is applied to the gate portion of an FET as an ion sensor that can measure the ion concentration without using a liquid junction type comparative electrode that is an obstacle to downsizing. The ISFET for measurement and the reference ISFET formed by depositing an ion-insensitive film on the gate portion of the FET and the pseudo comparison electrode are provided, and the pseudo comparison electrode is brought into contact with an object to be measured such as a test solution at the same time. A configuration is proposed in which an ion concentration is output (measured) by calculating a difference between detection potentials of the two ISFETs (see, for example, Patent Document 1).

また、特性が同一の測定用及び参照用の二つのＩＳＦＥＴと擬似比較電極を設け、測定用のＩＳＦＥＴを被測定対象に接触させ、また、参照用のＩＳＦＥＴ及び擬似比較電極を標準液に接触（浸漬）させることにより、二つのＩＳＦＥＴの検出電位の差を演算処理してイオン濃度を出力（測定）するように構成したものも提案されている（例えば、特許文献２参照）。   In addition, two ISFETs for reference and pseudo-reference electrodes having the same characteristics are provided, the ISFET for measurement is brought into contact with the object to be measured, and the ISFET for reference and the pseudo-reference electrode are brought into contact with the standard solution ( There has also been proposed a configuration in which the ion concentration is output (measured) by calculating the difference between detection potentials of two ISFETs by immersion (see, for example, Patent Document 2).

特公昭５８−２５２２１号公報Japanese Patent Publication No. 58-25221 特開平９−１７８６９７号公報Japanese Patent Laid-Open No. 9-178697

しかし、特許文献１で提案されている従来のイオンセンサ（ＦＥＴセンサ）の場合は、ＩＳＦＥＴのゲート部が窒化珪素等の無機物薄膜であるのに対して、イオン不感応膜としてはバリレンやテフロン（登録商標）等の疎水性高分子薄膜が用いられており、両薄膜の経時的ドリフト特性、誘導ノイズ感受性、温度特性を精度よく揃えることが技術的に非常に困難である。また、両ＩＳＦＥＴのゲート部における成膜工程も異なるために、両ＦＥＴ特性にも変化が生じやすくて、両ＩＳＦＥＴの前述の特性を揃えることがますます困難となり、その結果、所定の測定精度の低下は避けられないという問題がある。   However, in the case of the conventional ion sensor (FET sensor) proposed in Patent Document 1, the gate portion of the ISFET is an inorganic thin film such as silicon nitride, whereas the ion insensitive film is valylene or Teflon ( Hydrophobic polymer thin films such as registered trademark are used, and it is technically very difficult to accurately align the drift characteristics, sensitivity to induced noise, and temperature characteristics of both thin films over time. Also, because the film formation process at the gates of both ISFETs is different, the characteristics of both FETs are likely to change, making it more difficult to align the aforementioned characteristics of both ISFETs. There is a problem that the decline is inevitable.

一方、特許文献２で提案されている従来のイオンセンサの場合は、特性が同一の二つのＩＳＦＥＴを用いればよいので、上述した従来のイオンセンサが有する問題を解消し、測定精度の向上が図れる反面、参照用のＩＳＦＥＴ及び擬似比較電極を常時接触（浸漬）させるための標準液を保持する保液部が必要であり、センサを完全ソリッドステート化できないばかりか、センサ全体を十分に小型化、微細化することができないという問題があった。   On the other hand, in the case of the conventional ion sensor proposed in Patent Document 2, it is only necessary to use two ISFETs having the same characteristics. Therefore, the problems of the conventional ion sensor described above can be solved and the measurement accuracy can be improved. On the other hand, a liquid holding part that holds a standard solution for always contacting (immersing) the ISFET for reference and the pseudo-reference electrode is necessary, and the sensor cannot be completely solid-stated. There was a problem that it could not be miniaturized.

本発明は上述の実情に鑑みてなされたもので、その目的は、液絡式の比較電極も標準液も用いず全体の完全ソリッドステート化及び小型化並びに低コスト化を図りつつ、測定感度並びに測定精度の著しい向上を達成することができるＦＥＴセンサを提供することにある。   The present invention has been made in view of the above-described circumstances, and its purpose is to achieve measurement sensitivity and a reduction in overall solid state, size reduction, and cost reduction without using a liquid junction type reference electrode and a standard solution. It is an object of the present invention to provide an FET sensor that can achieve a significant improvement in measurement accuracy.

上記目的を達成するために、本発明に係るＦＥＴセンサは、ｐ型ＦＥＴとｎ型ＦＥＴ並びに比較電極を備え、前記ｐ型ＦＥＴ及びｎ型ＦＥＴのゲート部を被測定対象に同時に接触させたときの前記比較電極と前記各ＦＥＴとの間の電位をそれぞれ検出し、それら検出電位の差を演算処理して出力するように構成していることを特徴としている。   In order to achieve the above object, an FET sensor according to the present invention includes a p-type FET, an n-type FET, and a comparison electrode, and the gate portion of the p-type FET and the n-type FET is simultaneously brought into contact with a measurement object. The comparison electrode and each FET are respectively detected, and the difference between the detection potentials is calculated and output.

上記のような特徴構成を有する本発明によれば、被測定対象のゲート電位に対するｐ型ＦＥＴ及びｎ型ＦＥＴの動作が全く正反対であるので、それら出力の差をとることにより例えばイオン濃度などを液絡式の比較電極を用いずとも、固体比較電極または擬似比較電極（請求項２）を用いて所定の測定を行うことが可能であり、また、標準液が不要で保液部を設ける必要もないので、センサ全体を完全にソリッドステート化できるとともに、小型化することができる。しかも、両ＦＥＴのゲート部に対する成膜工程も同じでよいために、それだけ製造工程の簡易化が図れて製造コストを低減できるとともに、品質のばらつきがなく、品質の向上も図れる。加えて、比較電極とｐ型及びｎ型ＦＥＴとの間の検出電位の差をとるために、各ＦＥＴの経時的ドリフト、誘導ノイズ感受性及び温度特性を容易にキャンセルすることができ、かつ、同一特性のＦＥＴを用いて両者の差をとる場合に比べて出力差を非常に大きくして測定感度を凡そ倍にすることができる。したがって、上記した品質の向上と相俟って、イオン濃度等の所定の測定精度の著しい向上を達成することができるという効果を奏する。   According to the present invention having the above-described characteristic configuration, the operations of the p-type FET and the n-type FET with respect to the gate potential of the object to be measured are exactly opposite to each other. Even without using a liquid junction type reference electrode, it is possible to perform a predetermined measurement using a solid reference electrode or a pseudo reference electrode (Claim 2), and it is not necessary to use a standard solution and to provide a liquid holding part. Therefore, the entire sensor can be completely solid-stated and miniaturized. In addition, since the film formation process for the gate portions of both FETs may be the same, the manufacturing process can be simplified, the manufacturing cost can be reduced, and there is no variation in quality, and the quality can be improved. In addition, in order to take the difference in detection potential between the reference electrode and the p-type and n-type FETs, the drift over time, sensitivity to induced noise and temperature characteristics of each FET can be easily canceled, and the same Compared with the case where the characteristic FET is used to obtain the difference between the two, the output difference can be greatly increased, and the measurement sensitivity can be approximately doubled. Therefore, in combination with the above-described improvement in quality, it is possible to achieve a significant improvement in predetermined measurement accuracy such as ion concentration.

本発明において、前記ｐ型ＦＥＴとｎ型ＦＥＴもしくはｐ型ＦＥＴとｎ型ＦＥＴ並びに比較電極をワンチップ基板上に成形する場合（請求項３）、あるいは、それら各々またはその一部が分離されてチップ状に成形されたものを一つの基板上に組み合わせて形成する場合（請求項４）のいずれであってもよいが、特に、ワンチップ基板上に成形する場合は、センサ全体を一層小型化して取扱いの利便性向上及び製造コストの一層の低減を図ることができる。   In the present invention, when the p-type FET and the n-type FET or the p-type FET and the n-type FET and the comparison electrode are formed on a one-chip substrate (Claim 3), or each or a part thereof is separated. Any of the cases where the chip-shaped product is combined and formed on a single substrate (Claim 4) may be used. In particular, when forming on a one-chip substrate, the entire sensor is further downsized. Thus, the convenience of handling can be improved and the manufacturing cost can be further reduced.

また、本発明において、前記ｐ型ＦＥＴとｎ型ＦＥＴ並びに比較電極の配置関係はどのようなものであってもよいが、請求項５に記載のように、前記ｐ型ＦＥＴとｎ型ＦＥＴを基板上に横並び配置し、この横並び配置されたｐ型ＦＥＴとｎ型ＦＥＴの中間位置に前記比較電極を配置する構成を採用することにより、センサ全体のより一層の薄型化、小型化が図れるとともに、製造も容易である。   In the present invention, the p-type FET, the n-type FET, and the comparison electrode may be arranged in any arrangement. However, as described in claim 5, the p-type FET and the n-type FET are By adopting a configuration in which the reference electrodes are arranged side by side on the substrate and the comparison electrode is arranged at an intermediate position between the side-by-side p-type FET and n-type FET, the entire sensor can be further reduced in thickness and size. It is easy to manufacture.

以下、本発明の実施の形態を、図面を参照しながら説明する。
図１は、本発明に係るＦＥＴセンサをイオンセンサに適用した場合の要部構造を示す縦断面図である。このイオンセンサ１は、高絶縁性のワンチップ基板であるシリコン（Ｓｉ）ウエハ２にｐ型領域３とｎ型領域４を作製するとともに、これらｐ型領域３、ｎ型領域４にｎ型チャンネルＦＥＴ５，ｐ型チャンネルＦＥＴ６を作り込み、各ドレインとソース間に亘ってアルミ配線７，８した後、全体をＳｉＯ2 などの酸化膜９で覆い、かつ、五酸化タンタル（Ｔａ2Ｏ5 ）などのイオン感応膜１０を前記両ＦＥＴ５，６のゲート部に堆積し成膜することにより、コンプリメンタリィー（相補的）な特性を持つｐ型ＩＳＦＥＴ１１とｎ型ＩＳＦＥＴ１２を、ワンチップのシリコンウェハ２上に横並び配置して形成してなる。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a longitudinal sectional view showing the structure of the main part when the FET sensor according to the present invention is applied to an ion sensor. This ion sensor 1 has a p-type region 3 and an n-type region 4 formed on a silicon (Si) wafer 2 which is a highly insulating one-chip substrate, and an n-type channel in the p-type region 3 and the n-type region 4. After the FET 5 and the p-type channel FET 6 are formed and the aluminum wirings 7 and 8 are formed between the drains and the sources, the whole is covered with an oxide film 9 such as SiO 2 and tantalum pentoxide (Ta 2 O 5 ) or the like. The ion-sensitive film 10 is deposited on the gates of the FETs 5 and 6 to form a complementary p-type ISFET 11 and n-type ISFET 12 on the one-chip silicon wafer 2. Are arranged side by side.

そして、横並び配置された前記ｐ型ＩＳＦＥＴ１１とｎ型ＩＳＦＥＴ１２の中間位置の前記イオン感応膜１０上に、例えばプラチナ（Ｐｔ）膜よりなる擬似比較電極１３を形成している。   Then, a pseudo comparison electrode 13 made of, for example, a platinum (Pt) film is formed on the ion sensitive film 10 at an intermediate position between the p type ISFET 11 and the n type ISFET 12 arranged side by side.

図２の（ａ）〜（ｈ）は上記のような構造を持つイオンセンサ１の具体的な製作プロセス例を説明する概略断面図であって、シリコンウェハ２の上面にＳｉＯ2 層１４を介してｎ型半導体からなる活性層１５を形成し、この活性層１５上に、ｐ型領域３の形成、ｎ型領域４の形成、ｎ型チャンネルＦＥＴ５及びｐ型チャンネルＦＥＴ６の作り込みという（ａ）〜（ｃ）のプロセスを経てコンプリメンタリィー（相補的）な特性を持つｐ型ＩＳＦＥＴ１１とｎ型ＩＳＦＥＴ１２を横並びに形成する。次に、不要な活性層１５をエッチングにより除去して両ＩＳＦＥＴ１１，１２を分離し相互に絶縁し（ｄ）、それぞれドレインとソース間に亘ってアルミ配線７，８した（ｅ）のち、絶縁のためにＳｉＯ2などの酸化膜９を被覆形成する（ｆ）。さらに、五酸化タンタル（Ｔａ2 Ｏ5 ）などのイオン感応膜１０を前記両ＦＥＴ５，６のゲート部に成膜し（ｇ）、最後にイオン感応膜１０上に擬似比較電極１３を形成する（ｈ）。 FIGS. 2A to 2H are schematic cross-sectional views for explaining a specific manufacturing process example of the ion sensor 1 having the above-described structure, and a SiO 2 layer 14 is interposed on the upper surface of the silicon wafer 2. The active layer 15 made of an n-type semiconductor is formed, and the p-type region 3, the n-type region 4, and the n-type channel FET 5 and the p-type channel FET 6 are formed on the active layer 15 (a). The p-type ISFET 11 and the n-type ISFET 12 having complementary characteristics are formed side by side through the processes (c) to (c). Next, unnecessary active layer 15 is removed by etching to separate both ISFETs 11 and 12 and insulate them from each other (d), and aluminum wirings 7 and 8 are respectively formed between the drain and source (e). For this purpose, an oxide film 9 such as SiO 2 is coated (f). Further, an ion sensitive film 10 such as tantalum pentoxide (Ta 2 O 5 ) is formed on the gate portions of the FETs 5 and 6 (g), and finally a pseudo comparison electrode 13 is formed on the ion sensitive film 10 ( h).

なお、上記した製作プロセスにおいて、ウェハ２としては、例えばエピタキシャル層を埋め込んだものを使用してもよく、ゲート感応膜にアルミナ膜を使用してもよい。また、バイオセンサとする場合は、酵素膜などの生体反応膜を形成すればよい。さらに、活性層１５としてｐ型半導体を形成してもよい。   In the manufacturing process described above, as the wafer 2, for example, a wafer in which an epitaxial layer is embedded may be used, and an alumina film may be used as the gate sensitive film. Moreover, what is necessary is just to form biological reaction membranes, such as an enzyme membrane, when setting it as a biosensor. Further, a p-type semiconductor may be formed as the active layer 15.

図３は、上記構造を持つイオンセンサ１の動作回路例の構成を示すもので、前記ｐ型ＩＳＦＥＴ１１とｎ型ＩＳＦＥＴ１２を単一の駆動源１６にて駆動すべく負荷抵抗１１Ｒ，１２Ｒを介して相互に接続されており、それらｐ型ＩＳＦＥＴ１１とｎ型ＩＳＦＥＴ１２の出力、つまり、擬似比較電極１３と各ＩＳＦＥＴ１１，１２との間の電位を検出し、それら検出電位を差動アンプ１７並びにＡＤ変換器（ＡＤＣ）１８を通して演算処理部（ＭＰＵ）１９に入力させるように構成されている。そして、このＭＰＵ１９には、該ＭＰＵ１９で前記両検出電位の差を演算処理した結果であるイオン濃度値を出力表示する表示部２０が設けられている。   FIG. 3 shows the configuration of an operation circuit example of the ion sensor 1 having the above-described structure. The p-type ISFET 11 and the n-type ISFET 12 are driven through load resistors 11R and 12R so as to be driven by a single drive source 16. The outputs of the p-type ISFET 11 and the n-type ISFET 12, that is, the potential between the pseudo comparison electrode 13 and each of the ISFETs 11 and 12, are detected, and these detected potentials are detected by the differential amplifier 17 and the AD converter. An arithmetic processing unit (MPU) 19 is input through (ADC) 18. The MPU 19 is provided with a display unit 20 that outputs and displays an ion concentration value that is a result of calculating the difference between the detected potentials in the MPU 19.

上記のように構成されたイオンセンサ１においては、前記ｐ型ＩＳＦＥＴ１１、ｎ型ＩＳＦＥＴ１２の各ゲート部及び擬似比較電極１３が被検液等の被測定対象に同時に接触するように用いられる。そして、それらが被測定対象に同時に接触したときに各ＩＳＦＥＴ１１，１２のゲート部にかかる電位は、擬似比較電極１３の電位と被測定対象のプロトンが各ゲート部のイオン感応膜１０に結合してできる電位の和になっている。すなわち、被測定対象のプロトン濃度（ｐＨ）に比例した電位となる。   In the ion sensor 1 configured as described above, the gate portions of the p-type ISFET 11 and the n-type ISFET 12 and the pseudo comparison electrode 13 are used so as to be in contact with a measurement target such as a test solution at the same time. The potential applied to the gate portions of the ISFETs 11 and 12 when they simultaneously contact the object to be measured is such that the potential of the pseudo comparison electrode 13 and the proton of the object to be measured are combined with the ion sensitive membrane 10 of each gate portion. It is the sum of potentials that can be generated. That is, the potential is proportional to the proton concentration (pH) of the measurement target.

図３の動作回路の場合、各ＩＳＦＥＴ１１，１２の負荷抵抗１１Ｒ，１２Ｒの電位はゲート電位に比例して変化するが、その値は横軸をｐＨ、縦軸を出力（ｍＶ）としてプロットすると、図４の（ａ）に示すように、傾きが正反対のネルンスト電位になっており、それぞれの出力の差（ｐ型ＩＳＦＥＴ出力−ｎ型ＩＳＦＥＴ出力）をとると、図４の（ｂ）に示すように、ネルンスト電位の２倍の傾きの直線が得られる。このようにコンプリメンタリィーな特性を持つｐ型ＩＳＦＥＴ１１とｎ型ＩＳＦＥＴ１２を用いて両者の出力差をとることによって、同一特性のＩＳＦＥＴを用いて両者の差をとる場合に比べて、出力差を非常に大きくして測定感度を凡そ倍にすることができる。   In the case of the operation circuit of FIG. 3, the potentials of the load resistors 11R and 12R of the ISFETs 11 and 12 change in proportion to the gate potential. When the values are plotted with the horizontal axis representing pH and the vertical axis representing output (mV), As shown in FIG. 4 (a), the Nernst potential has a diametrically opposite slope, and the difference between the outputs (p-type ISFET output−n-type ISFET output) is shown in FIG. 4 (b). Thus, a straight line having a gradient twice that of the Nernst potential is obtained. In this way, by using the p-type ISFET 11 and the n-type ISFET 12 having complementary characteristics to obtain the output difference between them, the output difference is greatly reduced compared to the case where the difference between the two is obtained using the ISFET having the same characteristics. The measurement sensitivity can be approximately doubled.

なお、ｐ型ＩＳＦＥＴ１１とｎ型ＩＳＦＥＴ１２の特性に差があって、ネルンスト電位に対する感度差が大きい場合は、直接に出力差をとらず、ＡＤＣ１８でＡＤ変換し、ＭＰＵ１９で校正演算処理した後、差をとることにより両ＩＳＦＥＴ１１，１２の特性差に起因する感度差を校正することが可能である。   If there is a difference in the characteristics of the p-type ISFET 11 and the n-type ISFET 12 and the sensitivity difference with respect to the Nernst potential is large, the output difference is not taken directly, but AD conversion is performed by the ADC 18 and calibration calculation processing is performed by the MPU 19. By taking the above, it is possible to calibrate the difference in sensitivity caused by the characteristic difference between the two ISFETs 11 and 12.

また、上記のように構成されたイオンセンサ１においては、擬似比較電極１３と両ＩＳＦＥＴ１１，１２との間の検出電位の差をとるために、ＩＳＦＥＴ１１，１２の経時的ドリフト、誘導ノイズ感受性及び温度変化並びに擬似比較電極１３自体の電位変動は容易に相殺しキャンセルすることが可能であり、ＫＣｌ／ＡｇＣｌ／Ａｇ（銀−塩化銀電極）構造の液絡式の比較電極を使用する必要がなく、また、標準液の使用の必要もないので、イオンセンサ１全体を完全にソリッドステート化できるとともに、小型化でき、かつ、製作工程も容易で低コスト化も図ることができる。   Further, in the ion sensor 1 configured as described above, in order to obtain a difference in detection potential between the pseudo comparison electrode 13 and both ISFETs 11 and 12, drift over time, sensitivity to induced noise and temperature of the ISFETs 11 and 12 are detected. The change and the potential fluctuation of the pseudo reference electrode 13 can be easily canceled and canceled, and it is not necessary to use a liquid junction type reference electrode having a KCl / AgCl / Ag (silver-silver chloride electrode) structure. In addition, since it is not necessary to use a standard solution, the entire ion sensor 1 can be completely solid-stated, miniaturized, and the manufacturing process can be simplified and the cost can be reduced.

なお、上記実施の形態では、前記ｐ型ＩＳＦＥＴ１１とｎ型ＩＳＦＥＴ１２を単一の駆動源１６にて駆動するような回路構成のもので示したが、図５に示すように、前記ｐ型ＩＳＦＥＴ１１とｎ型ＩＳＦＥＴ１２を各別の駆動源１６Ａ，１６Ｂを用いて個別に駆動し、それらの検出電位の差を演算処理して出力するような回路構成としてもよい。   In the above-described embodiment, the p-type ISFET 11 and the n-type ISFET 12 are shown as having a circuit configuration that is driven by a single drive source 16, but as shown in FIG. A circuit configuration may be employed in which the n-type ISFET 12 is individually driven using separate drive sources 16A and 16B, and the difference between the detected potentials is processed and output.

また、上記実施の形態では、基板としてＳｉウェハを使用したが、ｎ−Ｓｉやｐ−Ｓｉ基板上にそれぞれｐ型領域、ｎ型領域を作り、ｐ型ＩＳＦＥＴとｎ型ＩＳＦＥＴを製作してもよい。ただし、この場合は、ｐ型ＩＳＦＥＴとｎ型ＩＳＦＥＴを分離するために、チャンネルストッパーを両ＩＳＦＥＴ間に設ける必要がある。   In the above embodiment, a Si wafer is used as a substrate. However, a p-type region and an n-type region are formed on an n-Si or p-Si substrate, respectively, and a p-type ISFET and an n-type ISFET are manufactured. Good. However, in this case, in order to separate the p-type ISFET and the n-type ISFET, it is necessary to provide a channel stopper between both ISFETs.

さらに、上記実施の形態では、比較電極として、擬似比較電極を用いたが、これに代えて、金や白金などの固体金属電極を用いてもよく、また、ｐ型ＩＳＦＥＴとｎ型ＩＳＦＥＴ並びに擬似比較電極の配置関係は、横並びに限らず、ｐ型ＩＳＦＥＴとｎ型ＩＳＦＥＴを対向配置させたり、任意の角度に配置してもよい。   Furthermore, in the above embodiment, the pseudo comparison electrode is used as the comparison electrode. Instead, a solid metal electrode such as gold or platinum may be used, and the p-type ISFET, the n-type ISFET, and the pseudo-electrode are used. The arrangement relationship of the comparison electrodes is not limited to the horizontal arrangement, and the p-type ISFET and the n-type ISFET may be arranged opposite to each other or arranged at an arbitrary angle.

本発明に係るＦＥＴセンサをイオンセンサに適用した場合の要部構造を示す縦断面図である。It is a longitudinal cross-sectional view which shows the principal part structure at the time of applying the FET sensor which concerns on this invention to an ion sensor. （ａ）〜（ｈ）は上記イオンセンサの具体的な製作プロセス例を説明する概略断面図である。(A)-(h) is a schematic sectional drawing explaining the example of a concrete manufacture process of the said ion sensor. 上記イオンセンサの動作回路例の構成図である。It is a block diagram of the example of an operation circuit of the said ion sensor. （ａ），（ｂ）は上記イオンセンサの動作説明図である。(A), (b) is operation | movement explanatory drawing of the said ion sensor. 上記イオンセンサの他の動作回路例の構成図である。It is a block diagram of the other operation circuit example of the said ion sensor.

符号の説明Explanation of symbols

１ イオンセンサ（ＦＥＴセンサの例）
２ シリコンウェハ（基板の例）
１１ ｐ型ＩＳＦＥＴ
１２ ｎ型ＩＳＦＥＴ
１３ 擬似比較電極
１７ 差動アンプ
1 Ion sensor (example of FET sensor)
2 Silicon wafer (example of substrate)
11 p-type ISFET
12 n-type ISFET
13 Pseudo-reference electrode 17 Differential amplifier

Claims (5)

ｐ型ＦＥＴとｎ型ＦＥＴ並びに比較電極を備え、前記ｐ型ＦＥＴ及びｎ型ＦＥＴのゲート部を被測定対象に同時に接触させたときの前記比較電極と前記各ＦＥＴとの間の電位をそれぞれ検出し、それら検出電位の差を演算処理して出力するように構成していることを特徴とするＦＥＴセンサ。   A p-type FET, an n-type FET and a comparison electrode are provided, and the potential between the comparison electrode and each FET is detected when the gates of the p-type FET and the n-type FET are simultaneously brought into contact with the object to be measured. An FET sensor configured to calculate and output a difference between the detected potentials. 前記比較電極が、固体比較電極または擬似比較電極である請求項１に記載のＦＥＴセンサ。   The FET sensor according to claim 1, wherein the comparison electrode is a solid comparison electrode or a pseudo comparison electrode. 前記ｐ型ＦＥＴとｎ型ＦＥＴもしくはｐ型ＦＥＴとｎ型ＦＥＴ並びに比較電極が、ワンチップ基板上に成形されている請求項１または２に記載のＦＥＴセンサ。   3. The FET sensor according to claim 1, wherein the p-type FET and the n-type FET or the p-type FET and the n-type FET and the comparison electrode are formed on a one-chip substrate. 前記ｐ型ＦＥＴとｎ型ＦＥＴもしくはｐ型ＦＥＴとｎ型ＦＥＴ並びに比較電極が、各々またはその一部が分離されてチップ状に成形されたものを一つの基板上に組み合わせて形成されている請求項１または２に記載のＦＥＴセンサ。   The p-type FET and the n-type FET or the p-type FET and the n-type FET, and the comparison electrode are formed by combining, on a single substrate, each or a part thereof separated into a chip shape. Item 3. The FET sensor according to Item 1 or 2. 前記ｐ型ＦＥＴとｎ型ＦＥＴが、基板上に横並び配置され、この横並び配置されたｐ型ＦＥＴとｎ型ＦＥＴの中間位置に前記比較電極が配置されている請求項３または４に記載のＦＥＴセンサ。   The FET according to claim 3 or 4, wherein the p-type FET and the n-type FET are arranged side by side on a substrate, and the comparison electrode is arranged at an intermediate position between the p-type FET and the n-type FET arranged side by side. Sensor.
JP2006199462A 2006-07-21 2006-07-21 FET sensor Expired - Fee Related JP4653703B2 (en)

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DE3380082D1 (en) * 1982-10-21 1989-07-20 Abbott Lab A method of establishing electrical connections at a semiconductor device
JPH04258756A (en) * 1991-02-13 1992-09-14 Shindengen Electric Mfg Co Ltd Ion sensor
JPH06249825A (en) * 1993-02-26 1994-09-09 Tokyo Gas Co Ltd Fet sensor
JPH06249826A (en) * 1993-02-26 1994-09-09 Tokyo Gas Co Ltd Fet sensor
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