JP4565383B2 - Multilayer ceramic substrate with cavity and method for manufacturing the same - Google Patents

Multilayer ceramic substrate with cavity and method for manufacturing the same Download PDF

Info

Publication number
JP4565383B2
JP4565383B2 JP2004294877A JP2004294877A JP4565383B2 JP 4565383 B2 JP4565383 B2 JP 4565383B2 JP 2004294877 A JP2004294877 A JP 2004294877A JP 2004294877 A JP2004294877 A JP 2004294877A JP 4565383 B2 JP4565383 B2 JP 4565383B2
Authority
JP
Japan
Prior art keywords
cavity
green sheet
ceramic green
sheet laminate
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2004294877A
Other languages
Japanese (ja)
Other versions
JP2006108482A (en
Inventor
到 上田
都 仲田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Metals Ltd
Original Assignee
Hitachi Metals Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Metals Ltd filed Critical Hitachi Metals Ltd
Priority to JP2004294877A priority Critical patent/JP4565383B2/en
Publication of JP2006108482A publication Critical patent/JP2006108482A/en
Application granted granted Critical
Publication of JP4565383B2 publication Critical patent/JP4565383B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16235Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01009Fluorine [F]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01011Sodium [Na]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01025Manganese [Mn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01027Cobalt [Co]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01038Strontium [Sr]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0104Zirconium [Zr]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19042Component type being an inductor

Abstract

<P>PROBLEM TO BE SOLVED: To prevent the occurrence of cracks in a cavity and suppress the occurrence of inclined portions, by suppressing the contraction of the front surface, in a multilayer ceramic board equipped with cavity and contraction of the inside of the cavity. <P>SOLUTION: A first ceramic green sheet laminate and a second ceramic green sheet laminate, having a through hole are stacked and crimped to form the multilayered ceramic board having the cavity. On top and bottom faces of the board, constraint layers formed mainly of alumina are formed. Then, the unbaked multilayer ceramic board is baked, and thereafter the constraint layers are removed. In manufacturing the multilayer ceramic board, a cavity constraint layer which is mainly formed of alumina and is larger than the through hole is formed at a part of the first ceramic green sheet laminate, corresponding to the through hole. The first and second ceramic green sheet laminates are so stacked that the peripheral edge of the cavity constraint layer so as to overhang the through hole and then are crimped to fabricate the multilayered ceramic board. Since a part of the cavity constraint layer remains at a part between the first and second ceramic green sheet laminates at the bottom of the cavity, the multilayer ceramic board has an interposed portion having a high concentration of alumina. <P>COPYRIGHT: (C)2006,JPO&amp;NCIPI

Description

本発明は、無収縮プロセスを用いた多層セラミック基板の製造方法に関わり、特に電子部品を実装するキャビティを含む基板表面の焼結収縮率がゼロに近く、その表面に形成する電極パターンと高精度に整合するようになしたキャビティを備えた多層セラミック基板およびその製造方法に関するものである。   The present invention relates to a method for manufacturing a multilayer ceramic substrate using a non-shrink process, and in particular, the sintering shrinkage rate of a substrate surface including a cavity for mounting electronic components is close to zero, and an electrode pattern formed on the surface and high accuracy The present invention relates to a multilayer ceramic substrate having a cavity adapted to match the above and a manufacturing method thereof.

今日、多層セラミック基板は、携帯電話等の移動体通信端末機器の分野などにおいて、アンテナスイッチモジュール、PAモジュール基板、フィルタ、チップアンテナ、各種パッケージ部品等の種々の電子部品を構成するのに広く用いられている。
携帯通信機等の小型軽量化の要求は依然として強く、使用される電子部品の共有化や機能を集約したモジュール化が進められている。例えば、電子部品パッケージとして、キャビティを備えた多層セラミック基板が採用される。この基板を用いればインダクタ、伝送線路及びコンデンサ等で構成される回路を積層基板内に立体的に取り込み、且つキャビティ内には半導体素子等の電子部品を収容し、さらにスイッチング素子や抵抗等の基板内に取り込めない部品を基板上面に搭載すれば良いので小型、高集積化に非常に有利である。
Today, multilayer ceramic substrates are widely used to configure various electronic components such as antenna switch modules, PA module substrates, filters, chip antennas, and various package components in the field of mobile communication terminal equipment such as cellular phones. It has been.
There is still a strong demand for miniaturization and weight reduction of portable communication devices, etc., and sharing of electronic parts used and modularization of functions are being promoted. For example, a multilayer ceramic substrate having a cavity is adopted as an electronic component package. If this board is used, a circuit composed of inductors, transmission lines, capacitors, and the like is three-dimensionally taken into the laminated board, and electronic components such as semiconductor elements are accommodated in the cavities, and further, a board such as a switching element and a resistor. This is very advantageous for miniaturization and high integration because it is only necessary to mount a component that cannot be taken into the board on the upper surface of the substrate.

多層セラミック基板は、電子部品、半導体集積回路等を高密度に搭載すべく、低温焼結セラミック材料:LTCC(Low Temperature Co-fired Ceramics)からなるセラミックグリーンシートにビアホールを開け、その穴に導体を充填し、シート表面には電極パターンを印刷形成し、これらのシートを複数枚積層し、圧着して未焼成のグリーンシート積層体を形成する。その後、これを1,000℃以下の温度で焼成することにより製造されている。このとき、グリーンシート積層体の体積が減少し、緻密化する。この収縮はグリーンシート積層体の密度とセラミック体の理論密度との比、すなわち相対密度が通常45〜65%であるのに対し焼成によりその相対密度が約95%以上になるためで避けられない。通常、グリーンシート積層体はセラミック敷板に載せて電気炉で焼成されるが、焼成による収縮率は一般的に線収縮率で10〜25%の範囲にある。よって、キャビティ付きのグリーンシート積層体ではキャビティがある分、更に不均一な収縮が生じ易く、歪や反りが生じて高密度な配線を阻害する要因となる。   In order to mount electronic parts, semiconductor integrated circuits, etc. at a high density, multilayer ceramic substrates have via holes in ceramic green sheets made of low-temperature sintered ceramic material: LTCC (Low Temperature Co-fired Ceramics), and conductors are placed in the holes. After filling, an electrode pattern is printed on the surface of the sheet, and a plurality of these sheets are laminated and pressed to form an unfired green sheet laminate. Then, it is manufactured by firing at a temperature of 1,000 ° C. or lower. At this time, the volume of the green sheet laminate is reduced and densified. This shrinkage is inevitable because the ratio between the density of the green sheet laminate and the theoretical density of the ceramic body, that is, the relative density is usually 45 to 65%, but the relative density becomes about 95% or more by firing. . Usually, the green sheet laminate is placed on a ceramic base plate and fired in an electric furnace, and the shrinkage rate due to firing is generally in the range of 10 to 25% in terms of linear shrinkage rate. Therefore, in the green sheet laminate with cavities, non-uniform shrinkage is more likely to occur due to the presence of the cavities, which causes distortion and warpage, which hinders high-density wiring.

そのため、キャビティを備えた多層セラミック基板の製造方法において無収縮プロセスを適用することが行われている。以下、図9〜図12を参照して従来のキャビティを備えた多層セラミック基板(以下、単に多層セラミック基板あるいは基板と言うことがある。)と、その製造方法について説明する。
多層セラミック基板10(焼結後の基板は10’としている。)は、図9に示すように複数のグリーンシート1a〜1eを垂直方向に積層してなり、半導体素子6を搭載するためのキャビティ5が表層付近に形成されている。また、各グリーンシート1a〜1eの層間には内部電極パターン2が印刷形成されており、グランド電極のみならず、所望の回路を構成するインダクタ、伝送線路及びコンデンサ等が電極パターンで形成される。尚、内部電極は基板端部、すなわち基板の外側周辺Aと、キャビティの周辺Bには内部電極を形成しない禁止領域を設けている。この領域を設ける理由は、製造ばらつき等により、キャビティ壁面に電極パターンが露出してしまった場合、後工程にて施されるメッキによって、露出した各層の電極パターン同士が繋がってしまい、層間が短絡される不具合を防止することと、基板端部での層間密着力を向上させ、層間剥離(デラミネーション)等の不具合を防止することにある。また同時に、印刷、積層等の工程での製造ばらつきによる位置ずれを考慮して設定されている。さて、各グリーンシート1a〜1e間には垂直方向にビアホール電極4が形成されており、これにより、各層の内部電極パターン間を接続している。一方、基板1の上表面には半導体素子とのワイヤボンディング用の端子電極31や受動部品搭載用のランド等を構成する表面電極パターン32が形成されている。キャビティ5内には半導体素子用の底部電極33が形成され、この上に半導体素子6が搭載される。この半導体素子6の入出力電極と端子電極31との間をボンディングワイヤ7によって接続している。また、キャビティ5の下には基板の裏面側に延びるサーマルビア40が形成され、ビアホール電極4と共に基板の裏面端子8へ接続される。裏面端子8は基板自身を他の更に大規模な実装基板、例えば、携帯端末等の内部を主構成しているPCB基板等へ実装し、電気的に接続するための接続端子であり、略格子状に配置されている。尚、積層基板の表裏面に形成される表面電極には、最後にNiめっき、Auめっき等のメタライズ表層導体膜により表面処理が施される。
Therefore, a non-shrinking process is applied in a method for manufacturing a multilayer ceramic substrate having a cavity. Hereinafter, a multilayer ceramic substrate having a conventional cavity (hereinafter sometimes simply referred to as a multilayer ceramic substrate or a substrate) and a manufacturing method thereof will be described with reference to FIGS.
A multilayer ceramic substrate 10 (the substrate after sintering is assumed to be 10 ') is a cavity in which a plurality of green sheets 1a to 1e are stacked in the vertical direction as shown in FIG. 5 is formed near the surface layer. In addition, an internal electrode pattern 2 is printed between the green sheets 1a to 1e, and not only the ground electrode but also an inductor, a transmission line, a capacitor, and the like constituting a desired circuit are formed by the electrode pattern. The internal electrodes are provided with forbidden areas where no internal electrodes are formed at the substrate edge, that is, the outer periphery A of the substrate and the periphery B of the cavity. The reason for providing this region is that if the electrode pattern is exposed on the cavity wall surface due to manufacturing variations, etc., the exposed electrode pattern of each layer is connected by plating applied in the subsequent process, and the layers are short-circuited. In other words, it is possible to prevent problems such as delamination and improve interlayer adhesion at the edge of the substrate. At the same time, it is set in consideration of misalignment due to manufacturing variations in processes such as printing and lamination. Now, via hole electrodes 4 are formed between the green sheets 1a to 1e in the vertical direction, thereby connecting the internal electrode patterns of the respective layers. On the other hand, a surface electrode pattern 32 constituting a terminal electrode 31 for wire bonding with a semiconductor element, a land for mounting a passive component, or the like is formed on the upper surface of the substrate 1. A bottom electrode 33 for a semiconductor element is formed in the cavity 5, and the semiconductor element 6 is mounted thereon. The input / output electrodes of the semiconductor element 6 and the terminal electrodes 31 are connected by bonding wires 7. A thermal via 40 extending to the back side of the substrate is formed under the cavity 5 and connected to the back terminal 8 of the substrate together with the via hole electrode 4. The back terminal 8 is a connection terminal for mounting and electrically connecting the board itself to another larger-scale mounting board, for example, a PCB board that mainly constitutes the interior of a portable terminal or the like. Arranged in a shape. The surface electrodes formed on the front and back surfaces of the multilayer substrate are finally subjected to a surface treatment with a metallized surface conductor film such as Ni plating or Au plating.

ここで無収縮プロセスは、グリーンシートの焼成温度では焼結しない無機材料(アルミナ等)を有機バインダ中に分散させた無機組成物ペーストから作製された拘束シートを用意し、この拘束シート21、22を図11に示すように未焼成の多層セラミック基板20の上面および下面に対し密着して設け、その上で焼成するものである。このときの拘束シートの収縮抑制作用により基板表面の収縮が抑制される。しかし、この場合、拘束シートを設けていないキャビティ内には収縮抑制作用が働かないので、不均一な収縮や歪が生じると言う問題がある。
そこで、特許文献1ではキャビティを備えた未焼成の多層セラミック基板を、そのまま金型内に配置し、金型内に顆粒状の無機組成物を敷き詰めて加圧成形することにより、キャビティ内を含む基板外面に拘束層を形成する方法が開示されている。しかしながら、この方法では加圧成形する際の条件によってばらつきが生じ易く、また装置自体が複雑なものとなり簡便な方法とは言えない。
Here, in the non-shrink process, a constraining sheet prepared from an inorganic composition paste in which an inorganic material (such as alumina) that is not sintered at the firing temperature of the green sheet is dispersed in an organic binder is prepared. 11 is provided in close contact with the upper and lower surfaces of the unfired multilayer ceramic substrate 20 and fired thereon. The shrinkage of the restraint sheet at this time suppresses the shrinkage of the substrate surface. However, in this case, there is a problem that non-shrinkage and distortion occur because the shrinkage-inhibiting action does not work in the cavity where no restraint sheet is provided.
Therefore, in Patent Document 1, an unfired multilayer ceramic substrate provided with a cavity is placed in a mold as it is, and the inside of the cavity is included by laying a granular inorganic composition in the mold and performing pressure molding. A method of forming a constraining layer on the outer surface of a substrate is disclosed. However, in this method, variations are likely to occur depending on the conditions during pressure molding, and the apparatus itself is complicated, so it cannot be said that it is a simple method.

一方、特許文献2ではキャビティを備えた多層セラミック基板において、キャビティ開口を閉じ、基板の上面全体を覆う拘束シートを配置し、基板を圧着するプレス工程においてキャビティ開口の端縁に沿って前記拘束シートを破断すると共に、破断したシート片をキャビティ底面までプレス作用により押し付けて配置する製造方法が開示されている。これによれば、基板の上面とキャビティ底面に拘束シート層を一度に成形できるので歩留まりが向上する。また、底面の拘束シートによりキャビティ底面の収縮を抑制することができ、且つキャビティ周辺部に発生するクラックを防止することが出来るとある。しかしながら、実際のところ多層セラミック基板1個の大きさは数ミリ角である。よって、通常は製品基板を多数個取りした100〜200mm角程度の大型のグリーンシートによる多層セラミック基板で成形し、製品化の最終工程で個々の基板に分割することが行われる。しかもキャビティの大きさは2mm角程度であるから、このような微小寸法のキャビティの個々に対し一度にプレス成形することは至難の業で不可能と言って過言ではない。   On the other hand, in Patent Document 2, in a multilayer ceramic substrate having a cavity, the restraint sheet is closed along the edge of the cavity opening in a pressing process in which the cavity opening is closed, the restraint sheet covering the entire upper surface of the substrate is disposed, and the substrate is pressure-bonded. And a method of disposing the broken sheet piece by pressing to the bottom surface of the cavity by a pressing action is disclosed. According to this, since the constraining sheet layer can be formed at once on the upper surface of the substrate and the bottom surface of the cavity, the yield is improved. In addition, the restraint sheet on the bottom surface can suppress the shrinkage of the bottom surface of the cavity and can prevent cracks generated in the periphery of the cavity. However, in practice, the size of one multilayer ceramic substrate is several millimeters square. Therefore, usually, a multi-layer ceramic substrate made of a large green sheet of about 100 to 200 mm square obtained by taking a large number of product substrates is formed and divided into individual substrates in the final step of commercialization. Moreover, since the size of the cavity is about 2 mm square, it is not an exaggeration to say that it is extremely difficult and impossible to press-mold each of such tiny cavities at once.

そこで、特許文献3ではキャビティを備えた多層セラミック基板において、図12に示すようにキャビティを形成する貫通孔を有する第1の基板用セラミックグリーンシート20bと、貫通孔を有しない第2の基板用セラミックグリーンシート20aとを積層して多層セラミック基板を製造する方法であって、前記第2の基板用セラミックグリーンシート20a上に、キャリアフィルム上に保持されたキャビティの底面に相当する形状の拘束シート23を転写し、その後、第1、第2の基板用セラミックグリーンシートを積層することによってキャビティ底面に拘束シートを形成すると言う製造方法が開示されている。この製造方法によれば上記の方法と同様、底面の拘束シートの収縮抑制作用によりキャビティ底面の収縮を抑制することができる。しかしながら、この方法も工程が複雑であり必ずしも簡便な方法とは言えなかった。   Therefore, in Patent Document 3, in a multilayer ceramic substrate having a cavity, as shown in FIG. 12, the first substrate ceramic green sheet 20b having a through hole forming a cavity and the second substrate having no through hole are used. A method of manufacturing a multilayer ceramic substrate by laminating a ceramic green sheet 20a, wherein the constraining sheet has a shape corresponding to the bottom surface of a cavity held on a carrier film on the ceramic green sheet 20a for the second substrate. A manufacturing method is disclosed in which a constraining sheet is formed on the bottom surface of a cavity by transferring 23 and then laminating ceramic green sheets for first and second substrates. According to this manufacturing method, similar to the above method, the shrinkage of the bottom surface of the cavity can be restrained by the shrinkage restraining action of the restraining sheet on the bottom surface. However, this method is also complicated and the process is not necessarily a simple method.

特許第2803421号公報Japanese Patent No. 2803421 特開2002−290042号公報JP 2002-290042 A 特開2003−318309号公報JP 2003-318309 A

上記した特許文献1〜3の製造方法では、複雑な工程と装置を必要とし必ずしも簡便な方法とは言えず、製造歩留まりやコスト的な問題がある。特に、基板全体に対して効果的な収縮抑制効果を得る為には、キャビティ底部にも拘束シート等の拘束部材を設ける必要があるが、この拘束部材を得るための工程が複雑となっている。また、例えば特許文献3の製造方法によってキャビティ底面に所定厚みの拘束シートを設けたとしても、拘束シートの密着度が確実でないと焼成工程までに拘束シートがずれることがあり、キャビティ底面の収縮を均一に抑制できないと言う問題が生じることがある。他方、キャビティを形成する貫通孔は極小さなものである上に、第1、第2の基板用セラミックグリーンシートを積層するときの製造上の寸法公差を考慮すると、拘束シートとキャビティ貫通孔の嵌合を一致させるには困難が伴ない、この点からも拘束シートのずれが生じ得る。さらに、もう一つの問題は、キャビティ底部の隅部から図10のDに示すようにクラックが発生することである。このクラックの原因としては、第1と第2の基板用セラミックグリーンシートを積層し、圧着する際の圧力分布がキャビティがある分不均一となり、その結果、キャビティ底面の隅部に残留応力が発生した状態になりやすい。これを焼成すると、焼成時の収縮変形に伴い応力を開放するため、隅部を起点とするクラックが発生する。ここで、拘束シートがずれていたり、十分に拘束作用が働かないと、キャビティと基板の収縮挙動が不一致となりクラックの発生も助長される。   The manufacturing methods described in Patent Documents 1 to 3 require complicated processes and apparatuses, which are not necessarily simple methods, and have manufacturing yield and cost problems. In particular, in order to obtain an effective shrinkage suppression effect on the entire substrate, it is necessary to provide a restraining member such as a restraining sheet at the bottom of the cavity, but the process for obtaining this restraining member is complicated. . For example, even if a constraining sheet having a predetermined thickness is provided on the bottom surface of the cavity by the manufacturing method of Patent Document 3, the constraining sheet may be displaced by the firing step if the degree of adhesion of the constraining sheet is not certain, and the cavity bottom surface may shrink There may be a problem that it cannot be uniformly suppressed. On the other hand, the through-holes forming the cavities are extremely small, and considering the dimensional tolerance in manufacturing when laminating the first and second ceramic ceramic sheets for the substrate, the fitting between the constraining sheet and the cavity through-holes is considered. There is difficulty in matching the alignment, and the restraint sheet may be displaced from this point. Furthermore, another problem is that a crack occurs from the corner of the bottom of the cavity as shown in FIG. The cause of this crack is that the pressure distribution when the first and second ceramic green sheets for the substrate are laminated and crimped becomes uneven due to the presence of the cavity, resulting in residual stress at the corner of the cavity bottom It is easy to become a state. When this is fired, the stress is released along with the shrinkage deformation at the time of firing, so that a crack starting from the corner is generated. Here, if the restraint sheet is displaced or the restraint action does not work sufficiently, the shrinkage behavior of the cavity and the substrate is inconsistent, and the generation of cracks is promoted.

一方、キャビティを備えた多層セラミック基板の問題点として、焼成後、キャビティの周囲に配置されたワイヤボンディング用の端子電極がキャビティ側に落ち込んでしまい図10のZに示すように傾斜面が発生し、基板上面の平坦度が安定しないという問題がある。この問題の原因は、上記したように多層セラミック基板においてキャビティの周囲は禁止領域Bが設けられるので、全く内部電極パターンが形成されていないキャビティ周囲と、内部電極パターンが形成されている外周部分との間で積層厚みに差が生じ、この状態で圧着が行われたまま焼成されるためである。加えて、圧着時にキャビティ内には圧力の受けがなく、キャビティ周辺はキャビティ内へ変形しようとするので、更にこの傾斜が助長されることになる。この傾斜面の角度が3度を超えると、ボンディングワイヤの先端が端子電極と安定的に接触することができなくなり、十分な加熱や超音波振動等による接着が行えず、ワイヤ外れ、ワイヤ切れ等のボンディング接続に関する不具合が発生することがある。   On the other hand, as a problem of the multilayer ceramic substrate having the cavity, after firing, the wire bonding terminal electrode disposed around the cavity falls to the cavity side, and an inclined surface is generated as shown in Z of FIG. There is a problem that the flatness of the upper surface of the substrate is not stable. The cause of this problem is that, as described above, the forbidden region B is provided around the cavity in the multilayer ceramic substrate, so that the periphery of the cavity where no internal electrode pattern is formed, and the outer peripheral portion where the internal electrode pattern is formed, This is because there is a difference in the laminated thickness between the two, and in this state, firing is performed while pressure bonding is performed. In addition, there is no pressure in the cavity during crimping, and the periphery of the cavity tends to be deformed into the cavity, further promoting this inclination. If the angle of the inclined surface exceeds 3 °, the tip of the bonding wire cannot be stably contacted with the terminal electrode, and cannot be bonded by sufficient heating, ultrasonic vibration, etc. Problems with the bonding connection may occur.

本発明の目的はこのような問題に鑑み、キャビティを備えた多層セラミック基板について無収縮プロセスを適用するもので、基板表面とキャビティ内の収縮が抑制され、同時にキャビティ隅部のクラックの発生やキャビティ周囲の傾斜面の問題を解消することができるキャビティを備えた多層セラミック基板の製造方法を提供することにある。また、キャビティ周囲に配置したワイヤボンディング用の端子電極へのボンディング接続信頼性を向上させ、且つクラック等の内部欠陥がなく信頼性の高いキャビティを備えた多層セラミック基板を提供することを目的とする。   In view of such problems, the object of the present invention is to apply a non-shrinkage process to a multilayer ceramic substrate having a cavity, and the shrinkage of the substrate surface and the cavity is suppressed, and at the same time, the occurrence of cracks at the corners of the cavity and the cavity An object of the present invention is to provide a method of manufacturing a multilayer ceramic substrate having a cavity that can solve the problem of the surrounding inclined surface. Another object of the present invention is to provide a multilayer ceramic substrate having a highly reliable cavity without internal defects such as cracks, which improves the bonding connection reliability to wire bonding terminal electrodes arranged around the cavity. .

本発明は、キャビティを形成するための貫通孔を有する第2のセラミックグリーンシート積層体と、貫通孔を有しない第1のセラミックグリーンシート積層体とを有する、キャビティを備えた多層セラミック基板であって、
前記第1と第2のセラミックグリーンシート積層体が接触した状態で焼結されてなり
前記キャビティの底面は底部電極が露出しており、前記第1と第2のセラミックグリーンシート積層体間かつ前記キャビティの底面における外周縁の少なくとも一部に、前記セラミックグリーンシートよりもアルミナ濃度が高くかつ焼結していない無機材料が残存していることを特徴とするキャビティを備えた多層セラミック基板である。
これらの多層セラミック基板によれば、前記キャビティ周囲に設けた端子電極の平坦度は、その断面における傾斜角度が3度以下である。尚、上記で界面とはその周辺部分を含んでいる。これらにより、キャビティ隅部からのクラックが抑制され、またボンディングワイヤの接続不良等を無くした多層セラミック基板とすることができる。
前記底部電極は、前記第1のセラミックグリーンシート積層体に形成されたビア上に配置されていることが好ましい。
The present invention includes a second ceramic green sheet laminate having a through hole for forming the cavity, and a first ceramic green sheet laminate having no through-holes, there multilayer ceramic substrate with a cavity And
The first and second ceramic green sheet laminates are sintered in contact with each other ,
The bottom electrode of the cavity is exposed, and the alumina concentration is higher than that of the ceramic green sheet between the first and second ceramic green sheet laminates and at least part of the outer periphery of the bottom surface of the cavity. and a multilayer ceramic substrate with a cavity, characterized in that sintering has lightning with inorganic material remains.
According to these multilayer ceramic substrates, the flatness of the terminal electrode provided around the cavity is such that the inclination angle in the cross section is 3 degrees or less. In the above description, the interface includes its peripheral part. As a result, it is possible to obtain a multilayer ceramic substrate in which cracks from the corners of the cavity are suppressed and bonding wires are not defectively connected.
The bottom electrode is preferably disposed on a via formed in the first ceramic green sheet laminate.

キャビティを備えた多層セラミック基板の製造方法において、キャビティ底面となる位置に当該キャビティの貫通孔よりも大きく、セラミックグリーンシートの焼成温度では焼結しない無機材料を主体とするキャビティ拘束層を設け、前記キャビティ底面に形成される底部電極を前記キャビティ拘束層で覆うとともに、当該キャビティ拘束層を貫通孔の外縁よりはみ出すように挟着する工程を含む、ことを特徴とするキャビティを備えた多層セラミック基板の製造方法である。 In the method for manufacturing a multilayer ceramic substrate with a cavity, greater than the through-hole of the cavity at a position to be the cavity bottom surface is provided with a cavity constraining layer consisting mainly of an inorganic material which is not sintered at the firing temperature of the ceramic green sheets, wherein A multilayer ceramic substrate having a cavity, comprising: a step of covering a bottom electrode formed on a bottom surface of the cavity with the cavity constraining layer and sandwiching the cavity constraining layer so as to protrude from an outer edge of the through hole. It is a manufacturing method.

本発明は、貫通孔を有しない第1のセラミックグリーンシート積層体と、貫通孔を有する第2のセラミックグリーンシート積層体とをそれぞれ作製する工程と、前記第1のセラミックグリーンシート積層体と第2のセラミックグリーンシート積層体とを重ねて圧着することにより、前記貫通孔によって形成されたキャビティを有する未焼成多層セラミック基板を作製する工程と、前記第1のセラミックグリーンシート積層体の下面にセラミックグリーンシートの焼成温度では焼結しない無機材料を主体とする下面拘束層を設ける工程と、前記第2のセラミックグリーンシート積層体の上面にセラミックグリーンシートの焼成温度では焼結しない無機材料を主体とする上面拘束層を設ける工程と、前記未焼成多層セラミック基板を焼成する工程と、前記拘束層を除去する工程と、を有するキャビティを備えた多層セラミック基板の製造方法であって、前記第1のセラミックグリーンシート積層体の作製工程において、前記第2のセラミックグリーンシート積層体の貫通孔に対面する位置に当該貫通孔よりも大きく、セラミックグリーンシートの焼成温度では焼結しない無機材料を主体とするキャビティ拘束層を設け、前記キャビティ底面に形成される底部電極を前記キャビティ拘束層で覆うとともに、前記第1のセラミックグリーンシート積層体と第2のセラミックグリーンシート積層体とを重ねて圧着する工程において、前記キャビティ拘束層を貫通孔の外縁よりはみ出すように挟着するキャビティを備えた多層セラミック基板の製造方法である。 The present invention includes a step of producing a first ceramic green sheet laminate having no through hole and a second ceramic green sheet laminate having a through hole, respectively, the first ceramic green sheet laminate, A ceramic green sheet laminate of 2 is stacked and pressure-bonded to form an unfired multilayer ceramic substrate having a cavity formed by the through-hole, and a ceramic is formed on the lower surface of the first ceramic green sheet laminate. A step of providing a lower surface constraining layer mainly composed of an inorganic material that is not sintered at the firing temperature of the green sheet, and an inorganic material that is not sintered at the firing temperature of the ceramic green sheet on the upper surface of the second ceramic green sheet laminate. Providing a top constraining layer and firing the green multilayer ceramic substrate And a step of removing the constraining layer, and a method of manufacturing a multilayer ceramic substrate having a cavity, wherein in the step of manufacturing the first ceramic green sheet laminate, the second ceramic green sheet laminate A cavity constraining layer mainly composed of an inorganic material that is larger than the through hole and that does not sinter at the firing temperature of the ceramic green sheet is provided at a position facing the through hole, and the bottom electrode formed on the bottom surface of the cavity is the cavity constraining layer. And a cavity for sandwiching the cavity constraining layer so as to protrude from the outer edge of the through hole in the step of laminating and pressing the first ceramic green sheet laminate and the second ceramic green sheet laminate. A method for manufacturing a multilayer ceramic substrate.

また、本発明は2段階のキャビティを備えた多層セラミック基板の製造方法でもある。即ち、貫通孔を有しない第1のセラミックグリーンシート積層体と、第1の貫通孔を有する第2のセラミックグリーンシート積層体と、第2の貫通孔を有する第3のセラミックグリーンシート積層体とをそれぞれ作製する工程と、前記第1のセラミックグリーンシート積層体と第2のセラミックグリーンシート積層体及び第3のセラミックグリーンシート積層体とを重ねて圧着することにより、前記第1、第2の貫通孔によって形成されたキャビティを有する未焼成多層セラミック基板を作製する工程と、前記第1のセラミックグリーンシート積層体の下面にセラミックグリーンシートの焼成温度では焼結しない無機材料を主体とする下面拘束層を設ける工程と、前記第3のセラミックグリーンシート積層体の上面にセラミックグリーンシートの焼成温度では焼結しない無機材料を主体とする上面拘束層を設ける工程と、前記未焼成多層セラミック基板を焼成する工程と、前記拘束層を除去する工程と、を有するキャビティを備えた多層セラミック基板の製造方法であって、前記第1のセラミックグリーンシート積層体の作製工程において、前記第2のセラミックグリーンシート積層体の第1の貫通孔に対面する位置に当該貫通孔よりも大きく、セラミックグリーンシートの焼成温度では焼結しない無機材料を主体とする第1のキャビティ拘束層を設け、前記キャビティ底面に形成される底部電極を前記キャビティ拘束層で覆うとともに、前記第2のセラミックグリーンシート積層体の作製工程において、前記第3のセラミックグリーンシート積層体の第2の貫通孔に対面する位置に当該貫通孔よりも大きく、セラミックグリーンシートの焼成温度では焼結しない無機材料を主体とする第2のキャビティ拘束層を設け、前記第1のセラミックグリーンシート積層体と第2のセラミックグリーンシート積層体及び第3のセラミックグリーンシート積層体とを重ねて圧着する工程において、前記第1、第2のキャビティ拘束層を第1、第2の貫通孔の外縁よりはみ出すように挟着するキャビティを備えた多層セラミック基板の製造方法である。
The present invention is also a method for manufacturing a multilayer ceramic substrate having a two-stage cavity. That is, a first ceramic green sheet laminate having no through hole, a second ceramic green sheet laminate having a first through hole, and a third ceramic green sheet laminate having a second through hole, Each of the first ceramic green sheet laminate, the second ceramic green sheet laminate, and the third ceramic green sheet laminate, and the first and second ceramic green sheet laminates. A step of producing an unfired multilayer ceramic substrate having a cavity formed by a through-hole, and a lower surface restraint mainly composed of an inorganic material that is not sintered at the firing temperature of the ceramic green sheet on the lower surface of the first ceramic green sheet laminate A step of providing a layer, and a ceramic green sheet on the upper surface of the third ceramic green sheet laminate. A multilayer ceramic comprising a cavity having a step of providing an upper surface constraining layer mainly composed of an inorganic material that is not sintered at the firing temperature, a step of firing the unfired multilayer ceramic substrate, and a step of removing the constraining layer A method for manufacturing a substrate, wherein in the first ceramic green sheet laminate manufacturing step, the ceramic ceramic is larger than the through hole at a position facing the first through hole of the second ceramic green sheet laminate. A first cavity constraining layer mainly composed of an inorganic material that is not sintered at the firing temperature of the green sheet is provided, and a bottom electrode formed on the bottom surface of the cavity is covered with the cavity constraining layer, and the second ceramic green sheet laminate In the manufacturing process of the body, the position facing the second through hole of the third ceramic green sheet laminate A first cavity green sheet laminate and a second ceramic green sheet laminate are provided with a second cavity constraining layer mainly composed of an inorganic material that is larger than the through-hole and is not sintered at the firing temperature of the ceramic green sheet. And a third ceramic green sheet laminate, wherein the first and second cavity constraining layers are sandwiched so as to protrude from the outer edges of the first and second through holes. It is a manufacturing method of a multilayer ceramic substrate.

本発明のキャビティを備えた多層セラミック基板の製造方法は、前記第1と第2のセラミックグリーンシート積層体とをそれぞれ圧着する静水圧プレス(CIP)工程を有しており、第1のセラミックグリーンシート積層体についてはキャビティ拘束層を形成した後に静水圧プレスを行い、第2のセラミックグリーンシート積層体については静水圧プレス後に前記貫通孔を設けることが好ましい。これにより、積層体を均一に締めてセラミックグリーンシート間の密着度を高めることになり、第2のセラミックグリーンシート積層体については貫通孔をプレス打ち抜きで形成する際、層間剥離(デラミネーション)を防止できる。第1のセラミックグリーンシート積層体についてはキャビティ拘束層のキャビティ底面への密着度が高まり、ガラス成分を含まない拘束層であっても接合力を高めることができる。よって、焼成時の拘束力が強くなり収縮抑制効果がより完全なものとなる。反面、焼結後はガラス成分がない分、アルミナ等の無機成分を除去し易いので望ましい。
また、第1、第2、第3のセラミックグリーンシート積層体からなる2段のキャビティを備えた多層セラミック基板の製造方法においても同様で、第1のセラミックグリーンシート積層体については第1のキャビティ拘束層を形成した後に静水圧プレスを行い、第2のセラミックグリーンシート積層体については第2のキャビティ拘束層を形成した後に静水圧プレスを行い、その後に第1の貫通孔を設け、第3のセラミックグリーンシート積層体については静水圧プレス後に前記第2の貫通孔を設ける工程とすることが好ましい。
The method for producing a multilayer ceramic substrate having a cavity according to the present invention includes a hydrostatic press (CIP) process for press-bonding the first and second ceramic green sheet laminates, respectively. The sheet laminate is preferably subjected to hydrostatic pressing after forming the cavity constraining layer, and the second ceramic green sheet laminate is preferably provided with the through-holes after isostatic pressing. As a result, the laminate is uniformly tightened to increase the adhesion between the ceramic green sheets, and when the through holes are formed by press punching for the second ceramic green sheet laminate, delamination is caused. Can be prevented. About the 1st ceramic green sheet laminated body, the adhesiveness to the cavity bottom face of a cavity constrained layer increases, and even if it is a constrained layer which does not contain a glass component, it can raise joint force. Therefore, the binding force at the time of firing becomes stronger, and the shrinkage suppressing effect becomes more complete. On the other hand, after sintering, since there is no glass component, inorganic components such as alumina are easily removed, which is desirable.
The same applies to a method of manufacturing a multilayer ceramic substrate having a two-stage cavity composed of the first, second, and third ceramic green sheet laminates. After forming the constraining layer, hydrostatic pressing is performed, and for the second ceramic green sheet laminate, the second cavity constraining layer is formed and then hydrostatic pressing is performed, and then the first through hole is provided. For the ceramic green sheet laminate, it is preferable to provide the second through hole after the hydrostatic pressing.

本発明の製造方法では、貫通孔よりも大きなキャビティ拘束層を形成したことにより、キャビティ内での拘束シートのずれ込みや寸法公差を気にすることなく、容易に積層、圧着工程が行える。また、拘束層を挟着した介在部を設けることによりキャビティ底部とその界面周辺の収縮が一致して抑制されるので、キャビティがあることによって生じる収縮挙動の不一致を抑制し、クラック発生の要因を軽減する。また、拘束シートによる挟着部を設けることは、キャビティ周囲の内部電極禁止領域Bに拘束シートによる厚みを加えることになるので、この領域の密度を高めて積層厚みによる差を軽減し、キャビティ周囲の傾斜量が小さくする働きをする。しかしながら、前記キャビティ拘束層は、大きすぎても上記した効果以上のものは望めないので、前記キャビティを形成する貫通孔の外周長に対して100を超え120%以下の外周長に設けられることが望ましい。また、キャビティ拘束層により収縮抑制効果を得るにはキャビティの深さの20%以下の厚みに設けておけば良い。ただし1%を超えるもので好ましくは8〜13%である。上記した外周長及び厚さの範囲を超えるとキャビティ周縁部に圧着後にクラックが発生し易くなり、またデラミネーションの問題も生じるので好ましくない。しかしながら、キャビティ拘束層の上に、さらにセラミックグリーンシートの焼成温度では焼結しない無機材料を主体とする拘束シートあるいは顆粒状拘束材を充填することを妨げるものではない。この場合、キャビティの深さ方向の変形歪を抑制できる効果、またキャビティ倒れ込み現象を小さくする効果が期待できる。
尚、本発明において、基板上面に形成する拘束層と下面に形成する拘束層及びキャビティ拘束層を構成する無機材料は、ガラス成分を含まないアルミナであり、未焼成多層セラミック基板を焼成する過程で表層電極を含む基板表面(基板上面、下面、底面)を収縮させない機能があればよい。また、上記した第1と第2のセラミックグリーンシートは単体のシートでも製造可能ではあるが、通常は複数枚のシートを積層した積層体で構成される。また、本発明のキャビティを備えた多層セラミック基板は、通常行われるように基板に分割溝を設けた多数個取りの大型基板を意図しており、焼結後、小片に分割され得るものである。
In the manufacturing method of the present invention, since the cavity constraining layer larger than the through hole is formed, the laminating and crimping processes can be easily performed without worrying about the displacement of the constraining sheet or the dimensional tolerance in the cavity. In addition, by providing an intervening part with a constraining layer sandwiched between them, shrinkage around the cavity bottom and its interface coincides and is suppressed. Reduce. In addition, the provision of the sandwiched portion by the restraint sheet adds a thickness by the restraint sheet to the internal electrode prohibition region B around the cavity. Therefore, the density of this region is increased to reduce the difference due to the laminated thickness, It works to reduce the amount of inclination. However, even if the cavity constraining layer is too large, it is not possible to expect more than the above-described effects. Therefore, the cavity constraining layer may be provided with an outer peripheral length of more than 100 and 120% or less with respect to the outer peripheral length of the through-hole forming the cavity. desirable. Further, in order to obtain a shrinkage suppressing effect by the cavity constraining layer, it may be provided at a thickness of 20% or less of the depth of the cavity. However, it exceeds 1%, and preferably 8-13%. Exceeding the range of the outer peripheral length and thickness described above is not preferable because cracks are likely to occur after crimping on the peripheral edge of the cavity, and delamination problems occur. However, this does not prevent the cavity constraining layer from being filled with a constraining sheet or granular constraining material mainly composed of an inorganic material that is not sintered at the firing temperature of the ceramic green sheet. In this case, an effect of suppressing deformation strain in the depth direction of the cavity and an effect of reducing the cavity collapse phenomenon can be expected.
In the present invention, the constraining layer formed on the upper surface of the substrate, the constraining layer formed on the lower surface, and the inorganic material constituting the cavity constraining layer are alumina containing no glass component, and in the process of firing the unfired multilayer ceramic substrate. Any function that does not shrink the substrate surface (the substrate upper surface, the lower surface, and the bottom surface) including the surface electrode may be used. In addition, the first and second ceramic green sheets described above can be manufactured as a single sheet, but are usually constituted by a laminate in which a plurality of sheets are laminated. In addition, the multilayer ceramic substrate having a cavity according to the present invention is intended to be a large-sized large-sized substrate in which a dividing groove is provided in the substrate as usual, and can be divided into small pieces after sintering. .

本発明のキャビティを備えた多層セラミック基板は、キャビティ周囲に配置したワイヤボンディング用の端子電極へのボンディング接続信頼性が安定し、キャビティ内に搭載される半導体素子等と積層基板内の回路との接続が確実に行える。また同時に、クラックなどの内部欠陥の無い機械的信頼性が十分確保された多層セラミック基板を得ることが出来る。
本発明の製造方法によれば、キャビティの底面と更にその外周に収縮抑制用の拘束層が挟着され、その状態で焼成工程が実施されるので、キャビティ底面と隅部を含む部分に収縮抑制力が均一且つ一致して作用する。同時に基板の上面と下面にも収縮抑制用のシート拘束層による収縮抑制力が一致して作用する。これらにより焼結後の基板の寸法精度を高くできると共に、クラックの発生を抑制し、さらにキャビティ周囲において不所望な傾斜等の歪みを生じ難くすることができる。
本発明による、キャビティ拘束層の作製工程は印刷等の手段により容易にできる。そして、第1と第2のセラミックグリーンシート積層体の積層工程は、寸法公差などをさほど気にせず行えるので製造工程的にもコスト的にも安易な製造方法となった。
The multilayer ceramic substrate having a cavity according to the present invention has a stable bonding connection reliability to wire bonding terminal electrodes arranged around the cavity, and a semiconductor element mounted in the cavity and a circuit in the multilayer substrate are connected. Connection can be made reliably. At the same time, it is possible to obtain a multilayer ceramic substrate with sufficient mechanical reliability free from internal defects such as cracks.
According to the manufacturing method of the present invention, since the constraining layer for suppressing shrinkage is sandwiched between the bottom surface of the cavity and the outer periphery thereof, and the firing process is performed in this state, the shrinkage is suppressed at the portion including the cavity bottom surface and the corner. Forces act uniformly and consistently. At the same time, the shrinkage suppression force due to the sheet restraining layer for suppressing shrinkage also acts on the upper surface and the lower surface of the substrate. As a result, the dimensional accuracy of the substrate after sintering can be increased, the generation of cracks can be suppressed, and distortion such as an undesired inclination can be made difficult to occur around the cavity.
The manufacturing process of the cavity constrained layer according to the present invention can be easily performed by means such as printing. And since the lamination process of the 1st and 2nd ceramic green sheet laminated body can be performed without worrying about a dimensional tolerance etc., it became a manufacturing method with easy manufacturing process and cost.

先ず、本発明のキャビティを備えた多層セラミック基板について説明する。
図1は本発明による多層セラミック基板の一例を示す断面図で、(a)は上下拘束層及びキャビティ拘束層を形成した未焼成の多層セラミック基板を、(b)はこれら拘束層を取り除いた焼結後の多層セラミック基板を、(c)は半導体素子を搭載した半製品の基板を示す断面図である。図2は本発明による2段のキャビティを備えた多層セラミック基板を示す断面図で、(a)(b)(c)は図1と同様である。図3は本発明による多層セラミック基板であって半導体素子の搭載構造が異なる例を示す断面図である。
First, a multilayer ceramic substrate having a cavity according to the present invention will be described.
FIG. 1 is a cross-sectional view showing an example of a multilayer ceramic substrate according to the present invention. (A) shows an unfired multilayer ceramic substrate on which upper and lower constraining layers and cavity constraining layers are formed, and (b) shows a fired substrate with these constraining layers removed. (C) is sectional drawing which shows the board | substrate of the semi-finished product which mounted the semiconductor element. FIG. 2 is a cross-sectional view showing a multilayer ceramic substrate having a two-stage cavity according to the present invention, and (a), (b) and (c) are the same as FIG. FIG. 3 is a cross-sectional view showing an example of a multilayer ceramic substrate according to the present invention having a different semiconductor element mounting structure.

図1(a)において多層セラミック基板は、複数の誘電体グリーンシート1a〜1hを積層してなるが、貫通孔9を有するグリーンシート1a〜1dからなる第2のセラミックグリーンシート積層体20bと、前記貫通孔9の位置には貫通孔を有しない、即ち一様なグリーンシート1e〜1hからなる第1のセラミックグリーンシート積層体20aとを重ねて圧着することで、半導体素子を搭載するためのキャビティ50を表層付近に形成した未焼成多層セラミック基板20を構成している。ここで、グリーンシートの積層枚数等は限定されるものではないが、各グリーンシート1a〜1hの層間には、所望の回路を構成するインダクタ、伝送線路、コンデンサ、グランド電極等を内部電極パターン2により印刷形成し、これらをビアホール電極4により接続し適宜回路を構成している。未焼成基板20の上面にはキャビティ50の周囲に端子電極31が形成され、さらにスイッチング素子、抵抗素子等の受動部品を搭載するランド用の表面電極32がそれぞれ電極パターンで印刷形成され、さらに表面電極32の周囲にはオーバーコート材11が適宜形成され半田流れを防止している。また、下面にも端子電極8やオーバーコート材11が適宜形成される。そして、未焼成の基板20の前記表面電極を含む上面にはセラミックグリーンシートの焼成温度では焼結しないアルミナを主体とするペーストによるシート状の上面拘束層21が設けられ、同じく下面には、同じペーストを用いたシート状の下面拘束層22が設けられる。さらに、キャビティ5の底部には同様にアルミナを主体とするキャビティ拘束層25が形成されている。これらの製造方法については下記で述べるが、キャビティ拘束層25については貫通孔9の外周よりも大きく、その外縁が挟着部26となるように形成する。これによりキャビティ底面とその周辺の拘束が均一に行われてクラックの発生を防止することができる。尚、キャビティ50内にシート状の拘束層をさらに重ねて積層することも出来るし、また顆粒状の拘束材を充填してキャビティ内に収縮抑制材を詰めた実施形態をとることもできる。これにより焼成中の歪や倒れ込みを防止して傾斜面をより完全に抑制が出来る。   In FIG. 1A, the multilayer ceramic substrate is formed by laminating a plurality of dielectric green sheets 1a to 1h, and a second ceramic green sheet laminate 20b composed of green sheets 1a to 1d having through holes 9; There is no through hole at the position of the through hole 9, that is, the first ceramic green sheet laminate 20a composed of the uniform green sheets 1e to 1h is stacked and pressure-bonded to mount a semiconductor element. An unsintered multilayer ceramic substrate 20 having a cavity 50 formed in the vicinity of the surface layer is configured. Here, the number of stacked green sheets is not limited, but the internal electrode pattern 2 includes an inductor, a transmission line, a capacitor, a ground electrode, and the like constituting a desired circuit between the green sheets 1a to 1h. Are formed by printing, and these are connected by the via-hole electrode 4 to appropriately constitute a circuit. A terminal electrode 31 is formed around the cavity 50 on the upper surface of the green substrate 20, and land electrodes 32 for mounting passive components such as switching elements and resistance elements are printed and formed in an electrode pattern, respectively. An overcoat material 11 is appropriately formed around the electrode 32 to prevent solder flow. Moreover, the terminal electrode 8 and the overcoat material 11 are suitably formed also in the lower surface. The upper surface of the unfired substrate 20 including the surface electrode is provided with a sheet-like upper surface constraining layer 21 made of a paste mainly composed of alumina that is not sintered at the firing temperature of the ceramic green sheet. A sheet-like lower surface constraining layer 22 using a paste is provided. Further, similarly, a cavity constraining layer 25 mainly composed of alumina is formed at the bottom of the cavity 5. Although these manufacturing methods will be described below, the cavity constraining layer 25 is formed so as to be larger than the outer periphery of the through hole 9 and to have the outer edge thereof as the sandwiched portion 26. As a result, the bottom surface of the cavity and the periphery thereof are uniformly restrained, and the generation of cracks can be prevented. In addition, a sheet-like constraining layer can be further stacked in the cavity 50, and an embodiment in which a granular constraining material is filled and a shrinkage suppression material is packed in the cavity can be taken. As a result, the inclined surface can be more completely suppressed by preventing distortion and collapse during firing.

図1(b)は、焼結後に基板表面から上面拘束層21、下面拘束層22及びキャビティ拘束層25を取り除いた多層セラミック基板10を示している。キャビティ拘束層25の挟着部26に相当する部分にはキャビティ拘束層の残存部が存在しているが、この残存部はアルミナ濃度の高い介在部12を構成する。上述してきているようにキャビティ付き基板では、キャビティ周辺は内部電極を配置できない禁止領域があり、この領域には電極パターンを形成できない。しかし、この領域にキャビティ拘束層25の一部である挟着部26等の介在物を設けることは問題ない。この挟着部があることによる効果は、未焼成セラミック基板を積層圧着して形成する際や焼成の過程においてキャビティ底部に厚みを加えて傾斜を軽減する働き、また焼成時の均一な収縮抑制の働きを主に達成するものである。従って、焼成後は必ずしも必須な構成ではなく明確な介在部として構成されなくても良い。例えば、拘束層の除去と共に減少することもあるので、キャビティ底部の界面の一部に存在していれば足り、アルミナ濃度が他よりも高いことによって確認できる。アルミナ成分の濃度は、基板断面をEPMA等を用いて観察することが出来る。基板材料であるセラミックグリーンシートの成分にもアルミナが含まれているが、介在部12はさらにアルミナの含有が多く、キャビティの界面から基板の奥くに向かってアルミナ濃度の勾配が確認される。これによりアルミナ濃度が高いと判断できる。
次に、図1(c)に示すようにキャビティ内に電子部品を搭載する。基板表層の表面電極31、32には焼結後、NiめっきとAuめっきによるメタライズ導体膜により表面処理が施される。キャビティ50の下には底部電極33と裏面端子8とを接続するサーマルビア40が形成されており、サーマルビア40と繋がる底部電極33に鉛フリーのボール半田61を用いて半導体素子6を電気的に接続し、さらに半導体素子6の入出力端子と端子電極31との間をボンディングワイヤ7により接続している。ここで端子電極31の平坦度が改善され傾斜角度は3度以下となっているのでワイヤの接続不良などを生じることが無い。尚、裏面端子8は積層基板自身を他の更に大規模な基板、例えば、携帯端末等の内部を主構成しているPCB基板等へ実装、電気的接続するための接続端子であり、略格子状に配置されている。
FIG. 1B shows the multilayer ceramic substrate 10 in which the upper surface constraining layer 21, the lower surface constraining layer 22 and the cavity constraining layer 25 are removed from the substrate surface after sintering. A remaining portion of the cavity constraining layer exists in a portion corresponding to the sandwiched portion 26 of the cavity constraining layer 25, and this remaining portion constitutes the intervening portion 12 having a high alumina concentration. As described above, in a substrate with a cavity, there is a prohibited area around the cavity where an internal electrode cannot be arranged, and an electrode pattern cannot be formed in this area. However, there is no problem in providing an inclusion such as the sandwiching portion 26 which is a part of the cavity constraining layer 25 in this region. The effect of the sandwiched portion is to reduce the inclination by adding thickness to the bottom of the cavity during the process of laminating and pressing an unfired ceramic substrate or in the firing process, and to suppress uniform shrinkage during firing. This is mainly to achieve work. Therefore, after firing, it is not necessarily an essential configuration and may not be configured as a clear intervening portion. For example, since it may decrease with the removal of the constraining layer, it is sufficient if it exists at a part of the interface at the bottom of the cavity, and it can be confirmed by the fact that the alumina concentration is higher than the others. The concentration of the alumina component can be observed on the cross section of the substrate using EPMA or the like. The component of the ceramic green sheet, which is the substrate material, also contains alumina, but the intervening portion 12 further contains alumina, and a gradient of alumina concentration is confirmed from the cavity interface toward the depth of the substrate. Thereby, it can be judged that the alumina concentration is high.
Next, as shown in FIG.1 (c), an electronic component is mounted in a cavity. The surface electrodes 31 and 32 on the substrate surface layer are subjected to surface treatment with a metallized conductor film by Ni plating and Au plating after sintering. A thermal via 40 that connects the bottom electrode 33 and the back terminal 8 is formed under the cavity 50, and the semiconductor element 6 is electrically connected to the bottom electrode 33 that is connected to the thermal via 40 using lead-free ball solder 61. Further, the input / output terminal of the semiconductor element 6 and the terminal electrode 31 are connected by a bonding wire 7. Here, since the flatness of the terminal electrode 31 is improved and the inclination angle is 3 degrees or less, there is no occurrence of poor connection of wires. The back terminal 8 is a connection terminal for mounting and electrically connecting the laminated substrate itself to another larger substrate, for example, a PCB substrate that mainly constitutes the interior of a portable terminal or the like. Arranged in a shape.

次に、図2は大小2段のキャビティを備える多層セラミック基板の第2の実施例である。図2の(a)(b)(c)は図1と同様であるので同一符号を付して詳細な説明は省略する。即ち、この実施例は、複数の誘電体グリーンシート1a〜1jを積層してなるものであるが、貫通孔92を有するグリーンシート1a〜1cからなる第3のセラミックグリーンシート積層体20cと、前記貫通孔92よりは小径の貫通孔91を有するグリーンシート1d〜1fからなる第2のセラミックグリーンシート積層体20bと、貫通孔を有しないグリーンシート1g〜1jからなる第1のセラミックグリーンシート積層体20aとを重ねて圧着することで、半導体素子6を搭載するための第1のキャビティ51と、端子電極31をその底面に備えた第2のキャビティ52を形成してなる多層セラミック基板である。図2(a)の未焼成多層セラミック基板については、セラミックグリーンシートの焼成温度では焼結しないアルミナを主体とするペーストによるシート状の上面拘束層21、下面拘束層22を設けるのは同様であるが、第1のキャビティ51の底面に第1の貫通孔91よりも大きく外周に挟着部26を有するように第1のキャビティ拘束層25を設け、また第2のキャビティ52の底面には、第2の貫通孔92よりも大きく外周に挟着部28を有する第2のキャビティ拘束層27を設けることが新たな構成である。この挟着部の働きは図1の実施例の場合と同様でクラック発生の抑制とキャビティ周囲の傾斜の改善である。よって、図2(b)に示すように焼結後、それぞれの拘束層を除去した後は、第1のキャビティ51の底部にアルミナ濃度の高い介在部12を有し、また第2のキャビティ52の底部にもアルミナ濃度の高い介在部14を有している。
尚、図2(c)のように半導体素子6と第2のキャビティ52の底部に設けた端子電極31とをボンディングワイヤ7により接続した後、第2のキャビティ52の上面は蓋部材(図示せず)で密封される。
Next, FIG. 2 shows a second embodiment of a multilayer ceramic substrate provided with two large and small cavities. Since (a), (b) and (c) in FIG. 2 are the same as those in FIG. That is, this embodiment is formed by laminating a plurality of dielectric green sheets 1a to 1j, and the third ceramic green sheet laminate 20c composed of the green sheets 1a to 1c having through holes 92, A second ceramic green sheet laminate 20b made of green sheets 1d to 1f having through holes 91 smaller in diameter than through holes 92, and a first ceramic green sheet laminate made of green sheets 1g to 1j having no through holes. The multi-layer ceramic substrate is formed by forming the first cavity 51 for mounting the semiconductor element 6 and the second cavity 52 having the terminal electrode 31 on the bottom surface thereof by overlapping and crimping 20a. For the unsintered multilayer ceramic substrate of FIG. 2A, it is the same to provide the sheet-like upper surface constraining layer 21 and the lower surface constraining layer 22 with a paste mainly composed of alumina that is not sintered at the firing temperature of the ceramic green sheet. However, the first cavity constraining layer 25 is provided on the bottom surface of the first cavity 51 so as to have a sandwiched portion 26 larger than the first through hole 91 on the outer periphery, and on the bottom surface of the second cavity 52, A new configuration is to provide the second cavity constraining layer 27 that is larger than the second through-hole 92 and has the sandwiching portion 28 on the outer periphery. The function of this sandwiching portion is the same as in the embodiment of FIG. 1, and is to suppress the generation of cracks and improve the inclination around the cavity. Therefore, as shown in FIG. 2B, after the respective constraining layers are removed after sintering, the intervening portion 12 having a high alumina concentration is provided at the bottom of the first cavity 51, and the second cavity 52 is provided. There is also an intervening portion 14 having a high alumina concentration at the bottom.
2C, after the semiconductor element 6 and the terminal electrode 31 provided at the bottom of the second cavity 52 are connected by the bonding wire 7, the upper surface of the second cavity 52 is a lid member (not shown). )).

図3はキャビティ内にフリップチップによる半導体素子を搭載する場合のキャビティを備える多層セラミック基板の例である。基板に形成するキャビティ拘束層や介在部は図1と同様であるので説明は省略するが、フリップチップによるものは、半導体素子を接続するのに必要な接続電極上に予めAuワイヤでバンプを形成しておき、その後、半導体を上下反転してキャビティの底部電極へバンプを押し付けて接合する。必要に応じて半導体素子とキャビティの間に生じる空間には樹脂を流し込んで密封することもある。
尚、上記した実施例では、いずれも基板表面に表面電極や裏面電極を設けた後に、拘束層を形成し焼結する例を示しているが、拘束層を設け収縮抑制焼結を行った後に、焼結後の基板に表面電極や裏面電極を設けるようになした多層セラミック基板でも本発明は実施できる。
FIG. 3 shows an example of a multilayer ceramic substrate having a cavity when a flip-chip semiconductor element is mounted in the cavity. The cavity constraining layer and intervening portion formed on the substrate are the same as in FIG. 1 and will not be described. However, in the case of flip chip, bumps are formed in advance on the connection electrodes necessary for connecting the semiconductor elements with Au wires. After that, the semiconductor is turned upside down and bumps are pressed against the bottom electrode of the cavity to be bonded. If necessary, the space generated between the semiconductor element and the cavity may be sealed by pouring resin.
In each of the above-described embodiments, the example in which the constraining layer is formed and sintered after the surface electrode and the back electrode are provided on the substrate surface is shown. The present invention can also be carried out with a multilayer ceramic substrate in which a surface electrode and a back electrode are provided on the sintered substrate.

以下、本発明のキャビティを備えた多層セラミック基板について製造方法を追いながら更に説明する。図4は本発明の製造プロセスの一例を示す製造フローチャート、図5は概略の製造工程を説明する断面図、図6は大型の未焼成多層セラミック基板を示す斜視図である。図7は他の製造プロセスの例を示す製造フローチャートである。   Hereinafter, the multilayer ceramic substrate provided with the cavity of the present invention will be further described while following the manufacturing method. FIG. 4 is a manufacturing flowchart showing an example of the manufacturing process of the present invention, FIG. 5 is a cross-sectional view for explaining a schematic manufacturing process, and FIG. 6 is a perspective view showing a large unfired multilayer ceramic substrate. FIG. 7 is a manufacturing flowchart showing an example of another manufacturing process.

[基体用グリーンシートの材料]
基体用グリーンシートは、低温焼結セラミック材料からなる。その組成は本発明特有のものでもあるので、ここで説明を加えておく。
本発明で用いる材料組成は、主成分がAl,Si,Sr,Tiの酸化物で構成され、それぞれAl換算で10〜60質量%、SiO換算で25〜60質量%、SrO換算で10〜50質量%、TiO換算で20質量%以下(0を含む)からなり、900℃以下の温度でも焼成できる材料である。これにより、銀や銅、金といった高い導電率を有する金属材料を電極用導体として用いて一体焼結を行うことができる。
[Material of green sheet for substrate]
The green sheet for a substrate is made of a low-temperature sintered ceramic material. Since the composition is also unique to the present invention, a description will be added here.
The material composition used in the present invention is composed mainly of oxides of Al, Si, Sr, and Ti, and is 10 to 60% by mass in terms of Al 2 O 3 , 25 to 60% by mass in terms of SiO 2 , and SrO equivalent. 10 to 50% by mass and 20% by mass or less (including 0) in terms of TiO 2 , and can be fired at a temperature of 900 ° C. or less. Thereby, integral sintering can be performed using a metal material having a high conductivity such as silver, copper, or gold as the electrode conductor.

さらに主成分100質量%に対して、副成分として、Bi、Na、K、Coの群のうち、Bi換算で0.1〜10質量%、NaO換算で0.1〜5質量%、KO換算で0.1〜5質量%、CoO換算で0.1〜5質量%の少なくとも1種以上を含有させることが好ましい。これらの副成分は、仮焼工程においてAl、TiO以外の成分がガラス化する際、燒結助剤として働き、ガラスの軟化点を低下させる効果があり、より低温で収縮を開始する材料が得られる。
また、更に副成分としてCu、Mn、Agのうち、CuO換算で0.01〜5質量%、MnO換算で0.01〜5質量%、Agを0.01〜5質量%のうち少なくとも1種以上を含有させても良い。これらの副成分は、主に焼成工程において結晶化を促進する効果があり、焼成工程において1000℃以下の焼成温度でQの高い誘電特性を得ることを可能とするものである。
Furthermore, 0.1 to 10% by mass in terms of Bi 2 O 3 and 0.1 to 5 in terms of Na 2 O among the group of Bi, Na, K and Co as subcomponents with respect to 100% by mass of the main component. It is preferable to contain at least one mass%, 0.1 to 5 mass% in terms of K 2 O, and 0.1 to 5 mass% in terms of CoO. These subcomponents act as a sintering aid when components other than Al 2 O 3 and TiO 2 are vitrified in the calcination step, and have an effect of lowering the softening point of the glass, and start shrinking at a lower temperature. A material is obtained.
Further, among Cu, Mn, and Ag as subcomponents, 0.01 to 5% by mass in terms of CuO, 0.01 to 5% by mass in terms of MnO 2 , and at least one of 0.01 to 5% by mass of Ag. You may contain a seed or more. These subcomponents have an effect of mainly promoting crystallization in the firing step, and can obtain a high Q dielectric property at a firing temperature of 1000 ° C. or less in the firing step.

各成分範囲を特定した理由は以下のとおりである。この材料はマイクロ波用誘電体材料として特長があるのでその辺の特性についても併記する。
SiがSiO換算で25質量%より少ない場合、SrがSrO換算で10質量%より少ない場合、いずれも1000℃以下の低温焼成では、焼結密度が十分上昇しないために、磁器が多孔質となり、吸湿等により良好な特性が得られない。AlがAl換算で10質量%より少ない場合、良好な高強度が得られない。また、AlがAl換算で60質量%より多い場合、SiがSiO換算で60質量%より多い場合、SrがSrO換算で50質量%より多い場合、やはり1000℃以下の低温焼成では、焼結密度が十分上昇しないために、磁器が多孔質となり、吸湿等により良好な特性が得られない。
また、TiがTiO換算で20質量%より多いと、1000℃以下の低温焼成では、焼結密度が十分上昇しないために、磁器が多孔質となり、吸湿等により良好な特性が得られない。同時に、磁器の共振周波数の温度係数がTiの含有量増加と共に大きくなり良好な特性が得られない。Tiが含有してない場合の磁器の共振周波数の温度係数τfは−20〜−40ppm/℃に対し、Tiの配合量を多くしていくにつれて増加し、τfを0ppm/℃に調整することも容易である。
Biは、低温焼結を達成するために添加される。つまり、このBiを添加することにより、仮焼工程においてAl、TiO以外の成分がガラス化しようとする際、このガラスの軟化点を低下させる効果があり、より低温で収縮を開始する材料が得られること、および、焼成工程において、1000℃以下の焼成温度でQの高い誘電特性を得ることを可能とするものである。しかしながら、Bi換算で10質量%より多いと、Q値が小さくなる。このため、10質量%以下が望ましい。更に好ましくは5質量%以下である。一方、0.1質量%より少ないと添加効果が少なく、より低温での結晶化が困難になるため、0.1質量%以上が好ましい。更に好ましくは0.2質量%以上である。
The reason for specifying each component range is as follows. Since this material has a feature as a dielectric material for microwaves, the characteristics of the side are also described.
When Si is less than 25% by mass in terms of SiO 2 and Sr is less than 10% by mass in terms of SrO, the sintering density does not rise sufficiently at low temperature firing at 1000 ° C. or lower, so the porcelain becomes porous. Good characteristics cannot be obtained due to moisture absorption or the like. When Al is less than 10% by mass in terms of Al 2 O 3 , good high strength cannot be obtained. Also, when Al is more than 60% by mass in terms of Al 2 O 3 , Si is more than 60% by mass in terms of SiO 2 , Sr is more than 50% by mass in terms of SrO, Since the sintered density does not increase sufficiently, the porcelain becomes porous, and good characteristics cannot be obtained due to moisture absorption or the like.
On the other hand, when Ti is more than 20% by mass in terms of TiO 2 , the sintering density is not sufficiently increased by low-temperature firing at 1000 ° C. or lower, so that the porcelain becomes porous, and good characteristics cannot be obtained due to moisture absorption or the like. At the same time, the temperature coefficient of the resonance frequency of the porcelain increases with the Ti content, and good characteristics cannot be obtained. The temperature coefficient τf of the resonance frequency of the porcelain when Ti is not contained increases with increasing amount of Ti with respect to −20 to −40 ppm / ° C., and τf may be adjusted to 0 ppm / ° C. Easy.
Bi is added to achieve low temperature sintering. In other words, by adding this Bi, when components other than Al 2 O 3 and TiO 2 try to vitrify in the calcination step, there is an effect of lowering the softening point of this glass, and shrinkage starts at a lower temperature. It is possible to obtain a material to be obtained and to obtain a high Q dielectric property at a firing temperature of 1000 ° C. or lower in the firing step. However, when it is more than 10% by mass in terms of Bi 2 O 3 , the Q value becomes small. For this reason, 10 mass% or less is desirable. More preferably, it is 5 mass% or less. On the other hand, if it is less than 0.1% by mass, the effect of addition is small, and crystallization at a lower temperature becomes difficult. More preferably, it is 0.2 mass% or more.

Na、K及びCoは、NaO換算で0.1質量%未満の場合、KO換算で0.1質量%未満の場合、CoO換算で0.1質量%未満の場合、共にガラスの軟化点が高くなり低温での焼結が困難となる。このため、1000℃以下の焼成では緻密な材料が得られない。また、5質量%を超えると誘電損失が大きくなり過ぎ、実用性が無くなる。このため、NaO換算で0.1〜5質量%、KO換算で0.1〜5質量%、CoO換算で0.1〜5質量%が好ましい。
CuとMnは、焼成工程において誘電体磁器組成物の結晶化を促進する効果があり、低温焼結を達成するために添加されるが、CuO換算で0.01質量%未満の場合、MnO換算で0.01質量%未満の場合、その添加効果は小さく、900℃以下での焼成ではQの高い材料を得ることが困難になる。また、5質量%を超えると低温焼結性が損なわれるため、CuO換算で0.01〜5質量%が好ましい。
Agは、ガラスの軟化点を低下させると同時に、結晶化を促進する効果があり、低温焼結を達成するために添加されるが、5質量%を超えると誘電損失が大きくなり過ぎ、実用性がない。このため、Agは5質量%以下の添加が好ましい。さらに好ましくは2質量%以下である。
さらに、ZrO換算で0.01〜2質量%のZrを含有していると機械的強度の向上が見られるので望ましい。また、この低温焼結セラミック材料には、従来の材料に含まれているPbとBを含んでいない。PbOは有害物質であり、製造工程中で生じる廃棄物等の処理に費用がかかり、また製造工程中でのPbOの取り扱いにも注意が必要である。また、Bは、製造工程中で水、アルコールに溶解し、乾燥時に偏析したり、焼成時に電極材料と反応したり、使用する有機バインダと反応しバインダの性能を劣化させる等の問題がある。このような有害な元素を含んでいないので環境面でも有用である。
When Na, K, and Co are less than 0.1% by mass in terms of Na 2 O, less than 0.1% by mass in terms of K 2 O, and less than 0.1% by mass in terms of CoO, The softening point becomes high and sintering at low temperature becomes difficult. For this reason, a dense material cannot be obtained by firing at 1000 ° C. or lower. On the other hand, if it exceeds 5% by mass, the dielectric loss becomes too large and the practicality is lost. Therefore, 0.1 to 5 mass% in terms of Na 2 O, 0.1 to 5 mass% in K 2 O in terms of, 0.1 to 5 mass% in terms of CoO is preferable.
Cu and Mn have the effect of promoting crystallization of the dielectric ceramic composition in the firing step, and are added to achieve low-temperature sintering, but when less than 0.01% by mass in terms of CuO, MnO 2 When the amount is less than 0.01% by mass, the effect of addition is small, and it becomes difficult to obtain a material having a high Q by firing at 900 ° C. or lower. Moreover, since low temperature sinterability will be impaired when it exceeds 5 mass%, 0.01-5 mass% is preferable in conversion of CuO.
Ag has the effect of lowering the softening point of the glass and at the same time promoting crystallization, and is added to achieve low-temperature sintering, but if it exceeds 5% by mass, the dielectric loss becomes too large, and practicality is increased. There is no. For this reason, Ag is preferably added in an amount of 5% by mass or less. More preferably, it is 2 mass% or less.
Furthermore, it is desirable to contain 0.01 to 2 % by mass of Zr in terms of ZrO 2 because the mechanical strength is improved. Further, this low-temperature sintered ceramic material does not contain Pb and B contained in conventional materials. PbO is a hazardous substance, and it costs money to treat wastes and the like generated in the manufacturing process, and attention should be paid to the handling of PbO in the manufacturing process. In addition, B 2 O 3 dissolves in water and alcohol during the production process, segregates during drying, reacts with the electrode material during firing, reacts with the organic binder used, and degrades the performance of the binder. There is. Since it does not contain such harmful elements, it is also useful in terms of environment.

[基体用グリーンシートの作製]
以上の主成分及び副成分から出発原料を選択し、原材料となる酸化物粉あるいは炭酸塩化合物粉をそれぞれ秤量する。これらの粉末をボールミルやビーズミルに投入し、更に酸化ジルコニウム製のメディアボールと純水を投入して20時間湿式混合を行う。混合スラリーを加熱乾燥し水分を蒸発させた後ライカイ機で解砕し、アルミナ製のるつぼに入れて、700〜900℃、例えば800℃で2時間仮焼する。仮焼固形物を前述のボールミルやビーズミルに投入し20〜40時間湿式粉砕を行い、乾燥させ平均粒径0.6〜2μmの範囲に、例えば1μmの微粉砕粒子とする。仮焼物を微粉砕化した粒子はセラミックス粒子にガラスが部分的、全体的に被覆された仮焼複合物粒子となっている。これは、従来一般のガラス微粉砕粒子とセラミックス微粉砕粒子が混合された原料に比べると、ガラス成分のガラス化反応が不十分で流動し難い状態にある。つまり、焼成過程においてガラスの流動が抑えられるので、拘束層のアルミナがグリーンシート側に埋没し難く、除去もし易いグリーンシートが得られる。次に、この仮焼複合物粉末に、エタノール、ブタノール、有機バインダとしてポリビニルブチラール樹脂、可塑剤としてブチルフタリルグリコール酸ブチル(略称:BPBG)をボールミルで混合してスラリーを作製した。尚、有機バインダとしては、例えばポリメタクリル樹脂等を、可塑剤としては、例えばジ−n−ブチルフタレートを、溶剤としては、例えばトルエン、イソプロピルアルコールのようなアルコール類を用いることもできる。
次いで、このスラリーをドクターブレード法によって有機フィルム(ポリエチレンテレフタレートPET)上でシート状に成形し、乾燥させて、0.15mm厚みのセラミックグリーンシートを得た。セラミックグリーンシートは有機フィルムごと180mm角に切断した。
[Preparation of green sheet for substrate]
Starting materials are selected from the above main components and subcomponents, and oxide powders or carbonate compound powders as raw materials are weighed. These powders are put into a ball mill or bead mill, and further, media balls made of zirconium oxide and pure water are put in and wet mixed for 20 hours. The mixed slurry is dried by heating to evaporate water, and then pulverized with a lycra machine, placed in an alumina crucible, and calcined at 700 to 900 ° C., for example, 800 ° C. for 2 hours. The calcined solid is put into the aforementioned ball mill or bead mill, wet crushed for 20 to 40 hours, and dried to obtain finely pulverized particles having an average particle diameter of 0.6 to 2 μm, for example, 1 μm. Particles obtained by pulverizing the calcined product are calcined composite particles in which glass is partially and wholly covered with ceramic particles. This is in a state in which the vitrification reaction of the glass component is insufficient and is difficult to flow as compared with a raw material in which conventional glass finely pulverized particles and ceramic finely pulverized particles are mixed. In other words, since the flow of the glass is suppressed during the firing process, it is possible to obtain a green sheet in which the alumina in the constrained layer is difficult to be buried on the green sheet side and is easy to remove. Next, the calcined composite powder was mixed with ethanol, butanol, polyvinyl butyral resin as an organic binder, and butyl phthalyl glycolate (abbreviation: BPBG) as a plasticizer by a ball mill to prepare a slurry. For example, polymethacrylic resin can be used as the organic binder, di-n-butyl phthalate can be used as the plasticizer, and alcohols such as toluene and isopropyl alcohol can be used as the solvent.
Next, this slurry was formed into a sheet on an organic film (polyethylene terephthalate PET) by a doctor blade method and dried to obtain a ceramic green sheet having a thickness of 0.15 mm. The ceramic green sheet was cut into 180 mm square together with the organic film.

[第1のセラミックグリーンシート積層体の作製]
上記のセラミックグリーンシートに、キャビティに相当する部位にサーマルビアを構成するビアホールをパンチングで形成する。同時に回路を構成するビアホールを適宜設け、Agを主体とする導体ペーストでこれらのビアホールを充填し、さらにAgを主体とする導体ペーストを用いて回路を構成する内部電極パターンを印刷形成する。第1のセラミックグリーンシート積層体の最上層のシートについては底部電極を印刷形成する。これらのグリーンシートをそれぞれを1枚ずつ温度60℃、圧力2.8MPaで仮圧着しながら複数枚重ねて積層体を得る。そして、この積層体の下面にAgを主体とする導体ペーストを用いて端子電極を印刷形成し、さらに上面(第2のセラミックグリーンシート積層体を積層する面)の底部電極の位置であって、キャビティを形成する貫通孔に対面する位置に、貫通孔よりも大きいキャビティ拘束層を、貫通孔の外周長よりも120%以下の外周長になるように大きく、厚みが25〜50μm程度になるように形成する。よって、このキャビティ拘束層は前記底部電極を覆うように設けられる。尚、キャビティ拘束層の形成手段は、概ね厚さ60μm以下では印刷形成、80μm以上ではシート積層形成を目処とする。このとき印刷形成用のペースト、また拘束用シートについては下記するものを用いる。その後、この第1のセラミックグリーンシート積層体に対し静水圧プレスを施し圧着を行う。静水圧プレスの条件は、温度85℃、圧力10.8MPa、時間10分間とした。静水圧プレス処理により、積層体に均等圧が掛かり全体の密度及び強度の向上や表面の平坦化を行う。さらに、キャビティ拘束層を積層体側に十分に密着させることができ、後の基板圧着工程や焼成工程で収縮抑制、デラミネーション抑制の効果が期待できる。この圧着の後、下面の端子電極に関し適宜オーバーコート材を形成する。以上により第1のセラミックグリーンシート積層体を作製した。
[Production of first ceramic green sheet laminate]
A via hole constituting a thermal via is formed in the ceramic green sheet by punching at a portion corresponding to the cavity. At the same time, via holes constituting the circuit are appropriately provided, these via holes are filled with a conductor paste mainly composed of Ag, and an internal electrode pattern constituting the circuit is printed by using the conductor paste mainly composed of Ag. A bottom electrode is printed on the uppermost sheet of the first ceramic green sheet laminate. A laminate is obtained by stacking a plurality of these green sheets one by one while temporarily pressing them at a temperature of 60 ° C. and a pressure of 2.8 MPa. Then, the terminal electrode is printed by using a conductor paste mainly composed of Ag on the lower surface of the laminate, and further, the position of the bottom electrode on the upper surface (the surface on which the second ceramic green sheet laminate is laminated), A cavity constraining layer larger than the through hole is positioned so as to face the through hole forming the cavity so that the outer peripheral length is 120% or less than the outer peripheral length of the through hole, and the thickness is about 25 to 50 μm. To form. Therefore, the cavity constraining layer is provided so as to cover the bottom electrode. Note that the means for forming the cavity constraining layer is generally intended for printing when the thickness is 60 μm or less, and sheet lamination when the thickness is 80 μm or more. At this time, the following are used for the paste for print formation and the restraining sheet. Thereafter, the first ceramic green sheet laminate is subjected to a hydrostatic pressure press to perform pressure bonding. The conditions of the hydrostatic press were a temperature of 85 ° C., a pressure of 10.8 MPa, and a time of 10 minutes. By the isostatic pressing process, a uniform pressure is applied to the laminated body to improve the overall density and strength and to flatten the surface. Furthermore, the cavity constraining layer can be sufficiently adhered to the laminated body side, and an effect of suppressing shrinkage and delamination can be expected in the subsequent substrate crimping process and firing process. After this pressure bonding, an overcoat material is appropriately formed on the terminal electrode on the lower surface. Thus, the first ceramic green sheet laminate was produced.

[第2のセラミックグリーンシート積層体の作製]
上記のセラミックグリーンシートに回路を構成するビアホールを適宜設け、Agを主体とする導体ペーストでビアホールを充填し、さらにAgを主体とする導体ペーストを用いて回路を構成する内部電極パターンを印刷形成する。第2のセラミックグリーンシート積層体の最上層のシートについては端子電極や表面電極を印刷形成する。これらのグリーンシートをそれぞれを1枚ずつ温度60℃、圧力2.8MPaで仮圧着しながら複数枚重ねて積層体を得る。その後、この第2のセラミックグリーンシート積層体に対し静水圧プレスを施し圧着を行う。静水圧プレスの条件は上記第1のセラミックグリーンシート積層体の場合と同様である。この圧着の後、上面の端子電極や表面電極に関し適宜オーバーコート材を形成し、さらに、キャビティを形成する所定位置に貫通孔を一度に設ける。この貫通孔を設ける工程は静水圧プレス処理をした後に行う。静水圧プレスを掛けることにより密度、強度が向上し、貫通孔のダレ等もなくなり好ましい。以上により第2のセラミックグリーンシート積層体を作製した。
尚、上記第1と第2のセラミックグリーンシート積層体において、静水圧プレスを行うことは好ましい態様ではあるが、これを必須とするものではない。例えば、温度85℃、圧力10.8MPa程度の通常の熱圧着を施すことでも良い。
[Production of second ceramic green sheet laminate]
Via holes constituting the circuit are appropriately provided in the ceramic green sheet, the via holes are filled with a conductor paste mainly composed of Ag, and an internal electrode pattern constituting the circuit is printed using the conductor paste mainly composed of Ag. . A terminal electrode and a surface electrode are printed on the uppermost sheet of the second ceramic green sheet laminate. A laminate is obtained by stacking a plurality of these green sheets one by one while temporarily pressing them at a temperature of 60 ° C. and a pressure of 2.8 MPa. Thereafter, the second ceramic green sheet laminate is subjected to a hydrostatic pressure press to perform pressure bonding. The conditions for the isostatic pressing are the same as those for the first ceramic green sheet laminate. After this crimping, an overcoat material is appropriately formed with respect to the terminal electrode and the surface electrode on the upper surface, and further, through holes are provided at a predetermined position where the cavity is formed. The step of providing the through hole is performed after the hydrostatic pressure pressing process. It is preferable to apply a hydrostatic pressure press to improve density and strength and eliminate sagging of the through-holes. The 2nd ceramic green sheet laminated body was produced by the above.
In addition, although it is a preferable aspect to perform an isostatic pressing in the said 1st and 2nd ceramic green sheet laminated body, this is not essential. For example, normal thermocompression bonding at a temperature of 85 ° C. and a pressure of about 10.8 MPa may be performed.

[未焼成多層セラミック基板の作製]
第1のセラミックグリーンシート積層体20aの上に第2のセラミックグリーンシート積層体20bを一致するように載せた後、温度70℃、圧力10.8MPaにて熱圧着を施し一体化してキャビティを有する未焼成多層セラミック基板を得た。このとき、キャビティ拘束層は貫通孔よりも大きく外周を挟着するように重ねることで足りるので積層作業を容易に行うことができる。
未焼成多層セラミック基板は、図6に示すように180mm角の大型基板100にて作製しているので、これに製品の個片サイズである10×15mm角に分割溝105を入れた。セラミックグリーンシート積層体は大型基板で作製し、最終工程で個片に分割して多層セラミック基板の製品101a、101b・・・を得る。基板の分割法としては、焼結後にダイヤモンドブレード、ダイヤモンドペン、レーザー等で分割溝を形成し破断する方法あるいは焼結前の生状態で分割溝を形成し、焼成後に個々の基板に分割する場合とがある。ここでは、後者の未焼成のグリーンシートに製品の個片基板サイズである10×15mm角に分割溝を入れた。分割溝入れはグリーン体にナイフ刃を押し当て、深さを0.11mmとした。なお、ナイフ刃の厚さは0.15mmを用いた。分割溝の断面形状は底辺約0.15mm、深さ約0.1mmのほぼ二等辺三角形となっていた。
[Production of unfired multilayer ceramic substrate]
After the second ceramic green sheet laminate 20b is placed on the first ceramic green sheet laminate 20a so as to coincide with each other, thermocompression bonding is performed at a temperature of 70 ° C. and a pressure of 10.8 MPa so as to be integrated and the cavity has a cavity. A fired multilayer ceramic substrate was obtained. At this time, it is sufficient to stack the cavity constraining layer so as to sandwich the outer periphery larger than the through hole, so that the laminating operation can be easily performed.
Since the unsintered multilayer ceramic substrate is made of a 180 mm square large substrate 100 as shown in FIG. 6, the divided grooves 105 are put into 10 × 15 mm squares which are individual product sizes. The ceramic green sheet laminate is produced from a large substrate and divided into individual pieces in the final process to obtain products 101a, 101b,. As a method of dividing the substrate, a method of forming a dividing groove with a diamond blade, a diamond pen, a laser, etc. after fracture or breaking, or a method of forming a dividing groove in a raw state before sintering and dividing into individual substrates after firing There is. In this case, the latter unfired green sheet was divided into 10 × 15 mm squares, which is the size of the individual substrate of the product. In the division grooving, a knife blade was pressed against the green body to a depth of 0.11 mm. The thickness of the knife blade was 0.15 mm. The cross-sectional shape of the dividing groove was a substantially isosceles triangle having a base of about 0.15 mm and a depth of about 0.1 mm.

[拘束層用ペーストの作製]
上下拘束層およびキャビティ拘束層は、上述した低温焼結セラミック材料の焼結温度では焼結しない無機材料からなるものである。この無機材料としては、例えばアルミナ粉末またはジルコニア粉末等を用いることができるが、拘束効果、入手容易性からアルミナが好ましい。無機材料粉末の平均粒径は、0.3〜4μmであることが望ましい。この理由は、粒径により拘束力を制御することがある程度可能であるからである。即ち、無機材料の平均粒径が0.3μm未満であると、塗布印刷に必要な粘度特性を得るために必要なバインダ量が多くなり、無機材料粉末の充填率が小さくなって平面と分割溝と共に拘束力を発揮できず、4μmを超えると拘束力が弱くなる。
ここでは難焼結性の無機材料粉末として上記粒径としたアルミナを用いた。別途有機バインダとしてのエチルセルロースを有機溶剤としてのαテルピネオールに溶かしたビヒクルを準備し、アルミナとビヒクルを乳鉢と乳棒で予備混合した後、3本ロールで混錬することによりペーストを作製した。このときのビヒクルはエチルセルロースをαテルピネオールに5wt%溶解したものを用いた。ここで、印刷ペーストに使用する有機バインダは印刷に必要な粘度特性とペーストを構成する粉末同士の密着性及び基板への密着性を有する程度であればよいので4体積%以上、10体積%未満で良い。より多くの有機バインダは印刷膜単体の強さを増大し、基板との密着性を高めることができるが、無機材料粉末の充填率が減少する。無機材料粒子の充填率が高い方が収縮率低減とそのばらつき低減に有効である。さらには焼成過程における分解物が少なくなるため、外部電極への悪影響が少なく、良好な外部電極が得られる。
このペーストを用いて第1のセラミックグリーンシート積層体上にキャビティ拘束層を印刷形成する。あるいは下記する拘束層用グリーンシートを用いてキャビティ拘束層を形成する。
[Preparation of constrained layer paste]
The upper and lower constraining layers and the cavity constraining layer are made of an inorganic material that does not sinter at the sintering temperature of the low-temperature sintered ceramic material described above. As this inorganic material, for example, alumina powder or zirconia powder can be used, but alumina is preferable from the viewpoint of restraint effect and availability. The average particle size of the inorganic material powder is desirably 0.3 to 4 μm. This is because the restraining force can be controlled to some extent by the particle size. That is, if the average particle size of the inorganic material is less than 0.3 μm, the amount of binder necessary for obtaining the viscosity characteristics necessary for coating printing increases, the filling rate of the inorganic material powder decreases, and the flat surface and the dividing groove At the same time, the restraining force cannot be exhibited, and if it exceeds 4 μm, the restraining force becomes weak.
Here, alumina having the above particle diameter was used as the hardly sinterable inorganic material powder. Separately, a vehicle in which ethyl cellulose as an organic binder was dissolved in α-terpineol as an organic solvent was prepared, and alumina and vehicle were premixed with a mortar and pestle, and then kneaded with three rolls to prepare a paste. The vehicle used here was ethyl cellulose dissolved in α terpineol at 5 wt%. Here, the organic binder used in the printing paste may be at least 4% by volume and less than 10% by volume as long as it has viscosity characteristics necessary for printing, adhesion between the powders constituting the paste, and adhesion to the substrate. Good. More organic binders can increase the strength of the printed film alone and improve the adhesion to the substrate, but the filling rate of the inorganic material powder is reduced. A higher filling rate of the inorganic material particles is effective in reducing the shrinkage rate and reducing its variation. Furthermore, since decomposition products in the firing process are reduced, there is little adverse effect on the external electrode, and a good external electrode can be obtained.
A cavity constraining layer is printed on the first ceramic green sheet laminate using this paste. Alternatively, the cavity constraining layer is formed using the constraining layer green sheet described below.

[上下拘束層用グリーンシートの作製]
拘束層は、上述したペーストの他にグリーンシートの形態でも使用される。上記と同様に、アルミナ粉末として平均粒径は、0.3〜4μmアルミナを準備し、その粉末とエタノール、ブタノール、有機バインダとしてポリビニルブチラール樹脂、可塑剤としてブチルフタリルグリコール酸ブチル(略称:BPBG)を酸化ジルコニウム製のメディアボールとともにポリエチレン製のボールミルで混合してスラリーを作製した。尚、有機バインダとしては、例えばポリメタクリル樹脂等を、可塑剤としては、例えばジ−n−ブチルフタレートを、溶剤としては、例えばトルエン、イソプロピルアルコールのようなアルコール類を用いることもできる。次いで、このスラリーをドクターブレード法によって有機フィルム(ポリエチレンテレフタレートPET)上でシート状に成形し、乾燥させて、セラミックグリーンシートを得た。グリーンシートはドクターブレードのギャップを変えることにより厚さ、0.04mm、0.10mm、0.20mmの3種類作製した。セラミックグリーンシートは有機フィルムごと180mm角に切断した。
[Preparation of green sheet for upper and lower constraining layers]
In addition to the paste described above, the constraining layer is also used in the form of a green sheet. Similarly to the above, alumina having an average particle diameter of 0.3 to 4 μm was prepared as an alumina powder, ethanol, butanol, polyvinyl butyral resin as an organic binder, and butyl phthalyl glycolate (abbreviation: BPBG) as a plasticizer. ) Together with zirconium oxide media balls in a polyethylene ball mill to prepare a slurry. For example, polymethacrylic resin can be used as the organic binder, di-n-butyl phthalate can be used as the plasticizer, and alcohols such as toluene and isopropyl alcohol can be used as the solvent. Next, this slurry was formed into a sheet on an organic film (polyethylene terephthalate PET) by the doctor blade method and dried to obtain a ceramic green sheet. Three types of green sheets with thicknesses of 0.04 mm, 0.10 mm, and 0.20 mm were prepared by changing the gap of the doctor blade. The ceramic green sheet was cut into 180 mm square together with the organic film.

[積層体のシート状上下拘束層の形成]
次に、上記したキャビティを含む未焼成多層セラミック基板の上面及び下面に拘束層を形成する。上下シート拘束層の形成は、上記スラリーを用いて厚さ100μmのグリーンシートを作製し、この拘束層用グリーンシートを未焼成多層セラミック基板上に複数枚重ね合わせ、圧着し、所定の厚さ(例えば上下それぞれ300μm程度)になるまで重ね、温度が85℃、圧力は10.8MPaで熱圧着を行った。また、乾燥手段については、高周波あるいはマイクロ波による加熱で乾燥させても良い。
また、上記したキャビティ拘束層の上に、さらにシート拘束層を設けることも、本発明では可能であるが、次のようにして作製できる。例えば、上記した上面シート拘束層の上からキャビティに相当する部位をさらに押圧することで、キャビティの貫通孔上部に拘束層がめり込んだ形となり充填することができる。
[Formation of sheet-like top and bottom constraining layer of laminate]
Next, constraining layers are formed on the upper and lower surfaces of the unfired multilayer ceramic substrate including the cavities described above. The upper and lower sheet constraining layers are formed by producing a green sheet having a thickness of 100 μm using the slurry, and a plurality of the constraining layer green sheets are stacked on an unsintered multilayer ceramic substrate, and bonded to each other with a predetermined thickness ( For example, thermocompression bonding was performed at a temperature of 85 ° C. and a pressure of 10.8 MPa. The drying means may be dried by heating with high frequency or microwave.
In addition, although it is possible in the present invention to provide a sheet constraining layer on the above-described cavity constraining layer, it can be produced as follows. For example, by further pressing a portion corresponding to the cavity from above the upper surface sheet constraining layer, the constraining layer is embedded in the upper part of the through hole of the cavity and can be filled.

[未焼成多層セラミック基板の本焼結]
焼成はバッチ炉において大気中で行い、500℃で4時間保持して脱バインダを行った後、800〜1000℃、例えば900℃で2時間保持し、焼結を行った。昇温速度は3℃/分で、冷却は炉内自然冷却とした。800℃未満であると緻密化が困難になる問題があり、1000℃を超えるとAg系電極材の形成が困難となり、また好ましい誘電特性を得ることが出来ない。
[Main sintering of unfired multilayer ceramic substrate]
Firing was performed in the air in a batch furnace, held at 500 ° C. for 4 hours to remove the binder, and then held at 800 to 1000 ° C., for example, 900 ° C. for 2 hours for sintering. The temperature rising rate was 3 ° C./min, and cooling was natural cooling in the furnace. When the temperature is lower than 800 ° C., there is a problem that densification becomes difficult. When the temperature is higher than 1000 ° C., formation of an Ag-based electrode material becomes difficult, and preferable dielectric characteristics cannot be obtained.

[拘束層の除去]
焼結後、表面に付着しているアルミナ粒子を除去する。これは焼成後の基板を超音波洗浄槽の水の中に入れて超音波を駆動することにより行う。このとき、ほとんどのアルミナ粒子が除去される。それによりAg電極パッドの上にNiめっき、Auめっき等のメタライズが高品質に成膜できる。メタライズは公知の無電解めっきが適用できる。尚、製品によってはNiめっき、Auめっきのメタライズ成膜形成を行わない場合もある。
[Removal of constrained layer]
After sintering, alumina particles adhering to the surface are removed. This is performed by driving the ultrasonic wave by placing the fired substrate in the water of an ultrasonic cleaning tank. At this time, most of the alumina particles are removed. Thereby, metallization such as Ni plating and Au plating can be formed on the Ag electrode pad with high quality. A known electroless plating can be applied to the metallization. Depending on the product, there is a case where Ni-plated or Au-plated metallized film is not formed.

[多層セラミック基板の分割]
基板上面のメタライズ電極の上にスクリーン印刷ではんだパターンを形成する。そして、個々の半導体素子、チッブ素子等の部品を搭載し、リフローにより接続する。ワイヤボンディング用半導体素子は、その後基体の端子電極にワイヤボンディング接続を行う。その後、大型基板から分割溝に沿って破断することにより小片の多層セラミック基板が得られる。
[Division of multilayer ceramic substrate]
A solder pattern is formed by screen printing on the metallized electrode on the upper surface of the substrate. Then, components such as individual semiconductor elements and chip elements are mounted and connected by reflow. The wire bonding semiconductor element then performs wire bonding connection to the terminal electrode of the substrate. Thereafter, a small multilayer ceramic substrate is obtained by breaking along the dividing groove from the large substrate.

[2段キャビティを備えた基板のセラミックグリーンシート積層体の作製]
2段キャビティを備えた多層セラミック基板の作製については、図7に示す製造過程で、上記と同様の製造条件等を用いれば良いので詳しい説明は省略する。但し、セラミックグリーンシート積層体の作製において、第2、第3のセラミックグリーンシート積層体を圧着する静水圧プレス処理の過程が若干異なる。即ち、第1のセラミックグリーンシート積層体については第1のキャビティ拘束層を形成した後に静水圧プレスを行い、第2のセラミックグリーンシート積層体については第2のキャビティ拘束層を形成した後に静水圧プレスを行い、更にその後に第1の貫通孔を設ける。そして、第3のセラミックグリーンシート積層体については、静水圧プレス後に第2の貫通孔を設けると言う過程をとるものである。
[Production of ceramic green sheet laminate on substrate with two-step cavities]
The production of the multilayer ceramic substrate having a two-stage cavity is not described in detail because the same production conditions as described above may be used in the production process shown in FIG. However, in the production of the ceramic green sheet laminate, the process of the hydrostatic pressure pressing process for crimping the second and third ceramic green sheet laminates is slightly different. That is, for the first ceramic green sheet laminate, hydrostatic pressing is performed after forming the first cavity constraining layer, and for the second ceramic green sheet laminate, the hydrostatic pressure is formed after forming the second cavity constraining layer. Pressing is performed, and then a first through hole is provided. And about a 3rd ceramic green sheet laminated body, the process of providing a 2nd through-hole after an isostatic press is taken.

[キャビティ用顆粒状拘束材の作製と充填]
また、キャビティ拘束層の上に、さらに顆粒状拘束材を充填することも本発明では可能である。例えば、スプレードライヤーを用いることで、アルミナと有機バインダからなる顆粒を作製する。顆粒作製は、上記粒径のアルミナ、有機溶剤、有機バインダ、可塑剤からなるスラリーを用意して、スプレードライヤーに投入し、熱風入口温度が80℃、排風出口温度が60℃、ディスク回転数が35000rpmの条件で行った。さらに、得られた顆粒をふるいにかけて、5〜50μm、例えば粒径15μmの顆粒を得た。次に、グリーンシート積層体のキャビティに対応した位置に開口部のあるマスク上に顆粒状無機拘束材を散布し、これをすり切ることで、キャビティ部に焼成温度では焼結しない顆粒状拘束材を、充填し、加圧成形した。加圧成形は、温度が85℃、圧力は10.8MPaで行った。なお、キャビティの充填は、マスクを用いずに直接グリーンシート積層体上に散布した後に、これをすり切ることでも出来る。
[Preparation and filling of granular restraint for cavity]
Moreover, it is also possible in the present invention to fill a granular constraining material on the cavity constraining layer. For example, the granule which consists of an alumina and an organic binder is produced by using a spray dryer. For granule preparation, a slurry made of alumina, organic solvent, organic binder, and plasticizer with the above particle diameter is prepared and put into a spray dryer, hot air inlet temperature is 80 ° C., exhaust air outlet temperature is 60 ° C., disk rotation speed Was performed under the condition of 35000 rpm. Further, the obtained granules were sieved to obtain granules having a particle size of 5 to 50 μm, for example, 15 μm. Next, the granular inorganic restraint material is sprayed on a mask having an opening at a position corresponding to the cavity of the green sheet laminate, and the granular restraint material that does not sinter at the firing temperature in the cavity portion by grinding it. Were filled and pressed. The pressure molding was performed at a temperature of 85 ° C. and a pressure of 10.8 MPa. The filling of the cavities can also be carried out by spraying directly on the green sheet laminate without using a mask.

本発明の実験結果について説明する。実施例の積層基板は、上記した基体材料、グリーンシート積層体、シート状の上下拘束層、キャビティ拘束層により未焼成多層セラミック基板を作製し、さらに上記した焼結と、拘束層の除去を行いキャビティを備えた多層セラミック基板を得た。基板の寸法はおよそ横10mm、縦8mm、厚さ0.75mmであり、キャビティ寸法はおよそ横2mm、縦2mm、深さ0.4mmである。ここで、貫通孔の外周の長さに対するキャビティ拘束層の外周の長さと、キャビティ深さに対するキャビティ拘束層の厚みをそれぞれ変化させた。このとき、焼成前に、キャビティ拘束層周縁部のクラックと、貫通孔とキャビティ拘束層の位置ズレ程度を確認し、焼成後にはキャビティのクラック有無、キャビティ底部の平坦度、端子電極の傾斜角について評価した。
評価方法は、貫通孔とキャビティ拘束層の位置ズレは、第1、第2のセラミックグリーンシート積層体の一体化圧着後の未焼成多層セラミック基板において、任意の10個所のキャビティ部の観察を行った際の位置ズレの不良数で評価した。また、キャビティ底部の平坦度は、3D顕微鏡にて焼成後の断面における山と谷の最大差を測定して求めた。端子電極の傾斜角は、3D顕微鏡にて焼成後の断面における傾斜の両端位置を測定し求めた。なお、試料番号の左に*印のないものが本発明の実施例であり、*印のあるものは本発明の範囲外の比較例である。
以上の結果を表1に示す。
The experimental results of the present invention will be described. The laminated substrate of the example is to produce an unfired multilayer ceramic substrate with the base material, the green sheet laminate, the sheet-like upper and lower constraining layers, and the cavity constraining layer, and further, sintering and removing the constraining layer described above. A multilayer ceramic substrate with a cavity was obtained. The dimensions of the substrate are approximately 10 mm wide, 8 mm long, and 0.75 mm thick, and the cavity dimensions are approximately 2 mm wide, 2 mm long, and 0.4 mm deep. Here, the length of the outer periphery of the cavity constraining layer with respect to the length of the outer periphery of the through hole and the thickness of the cavity constraining layer with respect to the cavity depth were changed. At this time, before firing, check the cracks in the peripheral part of the cavity constraining layer and the misalignment between the through hole and the cavity constraining layer. After firing, check for cracks in the cavity, flatness at the bottom of the cavity, and inclination angle of the terminal electrode evaluated.
In the evaluation method, the positional deviation between the through hole and the cavity constraining layer is determined by observing arbitrary 10 cavity portions in the unfired multilayer ceramic substrate after the first and second ceramic green sheet laminates are integrally bonded. Evaluation was made based on the number of defective positions. The flatness of the bottom of the cavity was determined by measuring the maximum difference between peaks and valleys in the cross section after firing with a 3D microscope. The inclination angle of the terminal electrode was determined by measuring both end positions of the inclination in the cross section after firing with a 3D microscope. In addition, the thing without * mark to the left of a sample number is an Example of this invention, and the thing with * mark is a comparative example outside the scope of the present invention.
The results are shown in Table 1.

Figure 0004565383
Figure 0004565383

以上の結果より、比較例の積層基板では、キャビティ部周囲の端子電極の傾斜角が3度より大きく、よってボンディング接続不良も発生すると考える。一方、本発明の実施例においては、キャビティ周囲の端子電極の傾斜角が低減されており、どの基板においても傾斜角が3度以下におさまっていた。ここで、傾斜角とボンディング接続不良率との関係を図8に示す。このように傾斜角3度以下とすることによって品質が安定することが確認されている。なお、キャビティ拘束層の大きさが貫通孔と同じ際には、キャビティ拘束層と貫通孔で位置ズレが発生し、その結果、キャビティ周縁部の拘束は不十分になるため、クラックが発生した。キャビティ拘束層の貫通孔に対する大きさを101%以上にすることによって、この位置ズレの発生頻度を低減でき、キャビティ拘束層の貫通孔に対する大きさが103%以上の際にはこの位置ズレは見られなくなった。また、キャビティ拘束層の大きさは、大きすぎてもそれ以上の効果が望めないうえに、貫通孔周縁部の禁止領域以上に形成されてしまうと、キャビティ拘束層の挟着部にはビア電極を形成できないため、配線に制約を課してしまうことになる。拘束層の厚さに関しては、薄過ぎると十分な拘束効果を発揮できないため、焼成時にクラックが発生する。一方、厚すぎる際には、第1のセラミックグリーンシート積層体に、キャビティ拘束層を圧着する工程で、キャビティ拘束層の隅部にクラックが発生する。本発明による実施例では、クラックの発生がなく、また平坦度も40μmのものが十分得られることを確認した。   From the above results, in the laminated substrate of the comparative example, it is considered that the inclination angle of the terminal electrode around the cavity portion is larger than 3 degrees, and hence bonding connection failure also occurs. On the other hand, in the example of the present invention, the inclination angle of the terminal electrode around the cavity was reduced, and the inclination angle was kept at 3 degrees or less in any substrate. Here, the relationship between the inclination angle and the bonding connection failure rate is shown in FIG. Thus, it has been confirmed that the quality is stabilized by setting the inclination angle to 3 degrees or less. When the size of the cavity constraining layer was the same as that of the through hole, positional displacement occurred between the cavity constraining layer and the through hole, and as a result, the cavity peripheral portion was not sufficiently constrained, and a crack was generated. By making the size of the cavity constraining layer with respect to the through hole 101% or more, the frequency of occurrence of this position misalignment can be reduced. When the size of the cavity constraining layer with respect to the through hole is 103% or more, this position misalignment is not observed. I can't. Further, if the size of the cavity constraining layer is too large, no further effect can be expected, and if the cavity constraining layer is formed beyond the forbidden region of the peripheral edge of the through-hole, the via electrode Since this cannot be formed, restrictions are imposed on the wiring. With respect to the thickness of the constraining layer, if it is too thin, a sufficient constraining effect cannot be exhibited, and cracks are generated during firing. On the other hand, when it is too thick, cracks are generated at the corners of the cavity constraining layer in the step of press-bonding the cavity constraining layer to the first ceramic green sheet laminate. In the examples according to the present invention, it was confirmed that cracks were not generated and a flatness of 40 μm was sufficiently obtained.

本発明のキャビティを備えた多層セラミック基板およびその製造方法は、携帯電話やPDA等の情報端末等の通信機、コンピュータ、計測機器等の電子装置で使用される精密電子部品等に利用できる。   The multilayer ceramic substrate having a cavity according to the present invention and the manufacturing method thereof can be used for precision electronic components used in electronic devices such as communication devices such as information terminals such as mobile phones and PDAs, computers, and measuring instruments.

本発明のキャビティを備えた多層セラミック基板の一形態を示す断面図である。It is sectional drawing which shows one form of the multilayer ceramic substrate provided with the cavity of this invention. 本発明の2段キャビティを備えた多層セラミック基板の一形態を示す断面図である。It is sectional drawing which shows one form of the multilayer ceramic substrate provided with the 2 step | paragraph cavity of this invention. 本発明のキャビティを備えた多層セラミック基板に半導体素子を搭載した他の一形態を示す断面図である。It is sectional drawing which shows another form which mounted the semiconductor element in the multilayer ceramic substrate provided with the cavity of this invention. 本発明の無収縮プロセスの製造方法を示すフローチャートである。It is a flowchart which shows the manufacturing method of the non-shrink process of this invention. 未焼成多層セラミック基板を作製するまでの概略の製造工程を説明する断面図Sectional drawing explaining the outline manufacturing process until producing an unsintered multilayer ceramic substrate 本発明の製造方法を実施する大型の未焼成多層セラミック基板を示す斜視図である。It is a perspective view which shows the large sized unbaking multilayer ceramic substrate which enforces the manufacturing method of this invention. 他の製造プロセスの例を示す製造フローチャートである。It is a manufacturing flowchart which shows the example of another manufacturing process. 端子電極部の傾斜角度とボンディグ不良率の関係を示す図である。It is a figure which shows the relationship between the inclination-angle of a terminal electrode part, and a bonding defect rate. 従来のキャビティを備えた多層セラミック基板を示す断面図である。It is sectional drawing which shows the multilayer ceramic substrate provided with the conventional cavity. 従来のキャビティを備えた多層セラミック基板の問題点を示す基板の断面図である。It is sectional drawing of the board | substrate which shows the problem of the multilayer ceramic substrate provided with the conventional cavity. 従来のキャビティを備えた多層セラミック基板の製造方法の一例を示す基板の断面図である。It is sectional drawing of the board | substrate which shows an example of the manufacturing method of the multilayer ceramic substrate provided with the conventional cavity. 従来のキャビティを備えた多層セラミック基板の製造方法の一例を示す基板の断面図である。It is sectional drawing of the board | substrate which shows an example of the manufacturing method of the multilayer ceramic substrate provided with the conventional cavity.

符号の説明Explanation of symbols

1a〜1j:セラミックグリーンシート層
2:内部電極
3:表面電極
4:ビアホール
5:キャビティ
6:電子部品(半導体素子)
7:ワイヤ
8:端子電極
9、90、91、92:貫通孔
10:キャビティを備えた多層セラミック基板(多層セラミック基板、積層基板、基板)
10’:電子部品を搭載したキャビティを備えた多層セラミック基板
11:オーバーコート層
12、14:介在部
20:未焼成のキャビティを備えた多層セラミック基板
20a:第1のセラミックグリーンシート積層体
20b:第2のセラミックグリーンシート積層体
20c:第3のセラミックグリーンシート積層体
21:シート状上面拘束層
22:シート状下面拘束層
25、26、27:キャビティ拘束層
31:ワイヤボンディング用端子電極
32:表面電極
33:底部電極
A、B:内部電極配置の禁止領域
D:クラック
Z:キャビティ周囲の傾斜部
1a to 1j: Ceramic green sheet layer 2: Internal electrode 3: Surface electrode 4: Via hole 5: Cavity 6: Electronic component (semiconductor element)
7: Wire 8: Terminal electrodes 9, 90, 91, 92: Through-hole 10: Multilayer ceramic substrate with a cavity (multilayer ceramic substrate, multilayer substrate, substrate)
10 ′: multilayer ceramic substrate 11 having cavities on which electronic components are mounted 11: overcoat layer 12, 14: interposition part 20: multilayer ceramic substrate 20a having unfired cavities: first ceramic green sheet laminate 20b: Second ceramic green sheet laminate 20c: Third ceramic green sheet laminate 21: Sheet-like upper surface constraining layer 22: Sheet-like lower surface constraining layers 25, 26, 27: Cavity constraining layer 31: Terminal electrode 32 for wire bonding: Surface electrode 33: Bottom electrode A, B: Prohibition area of internal electrode arrangement D: Crack Z: Inclined part around cavity

Claims (12)

キャビティを形成するための貫通孔を有する第2のセラミックグリーンシート積層体と、貫通孔を有しない第1のセラミックグリーンシート積層体とを有する、キャビティを備えた多層セラミック基板であって、
前記第1と第2のセラミックグリーンシート積層体が接触した状態で焼結されてなり
前記キャビティの底面は底部電極が露出しており、前記第1と第2のセラミックグリーンシート積層体間かつ前記キャビティの底面における外周縁の少なくとも一部に、前記セラミックグリーンシートよりもアルミナ濃度が高くかつ焼結していない無機材料が残存していることを特徴とするキャビティを備えた多層セラミック基板。
A multilayer ceramic substrate having a cavity, comprising: a second ceramic green sheet laminate having a through hole for forming a cavity; and a first ceramic green sheet laminate having no through hole.
The first and second ceramic green sheet laminates are sintered in contact with each other ,
The bottom electrode of the cavity is exposed, and the alumina concentration is higher than that of the ceramic green sheet between the first and second ceramic green sheet laminates and at least part of the outer periphery of the bottom surface of the cavity. and multilayer ceramic substrate inorganic materials have lightning and sintering with a cavity, characterized in that remaining.
前記底部電極は、前記第1のセラミックグリーンシート積層体に形成されたビア上に配置されていることを特徴とする請求項1に記載のキャビティを備えた多層セラミック基板。The multilayer ceramic substrate having a cavity according to claim 1, wherein the bottom electrode is disposed on a via formed in the first ceramic green sheet laminate. 前記多層セラミック基板のキャビティ周囲に設けた端子電極の平坦度は、その断面における傾斜角度が3度以下であることを特徴とする請求項1又は2に記載のキャビティを備えた多層セラミック基板。   3. The multilayer ceramic substrate with a cavity according to claim 1, wherein the flatness of the terminal electrode provided around the cavity of the multilayer ceramic substrate has an inclination angle in a cross section of 3 degrees or less. キャビティを備えた多層セラミック基板の製造方法において、キャビティ底面となる位置に当該キャビティの貫通孔よりも大きく、セラミックグリーンシートの焼成温度では焼結しない無機材料を主体とするキャビティ拘束層を設け、前記キャビティ底面に形成される底部電極を前記キャビティ拘束層で覆うとともに、当該キャビティ拘束層を貫通孔の外縁よりはみ出すように挟着する工程を含む、ことを特徴とするキャビティを備えた多層セラミック基板の製造方法。 In the method for manufacturing a multilayer ceramic substrate with a cavity, greater than the through-hole of the cavity at a position to be the cavity bottom surface is provided with a cavity constraining layer consisting mainly of an inorganic material which is not sintered at the firing temperature of the ceramic green sheets, wherein A multilayer ceramic substrate having a cavity, comprising: a step of covering a bottom electrode formed on a bottom surface of the cavity with the cavity constraining layer and sandwiching the cavity constraining layer so as to protrude from an outer edge of the through hole. Production method. 貫通孔を有しない第1のセラミックグリーンシート積層体と、貫通孔を有する第2のセラミックグリーンシート積層体とをそれぞれ作製する工程と、
前記第1のセラミックグリーンシート積層体と第2のセラミックグリーンシート積層体とを重ねて圧着することにより、前記貫通孔によって形成されたキャビティを有する未焼成多層セラミック基板を作製する工程と、
前記第1のセラミックグリーンシート積層体の下面にセラミックグリーンシートの焼成温度では焼結しない無機材料を主体とする下面拘束層を設ける工程と、
前記第2のセラミックグリーンシート積層体の上面にセラミックグリーンシートの焼成温度では焼結しない無機材料を主体とする上面拘束層を設ける工程と、
前記未焼成多層セラミック基板を焼成する工程と、
前記拘束層を除去する工程と、を有するキャビティを備えた多層セラミック基板の製造方法であって、
前記第1のセラミックグリーンシート積層体の作製工程において、前記第2のセラミックグリーンシート積層体の貫通孔に対面する位置に当該貫通孔よりも大きく、セラミックグリーンシートの焼成温度では焼結しない無機材料を主体とするキャビティ拘束層を設け、前記キャビティ底面に形成される底部電極を前記キャビティ拘束層で覆うとともに、
前記第1のセラミックグリーンシート積層体と第2のセラミックグリーンシート積層体とを重ねて圧着する工程において、前記キャビティ拘束層を貫通孔の外縁よりはみ出すように挟着する工程を含む、ことを特徴とするキャビティを備えた多層セラミック基板の製造方法。
Producing a first ceramic green sheet laminate having no through hole and a second ceramic green sheet laminate having a through hole,
Producing a non-fired multilayer ceramic substrate having a cavity formed by the through-hole by laminating and pressing the first ceramic green sheet laminate and the second ceramic green sheet laminate; and
Providing a lower surface constraining layer mainly composed of an inorganic material not sintered at the firing temperature of the ceramic green sheet on the lower surface of the first ceramic green sheet laminate;
Providing an upper surface constraining layer mainly composed of an inorganic material that is not sintered at the firing temperature of the ceramic green sheet on the upper surface of the second ceramic green sheet laminate;
Firing the green multilayer ceramic substrate;
A step of removing the constraining layer, and a method of manufacturing a multilayer ceramic substrate having a cavity comprising:
In the manufacturing process of the first ceramic green sheet laminate, an inorganic material that is larger than the through hole at a position facing the through hole of the second ceramic green sheet laminate and that does not sinter at the firing temperature of the ceramic green sheet And a bottom electrode formed on the bottom surface of the cavity is covered with the cavity constraining layer,
The step of laminating and pressing the first ceramic green sheet laminate and the second ceramic green sheet laminate includes a step of sandwiching the cavity constraining layer so as to protrude from the outer edge of the through hole. A method of manufacturing a multilayer ceramic substrate having a cavity.
貫通孔を有しない第1のセラミックグリーンシート積層体と、第1の貫通孔を有する第2のセラミックグリーンシート積層体と、第2の貫通孔を有する第3のセラミックグリーンシート積層体とをそれぞれ作製する工程と、A first ceramic green sheet laminate having no through hole, a second ceramic green sheet laminate having a first through hole, and a third ceramic green sheet laminate having a second through hole, respectively. A manufacturing process;
前記第1のセラミックグリーンシート積層体と第2のセラミックグリーンシート積層体及び第3のセラミックグリーンシート積層体とを重ねて圧着することにより、前記第1、第2の貫通孔によって形成されたキャビティを有する未焼成多層セラミック基板を作製する工程と、  A cavity formed by the first and second through-holes by stacking and pressing the first ceramic green sheet laminate, the second ceramic green sheet laminate, and the third ceramic green sheet laminate. Producing a green multilayer ceramic substrate having:
前記第1のセラミックグリーンシート積層体の下面にセラミックグリーンシートの焼成温度では焼結しない無機材料を主体とする下面拘束層を設ける工程と、  Providing a lower surface constraining layer mainly composed of an inorganic material not sintered at the firing temperature of the ceramic green sheet on the lower surface of the first ceramic green sheet laminate;
前記第3のセラミックグリーンシート積層体の上面にセラミックグリーンシートの焼成温度では焼結しない無機材料を主体とする上面拘束層を設ける工程と、  Providing an upper surface constraining layer mainly composed of an inorganic material that is not sintered at the firing temperature of the ceramic green sheet on the upper surface of the third ceramic green sheet laminate;
前記未焼成多層セラミック基板を焼成する工程と、  Firing the green multilayer ceramic substrate;
前記拘束層を除去する工程と、を有するキャビティを備えた多層セラミック基板の製造方法であって、  A step of removing the constraining layer, and a method of manufacturing a multilayer ceramic substrate having a cavity comprising:
前記第1のセラミックグリーンシート積層体の作製工程において、前記第2のセラミックグリーンシート積層体の第1の貫通孔に対面する位置に当該貫通孔よりも大きく、セラミックグリーンシートの焼成温度では焼結しない無機材料を主体とする第1のキャビティ拘束層を設け、前記キャビティ底面に形成される底部電極を前記キャビティ拘束層で覆うとともに、  In the manufacturing process of the first ceramic green sheet laminate, the second ceramic green sheet laminate is sintered at the firing temperature of the ceramic green sheet at a position facing the first through hole of the second ceramic green sheet laminate. Providing a first cavity constraining layer mainly composed of an inorganic material, and covering the bottom electrode formed on the bottom surface of the cavity with the cavity constraining layer;
前記第2のセラミックグリーンシート積層体の作製工程において、前記第3のセラミックグリーンシート積層体の第2の貫通孔に対面する位置に当該貫通孔よりも大きく、セラミックグリーンシートの焼成温度では焼結しない無機材料を主体とする第2のキャビティ拘束層を設け、  In the manufacturing process of the second ceramic green sheet laminate, the second ceramic green sheet laminate is sintered at a firing temperature of the ceramic green sheet at a position facing the second through hole of the third ceramic green sheet laminate. Providing a second cavity constraining layer mainly composed of an inorganic material that does not
前記第1のセラミックグリーンシート積層体と第2のセラミックグリーンシート積層体及び第3のセラミックグリーンシート積層体とを重ねて圧着する工程において、前記第1、第2のキャビティ拘束層を第1、第2の貫通孔の外縁よりはみ出すように挟着する工程を含む、ことを特徴とするキャビティを備えた多層セラミック基板の製造方法。  In the step of stacking and pressing the first ceramic green sheet laminate, the second ceramic green sheet laminate, and the third ceramic green sheet laminate, the first and second cavity constraining layers are first, The manufacturing method of the multilayer ceramic substrate provided with the cavity characterized by including the process clamped so that it may protrude from the outer edge of a 2nd through-hole.
前記第1のセラミックグリーンシート積層体の貫通孔に対面する位置に、ビアを形成する工程を有することを特徴とする請求項5又は6に記載のキャビティを備えた多層セラミック基板の製造方法。  7. The method for producing a multilayer ceramic substrate with a cavity according to claim 5, further comprising a step of forming a via at a position facing the through hole of the first ceramic green sheet laminate. 前記第1のセラミックグリーンシート積層体と第2のセラミックグリーンシート積層体とをそれぞれ圧着する静水圧プレス(CIP)工程を有し、第1のセラミックグリーンシート積層体についてはキャビティ拘束層を形成した後に静水圧プレスを行い、第2のセラミックグリーンシート積層体については静水圧プレス後に前記貫通孔を設けることを特徴とする請求項5〜7の何れかに記載のキャビティを備えた多層セラミック基板の製造方法。 The first ceramic green sheet laminate and the second ceramic green sheet laminate each have a hydrostatic pressure press (CIP) process, and a cavity constraining layer is formed for the first ceramic green sheet laminate. The multi-layer ceramic substrate having a cavity according to any one of claims 5 to 7 , wherein hydrostatic press is performed later, and the second ceramic green sheet laminate is provided with the through hole after the hydrostatic press . Production method. 前記キャビティ拘束層は、前記キャビティを形成する貫通孔の外周長に対して100を超え120%以下の外周長に設けられることを特徴とする請求項4〜8の何れかに記載のキャビティを備えた多層セラミック基板の製造方法。   9. The cavity according to claim 4, wherein the cavity constraining layer is provided with an outer peripheral length of more than 100 and 120% or less with respect to an outer peripheral length of the through hole forming the cavity. A method for manufacturing a multilayer ceramic substrate. 前記キャビティ拘束層は、前記キャビティの深さに対して20%以下の厚みに設けられることを特徴とする請求項4〜9の何れかに記載のキャビティを備えた多層セラミック基板の製造方法。   The method for producing a multilayer ceramic substrate having a cavity according to any one of claims 4 to 9, wherein the cavity constraining layer is provided with a thickness of 20% or less with respect to the depth of the cavity. 前記キャビティ拘束層の上に、さらにセラミックグリーンシートの焼成温度では焼結しない無機材料を主体とする拘束シートあるいは顆粒状拘束材を充填することを特徴とする請求項4〜10の何れかに記載のキャビティを備えた多層セラミック基板の製造方法。   11. The constraining sheet or granular constraining material mainly composed of an inorganic material that is not sintered at the firing temperature of the ceramic green sheet is further filled on the cavity constraining layer. A method for manufacturing a multilayer ceramic substrate having cavities. 前記上面拘束層と下面拘束層及びキャビティ拘束層を構成する無機材料は、ガラス成分を含まないアルミナであり、未焼成多層セラミック基板を焼成する過程で少なくともキャビティ底面を収縮させないものであることを特徴とする請求項4〜11の何れかに記載のキャビティを備えた多層セラミック基板の製造方法。   The inorganic material constituting the upper surface constraining layer, the lower surface constraining layer, and the cavity constraining layer is alumina containing no glass component, and at least does not shrink the cavity bottom surface in the process of firing the unfired multilayer ceramic substrate. A method for producing a multilayer ceramic substrate having a cavity according to any one of claims 4 to 11.
JP2004294877A 2004-10-07 2004-10-07 Multilayer ceramic substrate with cavity and method for manufacturing the same Active JP4565383B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004294877A JP4565383B2 (en) 2004-10-07 2004-10-07 Multilayer ceramic substrate with cavity and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004294877A JP4565383B2 (en) 2004-10-07 2004-10-07 Multilayer ceramic substrate with cavity and method for manufacturing the same

Publications (2)

Publication Number Publication Date
JP2006108482A JP2006108482A (en) 2006-04-20
JP4565383B2 true JP4565383B2 (en) 2010-10-20

Family

ID=36377828

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004294877A Active JP4565383B2 (en) 2004-10-07 2004-10-07 Multilayer ceramic substrate with cavity and method for manufacturing the same

Country Status (1)

Country Link
JP (1) JP4565383B2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100862443B1 (en) * 2007-04-10 2008-10-08 삼성전기주식회사 Manufacturing method of non-shrinking multilayer ceramic substrate
KR100925604B1 (en) * 2007-11-12 2009-11-06 삼성전기주식회사 Laminated ceramic package and manufacturing the same
KR101004840B1 (en) * 2008-09-05 2010-12-28 삼성전기주식회사 Manufacturing method of multi-layer ceramic substrate having cavity
JP5842859B2 (en) * 2013-04-15 2016-01-13 株式会社村田製作所 Multilayer wiring board and module having the same
JP6120368B2 (en) * 2013-06-18 2017-04-26 Ngkエレクトロデバイス株式会社 Multi-wiring board
JP6362384B2 (en) * 2014-04-04 2018-07-25 日本特殊陶業株式会社 Manufacturing method of multilayer ceramic substrate
US10833414B2 (en) * 2018-03-02 2020-11-10 Samsung Electro-Mechanics Co., Ltd. Antenna apparatus and antenna module
US20210335681A1 (en) * 2020-04-27 2021-10-28 Electronics And Telecommunications Research Institute Ceramic stacked semiconductor package having improved anti-humidity and reliability and method of packaging ceramic stacked semiconductor

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06252558A (en) * 1993-03-01 1994-09-09 Oki Electric Ind Co Ltd Multilayered glass ceramic cavity substrate
JPH10289964A (en) * 1997-04-15 1998-10-27 Ngk Spark Plug Co Ltd Wiring substrate and manufacture thereof
JP2000025157A (en) * 1998-04-28 2000-01-25 Murata Mfg Co Ltd Composite laminate and its production
JP2001284808A (en) * 2000-03-31 2001-10-12 Kyocera Corp Laminated circuit board
JP2004165247A (en) * 2002-11-11 2004-06-10 Matsushita Electric Ind Co Ltd Multilayer ceramic substrate, its manufacturing method, device for communication and communication apparatus using the same
JP2005116938A (en) * 2003-10-10 2005-04-28 Ngk Spark Plug Co Ltd Multilayer ceramic board having cavity and manufacturing method thereof

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06252558A (en) * 1993-03-01 1994-09-09 Oki Electric Ind Co Ltd Multilayered glass ceramic cavity substrate
JPH10289964A (en) * 1997-04-15 1998-10-27 Ngk Spark Plug Co Ltd Wiring substrate and manufacture thereof
JP2000025157A (en) * 1998-04-28 2000-01-25 Murata Mfg Co Ltd Composite laminate and its production
JP2001284808A (en) * 2000-03-31 2001-10-12 Kyocera Corp Laminated circuit board
JP2004165247A (en) * 2002-11-11 2004-06-10 Matsushita Electric Ind Co Ltd Multilayer ceramic substrate, its manufacturing method, device for communication and communication apparatus using the same
JP2005116938A (en) * 2003-10-10 2005-04-28 Ngk Spark Plug Co Ltd Multilayer ceramic board having cavity and manufacturing method thereof

Also Published As

Publication number Publication date
JP2006108482A (en) 2006-04-20

Similar Documents

Publication Publication Date Title
JP4409209B2 (en) Manufacturing method of circuit component built-in module
JP2001060767A (en) Method for manufacturing ceramic board and unfired ceramic board
WO2005039263A1 (en) Multi-layer ceramic substrate, method for manufacturng the same and electronic device using the same
JP2002094244A (en) Method for manufacturing ceramic multi-layer board and unburned ceramic laminated body
KR100462499B1 (en) Multilayer ceramic substrate and method for manufacturing the same, non-sintered ceramic laminate and electronic device
JP4277275B2 (en) Ceramic multilayer substrate and high frequency electronic components
JP4565383B2 (en) Multilayer ceramic substrate with cavity and method for manufacturing the same
JP4497247B2 (en) Manufacturing method of multilayer ceramic electronic component
JP2006108483A (en) Multilayered ceramic board having cavity and its manufacturing method
US6776862B2 (en) Multilayered ceramic board, method for fabricating the same, and electronic device using multilayered ceramic board
JP4029408B2 (en) Method for producing hard-to-sinter restraint green sheet and multilayer ceramic substrate
JP4110536B2 (en) Multilayer ceramic aggregate substrate and method for producing multilayer ceramic aggregate substrate
JP4826253B2 (en) Method for manufacturing ceramic multilayer substrate and ceramic multilayer substrate
JP4496529B2 (en) Multilayer ceramic substrate manufacturing method and multilayer ceramic substrate
JP4595199B2 (en) Manufacturing method of multilayer ceramic substrate
JP4089356B2 (en) Manufacturing method of multilayer ceramic substrate
JP4645962B2 (en) Multilayer ceramic substrate
JP4470158B2 (en) Multilayer ceramic substrate manufacturing method and multilayer ceramic substrate
US20090117290A1 (en) Method of manufacturing non-shrinkage ceramic substrate
JP5110419B2 (en) Ag powder, conductor paste, multilayer ceramic substrate and manufacturing method thereof
JP2005136303A (en) Manufacturing method of multilayer ceramic substrate
JP2002368421A (en) Multilayer ceramic board and method for manufacturing the same
JP2004146818A (en) Laminated ceramic substrate and high-frequency electronic component
JP2004172342A (en) Manufacturing method of ceramic layered board
JP3748400B2 (en) Manufacturing method of glass ceramic substrate

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070911

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20100325

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100402

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100531

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100709

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20100722

R150 Certificate of patent or registration of utility model

Ref document number: 4565383

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130813

Year of fee payment: 3

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350