JP4341737B2 - Power supply - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a power supply device capable of controlling a voltage value of a power supply voltage.
[0002]
[Prior art]
In a power supply device in which the power supply voltage value is variable, for example, there is a case where it is desired to control the power supply voltage value by a control unit such as a microcomputer. However, when the power supply voltage value is high, or when it is desired to use the power supply device as a floating power supply, the control unit that operates at a low voltage and the output unit of the power supply device that handles a high voltage or a potential different from the control unit are electrically connected. Need to be separated. In such a case, conventionally, the control unit and the output unit are electrically separated using, for example, a photocoupler.
[0003]
[Problems to be solved by the invention]
However, when it is desired to control the power supply voltage value with high accuracy, the control using the photocoupler may be insufficient in accuracy.
[0004]
The present invention has been made in view of the above circumstances, and an object thereof is to provide a power supply device and the like that can control a power supply voltage value with high accuracy.
[0005]
[Means for Solving the Problems]
The power supply device according to claim 1, comprising: an output unit that outputs a power supply voltage; and a control unit that controls a voltage value of the power supply voltage output from the output unit. A control line connected to the output unit, the control unit includes a constant current circuit for supplying a control current to the output unit via the control line, and the output unit is provided from the control unit; A power supply voltage having a voltage value corresponding to the current value of the control current is output, and the potential of the control line varies with a change in the voltage value of the power supply voltage output from the output unit.
[0006]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment in which a power supply device according to the present invention is applied to a plasma display panel driving device will be described with reference to FIGS.
[0007]
1A is a block diagram showing the configuration of the plasma display panel driving apparatus 100, FIG. 1B is a diagram showing the configuration of the plasma display panel driven by the plasma display panel driving apparatus 100, and FIG. It is a circuit diagram which shows a circuit.
[0008]
As shown in FIG. 1A, the plasma display panel driving apparatus 100 controls the generation of a driving pulse, and a driving for driving the plasma display panel 10 based on a control signal from the control unit 100A. Part 100B.
[0009]
As shown in FIG. 1B, the plasma display panel 10 includes column electrodes D1 to Dm provided in parallel to each other, row electrodes X1 to Xn provided orthogonal to the column electrodes D1 to Dm, and row electrodes. Y1-Yn. The row electrodes X1 to Xn and the row electrodes Y1 to Yn are alternately arranged, and the i-th display line is constituted by the pair of row electrodes Xi (1 ≦ i ≦ n) and the row electrodes Yi (1 ≦ i ≦ n). . The column electrodes D1 to Dm and the row electrodes X1 to Xn and Y1 to Yn are respectively formed on two substrates facing each other so as to seal the discharge gas, and the column electrodes D1 to Dm and the pair of row electrodes Discharge cells serving as display pixels are formed at intersections of X1 to Xn and row electrodes Y1 to Yn.
[0010]
As shown in FIG. 2, the driving unit 100B of the plasma display panel driving apparatus 100 includes a row electrode driving unit 20X that drives the row electrodes X1 to Xn, a row electrode driving unit 20Y that drives the row electrodes Y1 to Yn, A column electrode driving unit 30 for driving the electrodes D1 to Dm. In FIG. 2, the electrodes constituting one discharge cell are shown as a column electrode D, a row electrode X, and a row electrode Y.
[0011]
The row electrode driver 20X includes a sustain driver 21 that simultaneously applies X sustain pulses to the row electrodes X1 to Xn of the plasma display panel 10, and a reset pulse generation circuit 22 that generates a reset pulse.
[0012]
The row electrode driver 20Y includes a sustain driver 23 that simultaneously applies a Y sustain pulse to the row electrodes Y1 to Yn of the plasma display panel 10, a reset pulse generation circuit 24 that generates a reset pulse, and a scan pulse that is applied to the row electrodes Y1 to Yn. And a scan driver 25 for sequentially applying to each other.
[0013]
The scan driver 25 includes a voltage variable power source B1 that generates an offset voltage −Vofs with respect to the ground potential, a resistor R3 that connects the power source B1 and the output line of the sustain driver 23, and a voltage with respect to the output line of the sustain driver 23. Floating power supply B2 that superimposes V _H , switches S21 and S22 connected in series with power supply B2, and diodes D21 and D22 connected in parallel with switches 21 and S22, respectively.
[0014]
The column electrode drive unit 30 includes an address driver 31 connected to the column electrodes D1 to Dm, and an address resonance power supply circuit 32 that supplies a drive pulse to the address driver 31.
[0015]
In addition, the switch of each part of the drive part 100B is comprised by the switching element switched according to the control signal from 100 A of control parts.
[0016]
FIG. 3 is a circuit diagram showing a configuration of the voltage variable power source B1 provided in the scan driver 25. As shown in FIG.
[0017]
As shown in FIG. 3, the voltage variable power source B1 includes an output unit 50A that outputs a power supply voltage, and a control unit 50B that supplies a control current to be described later toward the output unit 50A. The control unit 50B and the output unit 50A are connected to each other by a control line L51.
[0018]
As shown in FIG. 3, the output unit 50A includes resistors R51 to R54, R60 to R61, transistors Q1 to Q3, Q5, a shunt regulator SR, a rectifier diode D51, a smoothing capacitor C51, a transformer TR, a photocoupler PC, and a power supply B51. Consists of including.
[0019]
The controller 50B includes a resistor RA, resistors R56 to R59, a transistor Q4, and operational amplifiers 51 to 52.
[0020]
In the voltage variable power source B1, the power supply voltage value output from the output unit 50A is controlled based on the control current output from the control unit 50B. The operation of the voltage variable power source B1 will be described later.
[0021]
Next, the operation of the plasma display panel driving apparatus 100 of this embodiment will be described.
[0022]
One field as a period for driving the plasma display panel 10 is composed of a plurality of subfields SF1 to SFN. As shown in FIG. 4, each subfield is provided with an address period for selecting a discharge cell to be lit and a sustain period for continuously lighting the cell selected in the address period for a predetermined time. In addition, a reset period for resetting the lighting state in the previous field is provided at the beginning of SF1 which is the first subfield. In this reset period, all the cells are reset to light emitting cells (cells in which wall charges are formed) or non-light emitting cells (cells in which wall charges are not formed). In the former case, a predetermined cell is switched to a non-light emitting cell in the subsequent address period, and in the latter case, the predetermined cell is switched to a light emitting cell in the subsequent address period. The sustain period is gradually increased in the order of the subfields SF1 to SFN, and a predetermined gradation display is made possible by changing the number of subfields that are kept on.
[0023]
In the address period of each subfield shown in FIG. 5, address scanning is performed for each line. That is, at the same time as the scan pulse is applied to the row electrode Y1 constituting the first line, the data pulse DP1 corresponding to the address data corresponding to the cell of the first line is applied to the column electrodes D1 to Dm. At the same time, the scan pulse is applied to the row electrode Y2 constituting the second line, and at the same time, the data pulse DP2 corresponding to the address data corresponding to the second cell is applied to the column electrodes D1 to Dm. Similarly, the scan pulse and the data pulse D3 are simultaneously applied to the third and subsequent lines. Finally, a scan pulse is applied to the row electrode Yn constituting the nth line, and at the same time, a data pulse DPn corresponding to the address data corresponding to the cell of the nth line is applied to the column electrodes D1 to Dm. . As described above, in the address period, a predetermined cell is switched from the light emitting cell to the non-light emitting cell, or from the non-light emitting cell to the light emitting cell.
[0024]
When the address scanning is completed in this way, all the cells in the subfield are set to either light emitting cells or non-light emitting cells, and only the light emitting cells are applied each time the sustain pulse is applied in the next sustain period. Repeat the flash. As shown in FIG. 5, in the sustain period, the X sustain pulse and the Y sustain pulse are repeatedly applied to the row electrodes X1 to Xn and the row electrodes Y1 to Yn, respectively, at predetermined timings. The last subfield SFN is provided with an erasing period in which all cells are set as non-light emitting cells.
[0025]
Next, with reference to FIG. 6, the operation when generating a driving pulse in the plasma display panel driving apparatus 100 of the present embodiment will be described. FIG. 6 shows an example in which all the discharge cells are reset to the light emitting cells in the reset period.
[0026]
In the plasma display panel driving apparatus 100, a driving pulse is generated by switching the switches of the driving unit 100B shown in FIG. 2 at a predetermined timing based on a signal from the control unit 100A. Switching control of each switch described below is executed based on a control signal from the control unit 100A.
[0027]
As shown in FIG. 6, in the reset period, the reset switch SX-R of the reset pulse generating circuit 22 and the reset switch SY-R of the reset pulse generating circuit 24 are simultaneously turned on for a predetermined time.
[0028]
As a result, a reset pulse having a shape as shown in FIG. 7 is applied to the row electrodes X1 to Xn and the row electrodes Y1 to Yn, wall charges are formed in all the discharge cells, and all the discharge cells are reset to the light emitting cells. The
[0029]
As shown in FIG. 6, when the reset switch SX-R and the reset switch SY-R are turned off, the switch SX-G of the sustain driver 21 and the switch SY-G of the sustain driver 23 are turned on, and the row electrodes X1 to Xn and the row The potentials of the electrodes Y1 to Yn are fixed to the ground potential (FIG. 2).
[0030]
In the above reset period, all the discharge cells are reset to the light emitting cells.
[0031]
Next, in the address period, the switch SY-ofs of the scan driver 25 is turned on, and the output line of the sustain driver 23 is connected to the potential of −Vofs via the resistor R3. Further, the switch 21 of the sustain driver 25 is switched synchronously in the order of off → on → off and the switch 22 of the sustain driver 25 is switched in the order of on → off → on (FIG. 2). Thereby, the potential of the row electrode Yi changes in the order of “−Vofs + V _H ” → “−Vofs” → “−Vofs + V _H ” (FIG. 6). That is, in the address period, such a scan pulse SP is sequentially applied to each row electrode Yi.
[0032]
On the other hand, by sequentially switching the switches of the address driver 31 and the address resonant power supply circuit 32, the data pulse DP is applied to the column electrodes D1 to Dm at the timing when the potential of the row electrode Yi drops to “−Vofs”.
[0033]
Specifically, as shown in FIG. 6, while the data pulse DP is output from the address resonant power supply circuit 32, the switch S31 of the address driver 31 is turned on and the switch S32 is turned off, whereby the output of the address resonant power supply circuit 32 is changed. Connect to the column electrodes D1 to Dm.
[0034]
Further, while the output of the address resonant power supply circuit 32 is connected to the column electrodes D1 to Dm, the address resonant power supply circuit 32 generates a data pulse DP. That is, in the address resonant power supply circuit 32, the switch SA-U is first turned on. As a result, a current based on the electric charge accumulated in the capacitor C5 flows into the column electrode D via the coil L9, the diode D9, the switch SA-U and the switch S31, and the voltage of the column electrode D gradually increases. Next, by turning on the switch SA-B, the voltage of the column electrode D is fixed to the voltage V _A. Next, the switch SA-U and the switch SA-B are turned off and the switch SA-D is turned on. As a result, a current based on the charge accumulated in the discharge cell flows into the capacitor C5 via the switch S31, the coil L10, the diode D10, and the switch SA-D. For this reason, the potential of the column electrode D gradually decreases. Finally, the switch SA-D is turned off, the switch S31 of the address driver 31 is turned off, and the switch S32 is turned on. As a result, the column electrode D is disconnected from the address resonance power supply circuit 32 and grounded, and the potential of the column electrode D is fixed to 0V.
[0035]
Thus, the discharge cells to which the data pulse DP is applied in accordance with the timing of the scan pulse SP by the scan driver 25 are selectively set as non-light emitting cells.
[0036]
Next, in the sustain period, the sustain driver 21 and the sustain driver 23 generate an X sustain pulse and a Y sustain pulse, respectively.
[0037]
As shown in FIG. 6, in the sustain driver 21, the switch SX-U1 is turned on, and the switch SX-D1, the switch SX-D2, and the switch SX-G are turned off. As a result, only the switch SX-U1 is turned on. For this reason, the current based on the electric charge accumulated in the capacitor C3 flows into the interelectrode capacitance Cp of the row electrode of the discharge cell via the coil L5, the diode D5, the switch SX-U1, and the row electrode X. The potential increases. Next, when the switch SX-U2 is turned on, a current based on the electric charge accumulated in the capacitor C4 flows into the row electrode X via the coil L7, the diode D7 and the switch SX-U2, and the potential of the row electrode X further increases. To do. Next, the switch SX-B is turned on to fix the potential of the row electrode X to Vs. Next, the switch SX-U1, the switch SX-U2, and the switch SX-B are turned off, and the switch SX-D2 is turned on. As a result, only the switch SX-D2 is turned on. For this reason, since the electric current based on the electric charge accumulated in the interelectrode capacitance of the row electrode flows into the capacitor C4 via the row electrode X, the coil L8, the diode D8 and the switch SX-D2, the potential of the row electrode X decreases. To do. Next, when the switch SX-D1 is turned on, a current based on the charge flows into the capacitor C3 via the row electrode X, the coil L6, the diode D6, and the switch SX-D1, so that the potential of the row electrode X further decreases. . Finally, the switch SX-G is turned on to fix the potential of the row electrode X to 0V.
[0038]
After the potential of the row electrode X is fixed at 0V, the sustain driver 23 turns on the switch SY-U1, turns off the switch SY-D1, the switch SY-D2, and the switch SY-G. As a result, only the switch SY-U1 is turned on. For this reason, since the current based on the electric charge accumulated in the capacitor C1 flows into the interelectrode capacitance Cp of the row electrode via the coil L1, the diode D1, the switch SY-U1, and the row electrode Y, the potential of the row electrode Y is increased. To rise. Next, when the switch SY-U2 is turned on, a current based on the electric charge accumulated in the capacitor C2 flows into the row electrode Y through the coil L3, the diode D3 and the switch SY-U2, and the potential of the row electrode Y further increases. To do. Next, the switch SY-B is turned on to fix the potential of the row electrode Y to Vs. Next, the switch SY-U1, the switch SY-U2, and the switch SY-B are turned off, and the switch SY-D2 is turned on. As a result, only the switch SY-D2 is turned on. For this reason, the current based on the electric charge accumulated in the interelectrode capacitance of the row electrode flows into the capacitor C2 via the row electrode Y, the coil L4, the diode D4, and the switch SY-D2, so that the potential of the row electrode Y decreases. To do. Next, when the switch SY-D1 is turned on, a current based on the electric charge flows into the capacitor C1 via the row electrode Y, the coil L2, the diode D2, and the switch SY-D1, so that the potential of the row electrode Y further decreases. . Finally, the switch SY-G is turned on to fix the potential of the row electrode Y to 0V.
[0039]
By repeating the above operation, the X sustain pulse IPx and the Y sustain pulse IPy having waveforms as shown in FIG. 6 are alternately generated, and only the discharge cells selected in the address period, that is, the light emitting cells emit light a predetermined number of times.
[0040]
Next, the operation of the voltage variable power source B1 (FIG. 3) will be described.
[0041]
In the present embodiment, the power supply voltage value of the voltage variable power supply B1, that is, the offset voltage -Vofs can be adjusted in accordance with the characteristics of each plasma display panel 10. By such adjustment, it is possible to always provide an optimum driving pulse in accordance with variations in characteristics of the plasma display panel 10 or changes with time.
[0042]
In the control unit 50B of the voltage variable power source B1, voltage / current conversion is performed on a control signal sent from a microcomputer or the like by a circuit including the operational amplifier 51 and the operational amplifier 52. That is, when the control signal (voltage signal) Vc is given to the control unit 50B, Vc is input to the positive output terminal of the operational amplifier 51, and the voltage at the negative terminal of the operational amplifier 51 becomes Vc. Since the voltage at the positive terminal of the operational amplifier 52 is Vc, the voltage at the negative terminal of the operational amplifier 52 is also Vc. Here, since the resistance value of the resistor R56 and the resistance value of the resistor R57 are set to be equal to each other, the voltage at the output terminal of the operational amplifier 52 is 2 × Vc.
[0043]
As shown in FIG. 3, a resistor RA having a resistance value R is connected between the output terminal of the operational amplifier 52 and the negative terminal of the operational amplifier 51. Therefore, a current i = (2Vc−Vc) / R flows through the resistor RA. This current flows between the emitter and collector of the transistor Q4, and is further output to the control line L51 via the resistor R58. Here, the base current of the transistor Q4 is ignored.
[0044]
On the other hand, in the output unit 50A, the dividing resistors R51 to R54 are connected between the output terminals of the power supply B1, and the input terminal of the shunt regulator SR is connected to the connection point of the resistors R53 and 53. The control line L51 is connected to the input terminal of the shunt regulator SR of the output unit 50A, and the flowed control current changes the voltage ratio of the dividing resistors R51 to R54. The voltage changes. For this reason, the output voltage of the output unit 50A is controlled based on the value of the control current.
[0045]
The output unit 50A includes a resistor R60 connected in series with the photodiode PD of the photocoupler PC, and a transistor Q5 and a resistor R61 connected in series between the output terminals of the power supply voltage of the output unit 50A. A resistor R60 is connected between the base and emitter of the transistor Q5. When the power supply voltage value of the output unit 50A is lower than the appropriate offset voltage −Vofs, the transistor Q1 is turned on and a current flows through the photodiode PD of the photocoupler PC. Both ends of the resistor R60 generated by this current The transistor Q5 is turned on by the inter-voltage. When the transistor Q5 is turned on, a current flows through the transistor Q5 and the resistor R61. Therefore, it is possible to absorb a current based on electric power supplied from another power source or electric charge accumulated in the plasma display panel 10. As described above, the transistor Q5 provided in the output unit 50A can provide the output unit 50A with a current sink capability. Therefore, by causing a current that flows backward from another power source or the plasma display panel 10 to the power source B1 to flow through the transistor Q5, a decrease in the offset voltage -Vofs is suppressed, and the offset voltage -Vofs can be controlled reliably.
[0046]
Except for the part that handles the control current, the configuration of the output unit 50A is the same as that of a normal DC / DC converter (D / D converter), so that detailed description thereof is omitted, but it is connected to the collector of the transistor Q1. The photocoupler PC controls the operation of the switching regulator provided in the previous stage of the transformer TR to generate a predetermined AC voltage on the secondary side of the transformer TR, and the rectifier diode D51 and the smoothing capacitor C51 are used for the AC. A predetermined power supply voltage value, that is, an offset voltage −Vofs is obtained by rectification using the same.
[0047]
In the present embodiment, the voltage of the control line L51 varies according to the change in the power supply voltage value. However, as shown in FIG. 3, in the control unit 50B, the control current i is extracted from the collector terminal of the transistor Q4, and the transistor Q4 constitutes a constant current circuit. Therefore, the fluctuation of the voltage value of the control line L51 does not affect the control current i, the control current i is defined only by the operation of the control unit 50B, and the power supply voltage value is uniquely defined by the current value of the control current i. Is done. Thus, in this embodiment, the control unit and the output unit can be separated in voltage by using a constant current circuit. Moreover, since the power supply voltage value is controlled based on the control current i that can be accurately controlled, the accuracy of the power supply voltage value can be improved.
[0048]
As described above, the present embodiment is a power supply apparatus including the output unit 50A that outputs the power supply voltage and the control unit 50B that controls the voltage value of the power supply voltage output from the output unit 50A. A control line L51 for connecting to the output unit 10A is provided. The control unit 50B includes a constant current circuit for supplying a control current to the output unit 50A via the control line L51. The output unit 50A is provided from the control unit 50B. A power supply voltage having a voltage value corresponding to the current value of the control current thus output is output, and the potential of the control line L51 varies with a change in the voltage value of the power supply voltage output from the output unit 50A.
[0049]
As described above, in the present embodiment, since the control current is supplied to the control line L51 using the constant current circuit, the control line L51 is controlled even though the potential of the control line L51 varies according to the operation of the output unit 50A. The change in the potential of L51 does not affect the control current. Therefore, the voltage value of the power supply voltage output from the output unit 50A can be accurately controlled based on the current value of the control current.
[0050]
In the description of the embodiment and the claims, the output unit 50A is “output unit”, the control unit 50B is “control unit”, the control line L51 is “control line”, and the control unit 50B is “fixed”. The transistor Q5 corresponds to the “current circuit” and the “switching element”.
[0051]
In addition, you may use various elements other than a transistor as a switching element.
[Brief description of the drawings]
1A and 1B are diagrams showing a configuration of a display panel driving device and a plasma display panel according to the present embodiment, wherein FIG. 1A is a block diagram showing a configuration of a plasma display panel driving device, and FIG. 1B is a configuration of a plasma display panel; FIG.
FIG. 2 is a circuit diagram showing a circuit of a control unit.
FIG. 3 is a circuit diagram showing a configuration of a voltage variable power source provided in a scan driver.
FIG. 4 is a diagram showing the configuration of one field.
FIG. 5 is a diagram showing drive pulses in one subfield.
FIG. 6 is a timing chart showing an operation for generating a drive pulse.
[Explanation of symbols]
50A output unit 50B control unit (constant current circuit)
L51 Control line Q5 Transistor (switching element)

Claims (5)

An output unit for outputting a power supply voltage;
A control unit that controls a voltage value of the power supply voltage output from the output unit,
A control line connecting the control unit and the output unit;
The control unit includes a constant current circuit for supplying a control current to the output unit via the control line,
The output unit outputs a power supply voltage having a voltage value corresponding to a current value of the control current given from the control unit,
The power supply apparatus according to claim 1, wherein the potential of the control line varies with a change in a voltage value of a power supply voltage output from the output unit. The power supply apparatus according to claim 1, wherein the control unit includes a conversion unit that converts a control signal for controlling a voltage value of a power supply voltage into the control current. The power supply apparatus according to claim 1, wherein the power supply apparatus constitutes a part of a display panel driving device that drives the display panel. The power supply apparatus according to any one of claims 1 to 3, wherein the output unit includes a switching element for causing a current to flow between output terminals of the power supply voltage when the power supply voltage rises. The power supply device according to any one of claims 1 to 4, wherein the power supply device supplies a drive current to the display panel.

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