JP4291203B2 - Flat panel display device and manufacturing method thereof - Google Patents

Flat panel display device and manufacturing method thereof Download PDF

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JP4291203B2
JP4291203B2 JP2004131217A JP2004131217A JP4291203B2 JP 4291203 B2 JP4291203 B2 JP 4291203B2 JP 2004131217 A JP2004131217 A JP 2004131217A JP 2004131217 A JP2004131217 A JP 2004131217A JP 4291203 B2 JP4291203 B2 JP 4291203B2
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在 本 具
乙 浩 李
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三星モバイルディスプレイ株式會社
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/28Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part
    • H01L27/32Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes [OLED]
    • H01L27/3241Matrix-type displays
    • H01L27/3244Active matrix displays
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/28Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part
    • H01L27/32Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes [OLED]
    • H01L27/3241Matrix-type displays
    • H01L27/3244Active matrix displays
    • H01L27/3276Wiring lines
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L51/00Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof
    • H01L51/50Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof specially adapted for light emission, e.g. organic light emitting diodes [OLED] or polymer light emitting devices [PLED]
    • H01L51/52Details of devices
    • H01L51/5203Electrodes
    • H01L51/5221Cathodes, i.e. with low work-function material
    • H01L51/5228Cathodes, i.e. with low work-function material combined with auxiliary electrodes
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L51/00Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof
    • H01L51/50Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof specially adapted for light emission, e.g. organic light emitting diodes [OLED] or polymer light emitting devices [PLED]
    • H01L51/52Details of devices
    • H01L51/5281Arrangements for contrast improvement, e.g. preventing reflection of ambient light
    • H01L51/5284Arrangements for contrast improvement, e.g. preventing reflection of ambient light comprising a light absorbing layer, e.g. black layer
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2251/00Indexing scheme relating to organic semiconductor devices covered by group H01L51/00
    • H01L2251/50Organic light emitting devices
    • H01L2251/53Structure
    • H01L2251/5307Structure specially adapted for controlling the direction of light emission
    • H01L2251/5315Top emission
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00Stock material or miscellaneous articles
    • Y10S428/917Electroluminescent

Description

本発明は、アクティブマトリックス型平板表示装置に関し、より詳細にはカソードバスラインとカソード電極が電気的に連結して電圧降下を防止できる全面発光型有機電界発光表示装置及びその製造方法に関する。   The present invention relates to an active matrix type flat panel display device, and more particularly, to a full-emission organic electroluminescence display device that can prevent a voltage drop by electrically connecting a cathode bus line and a cathode electrode, and a method of manufacturing the same.
一般に、有機電界発光表示装置は、自発光型表示装置であって、有機発光層から光が発光される方向によって、背面発光構造と全面発光構造に分けられる。全面発光型有機電界発光表示装置は、画素が配列された基板と反対方向に光が放出されるもので、画素が配列された基板方向に光が放出される背面発光構造に比べて開口率を増加させることができる利点がある。   In general, the organic light emitting display device is a self-luminous display device, and is divided into a back light emitting structure and a full light emitting structure according to the direction in which light is emitted from the organic light emitting layer. The full-emission organic light emitting display device emits light in a direction opposite to the substrate on which the pixels are arranged, and has a higher aperture ratio than a rear light emitting structure in which light is emitted in the direction of the substrate on which the pixels are arranged. There are advantages that can be increased.
一方、全面発光構造では、封止用基板側に光を放出させなければならないので、カソード電極として透明電極を用いるべきである。一般に、透明電極としてITOまたはIZOのような透明導電膜が用いられるが、透明導電膜は、仕事関数が高いので、カソード電極に用いることが困難である。   On the other hand, in the entire light emitting structure, since light must be emitted to the sealing substrate side, a transparent electrode should be used as the cathode electrode. In general, a transparent conductive film such as ITO or IZO is used as the transparent electrode. However, since the transparent conductive film has a high work function, it is difficult to use it as a cathode electrode.
このために、カソード電極で仕事関数が低い金属を有機発光層上に薄く蒸着して反透過金属膜を形成し、前記反透過金属膜上に透明導電膜を厚く蒸着して積層構造を有する透明電極を形成した。   For this purpose, a metal having a low work function at the cathode electrode is thinly deposited on the organic light emitting layer to form an anti-transmissive metal film, and a transparent conductive film is thickly deposited on the anti-transmissive metal film to form a transparent structure. An electrode was formed.
しかし、積層構造のカソード電極は、有機薄膜層を形成した後、透明導電膜であるITOまたはIZO膜を蒸着するために、熱やプラズマによるEL層の劣化を最小化するために低温蒸着工程を行う。低温でITO膜やIZO膜を蒸着すると、膜質が悪く、比抵抗が高まる。   However, the cathode electrode having a laminated structure is formed by forming a thin organic film layer, and then depositing a transparent conductive ITO or IZO film by using a low temperature deposition process to minimize degradation of the EL layer due to heat or plasma. Do. When an ITO film or an IZO film is deposited at a low temperature, the film quality is poor and the specific resistance increases.
カソード電極は、共通電極として画素部に配列された全ての画素に同一電圧が印加されなければならないが、カソード電極の高い比抵抗により電圧降下(IR drop)が発生して位置によって画素別に互いに異なるレベルの電圧が印加される。したがって、カソード電極に外部端子からカソード電圧が印加される場合、外部端子に隣接した部分に配列された画素と外部端子と離れている部分に配列された画素間に電圧差が発生する。その結果、位置による画素別電圧差により輝度または画質のむらを招いた。   As for the cathode electrode, the same voltage must be applied to all the pixels arranged in the pixel portion as a common electrode, but a voltage drop (IR drop) occurs due to the high specific resistance of the cathode electrode, and it differs from pixel to pixel depending on the position. A level voltage is applied. Therefore, when a cathode voltage is applied to the cathode electrode from the external terminal, a voltage difference is generated between the pixels arranged in a portion adjacent to the external terminal and the pixels arranged in a portion separated from the external terminal. As a result, unevenness in luminance or image quality is caused by the voltage difference for each pixel depending on the position.
特に、中大型の全面発光型有機電界発光表示装置における電圧降下問題は、より一層大きく際立つ。これを解決するために、全面発光構造でカソードバスラインを用いる技術が韓国特許第2002−0057336号に開示されていた。カソードバスラインは、外部端子に連結してカソード電極とコンタクトされるので、カソード電極がカソードバスラインを介して外部端子に連結する。   In particular, the problem of voltage drop in medium-sized and large-sized full-emission organic electroluminescent display devices is even more conspicuous. In order to solve this problem, a technique of using a cathode bus line in a full light emitting structure has been disclosed in Korean Patent No. 2002-0057336. Since the cathode bus line is connected to the external terminal and is in contact with the cathode electrode, the cathode electrode is connected to the external terminal via the cathode bus line.
通常的に、カソード電極にカソードバスラインを連結する方法は、画素位置によるカソード電極の電圧降下は防止できるが、カソードバスラインとカソード電極との間に有機膜である電荷輸送層(Carrier transfer layer)が全面形成される場合にはカソードバスラインとカソード電極が電気的にコンタクトされない問題点があった。
韓国特許第2002−0057336号
In general, a method of connecting a cathode bus line to a cathode electrode can prevent a voltage drop of the cathode electrode due to a pixel position, but a charge transport layer (Carrier transfer layer) which is an organic film between the cathode bus line and the cathode electrode. ) Is formed on the entire surface, there is a problem that the cathode bus line and the cathode electrode are not electrically contacted.
Korean Patent No. 2002-0057336
したがって、本発明は、上述のような従来技術の問題点を解決するためのものであって、カソードバスラインとカソード電極とを非画素領域で電気的に連結させることによって、電荷輸送層の全面蒸着が可能な有機電界発光表示装置及びその製造方法を提供することにその目的がある。   Therefore, the present invention is to solve the above-described problems of the prior art, and by electrically connecting the cathode bus line and the cathode electrode in the non-pixel region, the entire surface of the charge transport layer is formed. An object of the present invention is to provide an organic light emitting display capable of vapor deposition and a method of manufacturing the same.
本発明の他の目的は、電荷輸送層を微細メタルマスクを用いて蒸着することによって、カソードバスラインとカソード電極とを画素領域内で各画素別に連結させることができる有機電界発光表示装置及びその製造方法を提供することにその目的がある。   Another object of the present invention is to provide an organic light emitting display device capable of connecting a cathode bus line and a cathode electrode to each pixel in a pixel region by depositing a charge transport layer using a fine metal mask, and the same The purpose is to provide a manufacturing method.
本発明の更に他の目的は、中大型の有機電界発光表示装置に適したカソードバスラインとカソード電極の連結構造を有する有機電界発光表示装置及びその製造方法を提供することにその目的がある。   Still another object of the present invention is to provide an organic light emitting display having a connection structure of a cathode bus line and a cathode electrode suitable for a medium and large organic light emitting display, and a method for manufacturing the same.
上述のような目的を達成するために、本発明は、画素領域と非画素領域とを備えた絶縁基板と、前記画素領域に配列された第1電極と、前記画素領域及び非画素領域に形成された第2電極と、前記画素領域の第1及び第2電極との間に形成された有機発光層及び電荷輸送層と、前記画素領域及び非画素領域に形成された電極ラインを含み、前記電極ラインと前記第2電極は、非画素領域で電気的にコンタクトされる平板表示装置を提供することを特徴とする。   To achieve the above object, the present invention provides an insulating substrate having a pixel region and a non-pixel region, a first electrode arranged in the pixel region, and formed in the pixel region and the non-pixel region. An organic light emitting layer and a charge transport layer formed between the formed second electrode, the first and second electrodes of the pixel region, and an electrode line formed in the pixel region and the non-pixel region, The electrode line and the second electrode may be in contact with each other in a non-pixel region.
前記画素領域は、前記有機発光層から光が発光される領域と非発光領域とを含み、前記電極ラインは、非発光領域の少なくとも一部に位置し、前記非発光領域の一部に位置する電極ラインは、外部光を吸収する物質であり、導電性を有する。前記電荷輸送層は、画素領域に全面形成され、前記電極ラインのうち、前記画素領域の非発光領域の少なくとも一部に形成された部分と第2電極との間に位置する。前記電極ラインは、画素領域でストライプ状またはマトリックス状に形成されたり、または前記電極ラインは、非画素領域で前記画素領域の外郭部に沿って形成されたり、または前記画素領域の少なくとも一側外郭部に形成されて前記電極ラインが前記第2電極と電気的にコンタクトされる。前記電極ラインは、第2電極の補助電極として第2電極と同一の極性を有する電圧の電流が流れる。   The pixel region includes a region where light is emitted from the organic light emitting layer and a non-light emitting region, and the electrode line is located at least in a part of the non-light emitting region and is located in a part of the non light emitting region. The electrode line is a substance that absorbs external light and has conductivity. The charge transport layer is formed on the entire surface of the pixel region, and is located between a portion of the electrode line formed in at least a part of the non-light emitting region of the pixel region and the second electrode. The electrode lines may be formed in a stripe shape or a matrix shape in a pixel region, or the electrode lines may be formed in a non-pixel region along an outer portion of the pixel region, or at least one outer contour of the pixel region. The electrode line is in electrical contact with the second electrode. A current having a voltage having the same polarity as that of the second electrode flows through the electrode line as an auxiliary electrode of the second electrode.
また、本発明は、画素領域と非画素領域とを備えた絶縁基板を提供するステップと、前記絶縁基板の画素領域上に第1電極を形成するステップと、前記画素領域に有機薄膜層と電荷輸送層とを形成するステップと、前記画素領域及び非画素領域に電極ラインを形成するステップと、前記画素領域及び非画素領域に第2電極を形成するステップとを含み、前記電極ラインと前記第2電極とは非画素領域内で電気的にコンタクトされる平板表示装置の製造方法を提供することを特徴とする。前記有機薄膜層は、微細メタルマスクを用いて第1電極上にのみ部分的に形成され、前記電荷輸送層は、オープンマスクを用いて画素領域内に全面蒸着される。   The present invention also provides a step of providing an insulating substrate having a pixel region and a non-pixel region, a step of forming a first electrode on the pixel region of the insulating substrate, an organic thin film layer and a charge in the pixel region. Forming a transport layer, forming an electrode line in the pixel region and the non-pixel region, and forming a second electrode in the pixel region and the non-pixel region, the electrode line and the first The present invention provides a method for manufacturing a flat panel display device in which two electrodes are electrically contacted in a non-pixel region. The organic thin film layer is partially formed only on the first electrode using a fine metal mask, and the charge transport layer is deposited on the entire surface of the pixel region using an open mask.
上述のような本発明の実施例に係る有機電界発光表示装置は、画素領域内にのみカソードバスラインを形成すると共に、電荷輸送層を各画素別に互いに分離されるように形成することによって、画素領域内でカソードバスラインとカソード電極とを電気的に直接コンタクトしたり、または非画素領域にカソードバスラインを形成して画素領域の外郭部でカソードバスラインとカソード電極とを直接電気的にコンタクトすることができる。したがって、カソード電極とカソードバスラインとの電気的なコンタクトを容易にするだけでなく、画素位置別カソード電極の電圧降下を防止できるようになる。   In the organic light emitting display according to the embodiment of the present invention, the cathode bus line is formed only in the pixel region, and the charge transport layer is formed so as to be separated from each other. The cathode bus line and the cathode electrode are in direct electrical contact in the region, or the cathode bus line is formed in the non-pixel region and the cathode bus line and the cathode electrode are in direct electrical contact in the outer portion of the pixel region. can do. Therefore, not only electrical contact between the cathode electrode and the cathode bus line is facilitated, but also a voltage drop of the cathode electrode for each pixel position can be prevented.
以下、本発明の実施例を添付の図面を参照して説明すれば、次の通りである。   Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
図1は、本発明の一実施例に係る有機電界発光表示装置の平面構造を示すものである。図1を参照すれば、基板は、画素が配列される画素領域(100)と非画素領域(101)とを備え、画素領域(100)の外郭部、すなわち、非画素領域(101)にカソードバスライン(170)が形成されてカソードバスライン(170)とカソード電極(190)とが画素領域(100)の外郭部のコンタクト領域(103)で電気的に直接コンタクトされる構造を有する。   FIG. 1 shows a planar structure of an organic light emitting display according to an embodiment of the present invention. Referring to FIG. 1, the substrate includes a pixel region (100) in which pixels are arranged and a non-pixel region (101). The outer portion of the pixel region (100), that is, the non-pixel region (101) has a cathode. A bus line (170) is formed, and the cathode bus line (170) and the cathode electrode (190) are in direct electrical contact with each other in the contact region (103) of the outer portion of the pixel region (100).
図1では、カソードライン(170)のうち、非画素領域(101)に形成される部分のみを示すもので、画素領域(100)では図4及び図5に示されたようにマトリックス状またはストライプ状に形成されたり、または他の様々な形態で形成されて画素領域(100)に配列された画素に電圧を供給して電圧降下を防止できる。   FIG. 1 shows only a portion of the cathode line (170) formed in the non-pixel region (101). In the pixel region (100), as shown in FIGS. A voltage drop can be prevented by supplying a voltage to the pixels formed in the shape or in various other forms and arranged in the pixel region (100).
図3は、図1のII−II’線に沿う有機電界発光表示装置の断面構造を示すもので、画素領域(100)の縁及び中間部分に位置した画素に限って示すものである。   FIG. 3 shows a cross-sectional structure of the organic light emitting display device along the line II-II ′ of FIG. 1, and shows only the pixels located at the edge and the middle part of the pixel region (100).
図3を参照すれば、画素領域(100)と非画素領域(101)とに区分される絶縁基板(105)上にバッファー層(110)が形成され、前記絶縁基板(105)の画素領域(100)には薄膜トランジスター(121)、(123)、(125)が形成される。前記薄膜トランジスター(121)、(123)、(125)のうち、薄膜トランジスター(121)は、画素領域(100)のうち、図中最も左側に配列された画素の薄膜トランジスターであり、薄膜トランジスター(125)は、画素領域(100)のち、図中最も右側に配列された画素の薄膜トランジスターであり、薄膜トランジスター(123)は、画素領域(100)のうち、図中最も左側と最も右側に配列された画素を除外した部分に配列された画素の薄膜トランジスターを表す。   Referring to FIG. 3, a buffer layer (110) is formed on an insulating substrate (105) divided into a pixel region (100) and a non-pixel region (101), and the pixel region (105) of the insulating substrate (105) is formed. 100), thin film transistors (121), (123), and (125) are formed. Among the thin film transistors (121), (123), and (125), the thin film transistor (121) is a thin film transistor of a pixel arranged on the leftmost side in the drawing in the pixel region (100). 125) is a thin film transistor of a pixel arranged on the rightmost side in the drawing after the pixel region (100), and the thin film transistor (123) is arranged on the leftmost and rightmost side in the drawing in the pixel region (100). The thin film transistor of the pixel arranged in the part except the formed pixel is represented.
パッシベーション膜(130)上にビヤホ―ル(131)、(133)、(135)を介して前記薄膜トランジスター(121)、(123)、(125)に連結する下部電極であるアノード電極(141)、(143)、(145)を形成する。前記アノード電極(141)、(143)、(145)のうち、アノード電極(141)は、画素領域(100)のうち、図中最も左側に配列された画素のアノード電極であり、アノード電極(145)は、画素領域(100)のうち、図中最も右側に配列された画素のアノード電極であり、アノード電極(143)は、画素領域(100)のうち、図中最も左側と最も右側に配列された画素を除外した部分に配列された画素のアノード電極を表す。   An anode electrode (141), which is a lower electrode connected to the thin film transistors (121), (123), (125) via via holes (131), (133), (135) on the passivation film (130) , (143), (145) are formed. Among the anode electrodes (141), (143), and (145), the anode electrode (141) is an anode electrode of a pixel arranged on the leftmost side in the drawing in the pixel region (100). 145) are the anode electrodes of the pixels arranged on the rightmost side in the drawing in the pixel region (100), and the anode electrodes (143) are on the leftmost and rightmost sides in the drawing in the pixel region (100). The anode electrode of the pixel arranged in the part which excluded the arranged pixel is represented.
前記アノード電極(第1電極)(141)、(143)、(145)の一部分が露出されるように画素分離膜(150)を形成した後、画素分離膜(150)上にカソードバスライン(電極ライン)(171)、(173)、(175)を形成する。カソードバスライン(171)、(173)、(175)を形成した後、R、G、B有機発光層(161)、(163)、(165)及び電荷輸送層(carrier transfer layer)(180)を含む有機薄膜層を形成する。次に、上部電極であるカソード電極(190)を画素領域(100)及び非画素領域(101)とを含んだ基板全面に全面蒸着する。   A pixel separation layer 150 is formed so that a part of the anode electrode (first electrode) 141, 143, and 145 is exposed, and then a cathode bus line (150) is formed on the pixel separation layer 150. Electrode lines (171), (173) and (175) are formed. After forming the cathode bus lines (171), (173), (175), the R, G, B organic light emitting layers (161), (163), (165) and the carrier transport layer (180) An organic thin film layer containing is formed. Next, a cathode electrode (190), which is an upper electrode, is deposited on the entire surface of the substrate including the pixel region (100) and the non-pixel region (101).
前記電荷輸送層(180)は、R、G、B共通層としてオープンマスクを用いて画素領域(100)に全面的に蒸着される。この際、電荷輸送層(180)としては、図面上には図示されていないが、ホール注入層、ホール輸送層、ホール障壁層、電子輸送層または電子注入層のうち、少なくとも一つを含む。   The charge transport layer 180 is deposited on the entire surface of the pixel region 100 using an open mask as an R, G, B common layer. At this time, the charge transport layer 180 includes at least one of a hole injection layer, a hole transport layer, a hole barrier layer, an electron transport layer, and an electron injection layer, which is not shown in the drawing.
一方、R、G、B有機発光層(161)、(163)、(165)は、前記アノード電極(141)、(143)、(145)の露出された部分に各々微細メタルマスク(fine metal mask)を用いて蒸着される。前記有機発光層(161)、(163)、(165)のうち、有機発光層(161)は、画素領域(100)のうち、図中最も左側に配列された画素の有機発光層であり、有機発光層(165)は、画素領域(100)のうち、図中最も右側に配列された画素の有機発光層であり、有機発光層(163)は、画素領域(100)のうち、図中最も左側と最も右側に配列された画素を除外した部分に配列された画素の有機発光層を表す。   On the other hand, the R, G, B organic light emitting layers (161), (163), (165) are formed on the exposed portions of the anode electrodes (141), (143), (145), respectively. deposition). Among the organic light emitting layers (161), (163), and (165), the organic light emitting layer (161) is an organic light emitting layer of pixels arranged on the leftmost side in the drawing in the pixel region (100). The organic light emitting layer (165) is an organic light emitting layer of the pixel arranged in the rightmost part in the drawing in the pixel region (100), and the organic light emitting layer (163) is in the pixel region (100) in the drawing. The organic light emitting layer of the pixel arranged in the part which excluded the pixel arranged in the leftmost side and the rightmost side is represented.
前記カソードバスライン(171)、(173)、(175)のうち、カソードバスライン(171)は、非画素領域(101)及び画素領域(100)に形成されて画素領域(100)のうち、図中最も左側に配列された画素に対応するカソードバスラインであり、カソードバスライン(175)は、非画素領域(101)と画素領域(100)に形成されて画素領域(100)のうち、図中最も右側に配列された画素に対応するカソードバスラインであり、カソードバスライン(173)は、画素領域(100)のうち、図中最も左側と最も右側に配列された画素を除外した部分に配列された画素に対応するカソードバスラインを表す。   Among the cathode bus lines (171), (173), and (175), the cathode bus line (171) is formed in the non-pixel area (101) and the pixel area (100), and is out of the pixel area (100). It is a cathode bus line corresponding to the pixel arranged on the leftmost side in the figure, and the cathode bus line (175) is formed in the non-pixel area (101) and the pixel area (100) and is out of the pixel area (100). It is a cathode bus line corresponding to the pixels arranged on the rightmost side in the drawing, and the cathode bus line (173) is a portion excluding the pixels arranged on the leftmost and rightmost sides in the drawing in the pixel region (100). Represents a cathode bus line corresponding to the pixels arranged in the.
この際、カソードバスライン(170)のうち、縁すなわち、図中最も左側に配列されたカソードバスライン(171)と最も右側に配列されたカソードバスライン(175)とは、画素領域(100)だけでなく、非画素領域(101)のコンタクト領域(103)まで延長形成される。したがって、前記カソードバスライン(170)は、非画素領域(101)では画素領域(100)の外郭部に沿って形成されて電気的に直接コンタクトされる構造を有する。一方、画素領域(100)は、発光領域と非発光領域とを備え、前記発光領域は有機発光層(161)、(163)、(165)から光が発光される領域に対応する部分であり、前記非発光領域は、前記発光領域を除外した部分、すなわち、画素分離膜(150)に対応する部分である。したがって、カソードバスライン(170)のうち、画素領域(100)に形成された部分は、画素分離膜(150)上に形成され、画素領域内ではカソード電極(第2電極)(190)とは電荷輸送層(180)により電気的にコンタクトされない。   At this time, among the cathode bus lines (170), the edge, that is, the cathode bus line (171) arranged on the leftmost side in the drawing and the cathode bus line (175) arranged on the rightmost side are the pixel region (100). In addition, the non-pixel region (101) is extended to the contact region (103). Accordingly, the cathode bus line 170 is formed along the outer portion of the pixel region 100 in the non-pixel region 101 and is in direct electrical contact. On the other hand, the pixel region (100) includes a light emitting region and a non-light emitting region, and the light emitting region corresponds to a region where light is emitted from the organic light emitting layers (161), (163), and (165). The non-light emitting region is a portion excluding the light emitting region, that is, a portion corresponding to the pixel isolation film (150). Therefore, a portion of the cathode bus line (170) formed in the pixel region (100) is formed on the pixel isolation film (150), and in the pixel region, the cathode electrode (second electrode) (190) is defined. Not electrically contacted by the charge transport layer (180).
前記カソードバスライン(170)は、光を吸収して導電性を有する物質、例えば透明導電膜と金属膜の濃度勾配を有するMIHL(Metal Insulator Hybrid Layer)薄膜を用いて、光遮断用ブラックマトリックスだけでなく電極としての役割をする。前記カソードバスライン(170)は、カソード電極の補助電極として、前記カソード電極(190)に印加される電圧と同一のレベルの同一の極性を有する電圧が印加されてカソード電極を介した電圧降下を防止する。   The cathode bus line 170 uses a material that absorbs light and has conductivity, for example, a MIHL (Metal Insulator Hybrid Layer) thin film having a concentration gradient between a transparent conductive film and a metal film. Instead, it acts as an electrode. The cathode bus line (170) is applied with a voltage having the same polarity and the same level as the voltage applied to the cathode electrode (190) as an auxiliary electrode of the cathode electrode, thereby reducing a voltage drop through the cathode electrode. To prevent.
図2は、本発明の一実施例に係る有機電界発光表示装置のもう一つの断面構造として、図1でカソードバスライン(170)が画素領域(100)に沿って非画素領域(101)に形成されてカソードバスライン(170)とカソード電極(190)が非画素領域(100)の四方で電気的に直接コンタクトされる構造とは異なり、非画素領域(201)のうち、画素領域(200)の一側外郭部にのみカソードバスライン(271)が形成されて画素領域(200)の一側外郭部のみでカソードバスライン(271)とカソード電極(290)とが直接電気的にコンタクトされる構造を有する。   FIG. 2 shows another cross-sectional structure of an organic light emitting display according to an embodiment of the present invention. In FIG. 1, the cathode bus line (170) extends along the pixel region (100) into the non-pixel region (101). Unlike the structure in which the cathode bus line (170) and the cathode electrode (190) are formed and are in direct electrical contact with the four sides of the non-pixel region (100), the pixel region (200) of the non-pixel region (201) is formed. The cathode bus line (271) is formed only on one side outline portion, and the cathode bus line (271) and the cathode electrode (290) are directly electrically contacted only on one side outline portion of the pixel region (200). It has a structure.
本発明の一実施例では、非画素領域の少なくとも一部分にカソードバスラインが形成されるので、オープンマスクを用いて画素領域に電荷輸送層を全面蒸着しても非画素領域のコンタクト領域を介してカソードバスラインとカソード電極とが電気的に直接コンタクトされる。   In one embodiment of the present invention, the cathode bus line is formed in at least a part of the non-pixel region. Therefore, even if the charge transport layer is deposited on the entire pixel region using an open mask, the cathode bus line is formed through the contact region of the non-pixel region. The cathode bus line and the cathode electrode are in direct electrical contact.
本発明の一実施例において、例示されたカソードバスラインとカソード電極の連結構造の他に、画素領域の外郭部である非画素領域でカソードバスラインとカソード電極とを連結する構造は、全て適用可能である。   In one embodiment of the present invention, in addition to the illustrated cathode bus line / cathode electrode connection structure, all the structures in which the cathode bus line and the cathode electrode are connected in the non-pixel region which is the outer portion of the pixel region are applicable. Is possible.
図4は、本発明の他の実施例に係る有機電界発光表示装置の平面構造を示すものである。図4を参照すれば、画素領域(100)内にのみカソードバスライン(370)がグリッド状またはマトリックス状に形成されてカソードバスライン(370)とカソード電極(390)とが各画素別にコンタクト領域(図示せず)を介して電気的に直接的にコンタクトされる構造を有する。   FIG. 4 illustrates a planar structure of an organic light emitting display device according to another embodiment of the present invention. Referring to FIG. 4, the cathode bus line 370 is formed in a grid or matrix only in the pixel region 100, and the cathode bus line 370 and the cathode electrode 390 are contact regions for each pixel. It has a structure in which it is directly contacted electrically (not shown).
図6は、図4のIV−IV’線に沿う有機電界発光表示装置の断面構造を示すもので、画素領域(300)の縁及び中間部分に位置した画素に限って示すものである。   FIG. 6 shows a cross-sectional structure of the organic light emitting display device along the line IV-IV ′ of FIG. 4, and shows only the pixels located at the edge and the middle part of the pixel region (300).
図6を参照すれば、画素領域(300)と非画素領域(301)とに区分される絶縁基板(305)上にバッファー層(310)が形成され、前記絶縁基板(305)の画素領域(300)には、薄膜トランジスター(321)、(323)、(325)が形成される。前記薄膜トランジスター(321)、(323)、(325)のうち、薄膜トランジスター(321)は、画素領域(300)のうち、図中最も左側に配列された画素の薄膜トランジスターであり、薄膜トランジスター(325)は、画素領域(300)のうち、図中最も右側に配列された画素の薄膜トランジスターであり、薄膜トランジスター(323)は、画素領域(300)のうち、図中最も左側と最も右側に配列された画素を除外した部分に配列された画素の薄膜トランジスターを表す。   Referring to FIG. 6, a buffer layer 310 is formed on an insulating substrate 305 divided into a pixel region 300 and a non-pixel region 301, and the pixel region (305) of the insulating substrate 305 is formed. 300), thin film transistors (321), (323), and (325) are formed. Among the thin film transistors (321), (323), and (325), the thin film transistor (321) is a thin film transistor of a pixel arranged on the leftmost side in the drawing in the pixel region (300). 325) is a thin film transistor of the pixel arranged on the rightmost side in the drawing in the pixel region (300), and the thin film transistor (323) is on the leftmost and rightmost side in the drawing in the pixel region (300). The thin film transistor of the pixel arranged in the part except the arranged pixel is represented.
パッシベーション膜(330)上にビヤホ―ル(331)、(333)、(335)を介して前記薄膜トランジスター(321)、(323)、(325)に連結する下部電極であるアノード電極(341)、(343)、(345)を形成する。前記アノード電極(341)、(343)、(345)のうち、アノード電極(341)は、画素領域(300)のうち、図中最も左側に配列された画素のアノード電極であり、アノード電極(345)は、画素領域(300)のうち、図中最も右側に配列された画素のアノード電極であり、アノード電極(343)は、画素領域(300)のうち、図中最も左側と最も右側に配列された画素を除外した部分に配列された画素のアノード電極を表す。   An anode electrode (341) which is a lower electrode connected to the thin film transistors (321), (323), (325) via via holes (331), (333), (335) on the passivation film (330) , (343), (345). Among the anode electrodes (341), (343), and (345), the anode electrode (341) is an anode electrode of a pixel arranged on the leftmost side in the drawing in the pixel region (300). 345) are the anode electrodes of the pixels arranged on the rightmost side in the drawing in the pixel region (300), and the anode electrodes (343) are on the leftmost and rightmost sides in the drawing in the pixel region (300). The anode electrode of the pixel arranged in the part which excluded the arranged pixel is represented.
前記アノード電極(341)、(343)、(345)の一部分が露出されるように画素分離膜(350)が形成され、画素分離膜(350)上にカソードバスライン(371)、(373)、(375)を形成する。次に、画素領域(300)の発光領域に該当する前記アノード電極(341)、(343)、(345)の露出された部分に微細メタルマスク(fine metal mask)(不図示)を用いてR、G、B有機発光層(361)、(363)、(365)と有機EL共通層である電荷輸送層(381)、(383)、(385)を含む有機薄膜層を選択的に形成する。次に、カソード電極(390)を画素領域(300)及び非画素領域(301)を含んだ基板全面に全面蒸着する。   A pixel isolation layer 350 is formed so that a part of the anode electrodes 341 343, and 345 is exposed, and cathode bus lines 371 and 373 are formed on the pixel isolation layer 350. , (375). Then, a fine metal mask (not shown) is used to expose the anode electrodes (341), (343), and (345) corresponding to the light emitting region of the pixel region (300). , G, B Organic light emitting layers (361), (363), (365) and organic thin film layer including organic EL common layer charge transport layers (381), (383), (385) are selectively formed. . Next, a cathode electrode (390) is deposited on the entire surface of the substrate including the pixel region (300) and the non-pixel region (301).
この際、前記有機発光層(361)、(363)、(365)のうち、有機発光層(361)は、画素領域(300)のうち、図中最も左側に配列された画素の有機発光層であり、有機発光層(365)は、画素領域(300)のうち、図中最も右側に配列された画素の有機発光層であり、有機薄膜層(363)は、画素領域(300)のうち、図中最も左側と最も右側に配列された画素を除外した部分に配列された画素の有機発光層を表す。前記電荷輸送層(380)は、R、G、B共通層として微細メタルマスク(図示せず)を用いて画素領域(300)の有機発光層上のみ選択的に蒸着される。この際、電荷輸送層(380)としては、図面上には図示されていないが、ホール注入層、ホール輸送層、ホール障壁層、電子輸送層または電子注入層のうち、少なくとも一つを含む。   At this time, among the organic light emitting layers (361), (363), and (365), the organic light emitting layer (361) is the organic light emitting layer of the pixel arranged on the leftmost side in the drawing in the pixel region (300). The organic light emitting layer (365) is the organic light emitting layer of the pixel arranged on the rightmost side in the drawing in the pixel region (300), and the organic thin film layer (363) is in the pixel region (300). The organic light emitting layer of the pixel arranged in the part which excluded the pixel arranged in the leftmost side and the rightmost side in a figure is represented. The charge transport layer 380 is selectively deposited only on the organic light emitting layer in the pixel region 300 using a fine metal mask (not shown) as an R, G, B common layer. At this time, the charge transport layer (380) includes at least one of a hole injection layer, a hole transport layer, a hole barrier layer, an electron transport layer, and an electron injection layer, although not shown in the drawing.
前記カソードバスライン(371)、(373)、(375)は、画素領域(300)内にのみ形成され、カソードバスライン(371)は、画素領域(300)のうち、図中最も左側に配列された画素に対応するカソードバスラインであり、カソードバスライン(375)は、画素領域(300)のうち、図中最も右側に配列された画素に対応するカソードバスラインであり、カソードバスライン(373)は、画素領域(300)のうち、図中最も左側と最も右側に配列された画素を除外した部分に配列された画素に対応するカソードバスラインを表す。   The cathode bus lines (371), (373), and (375) are formed only in the pixel region (300), and the cathode bus line (371) is arranged on the leftmost side in the drawing in the pixel region (300). The cathode bus line (375) corresponds to the pixel arranged on the rightmost side in the drawing in the pixel region (300), and the cathode bus line (375) corresponds to the pixel bus line (375). 373) represents the cathode bus lines corresponding to the pixels arranged in the pixel area (300) excluding the pixels arranged on the leftmost side and the rightmost side in the drawing.
この際、前記カソードバスライン(370)は、画素領域(300)内に図4のようにグリッド状またはマトリックス状に形成されて画素分離膜(350)上に形成される。前記カソードバスライン(370)は、光を吸収して導電性を有する物質、例えば透明導電膜と金属膜の濃度勾配を有するMIHL薄膜を用いて、光遮断用ブラックマトリックスだけでなく電極としての役割をする。前記カソードバスライン(370)は、カソード電極(390)の補助電極として、前記カソード電極(390)に印加される電圧と同一のレベルの同一の極性を有する電圧が印加されてカソード電極を介した電圧降下を防止する。   At this time, the cathode bus line 370 is formed in a grid shape or a matrix shape in the pixel region 300 as shown in FIG. 4 and is formed on the pixel isolation layer 350. The cathode bus line (370) functions not only as a light blocking black matrix but also as an electrode by using a conductive material by absorbing light, for example, a MIHL thin film having a concentration gradient between a transparent conductive film and a metal film. do. The cathode bus line (370) is applied with a voltage having the same polarity as the voltage applied to the cathode electrode (390) as an auxiliary electrode of the cathode electrode (390) through the cathode electrode. Prevent voltage drop.
図5は、本発明の他の実施例に係る有機電界発光表示装置のもう一つの断面構造として、図4でカソードバスライン(370)が画素領域(300)内にグリッド状に形成されて画素領域(300)内でカソードバスライン(370)とカソード電極(390)とが各画素別に電気的に連結する構造とは異なり、カソードバスライン(470)がストライプ状に形成されて画素領域(400)内でカソードバスライン(470)とカソード電極(490)とがライン単位で電気的に直接コンタクトされる構造を有する。   FIG. 5 shows another cross-sectional structure of an organic light emitting display according to another embodiment of the present invention, in which cathode bus lines 370 are formed in a grid shape in the pixel region 300 in FIG. Unlike the structure in which the cathode bus line (370) and the cathode electrode (390) are electrically connected to each pixel in the region (300), the cathode bus line (470) is formed in a stripe shape to form the pixel region (400). ), The cathode bus line (470) and the cathode electrode (490) are in direct electrical contact in line units.
本発明の他の実施例では、画素領域(300)内にのみグリッド状のカソードバスライン(370)が形成されるので、電荷輸送層(381)、(383)、(385)を各アノード電極(341)、(343)、(345)にのみ画素別に微細メタルマスクを用いて形成した後、カソード電極(390)を基板全面に形成するものである。したがって、電荷輸送層(381)、(383)、(385)が有機発光層(361)、(363)、(365)にのみ部分的に形成されるので、画素領域(300)内で各画素別にカソードバスライン(370)とカソード電極(390)が電気的に直接コンタクトされる。   In another embodiment of the present invention, a grid-like cathode bus line (370) is formed only in the pixel region (300), so that the charge transport layers (381), (383), and (385) are connected to the anode electrodes. Only the (341), (343), and (345) are formed for each pixel using a fine metal mask, and then the cathode electrode (390) is formed on the entire surface of the substrate. Therefore, since the charge transport layers (381), (383), and (385) are partially formed only in the organic light emitting layers (361), (363), and (365), each pixel in the pixel region (300). Separately, the cathode bus line (370) and the cathode electrode (390) are in direct electrical contact.
本発明の他の実施例で例示されたカソードバスラインの構造の他に、画素領域内でカソード電極と連結するカソードバスライン構造は、全て適用可能である。前記では、本発明の好適な実施例を参照して説明したが、該当技術分野の熟練された当業者であれば、上記の特許請求の範囲に記載された本発明の思想及び領域から外れない範囲内で本発明を様々に修正及び変更させることができることを分かる。   In addition to the cathode bus line structure exemplified in the other embodiments of the present invention, any cathode bus line structure connected to the cathode electrode in the pixel region can be applied. Although the foregoing has been described with reference to the preferred embodiments of the present invention, those skilled in the relevant art will not depart from the spirit and scope of the invention as defined in the appended claims. It will be understood that various modifications and changes can be made to the present invention within the scope.
本発明の一実施例に係る有機電界発光表示装置の平面構造を示す図面である。1 is a plan view of an organic light emitting display device according to an embodiment of the present invention. 本発明の一実施例に係る有機電界発光表示装置の平面構造を示す図面である。1 is a plan view of an organic light emitting display device according to an embodiment of the present invention. 本発明の一実施例に係る有機電界発光表示装置の断面構造の示す図面である。1 is a cross-sectional view of an organic light emitting display device according to an embodiment of the present invention. 本発明の他の実施例に係る有機電界発光表示装置の平面構造を示す図面である。3 is a plan view of an organic light emitting display device according to another embodiment of the present invention. 本発明の他の実施例に係る有機電界発光表示装置の平面構造を示す図面である。3 is a plan view of an organic light emitting display device according to another embodiment of the present invention. 本発明の他の実施例に係る有機電界発光表示装置の断面構造を示す図面である。3 is a cross-sectional view of an organic light emitting display device according to another embodiment of the present invention.
符号の説明Explanation of symbols
100、200、300、400 画素領域
101、201、301、401 非画素領域
105、305 絶縁基板
110、310 バッファー層
121、123、125、321、323、325 薄膜トランジスター
130、330 パッシベーション膜
150、350 画素分離膜
141、143、145、341、343、345 アノード電極
161、163、165、361、363、365 有機発光層
171、173、175、271、371、373、375、471、473、475 カソードバスライン
180、381、383、385 電荷輸送層
190、390 カソード電極
100, 200, 300, 400 Pixel area 101, 201, 301, 401 Non-pixel area 105, 305 Insulating substrate 110, 310 Buffer layer 121, 123, 125, 321, 323, 325 Thin film transistor 130, 330 Passivation film 150, 350 Pixel separation film 141, 143, 145, 341, 343, 345 Anode electrode 161, 163, 165, 361, 363, 365 Organic light emitting layer 171, 173, 175, 271, 371, 373, 375, 471, 473, 475 Cathode Bus line 180, 381, 383, 385 Charge transport layer 190, 390 Cathode electrode

Claims (14)

  1. R有機発光層(161)およびG有機発光層(163)およびB有機発光層(165)を含む画素領域(100)と非画素領域(101)とを備えた絶縁基板(105)と、
    前記画素領域(100)に配列された第1電極(141、143、145)と、
    前記第1電極(141、143、145)上に形成され、前記第1電極(141、143、145)を露出する開口を備えた画素分離膜(150)と、
    前記画素領域(100)及び前記非画素領域(101)に形成された第2電極(190)と、
    前記画素分離膜(150)の開口内の前記第1電極(141、143、145)上に形成されたR有機発光層(161)およびG有機発光層(163)およびB有機発光層(165)と、
    前記R、G、B有機発光層(161、163、165)及び前記画素分離膜(150)と前記第2電極(190)との間で、前記画素領域(100)の全面に形成され、電気的なコンタクトを提供しない電荷輸送層(180)と、
    前記画素領域(100)と前記非画素領域(101)の前記画素分離膜(150)上に形成され、前記画素領域(100)では前記第2電極(190)との間に前記電荷輸送層(180)を介して形成された電極ライン(171、173、175)とを含み、
    前記電極ライン(171、173、175)と前記第2電極(190)は前記画素領域(100)の四方の前記非画素領域で電気的にコンタクトされ、前記画素領域では電気的にコンタクトされないことを特徴とする平板表示装置。
    An insulating substrate (105) comprising a pixel region (100) including a R organic light emitting layer (161), a G organic light emitting layer (163), and a B organic light emitting layer (165) and a non-pixel region (101);
    First electrodes (141, 143, 145) arranged in the pixel region (100);
    A pixel isolation layer (150) having an opening formed on the first electrode (141, 143, 145) and exposing the first electrode (141, 143, 145);
    A second electrode (190) formed in the pixel region (100) and the non-pixel region (101);
    An R organic light emitting layer (161), a G organic light emitting layer (163), and a B organic light emitting layer (165) formed on the first electrode (141, 143, 145) in the opening of the pixel separation film (150 ). When,
    The R, G, B organic light emitting layer (161, 163) and between said pixel defining layer (150) and said second electrode (190) is formed on the entire surface of the pixel region (100), electrical A charge transport layer (180) that does not provide a general contact ;
    The charge transport layer ( 150) is formed on the pixel isolation layer (150) of the pixel region (100) and the non-pixel region (101) , and between the second electrode (190) in the pixel region (100). 180) and electrode lines (171, 173, 175) formed through
    The electrode lines (171, 173, 175) and the second electrode (190) are electrically contacted in the non-pixel region on all four sides of the pixel region (100), and are not electrically contacted in the pixel region. A flat panel display device.
  2. 前記画素領域(100)は、前記R有機発光層(161)および前記G有機発光層(163)および前記B有機発光層(165)から光が発光される領域と非発光領域とを含み、
    前記電極ライン(171、173、175)は、前記画素領域(100)のうち、前記非発光領域の少なくとも一部に位置することを特徴とする請求項1記載の平板表示装置。
    The pixel region (100) includes a region where light is emitted from the R organic light emitting layer (161), the G organic light emitting layer (163), and the B organic light emitting layer (165), and a non-light emitting region.
    The flat panel display according to claim 1, wherein the electrode lines (171, 173, 175) are located in at least a part of the non-light-emitting region in the pixel region (100).
  3. 前記非発光領域の少なくとも一部に位置する電極ライン(171、173、175)は、外部光を吸収する物質であり、導電性を有する物質であることを特徴とする請求項2記載の平板表示装置。   3. The flat panel display according to claim 2, wherein the electrode lines (171, 173, 175) located in at least a part of the non-light emitting region are materials that absorb external light and are conductive materials. apparatus.
  4. 前記電極ライン(171、173、175)のうち、前記画素領域(100)に配列された部分は、ストライプ状またはマトリックス状を有することを特徴とする請求項1記載の平板表示装置の製造方法。   2. The method of manufacturing a flat panel display according to claim 1, wherein portions of the electrode lines (171, 173, 175) arranged in the pixel region (100) have a stripe shape or a matrix shape.
  5. 前記電極ライン(171、173、175)は、前記第2電極(190)と同一の極性を有する電圧の電流が流れることを特徴とする請求項1記載の平板表示装置。   The flat panel display according to claim 1, wherein a current having a voltage having the same polarity as that of the second electrode (190) flows through the electrode lines (171, 173, 175).
  6. 前記電極ライン(171、173、175)は、前記第2電極(190)の補助電極であることを特徴とする請求項1記載の平板表示装置。   The flat panel display according to claim 1, wherein the electrode lines (171, 173, 175) are auxiliary electrodes of the second electrode (190).
  7. 前記電極ライン(171、173、175)は、前記非画素領域(101)で前記画素領域(100)の外郭部に沿って形成され、前記電極ライン(171、173、175)が前記第2電極(190)と電気的にコンタクトされることを特徴とする請求項1記載の平板表示装置。   The electrode lines (171, 173, 175) are formed along the outer portion of the pixel region (100) in the non-pixel region (101), and the electrode lines (171, 173, 175) are the second electrode. 2. A flat panel display device according to claim 1, wherein the flat display device is in electrical contact with (190).
  8. R有機発光層(161)およびG有機発光層(163)およびB有機発光層(165)を含む画素領域(100)と非画素領域(101)とを備えた絶縁基板(105)を提供するステップと、
    前記絶縁基板(105)の画素領域(100)上に第1電極(141、143、145)を形成するステップと、
    前記第1電極(141、143、145)を露出する開口を備えた画素分離膜(150)を前記第1電極(141、143、145)上に形成するステップと、
    前記開口から露出した前記第1電極(141、143、145)上にR有機発光層(161)およびG有機発光層(163)およびB有機発光層(165)を形成するステップと、
    前記画素領域(100)及び前記非画素領域(101)の前記画素分離膜(150)上に電極ライン(171、173、175)を形成するステップと、
    前記電極ライン(171、173、175)の形成された画素領域(100)の全面に電気的なコンタクトを提供しない電荷輸送層(180)を形成するステップと、
    前記電荷輸送層(180)の形成された画素領域(100)及び前記非画素領域(101)に第2電極(190)を形成するステップとを含み、
    前記電極ライン(171、173、175)と前記第2電極(190)は、前記画素領域(100)の四方の前記非画素領域(101)で電気的にコンタクトされ、前記画素領域(100)では電気的にコンタクトされないことを特徴とする平板表示装置の製造方法。
    Providing an insulating substrate (105) comprising a pixel region (100) including a R organic light emitting layer (161), a G organic light emitting layer (163), and a B organic light emitting layer (165) and a non-pixel region (101). When,
    Forming first electrodes (141, 143, 145) on a pixel region (100) of the insulating substrate (105);
    Forming a pixel isolation layer (150) having an opening exposing the first electrode (141, 143, 145) on the first electrode (141, 143, 145);
    Forming an R organic light emitting layer (161), a G organic light emitting layer (163), and a B organic light emitting layer (165) on the first electrode (141, 143, 145) exposed from the opening ;
    Forming electrode lines (171, 173, 175) on the pixel isolation layer (150) in the pixel region (100) and the non-pixel region (101);
    Forming a charge transport layer (180) that does not provide electrical contact over the entire surface of the pixel region (100) where the electrode lines (171, 173, 175) are formed;
    Forming a second electrode (190) in the pixel region (100) in which the charge transport layer (180) is formed and the non-pixel region (101),
    The electrode lines (171, 173, 175) and the second electrode (190) are electrically contacted in the non-pixel region (101) on all four sides of the pixel region (100), and in the pixel region (100), A method of manufacturing a flat panel display device, wherein the flat display device is not electrically contacted .
  9. 前記R有機発光層(161)および前記G有機発光層(163)および前記B有機発光層(165)は、微細メタルマスクを用いて前記第1電極(141、143、145)上にのみ部分的に形成され、前記電荷輸送層(180)は、オープンマスクを用いて前記画素領域(100)内に全面蒸着されることを特徴とする請求項8記載の平板表示装置の製造方法。   The R organic light emitting layer (161), the G organic light emitting layer (163), and the B organic light emitting layer (165) are partially formed only on the first electrode (141, 143, 145) using a fine metal mask. The method according to claim 8, wherein the charge transport layer (180) is deposited on the entire surface of the pixel region (100) using an open mask.
  10. 前記画素領域(100)は、前記R有機発光層(161)および前記G有機発光層(163)および前記B有機発光層(165)から光が発光される発光領域と非発光領域とを含み、前記電極ライン(171、173、175)が前記非発光領域の少なくとも一部に形成され、
    前記電荷輸送層(180)は、前記画素領域(100)の非発光領域の少なくとも一部に形成された電極ライン(171、173、175)と前記第2電極(190)との間に形成されることを特徴とする請求項8記載の平板表示装置の製造方法。
    The pixel region (100) includes a light emitting region and a non-light emitting region where light is emitted from the R organic light emitting layer (161), the G organic light emitting layer (163), and the B organic light emitting layer (165), The electrode lines (171, 173, 175) are formed on at least a part of the non-light-emitting region;
    The charge transport layer (180) is formed between the second electrode (190) and the electrode line (171, 173, 175) formed in at least a part of the non-light emitting region of the pixel region (100). The method of manufacturing a flat panel display device according to claim 8.
  11. 前記非発光領域の少なくとも一部に位置する電極ライン(171、173、175)は、外部光を吸収する物質であり、導電性を有する物質であることを特徴とする請求項10記載の平板表示装置の製造方法。   11. The flat panel display according to claim 10, wherein the electrode lines (171, 173, 175) located in at least a part of the non-light emitting region are materials that absorb external light and are conductive materials. Device manufacturing method.
  12. 前記電極ライン(171、173、175)のうち、前記画素領域(100)に配列された部分は、ストライプ状またはマトリックス状を有することを特徴とする請求項8記載の平板表示装置の製造方法。   9. The method of manufacturing a flat panel display according to claim 8, wherein portions of the electrode lines (171, 173, 175) arranged in the pixel region (100) have a stripe shape or a matrix shape.
  13. 前記電極ラインは、前記第2電極(190)と同一の極性を有する電圧の電流が流れることを特徴とする請求項8記載の平板表示装置の製造方法。   The method according to claim 8, wherein a current having a voltage having the same polarity as the second electrode (190) flows through the electrode line.
  14. 前記電極ラインは、前記第2電極(190)の補助電極であることを特徴とする請求項8記載の平板表示装置の製造方法。   9. The method of manufacturing a flat panel display according to claim 8, wherein the electrode line is an auxiliary electrode of the second electrode (190).
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