JP4219097B2 - Electronics - Google Patents

Description

[0001]
[Industrial application fields]
The present invention relates to a semiconductor integrated circuit device having a voltage conversion function, and more particularly, to a device configuration and a manufacturing method of the device.
Further, the present invention relates to an electronic device apparatus in which the apparatus is incorporated in connection with a method of using the apparatus on an electric circuit.
[0002]
[Prior art]
Voltage conversion functions (hereinafter sometimes referred to as converters) can be roughly classified into two types, step-down and step-up. Conventionally, various types of semiconductor integrated circuit devices having a step-down function exist and are used in industry. However, as in the conventional EL (electroluminescence) element drive circuit shown in FIG. 11 , conversion using a transformer is still common for boosting. Since a transformer is used, voltage conversion from alternating current to alternating current (hereinafter referred to as AC-AC) is of course easy and naturally performed, but in conversion from direct current to direct current (hereinafter referred to as DC-DC). Also, there is a method in which the current is once converted into an alternating current component by an oscillation circuit or the like, boosted through a transformer, and then rectified again to return to direct current.
[0003]
Further, in some semiconductor integrated circuit devices such as a nonvolatile memory, a high voltage for writing / erasing the memory (although Vdd is a high voltage of about 10 to 20 V from 3 V to 5 V) is used. In some cases, a booster circuit using MOS is formed in a single (hereinafter referred to as monolithic) in the same semiconductor integrated circuit device. FIG. 6 shows a circuit of a charge transport method (hereinafter referred to as a charge pump), which is a booster circuit that does not use a transformer, constituted by diodes (D1 1001 to Dn 1003). Here, as shown in FIG. 7 , the output voltage Vout 1004 is obtained by inputting a repetitive signal (hereinafter referred to as clock or CK) created by the oscillation circuit and a signal having a phase opposite to that of the repetitive signal (hereinafter referred to as clock or CK inversion). Vout = Vin + nVin− (n + 1) Vf (1)
Given in. Here, n is the number of stages of pairs of diodes and capacitors (C1 1008 to Cn-1 1010). Vf is the forward voltage drop of a single diode.
[0004]
An example in which conventional PN junctions are arranged in series on a single substrate will be described. FIG. 12 is a schematic cross-sectional view showing a conventional semiconductor integrated circuit device. It Considering in effective circuit is shown in Figure 13. FIG. 8 shows the charge pump circuit configured using MOS transistors. 9 (a) is in the schematic view showing the electrodes of each MOS transistor of FIG. 8, the output of the MOS transistor is in the cross-sectional structure shown in Figure 9 (b). That is, the source 1034 and the drain 1032 are formed on the surface of the thick substrate 1031. In this case, Vf in the equation (1) is replaced with the threshold voltage Vth of the transistor. As a monolithic booster circuit, a Fibonacci type switched capacitor booster circuit shown in FIG. 10 is also known. In this way, those composed of MOS are used.
[0005]
[Problems to be solved by the invention]
Conventional booster circuits and monolithic semiconductor integrated circuit devices for boosting use the above-described method, but there are the following problems to be solved.
As a first problem, there is a size problem as a conversion method using a transformer. As is well known, the size of the transformer depends on the power to be extracted, but is determined by the leakage flux and the frequency of the AC component used. If the frequency is increased, the transformer can be reduced in size. However, the current technology is still large, and even if it has a dimension in the thickness direction, several mm is inevitably necessary, which is 10 times that of a monolithic semiconductor integrated circuit device. It will be about double. In this case, when used in a portable device or the like, it cannot be made thinner than a certain degree, and the merchantability cannot be improved. In addition, since the DC-DC conversion is once converted to AC, there is a problem of efficiency that there is a loss there. In addition, in such conversion (referred to as a switching type DC-DC converter), it is generally said that if the frequency is increased as described above, that is, if the frequency is increased, the size and efficiency can be improved. At present, the performance of semiconductor integrated circuit devices constituting the electric circuit is still insufficient. Furthermore, in the switching method, the current is once converted into magnetic flux, so electromagnetic waves always leak. Some of these leaked electromagnetic waves are beginning to be regarded as a problem in recent high frequency operation. Since then, the movement of laws and regulations has been dealt with.
[0006]
As a second problem, although monolithic boosting semiconductor integrated circuit device portion as described above for the present, but is taking a configuration using MOS transistors as shown in FIG. This is because the configuration using the diode as shown in FIG. 8 cannot be taken. A plurality of PN junction i.e. a diode formed on the same semiconductor substrate as shown in FIG. 12 is can not be completely independent isolates each as shown in Figure 13. Each of the rectifying element diodes is composed of PN diodes 341 to 343 with a P-type substrate 330 which becomes a cathode (N-type layer 331) and an anode, and serves as a common (common) 344 for the anode P-type substrate. Considering such a discrete connection, it seems that such a booster circuit can be realized if the PN diode 343 at the final stage has a reverse breakdown voltage that can withstand the boosted voltage at that time. However, it is semiconductor, in fact the two kinds of PN junction in constitute a PNP transistor as shown in FIG. 14, the circuit configured as shown. For example, when the CK inversion 360 becomes L (low), the base current i353 flows to the Tr 352. At this time, since the CK 359 is H (high), the charge boosted in the first stage is stored in the node 357. ing. However, at this time, that is, the PNP transistor Tr354 is turned on, and the current 354 corresponding to the base current i × hFE flows out to the common GND, so that it is impossible to actually increase the pressure. This is the reason why it is difficult to arrange PN junctions on a single substrate. Of course, such a configuration is possible if individual parts (discrete) are connected together, but this becomes the same problem as the size of the transformer described above, and the meaning of monolithic is completely lost. Now, when taking the structure of arranging the MOS transistor, FIG. 9 (a), MOS transistors as shown in (b) are for the common its substrate (Sub) 1031, for example, grounding the substrate is now (GND ), Even if the first-stage transistor is good, the second-stage transistor has a one-step boosted potential difference between its source and Sub. When this happens, Vth increases and is expressed as follows.
[0007]
Vth = Vth (initial) + K [(V _B + 2φ) ^1/2 − (2φ) ^1/2 ]
Here, VB is the substrate voltage with reference to the source, Vth (initial) is the Vth of the transistor when the substrate voltage is 0, K is the substrate bias constant, and φ is the Fermi level. That is, as the number of stages is increased, Vth increases and gradually does not perform sufficient ON operation, and the boosted voltage becomes saturated. Experimentally, boosting up to several tens of volts with 3V input is a practical limit. The output current I is
If∝ · C / n
Where f is the frequency of CK and C is the capacitance of the unit capacitor. Therefore, it can be seen that in order to increase I, it is sufficient to increase C. However, the area becomes larger and the economic effect is not good. If it is desired to increase the boosted voltage, the dielectric breakdown voltage corresponding to the final output voltage must be ensured in the capacitor, and the film thickness of the insulating film of the capacitor is increased. In this case, the capacitance is decreased. As described above, in this method, the output current and the boosted voltage have opposite factors.
[0008]
[Means for Solving the Problems]
To solve the problems described above, it took the means to achieve good monolithic boosting semiconductor integrated circuit device as follows.
[0009]
As described above, a charge pump system is a typical example of a monolithic step-up semiconductor integrated circuit device. A basic element constituting the device is a MOS transistor (or diode) and capacitor pair. The function of these elements is that a MOS transistor (or a diode) is a rectifier function (Rectifier in English), a capacitor is charge storage and transfer, but a capacitor is a capacitor.
[0010]
A rectifying function is a diode, and the diode is an SOI substrate (abbreviation of Silicon On Insulator, a semiconductor substrate having an insulating layer on a semiconductor substrate and a thin semiconductor substrate on the insulating layer). the thickness of the semiconductor substrate are various implementations to several 100μm several tens angstroms in recent years. the SIMOX method as the manufacturing method of the semiconductor substrate, ZMR method, are subjected bonding method, various proposals actual such like .) are formed on, and so each takes the configuration that are electrically isolated. The capacitor is similarly formed on the SOI substrate.
[0011]
[Action]
Since the rectifier / capacitor pair is completely separated in the charge pump type or switched capacitor type booster circuit, the semiconductor integrated circuit for boosting the high magnification from several volts to several hundred volts, which has been impossible with monolithic so far. The device becomes possible.
[0012]
【Example】
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a schematic cross-sectional view of a rectifier / capacitor pair showing a semiconductor integrated circuit device according to a first embodiment of the present invention. The Si layer 18 is now a P-type semiconductor substrate, forms a P-type layer 24, has an N + -type layer 19 and forms a rectifying function consisting of a PN junction. The SiO 2 insulating layer 16 and the LOCOS oxide film 17 The rectifying element portion A is formed by being completely separated from the Si substrate 15 as a supporting substrate and other adjacent elements. A capacitor insulating film 22 is provided on the Si layer 18, and further a capacitor electrode 21 is provided. Similarly, a capacitor portion B is formed separated from other elements. Further, the anode electrode 11 connected to the P + type layer 20 of the rectifying element and the cathode electrode 12 connected to the N + type layer 19, the wiring 13 connecting the P + type layer 20 of the capacitor and the cathode electrode 12, and the capacitor electrode 21 And a connected CK electrode 14. FIG. 2 is a schematic plan view of electrodes showing the semiconductor integrated circuit device of the first embodiment. FIG. 3 is a schematic block diagram showing one rectifier / capacitor pair (hereinafter sometimes referred to as a pair) of a charge pump type booster circuit showing the semiconductor integrated circuit device of the first embodiment. The configuration as shown in FIG. 1 is connected to each other by wiring as shown in FIG. 2 to form a circuit as shown in FIG. Many pairs are connected as shown in FIG. 6 to realize a monolithic step-up semiconductor integrated circuit device.
[0013]
In the semiconductor integrated circuit of the present invention, the capacitor insulating film, that is, the dielectric film has a three-layer structure of silicon oxide film-silicon nitride film-silicon oxide film, whereby a large-capacity capacitor can be obtained with a small area. Further, the dielectric film of the capacitor is a silicon oxide film-tantalum oxide film (Ta ₂ O ₅ ) barium strontium titanate {(Ba _x , Sr _1-x ) TiO ₃ (hereinafter referred to as a BST film)} zircon titanate. By using a ferroelectric film structure of lead oxide {Pb (Zr, Ti) O ₃ (hereinafter referred to as PZT film)}, a capacitor having the same capacity can be formed with a smaller area. Further, the effect of the parasitic capacitance can be reduced by making the insulating film portion on the rectifying element traversed by the wiring electrically connecting the rectifying element and the capacitor thicker than the insulating film used in the capacitor element. it can. By taking a configuration in which the thicknesses of the dielectric films of the arranged capacitor elements are different from each other (the low voltage portion is a thin insulating film and the high voltage portion is a thick insulating film), the capacitor area can be reduced.
[0014]
FIG. 4 is a schematic sectional view of a rectifier / capacitor pair showing a semiconductor integrated circuit device according to a second embodiment of the present invention. The Si layer 18 is now a P-type semiconductor substrate, has an N + type layer 19 and has a rectifying function consisting of a PN junction. At the same time, the Si layer 18 has a capacitor insulating film 22 on the N + type layer 19, and further has a capacitor electrode 21 A capacitor portion is formed.
[0015]
FIG. 5 is a schematic plan view of electrodes showing the semiconductor integrated circuit device of this example. By adopting such a configuration, a pair as described in the first embodiment can be formed on the same plane, and a large area saving can be achieved.
【The invention's effect】
As described above, the semiconductor integrated circuit of the present invention and the electronic equipment using the same have the following effects. In other words, since the rectifier / capacitor pair is completely dielectrically separated in the charge pump type or switched capacitor type booster circuit, boosting at a high magnification from several volts to several hundred volts, which was impossible with monolithic so far. Semiconductor integrated circuit devices can be used.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view of a rectifier / capacitor pair showing a semiconductor integrated circuit device according to a first embodiment of the present invention;
FIG. 2 is a schematic plan view of an electrode showing the semiconductor integrated circuit device of the first embodiment.
FIG. 3 is a schematic circuit diagram showing one rectifier / capacitor pair (hereinafter sometimes referred to as a pair) of a charge pump type booster circuit showing the semiconductor integrated circuit device of the first embodiment;
FIG. 4 is a schematic cross-sectional view of a rectifier / capacitor pair showing a semiconductor integrated circuit device according to a second embodiment of the present invention;
FIG. 5 is a schematic plan view of electrodes showing a semiconductor integrated circuit device according to a second embodiment;
FIG. 6 is a schematic circuit diagram of a charge pump system that is a booster circuit that does not use a conventional transformer.
FIG. 7 is a schematic diagram showing inversion of CK and CK in a conventional booster circuit.
FIG. 8 is a schematic circuit diagram in which a conventional charge pump circuit is configured using MOS transistors.
FIG. 9 is a schematic diagram showing a conventional general MOS transistor.
FIG. 10 is a circuit diagram showing a schematic principle configuration of a conventional Fibonacci type switched capacitor booster circuit;
FIG. 11 is a schematic circuit diagram of an example of a conventional EL element driving circuit.
FIG. 12 is a schematic cross-sectional view showing a conventional semiconductor integrated circuit device using PN junctions arranged on a single substrate.
FIG. 13 is a schematic circuit diagram of a conventional semiconductor integrated circuit device using PN junctions arranged on a single substrate in a discrete manner.
FIG. 14 is a schematic circuit diagram considering the actual operation of a conventional semiconductor integrated circuit device using PN junctions arranged on a single substrate.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 11 Anode electrode 12 Cathode electrode 13 Wiring 14 CK electrode 15 Si substrate 16 SiO2 insulating layer 17 Locos oxide film 18 Si layer 19 N + type layer 20 P + type layer

Claims (1)

A rectifying element having a first electrode as an anode and a second electrode as a cathode, a capacitor having a first electrode and a second electrode, and a structure in which the second electrode of the rectifying element and the second electrode of the capacitor are connected. The rectifying element and the capacitor pair are formed of a plurality of pairs such that the second electrode of the rectifying element is connected to the first electrode of a different pair of rectifying elements, and the first electrodes of the capacitors are connected in pairs. In the electronic device having the booster circuit formed by connecting the first and second electrodes in series, the first electrode of the rectifying element is provided on each of the P-type semiconductor films provided on the support substrate via the insulating film and insulated from each other. and the P + -type layer but connected, the N + -type layer and a second electrode thereof is coupled to the rectifying element is provided, yet, a second electrode of the rectifying element is a second electrode of the capacitor, the N + -type Formed on the layer surface And via a capacitor insulating film provided with the first electrode of the capacitor, forming a rectifying element and a capacitor, and the rectifier element and a diode, characterized in that the periphery of the N + -type layer, surrounded by a P-type impurity region Electronic equipment.