JP4159414B2 - Data conversion apparatus, data correction method, and program thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a data conversion device, a data correction method, and a program thereof, and more particularly to a data conversion device, a data correction method, and a program thereof that correct a bit shift in a range of 1 octet of transmission data.
[0002]
[Prior art]
Conventionally, each specification such as ALL1 (ALL type 1) or AAL2 (ALL type 2) has been adopted in AAL (ATM Adaptation Layer) in order to realize ATM (Asynchronous Transfer Mode) transfer in 3G mobile networks. .
[0003]
FIG. 7 is a diagram showing a configuration of a conventional mobile communication system.
As shown in FIG. 7, when performing 32K data communication between UEs (User Equipment) such as mobile phones, the transmitting UE transmits to the transmitting MGW via UTRAN (Universal Terrestrial Radio Access Network).
The TC (Trans Coder) included in the transmission side MGW (Media Gateway) is ITU-TI. The AAL2 cell from the transmission side UE is converted into an AAL1 cell by the method defined in 460.
The transmission side MGW transmits the converted AAL1 cell data to the reception side MGW via the Core Network with a payload of 47 octets.
The receiving side MGW that has received AAL1 returns the received AAL1 to AAL2 again and sends it to the receiving side UE via UTRAN.
[0004]
FIG. 8 is a diagram showing a cell format of AAL1.
As shown in FIG. 8, the AAL1 cell includes an ATM header (5 bytes), a SAR-PDU header (1 byte), and a payload (payload: 47 bytes).
The SAR-PDU header is composed of CSI (Convergence SubLayer: 1 Bit), SC (Sequence Count: 3 Bit), CRC (Cyclic Redundancy Check: 3 Bit), and P (Parity: 1 Bit).
[0005]
FIG. 9 is a diagram showing a cell format of AAL2.
As shown in FIG. 9, the AAL2 cell has a data length of 53 bytes, ATM header (5 bytes), STF (start field: 1 byte), CPS-PH (3 bytes), and payload (payload). : Arbitrary data length) and PAD (padding: 0 to 47 bytes).
[0006]
As a prior art related to data transfer using cells of the AAL1 format as described above, there is an AAL1 cell bandwidth control system disclosed in Patent Document 1. In Patent Document 1, when the number of bytes of received data is monitored and it is detected that the boundary position of the frame of received data is earlier than the internal frame counter cycle, the deficient data is supplemented with dummy data.
[0007]
In the CLAD device disclosed in Patent Document 2, data of a code sequence having a code length that is neither a multiple of 8 nor a divisor is inserted into a CS indication bit in a SAR-PDU header in an AAL1 cell. As a result, bit missing for multiples of 8 in succession was reliably detected.
[0008]
[Patent Document 1]
JP 2001-230785 A
[Patent Document 2]
JP 2001-339395 A
[0009]
[Problems to be solved by the invention]
Conventionally, when performing 32K data communication in ATM transfer in a 3G mobile network, a gateway device (MGW: Media Gateway) provided on the 3G mobile network has a cell format between an AAL1 cell and an AAL2 cell. I was converting.
[0010]
FIG. 10 is a diagram showing format conversion between the AAL1 cell and the AAL2 cell. As shown in FIG. 10, the gateway device performs 4-bit data (fill bit, in FIG. 10) that is all binary “1” for every 4 bits of AAL2 cell data (indicated by “D” in FIG. 10). The cell data format is converted from AAL2 to AAL1. Conversely, the gateway device converts the cell data format from AAL1 to AAL2 by removing the fill bit from the AAL1 cell data.
Thus, for example, if the data length of the AAL1 cell is 160 octets, the data length of the AAL2 cell is 80 octets.
[0011]
As described above, I.I. When 32K data communication speed-matched by the 460 method is performed, the following problems occur when data is lost due to a data communication failure or the like.
Even if AAL2 data is lost, the MGW must always transmit the AAL1 cell at the same timing. Accordingly, when there is no AAL2 data, the transmitting MGW transmits AAL1 cell data (fill) supplemented with “1”.
At this time, when the receiving side MGW receives an AAL1 cell filled with an odd number of cells, or when the first received AAL1 cell is an odd numbered cell, the payload portion of the AAL1 cell as shown in FIG. Is 47 bytes, a 4-bit shift occurs in the restored AAL2 data.
[0012]
FIG. 11 is a diagram showing cell format conversion processing from AAL1 to AAL2 by the gateway device. Hereinafter, a cell format conversion process when data transmission is performed normally and when an AAL2 data cell is missing (abnormal) will be described with reference to FIG.
[0013]
The left side of FIG. 11 shows a case where there is no data loss and data transmission is performed normally.
Further, the right side of FIG. 11 shows a case where AAL2 cell data sent from the transmission side is missing. The right side of FIG. 11 shows the AAL1 cell converted from the AAL2 cell from which the data bits are missing, and the AAL2 cell converted again.
[0014]
Hereinafter, cell data conversion at the time of data loss will be described using the right side of FIG.
Here, when AAL2 cell data (D1 to D188) for one AAL1 cell (47 octets) is missing from the transmitting UE to the transmitting MGW, the transmitting MGW is as shown in FIG. Then, a fill bit of 4 bits is inserted for every 4 bits of data after D189 of the received AAL2 cell data, and AAL1 cell data is generated and transmitted to the receiving side.
As shown in FIG. 10, the receiving-side MGW converts the AAL1 cell data into AAL2 cell data by removing the fill bit of 4 bits for each data bit of 4 bits. At this time, since the first data bit is D189, D189 to D196 are the 1st octet.
At this time, when the normal and abnormal AAL2 cell data converted by the receiving side MGW are compared in the range of 1-oct bit string, the payload of the AAL1 cell data is odd as shown in the right side of FIG. Since it is composed of oct (47 oct), each data bit at the time of abnormality is shifted by 4 bits as compared with the time of normal. For example, the data bit of D189 is located at the 5th bit in the range of 1 oct when normal, and is located at the 1st bit shifted by 4 bits when abnormal.
[0015]
As described above, there is a possibility that data resynchronization becomes difficult due to a 4-bit shift in data bits of AAL2 cell data during transmission and reception.
[0016]
In Patent Document 1, dummy data is supplemented to the missing portion of the AAL1 cell to suppress the data shift. However, in order to realize this, a counter that performs down-counting by loading the value of the frame period to be used is provided. Was necessary. Further, Patent Document 1 did not assume data loss resulting from data loss and format conversion.
[0017]
Further, Patent Document 2 detects a bit loss of a multiple of 8 in succession, and does not disclose a configuration for solving the above-described problem caused by a 4-bit bit loss.
[0018]
The present invention has been made in view of the above problems, and an object of the present invention is to provide a data conversion device, a data correction method, and a program for correcting a bit shift caused by data loss and format conversion.
[0020]
[Means for Solving the Problems]
In order to achieve such an object, the present invention provides an I.D. In a system that performs speed matching using the 460 method, 4 bits of a fill bit composed of binary 1 is inserted for each 4 bits of the received AAL2 cell data, and the fill bit is inserted. Converts AAL2 cell data to AAL1 cell data that specifies that the payload is 47 octets And send An AAL2 cell receiving means for receiving AAL2 cell data, and a fill for generating AAL1 data in which a payload is supplemented with a fill bit composed of binary 1 in response to interruption of AAL2 cell data reception. A data generation means, a fill data counting means for counting the number of AAL1 data generated by the fill data generation means, and the received AAL2 cell when the number of fill data counted by the fill data counting means is an odd number Fill bit insertion means for inserting a 4-bit fill bit into data, AAL2 cell data into which AAL2 cell data into which the fill bit has been inserted is converted to AAL1 cell data, and AAL1 cell transmission for transmitting AAL1 cell data converted by the conversion means And means.
[0021]
Further, according to the present invention, the fill bit inserting means, when the number of fill data counted by the fill data counting means is an odd number, fills a 4-bit fill at the head of the AAL2 cell data received first after interruption of reception. It is characterized by inserting a bit.
[0023]
Moreover, according to the present invention, I.I. In a system that performs speed matching using the 460 method AAL1 cell data that specifies that the payload is 47 octets In contrast, the AAL1 cell data in which the 4-bit inserted bit is removed every 4 bits of the AAL1 cell data, and the fill bit is removed. Is a data conversion device for converting AAL1 cell data into AAL1 cell data, AAL1 cell receiving means for receiving AAL1 cell data, and AAL1 cell data first received by the AAL1 cell receiving means Stipulated in ITU-T recommendation A sequence count detecting means for detecting a sequence count, and a fill bit inserting means for inserting a 4-bit fill bit composed of a binary number 1 into AAL1 cell data when the value detected by the sequence count detecting means is an odd number. A conversion means for converting the AAL1 cell data in which the fill bit is inserted into AAL2 cell data, and an AAL2 cell transmission means for transmitting the AAL2 cell data converted by the conversion means.
[0024]
Further, according to the present invention, the fill bit insertion means, when the value detected by the sequence count detection means is an odd number, is filled with a binary 1 at the head of the first received AAL1 cell data. It is characterized by inserting 4 bits of bits.
[0025]
Moreover, according to the present invention, I.I. In a system that performs speed matching using the 460 method, 4 bits of a fill bit composed of binary 1 is inserted for each 4 bits of the received AAL2 cell data, and the fill bit is inserted. Converts AAL2 cell data to AAL1 cell data that specifies that the payload is 47 octets And send A data correction method using a data conversion apparatus, wherein the data conversion apparatus receives an AAL2 cell data and an AAL2 cell reception step, and the data conversion apparatus is composed of binary 1 in response to interruption of AAL2 cell data reception. Data generating step for generating AAL1 data in which the payload is complemented with the fill bit to be generated, a fill data counting step in which the data converter counts the number of AAL1 data generated by the fill data generating step, and a fill data counting step When the number of fill data counted according to the above is an odd number, the data converter inserts a fill bit of 4 bits into the received AAL2 cell data, and the data converter inserts the fill bit. A conversion process for converting AAL2 cell data to AAL1 cell data, and data Conversion device, characterized by having a a AAL1 cell transmission step of transmitting the AAL1 cell data converted by the conversion process.
[0026]
According to the present invention, in the fill bit insertion process, when the number of fill data counted in the fill data counting process is an odd number, the data conversion apparatus performs the first conversion of the AAL2 cell data received after the reception interruption. A 4-bit fill bit is inserted at the beginning.
[0027]
Moreover, according to the present invention, I.I. In a system that performs speed matching using the 460 method, AAL1 cell data that specifies that the payload is 47 octets In contrast, the AAL1 cell data in which the 4-bit inserted bit is removed every 4 bits of the AAL1 cell data, and the fill bit is removed. Is a data correction method using a data converter that converts AAL2 cell data into an AAL2 cell data, in which the data converter first receives the AAL1 cell data, and the data converter first performs the AAL1 cell reception step. Received AAL1 cell data Stipulated in ITU-T recommendation When the sequence count detection step for detecting the sequence count and the value detected by the sequence count detection step are odd numbers, the data conversion device inserts a 4-bit fill bit composed of binary 1 into the AAL1 cell data. Fill bit insertion step, conversion step in which the data conversion device converts AAL1 cell data into which the fill bit has been inserted into AAL2 cell data, and AAL2 cell transmission step in which the data conversion device transmits the AAL2 cell data converted in the conversion step It is characterized by having.
[0028]
Further, according to the present invention, in the fill bit insertion step, when the value detected by the sequence count detection step is an odd number, the data conversion apparatus adds a binary 1 to the head of the first received AAL1 cell data. It is characterized in that 4 bits are inserted for a fill bit composed of
[0029]
Moreover, according to the present invention, I.I. In a system that performs speed matching using the 460 method, 4 bits of a fill bit composed of binary 1 is inserted for each 4 bits of the received AAL2 cell data, and the fill bit is inserted. Converts AAL2 cell data to AAL1 cell data that specifies that the payload is 47 octets And send A program for causing a computer to execute processing, and the payload is supplemented with a fill bit composed of binary 1 in response to AAL2 cell reception processing for receiving AAL2 cell data and interruption of AAL2 cell data reception When the fill data generation process for generating AAL1 data, the fill data count process for counting the number of AAL1 data generated by the fill data generation process, and the number of fill data counted by the fill data count process are odd numbers A fill bit insertion process for inserting a 4-bit fill bit into the received AAL2 cell data, a conversion process for converting the AAL2 cell data with the fill bit inserted into AAL1 cell data, and the AAL1 cell data converted by the conversion process AAL1 cell transmission processing for transmitting Characterized in that to execute the Yuta.
[0030]
Further, according to the present invention, the fill bit insertion process is performed when the number of fill data counted by the fill data counting process is an odd number, and a 4-bit fill is added to the head of the AAL2 cell data received first after the reception is interrupted. It is characterized by inserting a bit.
[0031]
Moreover, according to the present invention, I.I. In a system that performs speed matching using the 460 method, AAL1 cell data that specifies that the payload is 47 octets In contrast, the AAL1 cell data in which the 4-bit inserted bit is removed every 4 bits of the AAL1 cell data, and the fill bit is removed. Is a program for causing a computer to execute a process of converting AAL2 cell data into AAL1 cell data, AAL1 cell reception processing for receiving AAL1 cell data, and AAL1 cell data received first by the AAL1 cell reception processing Stipulated in ITU-T recommendation A sequence count detection process for detecting a sequence count, and a fill bit insertion process for inserting a 4-bit fill bit composed of a binary number 1 into AAL1 cell data when the value detected by the sequence count detection process is an odd number. The computer is caused to execute a conversion process for converting the AAL1 cell data in which the fill bit is inserted into AAL2 cell data, and an AAL2 cell transmission process for transmitting the AAL2 cell data converted by the conversion process.
[0032]
Further, according to the present invention, the fill bit insertion process is performed when the value detected by the sequence count detection process is an odd number, and the fill bit composed of a binary number 1 at the head of the first received AAL1 cell data. It is characterized by inserting 4 bits of bits.
[0033]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a diagram showing a configuration of a mobile communication system according to an embodiment of the present invention. As shown in FIG. 1, the mobile communication system includes UE (User Equipment) 1a, 1b, Node-B 2a, 2b, RNC (Radio Network Controller) 3a, 3b, and MSC (Mobile Services Switching Center) Server 4. 4b, MGW (Media Gateway) 5a, 5b, and IPE (In-Path Equipment) 7a, 7b.
[0034]
In this specification, a UE that transmits data is a transmitting UE, a UE that receives data is a receiving UE, an MGW connected to a UTRAN connected to the data transmitting UE is a transmitting MGW, and data reception The MGW connected to the UTRAN connected to the UE on the side is set as the receiving side MGW.
[0035]
The UEs 1a and 1b are communication terminal devices capable of 32K data communication, and may be G3 mobile bodies such as mobile phones, for example. The UEs 1a and 1b can function as both the transmission side UE and the reception side UE.
[0036]
The Node-Bs 2a and 2b are devices that perform radio communication with the UEs 1a and 1b, respectively, and may be radio base stations, for example.
[0037]
The RNCs 3a and 3b are radio network control apparatuses that perform management necessary for radio channel allocation by controlling the Node-Bs 2a and 2b connected thereto. The RNCs 3a and 3b may have layer 2 and 3 radio protocol functions such as RRC (radio resource control), RLC (radio link control), and MAC (medium access control).
[0038]
The MSC Servers 4a and 4b are mobile switching centers having functions such as setting, opening, exchanging, and moving management of data communication paths.
[0039]
The MGWs 5a and 5b are gateway devices that connect different media, and perform cell assembly, disassembly, conversion, and the like. Each of the MGWs 5a and 5b converts the AAL2 cell data received from the UTRAN side (transmission side UE side) into AAL1 cell data, and sends it to the Core Network side (reception side UE side). In addition, the MGWs 5a and 5b convert the AAL1 cell data received from the Core Network side (transmission side UE side) into AAL2 cell data, and send it to the UTRAN side (reception side UE side).
The MGWs 5a and 5b can function as both the transmission side MGW and the reception side MGW.
[0040]
Further, the MGWs 5a and 5b have TCs (Trans Coders) 6a and 6b, respectively.
The TCs 6a and 6b are devices having a protocol conversion function for communication data. Protocol conversion between AAL1 and AAL2 is performed based on 460 regulations.
FIG. 2 is a diagram showing a flow of protocol conversion processing by the TCs 6a and 6b in the embodiment of the present invention. Here, protocol conversion processing by the TCs 6a and 6b will be described by taking as an example processing for converting AAL2 cell data from the UTRAN side into AAL1 cell data.
As shown in FIG. 2, in the data received by the TCs 6a and 6b from the UTRAN side, the protocol of the upper layer of ATM is AAL type 2CPS.
First, the TCs 6a and 6b convert the AAL type 2 CPS into the AAL type 2 SSSAR and its upper layer IuUP (UTRAN Iu Interface User Plane Protocols).
Next, the TCs 6a and 6b convert the AAL type 2 SSSAR into an AAL type 1 SAR-PDU, invalidate the IuUP, and output the cell data of the AAL type 1 SAR-PDU to the Core Network side.
[0041]
In addition, the TCs 6a and 6b perform the 4-bit shift in the 32K data due to the delay of the AAL2 cell data generated between the transmission side UE and the transmission side MGW and the loss of the AAL1 cell data generated between the transmission side MGW and the reception side MGW. Fill bits are inserted during protocol conversion to correct. The process for correcting the 4-bit shift in the 32K data will be described in detail later.
[0042]
The IPEs 7a and 7b are devices that perform communication in the Core Network.
[0043]
Here, (1) when AAL2 cell data delay occurs between the transmission side UE and the transmission side MGW, and (2) when AAL1 cell data loss occurs between the transmission side MGW and the reception side MGW. Data correction processing by the MGWs 5a and 5b for the generated 32-bit data shift of 4 bits will be described.
[0044]
(1) When a delay of AAL2 cell data occurs between the transmitting side UE and the transmitting side MGW
AAL1 is a protocol for performing data transmission at a constant speed. Therefore, when a delay of AAL2 cell data occurs between the transmission side UE and the transmission side MGW, the transmission side MGW generates an AAL1 cell supplemented with a fill bit instead of a data bit that was not received due to the delay, It is sent out on the Core Network.
[0045]
FIG. 3 is a diagram showing AAL1 cell data and restored AAL2 cell data when a delay of AAL2 cell data occurs between the transmitting UE and the transmitting MGW in an embodiment of the present invention.
The left side of FIG. 3 shows the conventional protocol conversion from AAL1 to AAL2 when AAL2 cell data delay occurs, and the right side shows the protocol conversion from AAL1 to AAL2 in the present embodiment when AAL2 cell data delay occurs. Is shown.
[0046]
As shown in the left side of FIG. 3, when the AAL1 cell data (47 oct) of the second cell is complemented with a fill bit due to delay occurrence, for example, the receiving side MGW fills in every 4 bits. Bit 4 Bit is removed and conversion to AAL2 is performed. At this time, the receiving side MGW performs conversion to 23.5 oct AAL2 cells, and further adds a fill bit of 0.5 oct (4 bits) to generate 24 oct AAL2 cell data.
As a result, compared to the AAL2 cell at the time of transmission, the data bits of the AAL2 cell at the time of restoration (at the time of reception) are relatively shifted by 4 bits in the range of 1 oct, and it is difficult to synchronize data reception at the receiving side UE Become.
In this way, when data for an odd number of AAL1 cells is delayed, a 4-bit shift of data occurs.
[0047]
In this embodiment, the transmitting MGW previously counts the number of AAL1 cell transmissions filled with the AAL2 data delay when converting the received AAL2 cell data into AAL1 cell data. When the number of transmissions of the AAL1 cell constituted by the counted fill bits is an odd number, the transmission side MGW inserts a 4-bit fill bit into the converted AAL2 cell as shown in the right side of FIG. 3 and sends it to the Core Network. Send it out.
As a result, it is possible to suppress the occurrence of a 4-bit shift at the time of restoration to the AAL2 cell in the receiving side MGW, and synchronization of data reception in the receiving side UE is facilitated.
[0048]
(2) When AAL2 cell data is missing between the transmitting MGW and the receiving MGW
As shown in FIG. 8, the SAR-PDU header of the AAL1 cell is provided with an SC (sequence count) by numbers (0 to 7) indicating cell reception continuity. The SC of the AAL1 cell is 0, 1, 2, 3, 4, 5, 6, 7, 0, 1,. . . It becomes.
[0049]
FIG. 4 is a diagram showing AAL1 cell data and restored AAL2 cell data when AAL1 cell data is missing between the transmitting MGW and the receiving MGW in an embodiment of the present invention.
4 shows a conventional protocol conversion from AAL1 to AAL2 when AAL1 cell data is missing, and the right row shows protocol conversion from AAL1 to AAL2 in this embodiment when AAL1 cell data is missing. Is shown.
[0050]
The left side of FIG. 4 shows that the first bit of AAL2 cell data after restoration (after reception) is the data bit “D189 due to the lack of AAL1 cell data (D1 to D188: 47 oct) of the first cell on the Core Network. "Is shown.
In the left part of FIG. 4, the data bits of the AAL2 cell at the time of restoration (at the time of reception) are relatively shifted by 4 bits in the range of 1 oct as compared with the AAL2 cell at the time of transmission. Reception synchronization becomes difficult.
Thus, if an odd number of AAL1 cell data is missing from the beginning, a 4-bit shift in data occurs.
[0051]
In the present embodiment, the receiving side MGW determines whether the SC of the received first (first) AAL1 cell data is odd or even when converting the received AAL1 cell data to AAL2 cell data.
If it is determined that the SC of the first AAL1 cell is an odd number, the receiving side MGW inserts a 4-bit fill bit into the received AAL1 cell and performs conversion processing to AAL2 as shown in the right side of FIG. The converted AAL2 cell data is transmitted to the receiving side UE.
As a result, it is possible to suppress the occurrence of a 4-bit shift at the time of restoration to the AAL2 cell in the receiving side MGW, and synchronization of data reception in the receiving side UE is facilitated.
[0052]
FIG. 5 is a schematic diagram of a software configuration for causing the MGWs 5a and 5b to execute each process according to an embodiment of the present invention.
As shown in FIG. 5, the MGWs 5a and 5b execute a main process, a reception process for receiving data, and a transmission process for transmitting data by the software described above.
The main processing includes reception buffer processing, transmission buffer processing, schedule control processing, AAL2 → AAL1 conversion processing, AAL1 → AAL2 conversion processing, even / odd determination processing, and even / odd count processing. And are included.
The reception buffer process is a process for temporarily storing data received by the reception process. The transmission buffer process is a process for temporarily storing data to be transmitted by the transmission process. The schedule control process is a process for controlling the start timing of each process for AAL1 / AAL2 cell data. The AAL2 → AAL1 conversion process is a process for converting AAL2 cell data into AAL1 cell data. The AAL1 → AAL2 conversion process is a process of converting AAL1 cell data into AAL2 cell data. The even / odd determination process is a process for determining whether the SC value is even or odd. The even / odd counting process counts the number of AAL1 cell data formed by complementing the entire payload with a fill bit due to data delay, and determines whether the number of AAL1 cell data is even or odd It is.
[0053]
FIG. 6 is a flowchart showing a flow of correction processing for a 4-bit shift of 32K data according to an embodiment of the present invention. Hereinafter, with reference to FIG. 6, the correction process for the 4-bit shift of 32K data in the present embodiment will be described in detail.
[0054]
The MGWs 5a and 5b control the processing execution timing for the AAL1 / AAL2 cells. If the MGWs 5a and 5b determine that the processing execution timing for the AAL1 / AAL2 cell has been reached due to cell reception or the like, the MGWs 5a and 5b start processing execution for the received cell (step S101).
[0055]
Next, the MGWs 5a and 5b determine whether the received cell is an AAL1 / AAL2 cell (step S102).
[0056]
When it is determined that the cell type is AAL1 (step S102 / AAL1), the MGWs 5a and 5b determine whether or not the received AAL1 cell is the first AAL1 cell (step S103).
[0057]
When it is determined that the received cell is not the first AAL1 cell (step S103 / No), the process proceeds to step S110.
[0058]
When it is determined that the received cell is the first AAL1 cell (step S103 / Yes), the MGWs 5a and 5b determine whether the SC (sequence count) value of the received cell is an even number or an odd number ( Step S105).
[0059]
If it is determined that the SC value of the received cell is an even number (step S105 / even number), the process proceeds to step S110.
[0060]
When it is determined that the SC value of the received cell is an odd number (step S105 / odd number), the MGWs 5a and 5b insert a 4-bit fill bit at the head of the received AAL1 cell (step S107).
[0061]
After inserting the 4-bit fill bit, the MGWs 5a and 5b convert the received AAL1 cell data into AAL2 cell data (step S110).
[0062]
The MGWs 5a and 5b transmit the converted AAL2 cell data to the receiving side UE (step S112).
[0063]
When it is determined that the cell type is AAL2 (step S102 / AAL2), the MGWs 5a and 5b determine whether an AAL2 cell is actually received (step S104).
[0064]
When it is determined that the AAL2 cell is actually received (step S104 / Yes), the process proceeds to the conversion process to AAL1 in step S108.
[0065]
When it is determined that the AAL2 cell is not actually received due to a delay or the like (step S104 / No), the MGWs 5a and 5b transmit the payload within the period in which the cell is not received, and supplement the entire payload with fill bits. The number of ALL1 cell data is counted (step S106).
[0066]
Next, the MGWs 5a and 5b insert a fill bit of 4 bits for every 4 bits of the received AAL2 cell data, and convert the data into the AAL1 format (step S108).
[0067]
After the cell format conversion, the MGWs 5a and 5b determine whether the number of AAL1 cell data counted in step S106 is an even number or an odd number (step S109).
[0068]
When it is determined that the number of AAL1 cell data counted in step S106 is an even number (step S109 / even number), the MGWs 5a and 5b generate AAL1 cell data, and transmit the generated AAL1 cell data to the Core Network side. (Step S112).
[0069]
When it is determined that the number of AAL1 cell data counted in step S106 is an odd number (step S109 / odd number), the MGWs 5a and 5b add 4 bits to the head portion of the data bits received after the reception is interrupted once. Fill bits are inserted (step S111).
[0070]
After inserting the fill bit 4 bits, the MGWs 5a and 5b generate AAL1 cell data, and transmit the generated AAL1 cell data to the Core Network side (step S112).
[0071]
In this embodiment, the 4-bit shift of 32K data that occurs when the data format is converted from AAL1 to AAL2 after data loss or delay is corrected. However, by partially changing the configuration of this embodiment This is effective for correction of all data, not limited to 4-bit shift of 32K data. That is, it is effective for arbitrary bit shift in communication between arbitrary data.
[0072]
Here, the transmitted data in the second format (data type 2: AAL2 in the present embodiment) is once converted into the first format (data type 1: AAL1 in the present embodiment), and the second data is received again when received. A case of conversion to the format will be described.
[0073]
For example, if the number of bits lost during transmission of data type 1 corresponds to (8M + N) Bit (M is an integer greater than or equal to 0 and N is an integer greater than or equal to 1 and less than 7) in data type 2 restored upon reception The side MGW can correct the NBit shift by inserting the (8-N) -bit fill bit into the received AAL1 cell data in the same manner as the present embodiment.
Note that the number of missing data bits is multiplied by the number of missing cell data read from information indicating a cell number such as a sequence count, as in the present embodiment. And may be derived by converting the calculated value into a value corresponding to data type 2.
[0074]
Further, when the transmission side MGW converts data type 2 to data type 1, it inserts a fill bit for data type 2 transmission delay, and the number of inserted fill bits is the data type 2 restored at the time of reception. In the case of (8M + N) Bit (M is an integer greater than or equal to 0, N is an integer greater than or equal to 1 and less than or equal to 7), the receiving side MGW has received the fill bit of (8−N) Bit as in the present embodiment. By inserting the cell data, the NBit shift can be corrected.
The number of fill bits inserted is multiplied by the number of bits of one data type 1 payload multiplied by the number of cell data of data type 1 transmitted for synchronization when data is delayed, as in this embodiment. And may be derived by converting the calculated value into a value corresponding to data type 2.
[0075]
As described above, according to the present embodiment, when a delay of AAL2 cell data occurs in the transmitting UTRAN, the transmitting MGW transmits the number of AAL1 cells in which the entire payload is supplemented with fill bits for the delay. Count. When the number of transmissions of the AAL1 cell in which the entire payload is complemented with fill bits is an odd number, the data bits of the AAL2 cell data at the time of reception are relatively shifted by 4 bits within the range of 1 oct as compared with the time of transmission. In order to correct this 4-bit shift, the transmitting side MGW inserts a 4-bit fill bit at the head of the data bit of the AAL2 cell data received first after the data delay and performs conversion processing to the AAL1 cell data, and the Core Network side To send.
This makes it possible to correct a 4-bit shift of data bits at the time of AAL2 cell data restoration caused by data delay, and the receiving side UE can easily synchronize at the time of reception.
[0076]
Further, according to the present embodiment, the receiving side MGW detects the SC (sequence count) of the first AAL1 data received from the Core Network. Here, when the detected SC value is other than “0” (1 to 7), it indicates that a loss of AAL1 cell data has occurred on the Core Network. At this time, if the SC value is an odd number (1, 3, 5, 7), it means that an odd number of AAL1 data has been lost, and the data bit of the AAL2 cell data at the time of reception is in the range of 1 oct as compared with the time of transmission. Is relatively shifted by 4 bits. In order to correct this 4-bit shift, the receiving side MGW inserts a 4-bit fill bit at the head of the data bit of the first received AAL1 cell data, performs conversion processing to AAL2 cell data, and sends it to the UTRAN side on the receiving side. Send it out.
This makes it possible to correct a 4-bit shift of data bits at the time of AAL2 cell data restoration caused by data loss on the Core Network, and the receiving side UE can easily synchronize at the time of reception.
[0077]
The processing in the present embodiment is executed by a computer program included in the MGWs 5a and 5b. The above program is recorded on a recording medium such as an optical recording medium, a magnetic recording medium, a magneto-optical recording medium, or a semiconductor. It may be loaded from the above recording medium or may be loaded from an external device connected via a predetermined network.
[0078]
The above-described embodiment is an example of a preferred embodiment of the present invention. The embodiment of the present invention is not limited to this, and various modifications may be made without departing from the scope of the present invention. Is possible.
[0079]
【The invention's effect】
As described above, according to the present invention, it is possible to easily correct a bit shift of reception-side data due to data loss or data delay.
[Brief description of the drawings]
FIG. 1 is a diagram showing a configuration of a mobile communication system in an embodiment of the present invention.
FIG. 2 is a diagram showing a flow of protocol conversion processing by TC in one embodiment of the present invention.
FIG. 3 is a diagram illustrating AAL1 cell data and restored AAL2 cell data when a delay of AAL2 cell data occurs between the transmitting UE and the transmitting MGW in the embodiment of the present invention.
FIG. 4 is a diagram showing AAL1 cell data and restored AAL2 cell data when AAL1 cell data is missing between the transmitting MGW and the receiving MGW in the embodiment of the present invention.
FIG. 5 is a schematic diagram of a software configuration for causing an MGW to execute each process in an embodiment of the present invention.
FIG. 6 is a flowchart showing a flow of correction processing for a 4-bit shift of 32K data according to an embodiment of the present invention.
FIG. 7 is a diagram showing a configuration of a conventional mobile communication system.
FIG. 8 is a diagram showing a cell format of AAL1.
FIG. 9 is a diagram illustrating a cell format of AAL2.
FIG. 10 is a diagram showing format conversion between an AAL1 cell and an AAL2 cell.
FIG. 11 is a diagram showing cell format conversion processing from AAL1 to AAL2 by the gateway device;
[Explanation of symbols]
1a, 1b UE
2a, 2b Node-B
3a, 3b RNC
4a, 4b MSC Server
5a, 5b MGW
6a, 6b TC
7a, 7b IPE

Claims (12)

I.I. In a system that performs speed matching by using the 460 method, for a received AAL2 cell data, a 4-bit fill bit composed of binary 1 is inserted for every 4 bits of the AAL2 cell data, and the AAL2 cell in which the fill bit is inserted A data conversion device that converts data into AAL1 cell data that is specified to have a payload of 47 octets, and transmits the data.
AAL2 cell receiving means for receiving AAL2 cell data;
Fill data generating means for generating AAL1 data in which a payload is complemented with a fill bit composed of binary 1 in response to the interruption of reception of the AAL2 cell data;
Fill data counting means for counting the number of calls of AAL1 data generated by the fill data generating means;
Fill bit insertion means for inserting the 4-bit fill bit into the received AAL2 cell data when the number of fill data counted by the fill data counting means is an odd number;
Conversion means for converting the AAL2 cell data in which the fill bit is inserted into AAL1 cell data;
AAL1 cell transmission means for transmitting the AAL1 cell data converted by the conversion means;
A data conversion device comprising: The fill bit insertion means includes:
The 4-bit fill bit is inserted at the head of AAL2 cell data received first after the reception interruption when the number of fill data counted by the fill data counting means is an odd number. The data conversion apparatus according to 1 . I.I. In a system that performs speed matching using the 460 method, the fill bit inserted 4 bits for every 4 bits of the AAL1 cell data is removed from the AAL1 cell data specified to have a payload of 47 octets , and the fill bit A data conversion device that converts AAL1 cell data from which AAL2 has been removed into AAL2 cell data,
AAL1 cell receiving means for receiving AAL1 cell data;
Sequence count detecting means for detecting a sequence count defined in the ITU-T recommendation in the AAL1 cell data first received by the AAL1 cell receiving means;
When the value detected by the sequence count detection means is an odd number, a fill bit insertion means for inserting a 4-bit fill bit composed of a binary number 1 into the AAL1 cell data;
Conversion means for converting the AAL1 cell data in which the fill bit is inserted into AAL2 cell data;
AAL2 cell transmission means for transmitting the AAL2 cell data converted by the conversion means;
A data conversion device comprising: The fill bit insertion means includes:
4. When the value detected by the sequence count detection means is an odd number, 4 bits of a fill bit composed of a binary number 1 is inserted at the head of the first received AAL1 cell data. 3. The data conversion device according to 3 . I.I. In a system that performs speed matching by using the 460 method, for a received AAL2 cell data, a 4-bit fill bit composed of binary 1 is inserted for every 4 bits of the AAL2 cell data, and the AAL2 cell in which the fill bit is inserted A data correction method using a data converter that converts data into AAL1 cell data that is specified to have a payload of 47 octets, and transmits the data.
An AAL2 cell receiving step in which the data converter receives AAL2 cell data;
A fill data generation step in which the data converter generates AAL1 data in which a payload is supplemented with a fill bit composed of binary 1 in response to the interruption of reception of the AAL2 cell data;
A fill data counting step in which the data converter counts the number of AAL1 data generated by the fill data generation step;
If the number of fill data counted in the fill data counting step is an odd number, the data conversion device inserts a fill bit of 4 bits into the received AAL2 cell data;
A conversion step in which the data conversion device converts the AAL2 cell data into which the fill bit is inserted into AAL1 cell data;
An AAL1 cell transmission step in which the data conversion device transmits the AAL1 cell data converted by the conversion step;
A data correction method characterized by comprising: The fill bit insertion step includes
When the number of fill data counted in the fill data counting step is an odd number, the data converter inserts the 4-bit fill bit at the head of the AAL2 cell data received first after the reception interruption. The data correction method according to claim 5 . I.I. In a system that performs speed matching using the 460 method, the fill bit inserted 4 bits for every 4 bits of the AAL1 cell data is removed from the AAL1 cell data specified to have a payload of 47 octets , and the fill bit A data correction method using a data conversion device for converting AAL1 cell data from which AAL1 has been removed into AAL2 cell data,
An AAL1 cell receiving step in which the data converter receives AAL1 cell data;
A sequence count detection step in which the data converter detects a sequence count defined in the ITU-T recommendation in the AAL1 cell data first received by the AAL1 cell reception step;
When the value detected by the sequence count detection step is an odd number, the data conversion device inserts a 4-bit fill bit composed of binary numbers 1 into the AAL1 cell data;
A conversion step in which the data conversion device converts the AAL1 cell data into which the fill bits are inserted into AAL2 cell data;
An AAL2 cell transmission step in which the data conversion device transmits the AAL2 cell data converted by the conversion step;
A data correction method characterized by comprising: The fill bit insertion step includes
When the value detected by the sequence count detection step is an odd number, the data converter inserts a 4-bit fill bit composed of binary 1 at the head of the first received AAL1 cell data. The data correction method according to claim 7 . I.I. In a system that performs speed matching by using the 460 method, for a received AAL2 cell data, a 4-bit fill bit composed of binary 1 is inserted for every 4 bits of the AAL2 cell data, and the AAL2 cell in which the fill bit is inserted A program for causing a computer to execute a process of converting data to AAL1 cell data whose payload is 47 octets and transmitting the data,
AAL2 cell reception processing for receiving AAL2 cell data;
Fill data generation processing for generating AAL1 data in which the payload is complemented with a fill bit composed of binary 1 in response to the interruption of reception of the AAL2 cell data;
A fill data counting process for counting the number of AAL1 data generated by the fill data generating process;
When the number of fill data counted by the fill data counting process is an odd number, a fill bit insertion process for inserting the 4-bit fill bit into the received AAL2 cell data;
A conversion process for converting the AAL2 cell data in which the fill bit is inserted into AAL1 cell data;
AAL1 cell transmission processing for transmitting AAL1 cell data converted by the conversion processing;
A program that causes a computer to execute. The fill bit insertion process is:
The 4-bit fill bit is inserted at the head of AAL2 cell data received first after the reception interruption when the number of fill data counted by the fill data counting process is an odd number. 9. The program according to 9 . I.I. In a system that performs speed matching using the 460 method, the fill bit inserted 4 bits for every 4 bits of the AAL1 cell data is removed from the AAL1 cell data specified to have a payload of 47 octets , and the fill bit A program for causing a computer to execute processing for converting AAL1 cell data from which AAL1 has been removed into AAL2 cell data,
AAL1 cell reception processing for receiving AAL1 cell data;
A sequence count detection process for detecting a sequence count defined in the ITU-T recommendation in the AAL1 cell data first received by the AAL1 cell reception process;
When the value detected by the sequence count detection process is an odd number, a fill bit insertion process for inserting a 4-bit fill bit composed of binary numbers 1 into the AAL1 cell data;
A conversion process for converting the AAL1 cell data in which the fill bit is inserted into AAL2 cell data;
AAL2 cell transmission processing for transmitting AAL2 cell data converted by the conversion processing;
A program that causes a computer to execute. The fill bit insertion process is:
4. When the value detected by the sequence count detection process is an odd number, 4 bits of a fill bit composed of a binary number 1 is inserted at the head of the first received AAL1 cell data. 11. The program according to 11 .

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