JP4061691B2 - Surface processing method - Google Patents

Surface processing method Download PDF

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Publication number
JP4061691B2
JP4061691B2 JP03086598A JP3086598A JP4061691B2 JP 4061691 B2 JP4061691 B2 JP 4061691B2 JP 03086598 A JP03086598 A JP 03086598A JP 3086598 A JP3086598 A JP 3086598A JP 4061691 B2 JP4061691 B2 JP 4061691B2
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Prior art keywords
sample
etching
oxide film
surface processing
power source
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JPH11233488A (en
Inventor
哲郎 小野
博史 宮崎
良二 浜崎
得男 久礼
尚文 徳永
雅之 児島
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Hitachi Ltd
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Hitachi Ltd
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Description

【0001】
【発明の属する技術分野】
本発明は表面加工方法に係り、特にプラズマを用いて半導体素子等が形成される試料の表面をエッチングするのに好適な表面加工方法に関する。
【0002】
【従来の技術】
半導体素子のエッチングに広く用いられている装置は、プラズマを利用する装置である。ここではそのうちの一つであるECR(電子サイクロトロン共鳴)方式と呼ばれる装置を例に取り従来技術を説明する。この方式では、外部より磁場を印加した真空容器中でマイクロ波によりプラズマを発生する。磁場によりプラズマ中の電子にはローレンツ力が働くために、電子は磁力線の回りを回転運動する(サイクロトロン運動)。この回転の周波数とマイクロ波の周波数を同じにすると共鳴が生じ、効率良くプラズマを発生できる。試料に入射するイオンを加速するために、試料には高周波電圧が印加される。プラズマとなるガスには塩素やフッ素などのハロゲンガスが用いられる。
【0003】
このような装置の高精度化を図るために、特開平6-151360号公報に記載の技術が知られている。本技術は、試料に印加する高周波電圧のオン−オフを間欠的に制御することにより、エッチングしたい物質であるSiと下地酸化膜との選択比を高くしている。
【0004】
【発明が解決しようとする課題】
近年の半導体素子の微細化に伴い、MOS(metal oxide semiconductor)トランジスタではゲート酸化膜の厚さが薄くなり、256M以降のメモリ素子では6nm以下になる。このようにゲート酸化膜の薄膜化が進むと素子のエッチング工程では、これまで以上の選択比が必要になる。しかし、選択比を高くすると一般には加工速度が遅くなりかつエッチ残りも生じ易くなるという問題がある。
【0005】
本発明の目的は、プラズマを用いた半導体のエッチングにおいて、多結晶シリコンのエッチ速度の低下とエッチ残りの発生を抑え、かつ高い対酸化膜選択比を保つことのできる表面加工方法を提供することにある。
【0006】
【課題を解決するための手段】
上記目的は、表面加工において、表面加工開始から終了までを複数のステップに分けて、かつそれらのステップを加工を終了させる下地物質との加工速度比が比較的小さい前半と、比較的大きい後半の2つに分け、少なくとも後半のステップの一つで、高周波電圧をオンとオフの期間に分け繰り返し試料に印加することにより、達成される。
【0007】
【発明の実施の形態】
〔実施例1〕
以下、本発明の実施例を図により説明する。
【0008】
図1(a)は本発明を適用するプラズマエッチング装置の全体構成図である。マイクロ波電源101から導波管102と導入窓103を介して真空容器104内にマイクロ波が導入される。導入窓103の材質は石英、セラミックなど電磁波を透過する物質である。真空容器104の回りには電磁石105が設置されており、磁場強度はマイクロ波の周波数と電子のサイクロトロン周波数が同じになるように設定されて、たとえば周波数が2.45GHzならば磁場強度は875Gaussである。この磁場強度で高密度のプラズマ106が発生する。試料107は試料台108の上に設置される。試料に入射するイオンを加速するために、高周波電源109が試料台108に接続されている。高周波電源の周波数に特に制限はないが、通常では周波数は200kHzから20MHzの範囲が実用的である。高周波電源109の電圧波形110は図1(b)のように、オンとオフの期間を繰り返し制御できるようになっている。
【0009】
図2には、図1の装置を用いて半導体表面のラインとスペースからなる微細パタンを2つのステップに分けてエッチングした場合の断面形状の時間変化を示す。エッチングした素子の構造は、シリコン基板201上のゲート酸化膜202の厚さが4nm、多結晶シリコン層203の厚さ300nm、レジスト204の厚さが1μmでスペースの幅は0.35μmである。図2(a)は初期状態、(b)はステップ1終了後、(c)はステップ2終了後をそれぞれ示す。ステップ1では、まず多結晶シリコン203をエッチングする。ステップ1は加工の主要部分を占め、以後メインエッチと呼ぶ。エッチングのガスはCl2(75 sccm)と酸素(5 sccm)で圧力を0.4Paとした。マイクロ波電源101の出力を400Wとした。高周波電源109の周波数は、この場合、800k Hzである。このステップでは多結晶シリコンを高速かつエッチ残りがないようにエッチングすることが目的なので、高周波電源109の出力は連続で80Wにしている。多結晶シリコンのエッチ速度は高周波の電力と共に増加する。また、エッチ残りは多結晶シリコン上の自然酸化膜などエッチングしにくい異物がマスクとなって、その下の部分がエッチ残りとなる。このような異物も高周波の電力を上げると除去される。 従って、加工速度を上げてエッチ残りが出ないようにするためには、ある程度大きい高周波電力が必要となる。しかし高周波電力が大きいと下地酸化膜との選択比が低くなるために、このままエッチングを進めると下地酸化膜がエッチングされて、素子の不良につながる。これを防ぐためには、ある段階で選択比が高い条件に切り替えてやれば良い。ここではステップ2で高周波電圧の振幅は変えずにオンオフ制御した。オンオフの繰り返し周波数は1kHzとした。このように、メインエッチ後の比較的選択比が高いエッチングを以後オーバエッチと呼ぶ。ステップ2で高周波電源をオンオフ制御することにより、図2(c)に示すように、エッチ残りなくかつ下地酸化膜を十分残して加工が可能になる。
【0010】
ステップ1とステップ2の切り替えは、Si原子の発光強度をモニターし、発光強度が落ちはじめたら、あるいは発光強度曲線の変極点(2次微分が0になる点)で切り替えるとよい。また、下地酸化膜が薄い場合は、あらかじめ多結晶シリコンのエッチングが終了する時間を測定しておき、その少し手前で切り替える方法でも良い。
【0011】
選択比を高くするためには、単に電力を下げる方法もある。しかし、下地酸化膜202が4nmのように薄くなるとより選択比を上げる必要があり、単に電力を下げると多結晶シリコンのエッチ速度が低下してエッチ残りも生じ易くなる。本発明のように高周波電源109の出力をオンオフ制御すると、多結晶シリコンのエッチ速度は落とさず選択比を上げることができる。その様子を図3に示す。図3の横軸は多結晶シリコンのエッチ速度で縦軸は多結晶シリコンと酸化膜の選択比である。図中点Aは連続80Wの値で、曲線301は連続電力の値を小さくした場合、曲線302は電圧振幅一定でオンオフ制御してそのデューティー比(オン−オフの1周期に占めるオン期間の割合)を小さくした場合を示す。高周波をオンオフ制御する方が連続電力と比較して同じ多結晶シリコンエッチ速度でも選択比が高くなる。この原因は以下のように推定できる。酸素あるいは酸素を含む反応生成物が付着すると酸化膜のエッチ速度は低下する。一方、多結晶シリコンのエッチ速度は酸素の付着量がある程度までは低下しない。高周波電源をオンオフ制御するとオフ期間にはイオンは加速されず、酸素あるいは反応生成物の堆積だけが生じる。オン期間にはイオンが加速され表面に入射するが、オフ期間の堆積物に阻害されて酸化膜のエッチ速度が低下して選択比があがる。
【0012】
図3よりオンオフ制御の効果をより高くするためには、デューティー比を30%以下にすれば良いことが分かる。またオン−オフの繰り返し周波数は100Hzから10kHzの間が適当である。周波数がこれより低くなると、オンオフ制御したことの効果が徐々に低くなる結果となった。また、繰り返し周波数が高いと高周波電源109の製作が技術的に難しくなる。
【0013】
なお、同じエッチ速度を得るために必要な高周波電源109の電力の値は、装置の種類や高周波の周波数によって大きく異なるが、どの場合でも酸化膜のエッチ速度はデューティー比に比例する。従って、装置構造などが変わると図3の電力の絶対値は変わるが、デューティー比と選択比の関係は成り立つために、デューティー比30%以下という数値はどの場合にも当てはまる。
【0014】
以上の実施例では2つのステップでエッチングする方法を述べたが、被エッチング物質が金属、あるいは金属とシリコンの化合物などの多層構造でも、ステップの数を増してかつ下地部分が露出する直前あるいは直後に、高周波電源をオンオフ制御することで、エッチ残りを抑えると同時に高選択比を保つことができる。また、試料の構造によってはオーバエッチの部分をさらに複数のステップに分けても良い。
【0015】
〔実施例2〕
図4は本発明を適用する別の装置構造で、この装置では数百kHzから数十M Hzのいわゆるラジオ波帯(以後rfと呼ぶ)の周波数で誘導結合によりプラズマを発生させる。真空容器401はアルミナや石英などの電磁波を透過する物質でつくられている。その回りに、プラズマ403を発生させるための電磁コイル402が巻いてある。コイルにはrf電源404が接続されている。真空容器401内には試料台408がありその上に試料407が置かれ、高周波電源409が接続されている。真空容器401には上蓋405がついているがこれは一体型でもかまわない。
【0016】
この装置でも、この装置でも加工を複数のステップに分けてオーバエッチで高周波電源409をオンオフ制御することでエッチ残りを抑えてかつ選択比を高く保つことができる。
図4に示す装置では、電磁コイル402は上蓋405の上に設置されていても効果は同じである。
【0017】
〔実施例3〕
図5は本発明を適用する別の装置構造で、この装置ではrf電力の容量結合によりプラズマを発生させる。真空容器501内には2枚の電極502、505が平行に配置してある。電極にはそれぞれrf電源503と高周波電源506が接続してある。試料504は試料台をかねる電極505の上におかれる。ガスは試料と対向した電極502に開いた穴から導入管508を通して容器内に入れられる。プラズマ507は2枚の電極の間で発生する。
【0018】
この装置でも、この装置でも加工を複数のステップに分けてオーバエッチで高周波電源506をオンオフ制御することでエッチ残りを抑えてかつ選択比を高く保つことができる。
【0019】
〔実施例4〕
次に、オーバエッチでさらに高い選択比を実現する方法を述べる。図6は被加工物のマスクをレジストではなく酸化膜にした場合の多結晶シリコンのエッチ速度と選択比の関係を示す。点Aは高周波電力が連続80Wの値で、曲線601は連続で電力を小さくした値、曲線602は電圧振幅一定でオンオフ制御でデューティー比を小さくした場合の値である。図3と比較してオンオフ制御することにより、選択比がさらに最大50%程度上がることが分かる。この理由はレジスト中に含まれる炭素原子を排除したことによる。先に述べたように、バイアスをオンオフ制御すると高周波がオフの期間に酸化膜上に反応生成物や酸素原子が堆積して酸化膜のエッチ速度を低下させるが、同時に炭素原子あるいは炭素を含む反応生成物も堆積する。これらの物質は酸化膜のエッチ速度を高める性質があることが知られている。このために、オンオフ制御の効果を低くしてしまう。マスク材に酸化膜のような炭素を含まない物質を用いることにより、バイアスがオフ期間の炭素の付着がなくなり、より高い選択比が得られる。炭素を含まないマスク材としては他に窒化シリコンなどがある。
【0020】
以上、本実施例によれば、下地の酸化膜が露出するまでを高速で加工することで加工時間を短縮できる。かつ、下地が露出する直前あるいは直後から、試料に加える高周波をオンオフ制御することで、連続電力を印加した場合と比べて、エッチ速度の低下を抑えつつ高い選択比を保つことができる。従って、エッチ残りも抑えられる。
【0021】
【発明の効果】
本発明によれば、多結晶シリコンのエッチングにおけるエッチ速度の低下あるいはエッチ残りの発生を抑えて、かつ高い対酸化膜選択比を保ち、半導体素子の加工を行うことができるという効果がある。
【図面の簡単な説明】
【図1】本発明の表面加工方法を実施するための装置の一実施例を示す全体構成図である。
【図2】図1の装置による半導体試料の処理断面を示す図である。
【図3】多結晶シリコンエッチ速度と選択比との関係を示す図である。
【図4】本発明の表面加工方法を実施するための装置の他の実施例を示す全体構成図である。
【図5】本発明の表面加工方法を実施するための装置のさらに他の実施例を示す全体構成図である。
【図6】多結晶シリコンエッチ速度と選択比との関係を示す図である。
【符号の説明】
101…マイクロ波電源、102…導波管、103…導入窓、104,401,501…真空容器、105…磁石、106,403,507…プラズマ、107,407,504…試料、108,408…試料台、109,409,506…高周波電源、110…電圧波形、201…シリコン基板, 202…酸化膜, 203 …多結晶シリコン、204…レジスト、301,302,601,602…曲線、402…電磁コイル、404,503…rf電源、405…上蓋、502,505…電極、508…ガス導入管。
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a surface processing method, and more particularly to a surface processing method suitable for etching a surface of a sample on which a semiconductor element or the like is formed using plasma.
[0002]
[Prior art]
An apparatus widely used for etching semiconductor elements is an apparatus using plasma. Here, the prior art will be described taking an example of an apparatus called an ECR (electron cyclotron resonance) system, which is one of them. In this method, plasma is generated by microwaves in a vacuum container to which a magnetic field is applied from the outside. Since the Lorentz force acts on the electrons in the plasma due to the magnetic field, the electrons rotate around the magnetic field lines (cyclotron motion). When the rotation frequency and the microwave frequency are the same, resonance occurs and plasma can be generated efficiently. In order to accelerate ions incident on the sample, a high frequency voltage is applied to the sample. A halogen gas such as chlorine or fluorine is used as the plasma gas.
[0003]
In order to improve the accuracy of such an apparatus, a technique described in Japanese Patent Laid-Open No. 6-151360 is known. In this technique, the selection ratio between Si, which is a substance to be etched, and the base oxide film is increased by intermittently controlling on / off of the high-frequency voltage applied to the sample.
[0004]
[Problems to be solved by the invention]
With the recent miniaturization of semiconductor elements, the thickness of the gate oxide film is reduced in MOS (metal oxide semiconductor) transistors, and it is 6 nm or less in memory elements of 256 M and later. As the gate oxide film becomes thinner in this way, a higher selection ratio is required in the element etching process. However, when the selection ratio is increased, there is a problem that the processing speed is generally reduced and etching residue is likely to occur.
[0005]
SUMMARY OF THE INVENTION An object of the present invention is to provide a surface processing method capable of suppressing a decrease in the etching rate of polycrystalline silicon and the generation of residual etching and maintaining a high oxide film selectivity in etching a semiconductor using plasma. It is in.
[0006]
[Means for Solving the Problems]
In the surface processing, the surface processing is divided into a plurality of steps from the start to the end of the surface processing, and the first half in which the processing speed ratio with the base material to finish the processing is relatively small and the second half in which the processing is relatively large. This is achieved by dividing it into two and applying it to the sample repeatedly in at least one of the latter steps, dividing the high frequency voltage into on and off periods.
[0007]
DETAILED DESCRIPTION OF THE INVENTION
[Example 1]
Embodiments of the present invention will be described below with reference to the drawings.
[0008]
FIG. 1A is an overall configuration diagram of a plasma etching apparatus to which the present invention is applied. A microwave is introduced into the vacuum vessel 104 from the microwave power source 101 through the waveguide 102 and the introduction window 103. The material of the introduction window 103 is a substance that transmits electromagnetic waves, such as quartz or ceramic. An electromagnet 105 is installed around the vacuum vessel 104, and the magnetic field strength is set so that the microwave frequency and the electron cyclotron frequency are the same. For example, if the frequency is 2.45 GHz, the magnetic field strength is 875 Gauss. . A high-density plasma 106 is generated with this magnetic field strength. The sample 107 is set on the sample stage 108. A high frequency power source 109 is connected to the sample stage 108 to accelerate ions incident on the sample. There is no particular limitation on the frequency of the high-frequency power supply, but normally the frequency is practically in the range of 200 kHz to 20 MHz. The voltage waveform 110 of the high-frequency power source 109 can be repeatedly controlled between on and off periods as shown in FIG.
[0009]
FIG. 2 shows a change in cross-sectional shape over time when a fine pattern composed of lines and spaces on a semiconductor surface is etched in two steps using the apparatus of FIG. The structure of the etched element is that the thickness of the gate oxide film 202 on the silicon substrate 201 is 4 nm, the thickness of the polycrystalline silicon layer 203 is 300 nm, the thickness of the resist 204 is 1 μm, and the width of the space is 0.35 μm. 2A shows the initial state, FIG. 2B shows the state after step 1, and FIG. 2C shows the state after step 2. In step 1, first, the polycrystalline silicon 203 is etched. Step 1 occupies the main part of the processing and is hereinafter referred to as main etch. The etching gas was Cl2 (75 sccm) and oxygen (5 sccm), and the pressure was 0.4 Pa. The output of the microwave power source 101 was set to 400W. In this case, the frequency of the high-frequency power source 109 is 800 kHz. Since the purpose of this step is to etch polycrystalline silicon so that there is no etching residue, the output of the high-frequency power supply 109 is continuously 80 W. The etch rate of polycrystalline silicon increases with high frequency power. Etch residue is masked by a foreign substance that is difficult to etch, such as a natural oxide film on polycrystalline silicon, and the lower portion becomes the etch residue. Such foreign matter is also removed when the high frequency power is increased. Therefore, in order to increase the processing speed so that no etching residue occurs, a certain amount of high frequency power is required. However, if the high-frequency power is large, the selection ratio with the base oxide film becomes low. Therefore, if the etching is carried out as it is, the base oxide film is etched, leading to device defects. In order to prevent this, it is only necessary to switch to a condition with a high selection ratio at a certain stage. Here, on / off control was performed in step 2 without changing the amplitude of the high-frequency voltage. The on / off repetition frequency was 1 kHz. In this way, etching having a relatively high selectivity after the main etching is hereinafter referred to as overetching. By performing on / off control of the high-frequency power source in step 2, as shown in FIG. 2 (c), it becomes possible to process without leaving an etching residue and leaving a sufficient base oxide film.
[0010]
The switching between Step 1 and Step 2 is preferably performed by monitoring the emission intensity of Si atoms, and when the emission intensity starts to drop, or at the inflection point of the emission intensity curve (the point where the second derivative becomes 0). Further, when the base oxide film is thin, it may be possible to measure the time when the etching of the polycrystalline silicon is completed in advance and switch it slightly before that.
[0011]
In order to increase the selection ratio, there is also a method of simply lowering the power. However, if the base oxide film 202 is as thin as 4 nm, the selection ratio needs to be increased. If the power is simply lowered, the etching rate of the polycrystalline silicon is lowered and the etching residue tends to occur. When the output of the high-frequency power source 109 is controlled on and off as in the present invention, the selectivity can be increased without reducing the etching rate of the polycrystalline silicon. This is shown in FIG. The horizontal axis in FIG. 3 is the etching rate of polycrystalline silicon, and the vertical axis is the selectivity between the polycrystalline silicon and the oxide film. In the figure, the point A is a continuous 80 W value, and the curve 301 is a continuous power value that is reduced, and the curve 302 is turned on and off with a constant voltage amplitude, and its duty ratio (ratio of the ON period in one on-off cycle) ) Is reduced. When the high frequency is controlled to be turned on / off, the selectivity is higher than that of continuous power even at the same polycrystalline silicon etch rate. This cause can be estimated as follows. When oxygen or a reaction product containing oxygen adheres, the etch rate of the oxide film decreases. On the other hand, the etching rate of polycrystalline silicon does not decrease to a certain extent when the amount of attached oxygen is reduced. When the on / off control of the high-frequency power source is performed, ions are not accelerated during the off period, and only oxygen or reaction products are deposited. Ions are accelerated and incident on the surface during the ON period, but are hindered by deposits during the OFF period, and the etch rate of the oxide film is reduced, thereby increasing the selectivity.
[0012]
It can be seen from FIG. 3 that the duty ratio should be 30% or less in order to further increase the effect of the on / off control. The on-off repetition frequency is suitably between 100 Hz and 10 kHz. When the frequency was lower than this, the effect of the on / off control was gradually reduced. Further, when the repetition frequency is high, it is technically difficult to manufacture the high-frequency power source 109.
[0013]
Note that the power value of the high-frequency power supply 109 necessary to obtain the same etch rate varies greatly depending on the type of device and the frequency of the high frequency, but in any case, the oxide film etch rate is proportional to the duty ratio. Accordingly, although the absolute value of the power in FIG. 3 changes when the device structure or the like changes, the relationship between the duty ratio and the selection ratio holds, so the numerical value of the duty ratio of 30% or less is applicable in any case.
[0014]
In the above embodiment, the etching method is described in two steps. However, even if the material to be etched is a metal or a multilayer structure such as a compound of metal and silicon, the number of steps is increased and immediately before or immediately after the underlying portion is exposed. In addition, by controlling on / off of the high frequency power source, it is possible to suppress the etching residue and at the same time maintain a high selection ratio. Depending on the structure of the sample, the overetched portion may be further divided into a plurality of steps.
[0015]
[Example 2]
FIG. 4 shows another apparatus structure to which the present invention is applied. In this apparatus, plasma is generated by inductive coupling at a frequency of a so-called radio wave band (hereinafter referred to as rf) of several hundred kHz to several tens of MHz. The vacuum vessel 401 is made of a material that transmits electromagnetic waves, such as alumina or quartz. Around that, an electromagnetic coil 402 for generating plasma 403 is wound. An rf power source 404 is connected to the coil. There is a sample stage 408 in the vacuum vessel 401, a sample 407 is placed on it, and a high-frequency power source 409 is connected thereto. The vacuum vessel 401 has an upper lid 405, but this may be an integral type.
[0016]
In this apparatus as well, in this apparatus, the processing is divided into a plurality of steps and the high frequency power supply 409 is controlled to be turned on / off by overetching, so that the remaining etching can be suppressed and the selection ratio can be kept high.
In the apparatus shown in FIG. 4, the effect is the same even if the electromagnetic coil 402 is installed on the upper lid 405.
[0017]
Example 3
FIG. 5 shows another apparatus structure to which the present invention is applied. In this apparatus, plasma is generated by capacitive coupling of rf power. In the vacuum vessel 501, two electrodes 502 and 505 are arranged in parallel. An rf power source 503 and a high frequency power source 506 are connected to the electrodes, respectively. The sample 504 is placed on an electrode 505 that also serves as a sample stage. The gas is introduced into the container through the introduction tube 508 from the hole opened in the electrode 502 facing the sample. Plasma 507 is generated between the two electrodes.
[0018]
In this apparatus as well, in this apparatus, the processing is divided into a plurality of steps and the high frequency power supply 506 is controlled to be turned on / off by overetching, so that the remaining etching can be suppressed and the selection ratio can be kept high.
[0019]
Example 4
Next, a method for realizing a higher selection ratio by overetching will be described. FIG. 6 shows the relationship between the etching rate of polycrystalline silicon and the selectivity when the mask of the workpiece is an oxide film instead of a resist. Point A is a value at which the high frequency power is continuously 80 W, curve 601 is a value when power is continuously reduced, and curve 602 is a value when the duty ratio is reduced by on / off control with a constant voltage amplitude. It can be seen that the selection ratio is further increased by about 50% by the on / off control as compared with FIG. This is because the carbon atoms contained in the resist are eliminated. As described above, when the bias is controlled to turn on and off, reaction products and oxygen atoms are deposited on the oxide film during the period when the high frequency is off, reducing the etch rate of the oxide film. Product is also deposited. These materials are known to have the property of increasing the etch rate of the oxide film. For this reason, the effect of on / off control is lowered. By using a material that does not contain carbon, such as an oxide film, as the mask material, there is no adhesion of carbon when the bias is off, and a higher selectivity can be obtained. Other mask materials that do not contain carbon include silicon nitride.
[0020]
As described above, according to this embodiment, the processing time can be shortened by processing at high speed until the underlying oxide film is exposed. In addition, by controlling on / off of the high frequency applied to the sample immediately before or immediately after the substrate is exposed, it is possible to maintain a high selection ratio while suppressing a decrease in etch rate as compared with the case where continuous power is applied. Accordingly, etching residue can be suppressed.
[0021]
【The invention's effect】
According to the present invention, it is possible to process a semiconductor element while suppressing a decrease in etch rate or occurrence of etching residue in etching of polycrystalline silicon and maintaining a high selectivity to oxide film.
[Brief description of the drawings]
FIG. 1 is an overall configuration diagram showing an embodiment of an apparatus for carrying out a surface processing method of the present invention.
FIG. 2 is a view showing a processing cross section of a semiconductor sample by the apparatus of FIG. 1;
FIG. 3 is a diagram showing a relationship between a polycrystalline silicon etch rate and a selection ratio.
FIG. 4 is an overall configuration diagram showing another embodiment of an apparatus for carrying out the surface processing method of the present invention.
FIG. 5 is an overall configuration diagram showing still another embodiment of the apparatus for carrying out the surface processing method of the present invention.
FIG. 6 is a graph showing the relationship between the polycrystalline silicon etch rate and the selectivity.
[Explanation of symbols]
101 ... microwave power supply, 102 ... waveguide, 103 ... introduction window, 104,401,501 ... vacuum vessel, 105 ... magnet, 106,403,507 ... plasma, 107,407,504 ... sample, 108,408 ... sample stage, 109,409,506 ... high frequency power supply, 110 ... voltage waveform, 201 DESCRIPTION OF SYMBOLS ... Silicon substrate, 202 ... Oxide film, 203 ... Polycrystalline silicon, 204 ... Resist, 301, 302, 601, 602 ... Curve, 402 ... Electromagnetic coil, 404, 503 ... rf power source, 405 ... Upper lid, 502, 505 ... Electrode, 508 ... Gas introduction pipe.

Claims (1)

プラズマ発生用電源を用いて真空容器内にプラズマを発生させる一方で、試料台に接続された高周波電源を用いて前記試料台に高周波電圧を印加し、前記試料台に設置される試料に入射するイオンを加速して前記試料の表面加工を行う表面加工方法において、
前記試料の表面加工開始から終了までを、ステップ1とステップ2の2つのステップに分け、前記ステップ2では前記高周波電源から印加される前記高周波電圧をオンとオフの期間に分けて繰り返し印加すると共に、オンの期間がオンとオフの1周期に占める割合の30%以下としたことを特徴とする表面加工方法。
While generating plasma in the vacuum vessel using a power source for generating plasma, a high frequency voltage is applied to the sample table using a high frequency power source connected to the sample table and is incident on the sample installed on the sample table. In a surface processing method for accelerating ions to perform surface processing of the sample,
The process from the start to the end of the surface processing of the sample is divided into two steps, Step 1 and Step 2. In Step 2, the high-frequency voltage applied from the high-frequency power source is repeatedly applied in ON and OFF periods. The surface processing method characterized in that the ON period is 30% or less of the ratio of the ON and OFF periods.
JP03086598A 1998-02-13 1998-02-13 Surface processing method Expired - Fee Related JP4061691B2 (en)

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