JP4046822B2 - データ・バスの動的終端ロジックのための方法および装置 - Google Patents
データ・バスの動的終端ロジックのための方法および装置 Download PDFInfo
- Publication number
- JP4046822B2 JP4046822B2 JP33873097A JP33873097A JP4046822B2 JP 4046822 B2 JP4046822 B2 JP 4046822B2 JP 33873097 A JP33873097 A JP 33873097A JP 33873097 A JP33873097 A JP 33873097A JP 4046822 B2 JP4046822 B2 JP 4046822B2
- Authority
- JP
- Japan
- Prior art keywords
- data bus
- driver
- pull
- transistor
- coupled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
- G06F13/4086—Bus impedance matching, e.g. termination
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Logic Circuits (AREA)
- Communication Control (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US763687 | 1996-12-11 | ||
| US08/763,687 US6239619B1 (en) | 1996-12-11 | 1996-12-11 | Method and apparatus for dynamic termination logic of data buses |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPH10294771A JPH10294771A (ja) | 1998-11-04 |
| JPH10294771A5 JPH10294771A5 (https=) | 2005-07-14 |
| JP4046822B2 true JP4046822B2 (ja) | 2008-02-13 |
Family
ID=25068532
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33873097A Expired - Fee Related JP4046822B2 (ja) | 1996-12-11 | 1997-12-09 | データ・バスの動的終端ロジックのための方法および装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6239619B1 (https=) |
| EP (1) | EP0848333B1 (https=) |
| JP (1) | JP4046822B2 (https=) |
| DE (1) | DE69736269D1 (https=) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6219812B1 (en) * | 1998-06-11 | 2001-04-17 | Sun Microsystems, Inc. | Apparatus and method for interfacing boundary-scan circuitry with DTL output drivers |
| US6191663B1 (en) | 1998-12-22 | 2001-02-20 | Intel Corporation | Echo reduction on bit-serial, multi-drop bus |
| US6777975B1 (en) | 1999-11-30 | 2004-08-17 | Intel Corporation | Input-output bus interface to bridge different process technologies |
| US6417688B1 (en) * | 1999-12-31 | 2002-07-09 | Intel Corporation | Method and apparatus for implementing a highly robust, fast, and economical five load bus topology based on bit mirroring and a well terminated transmission environment |
| US6519664B1 (en) | 2000-03-30 | 2003-02-11 | Intel Corporation | Parallel terminated bus system |
| US6512393B1 (en) * | 2000-11-15 | 2003-01-28 | California Micro Devices, Inc. | Method and apparatus for non-linear termination of a transmission line |
| JP3808026B2 (ja) * | 2002-10-23 | 2006-08-09 | 株式会社ルネサステクノロジ | 半導体装置 |
| KR100863536B1 (ko) * | 2007-11-02 | 2008-10-15 | 주식회사 하이닉스반도체 | 온 다이 터미네이션 제어회로 및 그 제어방법 |
| KR101796116B1 (ko) | 2010-10-20 | 2017-11-10 | 삼성전자 주식회사 | 반도체 장치, 이를 포함하는 메모리 모듈, 메모리 시스템 및 그 동작방법 |
| CN118890235B (zh) * | 2024-08-28 | 2025-07-29 | 北京星河动力装备科技有限公司 | 通信组件、通信系统以及运载火箭 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR960006286B1 (ko) * | 1987-02-25 | 1996-05-13 | 가부시기가이샤 히다찌세이사꾸쇼 | 출력 회로 |
| US4859877A (en) * | 1988-01-04 | 1989-08-22 | Gte Laboratories Incorporated | Bidirectional digital signal transmission system |
| JP2880737B2 (ja) | 1989-09-29 | 1999-04-12 | 株式会社東芝 | 平行バス終端装置 |
| US5165046A (en) | 1989-11-06 | 1992-11-17 | Micron Technology, Inc. | High speed CMOS driver circuit |
| JP2583684B2 (ja) * | 1990-11-06 | 1997-02-19 | 三菱電機株式会社 | プルダウン抵抗コントロール入力回路及び出力回路 |
| US5311081A (en) | 1992-04-01 | 1994-05-10 | Digital Equipment Corporation | Data bus using open drain drivers and differential receivers together with distributed termination impedances |
| US5347177A (en) * | 1993-01-14 | 1994-09-13 | Lipp Robert J | System for interconnecting VLSI circuits with transmission line characteristics |
| US5463326A (en) * | 1993-04-13 | 1995-10-31 | Hewlett-Packard Company | Output drivers in high frequency circuits |
| JP3189546B2 (ja) * | 1993-12-28 | 2001-07-16 | 株式会社日立製作所 | 送受信回路 |
| US5621677A (en) * | 1994-04-29 | 1997-04-15 | Cypress Semiconductor Corp. | Method and apparatus for precharging match output in a cascaded content addressable memory system |
| US5530377A (en) * | 1995-07-05 | 1996-06-25 | International Business Machines Corporation | Method and apparatus for active termination of a line driver/receiver |
| US5760601A (en) * | 1996-08-26 | 1998-06-02 | International Business Machines Corporation | Transmission line driver circuit for matching transmission line characteristic impedance |
-
1996
- 1996-12-11 US US08/763,687 patent/US6239619B1/en not_active Expired - Lifetime
-
1997
- 1997-12-09 JP JP33873097A patent/JP4046822B2/ja not_active Expired - Fee Related
- 1997-12-09 DE DE69736269T patent/DE69736269D1/de not_active Expired - Lifetime
- 1997-12-09 EP EP97309919A patent/EP0848333B1/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH10294771A (ja) | 1998-11-04 |
| EP0848333B1 (en) | 2006-07-05 |
| DE69736269D1 (de) | 2006-08-17 |
| EP0848333A2 (en) | 1998-06-17 |
| EP0848333A3 (en) | 2000-08-16 |
| US6239619B1 (en) | 2001-05-29 |
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