JP4019080B2 - Manufacturing method of liquid crystal display device - Google Patents

Manufacturing method of liquid crystal display device Download PDF

Info

Publication number
JP4019080B2
JP4019080B2 JP2005023414A JP2005023414A JP4019080B2 JP 4019080 B2 JP4019080 B2 JP 4019080B2 JP 2005023414 A JP2005023414 A JP 2005023414A JP 2005023414 A JP2005023414 A JP 2005023414A JP 4019080 B2 JP4019080 B2 JP 4019080B2
Authority
JP
Japan
Prior art keywords
film
liquid crystal
reflective electrode
crystal display
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2005023414A
Other languages
Japanese (ja)
Other versions
JP2005141250A (en
Inventor
明寿 前田
篤 山本
知英 進藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tianma Japan Ltd
Original Assignee
NEC LCD Technologies Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC LCD Technologies Ltd filed Critical NEC LCD Technologies Ltd
Priority to JP2005023414A priority Critical patent/JP4019080B2/en
Publication of JP2005141250A publication Critical patent/JP2005141250A/en
Application granted granted Critical
Publication of JP4019080B2 publication Critical patent/JP4019080B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133504Diffusing, scattering, diffracting elements
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133553Reflecting elements
    • G02F1/133555Transflectors

Description

本発明は、液晶表示装置及びその製造方法に関し、特に反射電極を有する反射型液晶表示装置もしくは反射、透過型(以下半透過型と呼ぶ)液晶表示装置及びその製造方法に関する。   The present invention relates to a liquid crystal display device and a method for manufacturing the same, and more particularly to a reflective liquid crystal display device having a reflective electrode or a reflective / transmissive (hereinafter referred to as semi-transmissive) liquid crystal display device and a method for manufacturing the same.

近年携帯、PDA用途の小型の液晶表示装置が広く普及している。これらに用いられる液晶表示装置は軽量・薄型化、低消費電力化の要求から、反射型もしくは半透過型の液晶表示装置が用いられている。   In recent years, small liquid crystal display devices for portable and PDA applications have been widely used. Reflective or transflective liquid crystal display devices are used as liquid crystal display devices used for these because of demands for light weight, thickness reduction, and low power consumption.

図24に特開2000−258787号公報(特許文献1)に示された、一般的な反射型液晶表示装置の断面図を示す。   FIG. 24 shows a cross-sectional view of a general reflective liquid crystal display device disclosed in Japanese Patent Laid-Open No. 2000-258787 (Patent Document 1).

この反射型液晶表示装置は、石英ガラス、無アルカリガラス等からなる絶縁性基板(TFT基板)110上に、スイッチング素子である薄膜トランジスタ(TFT)を形成する。まず、絶縁性基板110上にクロム(Cr)、モリブデン(Mo)等の高融点金属からなるゲート電極111、ゲート絶縁膜112、及び多結晶シリコン膜からなる能動層113を順に形成する。その能動層113には、ゲート電極111上方のチャネル113cと、チャネル113c上に設けたストッパ絶縁膜114をマスクにしてチャネル113cの両側にイオン注入して形成されるソース113s及びドレイン113dとが設けられている。   In this reflective liquid crystal display device, a thin film transistor (TFT) as a switching element is formed on an insulating substrate (TFT substrate) 110 made of quartz glass, non-alkali glass or the like. First, a gate electrode 111 made of a refractory metal such as chromium (Cr) or molybdenum (Mo), a gate insulating film 112, and an active layer 113 made of a polycrystalline silicon film are sequentially formed on the insulating substrate 110. The active layer 113 is provided with a channel 113c above the gate electrode 111 and a source 113s and a drain 113d formed by ion implantation on both sides of the channel 113c using the stopper insulating film 114 provided on the channel 113c as a mask. It has been.

次に、ゲート絶縁膜112、能動層113及びストッパ絶縁膜114上の全面にSiO2膜、SiNx膜及びSiO2膜の順に積層された層間絶縁膜115を形成し、ドレイン113dに対応して設けたコンタクトホールにアルミニウム(Al)等の金属を充填してドレイン電極116を形成する。さらに全面に例えば有機樹脂からなり、表面を平坦にする平坦化絶縁膜117を形成する。そして、この平坦化絶縁膜117のソース113sに対応した位置にコンタクトホールを形成し、このコンタクトホールを介してソース113sと接続するAlからなり、ソース電極を兼ねた反射電極119を平坦化絶縁膜117上に形成する。次に、この反射電極119上にポリイミド等の有機樹脂からなる配向膜120を形成する。 Next, an interlayer insulating film 115 in which an SiO 2 film, an SiNx film, and an SiO 2 film are stacked in this order is formed on the entire surface of the gate insulating film 112, the active layer 113, and the stopper insulating film 114, and provided corresponding to the drain 113d. A drain electrode 116 is formed by filling the contact hole with a metal such as aluminum (Al). Further, a planarization insulating film 117 made of, for example, an organic resin and flattening the surface is formed on the entire surface. Then, a contact hole is formed at a position corresponding to the source 113 s of the planarization insulating film 117, and the reflective electrode 119 that also serves as the source electrode is made of Al connected to the source 113 s through the contact hole. 117 is formed. Next, an alignment film 120 made of an organic resin such as polyimide is formed on the reflective electrode 119.

また、TFT基板110に対向し、絶縁性基板からなる対向基板130には、TFT基板側に赤(R)、緑(G)、青(B)の各色及び遮光機能を有するブラックマトリックス132を備えたカラーフィルタ131、その上に形成された樹脂からなる保護膜133、その全面に形成された対向電極134及び配向膜135を備えており、その反対側の面には、位相差板143と偏光板144が配置されている。そして、TFT基板110及び対向基板130の周辺をシール材(図示せず)により接着し、それにより形成された空間にツイスティドネマティック(TN)液晶121が挟持される。   Further, the counter substrate 130 which is opposed to the TFT substrate 110 and is made of an insulating substrate is provided with a black matrix 132 having red (R), green (G) and blue (B) colors and a light shielding function on the TFT substrate side. A color filter 131, a protective film 133 made of resin formed thereon, a counter electrode 134 and an alignment film 135 formed on the entire surface of the color filter 131, and a phase plate 143 and a polarizing plate on the opposite surface. A plate 144 is arranged. Then, the periphery of the TFT substrate 110 and the counter substrate 130 is bonded with a sealing material (not shown), and a twisted nematic (TN) liquid crystal 121 is sandwiched in the space formed thereby.

ここで、反射電極119はAlとネオジウム(Nd)の合金からなっている。Nd濃度を1wt%以上にすることにより、ヒロックが発生せず、平坦な表面になり、基板温度200℃程度の温度で成膜しても、室温(非加熱)で成膜した純Alと同様に高反射率の反射電極を得ることができることが述べられている。   Here, the reflective electrode 119 is made of an alloy of Al and neodymium (Nd). By setting the Nd concentration to 1 wt% or more, hillocks are not generated, the surface becomes flat, and even if the film is formed at a substrate temperature of about 200 ° C., it is the same as pure Al formed at room temperature (non-heated) Describes that a reflective electrode having a high reflectance can be obtained.

一方、特開平5−80327号公報(特許文献2)には、液晶表示用拡散反射板の製造方法として、有機膜上に反射膜を形成する際、100℃〜250℃に加熱しながら行い、有機膜と反射膜との熱膨張率の違いにより有機膜にシワを発生させ、さらに、成膜時に反射膜を構成するAl膜もしくは白金(Pt)膜をグレイン成長させて、反射膜に微細な凹凸を形成し、散乱反射特性を向上させることが述べられている。   On the other hand, in JP-A-5-80327 (Patent Document 2), as a method of manufacturing a diffusive reflector for liquid crystal display, when forming a reflective film on an organic film, it is performed while heating at 100 ° C. to 250 ° C., Wrinkles are generated in the organic film due to the difference in thermal expansion coefficient between the organic film and the reflective film, and further, an Al film or a platinum (Pt) film constituting the reflective film is grain-grown at the time of film formation, and the reflective film is finely grown. It is described that irregularities are formed to improve scattering reflection characteristics.

また、特開2000−111906号公報(特許文献3)には、凹凸を有する反射層が形成されている電気光学装置の製造方法として、反射層の下に凹凸を形成し、この凹凸の上に反射層となる金属膜を80〜250オングストローム/min、成膜温度100℃〜300℃の条件で形成し、さらに金属膜の形成後に加熱処理して、金属膜表面に平均ピッチ1〜2μm、深さ0.2μmの微細な凹凸を形成し、散乱反射特性を向上させることが述べられている。   Japanese Patent Application Laid-Open No. 2000-111906 (Patent Document 3) discloses a method of manufacturing an electro-optical device in which a reflective layer having irregularities is formed. A metal film to be a reflective layer is formed under conditions of 80 to 250 angstroms / min and a film formation temperature of 100 ° C. to 300 ° C. Further, after the metal film is formed, heat treatment is performed, and an average pitch of 1 to 2 μm and a depth of the metal film surface are formed. It is described that a fine asperity of 0.2 μm is formed to improve the scattering reflection characteristics.

特開2000−258787号公報JP 2000-258787 A 特開平5−80327号公報Japanese Patent Laid-Open No. 5-80327 特開2000−111906号公報JP 2000-111906 A

ところが、反射型液晶表示装置もしくは半透過型液晶表示装置の反射電極となる金属膜に特開2000−258787号公報に述べられているようなAl−Nd合金を用いても、本発明者の実験により、成膜を200℃程度の比較的高い温度で行うと、配向膜材料によっては液晶表示装置の色味が黄変する(見栄えが黄色っぽくなる)という問題があることが判明した(後述する)。   However, even if an Al—Nd alloy as described in Japanese Patent Laid-Open No. 2000-258787 is used for the metal film that becomes the reflective electrode of the reflective liquid crystal display device or the transflective liquid crystal display device, the experiment of the present inventor is performed. Thus, it has been found that when the film is formed at a relatively high temperature of about 200 ° C., there is a problem that the color of the liquid crystal display device turns yellow (the appearance becomes yellowish) depending on the alignment film material (described later). ).

一方、反射電極となる金属膜の成膜を非加熱または70℃未満の低い温度で行うと、スイッチング素子と反射電極とを塗布系の層間絶縁膜を介して接続した反射型液晶表示装置もしくは半透過型液晶表示装置の場合、反射電極となる金属膜とスイッチング素子の電極となる下層金属膜との間のコンタクト抵抗が高くなり、画素電極への書き込みが悪化するという問題がある。また、反射電極となる金属膜の成膜を特に非加熱で行うと、成膜時の凝縮熱による基板の温度上昇による有機層間絶縁膜からの出ガスにより、金属膜が変質し、反射率が低下するという問題がある。この現象は反射電極となる金属膜にAlまたはAlを主体とする合金を使用した場合特に顕著で、この場合Alが白濁する(白く曇り、反射率が低下する)という問題がある。   On the other hand, when the metal film serving as the reflective electrode is formed without heating or at a low temperature of less than 70 ° C., a reflective liquid crystal display device in which the switching element and the reflective electrode are connected via a coating type interlayer insulating film or a half In the case of a transmissive liquid crystal display device, there is a problem that contact resistance between a metal film serving as a reflective electrode and a lower layer metal film serving as an electrode of a switching element is increased, and writing to the pixel electrode is deteriorated. In addition, when the metal film to be the reflective electrode is formed without heating, the metal film is altered by the outgas from the organic interlayer insulating film due to the temperature rise of the substrate due to the condensation heat at the time of film formation, and the reflectivity is increased. There is a problem of lowering. This phenomenon is particularly noticeable when Al or an alloy mainly composed of Al is used for the metal film to be the reflective electrode. In this case, there is a problem that Al becomes cloudy (white cloudy and reflectance decreases).

本発明の目的は、液晶表示装置の色味が黄変することを防止し、高い反射率を得ることが可能で、かつ書き込み不良のない反射型液晶表示装置もしくは半透過型液晶表示装置を提供することである。   An object of the present invention is to provide a reflective liquid crystal display device or a transflective liquid crystal display device that can prevent yellowing of the color of the liquid crystal display device, can obtain a high reflectance, and has no writing defects. It is to be.

本発明の液晶表示装置の製造方法は、基板上にバス配線と、前記バス配線に接続されるスイッチング素子と、前記スイッチング素子に接続されるアルミニウムを主体とする合金からなる反射電極と、前記反射電極上に配向膜を有する液晶表示装置の製造方法において、前記反射電極をガラス基板上または非塗布系の層間絶縁膜上に形成し、前記反射電極の成膜時の基板温度を170℃以下とし、前記反射電極の波長域200nm乃至400nmの反射率を波長400nmでの反射率の90%以上とすることを特徴とする。 The method of manufacturing a liquid crystal display device according to the present invention includes a bus wiring on a substrate, a switching element connected to the bus wiring, a reflective electrode made of an alloy mainly composed of aluminum connected to the switching element, and the reflective In a method for manufacturing a liquid crystal display device having an alignment film on an electrode, the reflective electrode is formed on a glass substrate or an uncoated interlayer insulating film, and the substrate temperature at the time of forming the reflective electrode is 170 ° C. or lower. The reflectance of the reflective electrode in a wavelength range of 200 nm to 400 nm is 90% or more of the reflectance at a wavelength of 400 nm.

また、本発明の液晶表示装置の製造方法は、基板上にバス配線と、前記バス配線に接続されるスイッチング素子と、前記スイッチング素子に接続されるアルミニウムを主体とする合金からなる反射電極と、前記反射電極上に配向膜を有する液晶表示装置の製造方法において、前記反射電極を樹脂基板上または塗布系の層間絶縁膜上に形成し、前記反射電極の成膜時の基板温度を70℃以上150℃以下とし、前記反射電極の波長域200nm〜400nmの反射率を波長400nmでの反射率の90%以上とすることを特徴とする。 Further, the manufacturing method of the liquid crystal display device of the present invention includes a bus wiring on a substrate, a switching element connected to the bus wiring, a reflective electrode made of an alloy mainly composed of aluminum connected to the switching element , In the method of manufacturing a liquid crystal display device having an alignment film on the reflective electrode, the reflective electrode is formed on a resin substrate or a coating type interlayer insulating film, and the substrate temperature at the time of forming the reflective electrode is 70 ° C. or more. The reflectance is set to 150 ° C. or lower, and the reflectance of the reflective electrode in the wavelength region of 200 nm to 400 nm is set to 90% or more of the reflectance at a wavelength of 400 nm.

さらに、本発明の液晶表示装置の製造方法は、前記反射電極の成膜時の基板加熱を少なくとも成膜前に行うことを特徴とする。Furthermore, the method for manufacturing a liquid crystal display device of the present invention is characterized in that the substrate is heated at least before the film formation when the reflective electrode is formed.

以上のように、反射型液晶表示装置もしくは半透過型液晶表示装置の反射電極にAlとNdの合金を用い、成膜を170℃以下の温度で行うことにより、微細な表面凹凸の平均ピッチが1μm以下、望ましくは0.6μm以下の微細で凹凸の少ないモホロジーを有する反射電極を形成でき、これにより波長200nm〜400nmの紫外光領域での光吸収を低減し、液晶表示装置の色味の黄変を防止することができる。なお、ここで言うモホロジーとは、反射電極を構成する金属膜の結晶組織による表面形態を指し、反射電極表面の微細な凹凸のことである。従って、反射電極が下地膜の凹凸によって反映される凹凸とは異なる。(以下同じ)
同時に、特に塗布系の層間絶縁膜上に反射電極を形成する反射型液晶表示装置もしくは半透過型液晶表示装置の場合、反射電極にAlとNdの合金を用い、基板を事前に70℃〜170℃の温度に加熱して成膜を行うことにより、塗布系の層間絶縁膜からの出ガスの影響をなくし、反射電極の白濁を防止して高反射率にし、かつ反射電極となる金属膜とスイッチング素子の電極となる下層金属膜との間のコンタクト抵抗の増大を防止できる。
As described above, by using an alloy of Al and Nd for a reflective electrode of a reflective liquid crystal display device or a transflective liquid crystal display device and performing film formation at a temperature of 170 ° C. or less, the average pitch of fine surface irregularities can be reduced. It is possible to form a reflective electrode having a fine morphology with less unevenness of 1 μm or less, preferably 0.6 μm or less, thereby reducing light absorption in the ultraviolet light region of a wavelength of 200 nm to 400 nm. Changes can be prevented. In addition, the morphology mentioned here refers to the surface form by the crystal structure of the metal film constituting the reflective electrode, and is a fine unevenness on the surface of the reflective electrode. Therefore, the reflective electrode is different from the unevenness reflected by the unevenness of the base film. (same as below)
At the same time, particularly in the case of a reflective liquid crystal display device or a transflective liquid crystal display device in which a reflective electrode is formed on a coating type interlayer insulating film, an alloy of Al and Nd is used for the reflective electrode, and the substrate is preliminarily set at 70 ° C. By forming the film by heating to a temperature of 0 ° C., the influence of the outgas from the interlayer insulating film of the coating system is eliminated, the cloudiness of the reflective electrode is prevented, the reflectance is high, and the metal film that becomes the reflective electrode It is possible to prevent an increase in contact resistance with the lower layer metal film serving as the electrode of the switching element.

発明の実施の形態BEST MODE FOR CARRYING OUT THE INVENTION

本発明の第1の実施形態について図面を参照して説明する。第1の実施形態は凹凸を有する有機層間絶縁膜上に反射電極を形成する反射型表示装置の例である。図1は、本発明の第1の実施形態の液晶表示装置に使用する薄膜トランジスタアレイ基板(TFT基板)の構成を示す概念図である。また、図2は本発明の第1の実施形態の液晶表示装置のパネル平面図、図3は図2のA−A線、C−C線及び一画素部分(後述する図4のB−B線部分の断面に対応)のパネル断面図である。   A first embodiment of the present invention will be described with reference to the drawings. The first embodiment is an example of a reflective display device in which a reflective electrode is formed on an organic interlayer insulating film having irregularities. FIG. 1 is a conceptual diagram showing a configuration of a thin film transistor array substrate (TFT substrate) used in the liquid crystal display device according to the first embodiment of the present invention. 2 is a panel plan view of the liquid crystal display device according to the first embodiment of the present invention, and FIG. 3 is a line AA, CC line and one pixel portion of FIG. 2 (BB in FIG. 4 described later). It is a cross-sectional view of a panel corresponding to the cross section of the line portion).

図1、図3に示すように、TFT基板10には、透明絶縁性基板10a上に複数の走査線11と複数の信号線12がほぼ直交して配設され、その交点近傍にこれらに接続されてスイッチング素子である薄膜トランジスタ(TFT)14が設けられ、これらがマトリクス状に配置されている。また走査線と平行に複数の共通配線13が配設され、TFT14に接続される画素電極(反射電極)31との間で保持容量が形成される。液晶に電圧を印加するための反射電極31は走査線11、信号線12、TFT14とは有機層間絶縁膜32を介して分離され、この上に設けられている。有機層間絶縁膜32には凹凸が形成され、その形状を反映して反射電極31にも凹凸(反射電極の表面モホロジー凹凸とは異なる)が形成される。   As shown in FIGS. 1 and 3, the TFT substrate 10 has a plurality of scanning lines 11 and a plurality of signal lines 12 arranged substantially orthogonally on a transparent insulating substrate 10a and connected to the intersections in the vicinity thereof. Then, a thin film transistor (TFT) 14 which is a switching element is provided, and these are arranged in a matrix. A plurality of common wirings 13 are arranged in parallel with the scanning lines, and a storage capacitor is formed between the pixel electrodes (reflection electrodes) 31 connected to the TFTs 14. The reflective electrode 31 for applying a voltage to the liquid crystal is separated from the scanning line 11, the signal line 12, and the TFT 14 via the organic interlayer insulating film 32, and is provided thereon. Concavities and convexities are formed in the organic interlayer insulating film 32, and concavities and convexities (different from the surface morphological concavities and convexities of the reflective electrode) are also formed in the reflective electrode 31 reflecting the shape.

また、走査線11の端部にはアドレス信号を入力する走査線端子15が、信号線12の端部にはデータ信号を入力する信号線端子16がそれぞれ設けられている。また、共通配線13は通常TFT基板の両側で共通配線結束線17により相互に結束され、その端部に共通配線端子18が設けられ、対向基板20上の対向電極33と同電位が与えられる。ここでは、概念的に走査線端子15と信号線端子16がTFT基板10のそれぞれ一辺ずつを占めるように示しているが、本発明の液晶表示装置は小型携帯用途のため、双方がTFT基板10の一辺にまとめて設けられる。(図2参照)
一方、図2、図3に示すように、対向基板20には、透明絶縁性基板20a上に表示領域に対応してカラーフィルタ21と液晶に電圧を印加するための対向電極33が設けられ、周辺部にブラックマトリクス22が設けられている。反射電極31が遮光層も兼ねるので、表示領域にはブラックマトリクスは設けられていない。ブラックマトリクス22は液晶表示装置の見栄えをよくする(黒をより黒らしくし、見栄えを鮮明にさせる)ためのものである。
A scanning line terminal 15 for inputting an address signal is provided at the end of the scanning line 11, and a signal line terminal 16 for inputting a data signal is provided at the end of the signal line 12. Further, the common wiring 13 is usually bound to each other by the common wiring binding line 17 on both sides of the TFT substrate, and the common wiring terminal 18 is provided at the end thereof, and the same potential as that of the counter electrode 33 on the counter substrate 20 is given. Here, the scanning line terminal 15 and the signal line terminal 16 are conceptually shown as occupying one side of the TFT substrate 10, but since the liquid crystal display device of the present invention is small and portable, both of them are the TFT substrate 10. Are provided together on one side. (See Figure 2)
On the other hand, as shown in FIGS. 2 and 3, the counter substrate 20 is provided with a counter electrode 33 for applying a voltage to the color filter 21 and the liquid crystal corresponding to the display area on the transparent insulating substrate 20a. A black matrix 22 is provided at the periphery. Since the reflective electrode 31 also serves as a light shielding layer, no black matrix is provided in the display area. The black matrix 22 is for improving the appearance of the liquid crystal display device (making black more black and making the appearance clear).

これらのTFT基板10と対向基板20の対向面に液晶分子を配向させる配向膜34が設けられ、両基板がシール材23と面内スペーサー35とを介して所定間隔に重ね合わされ、その中に液晶36が挟持されている。液晶36を注入したシール材の空間は封孔材24で密閉されている。さらに、対向基板20のTFT基板10との対向面とは反対側の面には1/4波長板37と偏向板38が設けられ、液晶表示パネルとなる。図2には図示していないが、この後、走査線端子15と信号線端子16の部分に駆動回路であるICチップがCOG(チップオングラス)実装され、液晶表示装置が完成される。   An alignment film 34 for aligning liquid crystal molecules is provided on the opposing surfaces of the TFT substrate 10 and the counter substrate 20, and both substrates are overlapped at a predetermined interval via a sealing material 23 and an in-plane spacer 35. 36 is clamped. The space of the sealing material into which the liquid crystal 36 is injected is sealed with a sealing material 24. Further, a quarter wavelength plate 37 and a deflection plate 38 are provided on the surface of the counter substrate 20 opposite to the surface facing the TFT substrate 10 to form a liquid crystal display panel. Although not shown in FIG. 2, thereafter, an IC chip as a drive circuit is mounted on the scanning line terminal 15 and the signal line terminal 16 by COG (chip on glass), and the liquid crystal display device is completed.

図3に示したように、対向基板20の裏面側から入射した入射光39は対向基板20、液晶36層を透過し、TFT基板10表面の所定の凹凸を有する反射電極31上で反射され、再び液晶36層、対向基板20を透過して、出射光40として外部に出射される。   As shown in FIG. 3, incident light 39 incident from the back side of the counter substrate 20 passes through the counter substrate 20 and the liquid crystal 36 layer, and is reflected on the reflective electrode 31 having predetermined irregularities on the surface of the TFT substrate 10, The light again passes through the liquid crystal 36 layer and the counter substrate 20 and is emitted to the outside as outgoing light 40.

次に、本発明の第1の実施形態の液晶表示装置のTFT基板の構成及びその製造方法について、図4〜図8を参照して詳細に説明する。図4は本実施形態の液晶表示装置のTFT基板の一画素部分の構成を示す平面図であり、図5、図6、図7は図4のB−B線部分に対応する工程断面図である。ここでは、スイッチング素子として逆スタガード構造のTFTを用いた例を示し、図1の一番左側の最外周画素部の図を示す。また、図8は走査線端子15、信号線端子16、共通配線端子18の短辺方向(端子は平面的に見ると細長い矩形状に配置されるので、その短辺方向という意味)の工程断面図である。   Next, the configuration of the TFT substrate of the liquid crystal display device according to the first embodiment of the present invention and the manufacturing method thereof will be described in detail with reference to FIGS. FIG. 4 is a plan view showing the configuration of one pixel portion of the TFT substrate of the liquid crystal display device of this embodiment, and FIGS. 5, 6, and 7 are process sectional views corresponding to the BB line portion of FIG. is there. Here, an example in which a reverse staggered TFT is used as a switching element is shown, and a diagram of the leftmost outermost pixel portion in FIG. 1 is shown. FIG. 8 is a process cross section in the short side direction of the scanning line terminal 15, the signal line terminal 16, and the common wiring terminal 18 (the terminals are arranged in a long and narrow rectangular shape when viewed in plan view, meaning the short side direction). FIG.

図4、図7に示すように、本実施形態の液晶表示装置のTFT基板の一画素部分は、互いに直交する走査線11及び信号線12と、これらの配線で囲まれる画素領域に各々設けられたスイッチング素子であるTFT14と、各画素領域に入射する光を反射すると共に、対向基板20との間に狭持された液晶36に電圧を印加する反射電極31と、反射電極31に所定の凹凸を形成するための第1の絶縁膜51及び第2の絶縁膜52とを含み、ゲート電極41は走査線11に、ドレイン電極42は信号線12に、ソース電極43は反射電極31に各々接続されている。なお、この反射電極31は、液晶に電圧を印加する画素電極としても機能するため、各画素毎に分離する必要があり、走査線11及び信号線12上で画素毎に分離されている。   As shown in FIGS. 4 and 7, one pixel portion of the TFT substrate of the liquid crystal display device according to the present embodiment is provided in each of a scanning line 11 and a signal line 12 which are orthogonal to each other and a pixel region surrounded by these wirings. A reflective electrode 31 for reflecting light incident on each pixel region and applying a voltage to the liquid crystal 36 sandwiched between the counter substrate 20 and a predetermined unevenness on the reflective electrode 31. The gate electrode 41 is connected to the scanning line 11, the drain electrode 42 is connected to the signal line 12, and the source electrode 43 is connected to the reflective electrode 31, respectively. Has been. The reflective electrode 31 also functions as a pixel electrode that applies a voltage to the liquid crystal, and therefore needs to be separated for each pixel, and is separated for each pixel on the scanning line 11 and the signal line 12.

また、TFT側基板10は、透明絶縁性基板10a上のTFT領域にゲート電極41が形成され、その上にゲート絶縁膜53を介して半導体層44(a−Si層44a及びn+型a−Si層44b)が形成され、n+型a−Si層44b上には、ドレイン電極42及びソース電極43が形成されている。そして、各々の画素領域には、反射電極31に所定の凹凸を形成するための第1の絶縁膜51が不規則に配設され、その上には第1の絶縁膜51の段差をなだらかにする第2の絶縁膜52が形成されている。 In addition, the TFT side substrate 10 has a gate electrode 41 formed in a TFT region on the transparent insulating substrate 10a, and a semiconductor layer 44 (a-Si layer 44a and n + type a−) via a gate insulating film 53 thereon. Si layer 44b) is formed, and a drain electrode 42 and a source electrode 43 are formed on the n + -type a-Si layer 44b. In each pixel region, a first insulating film 51 for irregularly forming a predetermined unevenness on the reflective electrode 31 is irregularly arranged, and a step of the first insulating film 51 is gently formed thereon. A second insulating film 52 is formed.

ここで、第1の絶縁膜51は、表示領域全面に渡って均一な反射光学特性を発揮するために、表示領域内部に不規則に形成されるが、表示領域の外側(図4の左側の領域)は、端子電極等を設ける領域であるために、第1の絶縁膜51は形成されていない。一方、第2の絶縁膜52は、コンタクトホール45部を除く表示領域内部に連続して形成されると共に、第1の絶縁膜51を完全に覆うように表示領域の外側にも多少の広がりをもって形成されている。そして、TFT14を保護するパッシベーション膜54、第1の絶縁膜51及び第2の絶縁膜52の上に反射電極31が形成され、ソース電極43上の第2の絶縁膜52、パッシベーション膜54にそれぞれ設けたコンタクトホール45、55部においてソース電極43と接続されている。   Here, the first insulating film 51 is irregularly formed inside the display region in order to exhibit uniform reflective optical characteristics over the entire display region, but the outside of the display region (on the left side of FIG. 4). The region) is a region where a terminal electrode or the like is provided, and thus the first insulating film 51 is not formed. On the other hand, the second insulating film 52 is continuously formed inside the display area except for the contact hole 45 portion, and has a slight spread outside the display area so as to completely cover the first insulating film 51. Is formed. Then, the reflective electrode 31 is formed on the passivation film 54 that protects the TFT 14, the first insulating film 51, and the second insulating film 52, and the second insulating film 52 and the passivation film 54 on the source electrode 43 are respectively formed. The provided contact holes 45 and 55 are connected to the source electrode 43.

この反射電極31表面は、第1の絶縁膜51及び第2の絶縁膜52による凹凸が反映され、反射電極31表面の凹凸傾斜角度の構成が反射光の光学特性を決定することとなる。それゆえ、凹凸の傾斜角度は所望の反射光学特性が得られるように設計される。なお、このとき凹凸は、凸ピッチ、凹ピッチ、凸高さ、凹深さのいずれかについて、異なる2種以上の値で構成されていればよい。   The surface of the reflective electrode 31 reflects unevenness due to the first insulating film 51 and the second insulating film 52, and the configuration of the uneven inclination angle of the surface of the reflective electrode 31 determines the optical characteristics of the reflected light. Therefore, the inclination angle of the unevenness is designed so that desired reflection optical characteristics can be obtained. In addition, the unevenness | corrugation should just be comprised by 2 or more types of different values about either a convex pitch, a concave pitch, convex height, or a concave depth at this time.

また、第1の絶縁膜51の膜厚の下限は、上記反射光学特性により規定されると共に、寄生容量の観点からも制限される。すなわち、第1の絶縁膜51が薄く形成されると、入射光の反射方向を大きく変化させることができなくなると共に、反射電極31と走査線11、信号線12との間隔が狭くなるため、これらの配線との間の寄生容量が大きくなり、信号の遅延を引き起こして正しい信号の送信ができなくなったり、信号線と画素との間の電界が強まるため、付近の液晶に影響を及ぼし液晶分子の配向方向に乱れが生じたり、応答が遅くなる等、表示品位を損ねることになる。従って、第1の絶縁膜51は1〜3μm程度の膜厚で形成される。一方、第2の絶縁膜52は、第1の絶縁膜51の凹凸を適度に緩和し、表面をなだらかな曲面とするために設けるものであるため、薄すぎると上記効果を発揮することができず、また、厚すぎると第1の絶縁膜51の凹凸を相殺して平坦化してしまうことになる。従って、第2の絶縁膜52の膜厚としては、0.3〜1.5μm程度の範囲が好ましい。   Further, the lower limit of the film thickness of the first insulating film 51 is defined by the reflection optical characteristics and is also limited from the viewpoint of parasitic capacitance. That is, when the first insulating film 51 is thinly formed, the reflection direction of incident light cannot be changed greatly, and the distance between the reflective electrode 31 and the scanning line 11 and the signal line 12 becomes narrow. The parasitic capacitance between the signal line and the wiring increases, causing a delay in the signal, making it impossible to transmit a correct signal, and increasing the electric field between the signal line and the pixel. Display quality is impaired, such as disturbance in the orientation direction and slow response. Therefore, the first insulating film 51 is formed with a film thickness of about 1 to 3 μm. On the other hand, the second insulating film 52 is provided to moderate the unevenness of the first insulating film 51 and to make the surface a gentle curved surface. In addition, if the thickness is too large, the unevenness of the first insulating film 51 is canceled and flattened. Therefore, the thickness of the second insulating film 52 is preferably in the range of about 0.3 to 1.5 μm.

次に、上記構成のTFT基板の製造方法について説明する。図5(a)〜図7及び図8に示すように、この製造工程は、大別すると、(1)ゲート電極41の金属膜の成膜、パターンニング、(2)ゲート絶縁膜53、a−Si層44a、n+型a−Si層44bの成膜、パターンニング、(3)ドレイン電極42、ソース電極43の金属膜の成膜、パターンニング、(4)パッシベーション膜54の成膜、パターンニング、(5)端子部接続電極63の透明導電膜の成膜、パターンニング、(6)第1の絶縁膜51の成膜、パターンニング及び表面形状変換処理、(7)第2の絶縁膜52の成膜、パターンニング、(8)反射電極31の金属膜の成膜、パターンニングの全部で8工程からなる。 Next, a manufacturing method of the TFT substrate having the above configuration will be described. As shown in FIG. 5A to FIG. 7 and FIG. 8, this manufacturing process is roughly divided into (1) film formation and patterning of the gate electrode 41, and (2) gate insulating film 53, a. -Si layer 44a, n + -type a-Si layer 44b film formation, patterning, (3) metal film formation, patterning of drain electrode 42 and source electrode 43, (4) film formation of passivation film 54, Patterning, (5) film formation of transparent conductive film of terminal connection electrode 63, patterning, (6) film formation of first insulating film 51, patterning and surface shape conversion treatment, (7) second insulation The film formation and patterning of the film 52, and (8) the metal film formation and patterning of the reflective electrode 31 are all comprised of eight steps.

まず、厚さ0.5mmの無アルカリガラスからなる透明絶縁性基板10a上に、スパッタにより厚さ100nm〜300nmのCr等の金属膜を成膜し、公知のフォトリソグラフィー技術及びエッチング技術を用いて、ゲート電極41、走査線11(図示せず)、共通配線13(図示せず)、走査線端子15、信号線端子16、共通配線端子18の端子部金属膜61を形成する。なお、配線材料としては、Crに限らず、MoやAlもしくはAl合金上にCr、Mo、チタン(Ti)等のバリアメタルを形成した積層構造の配線膜のように、抵抗が低く、薄膜形成及びフォトリソグラフィー技術によるパターンニングが容易な材料であればよい。(図5(a)、図8(a))
次に、プラズマCVDにより厚さ300nm〜500nmの窒化シリコン(SiNx)からなるゲート絶縁膜53を成膜し、引き続きプラズマCVDによりゲート絶縁膜53上に厚さ150nm〜300nmのドーピングされていないアモルファスシリコン(a−Si)と厚さ30nm〜50nmのn+型にドーピングされたアモルファスシリコン(n+型a−Si)を成膜し、フォトリソ工程を通してパターンニングし、a−Si層44aとn+型a−Si層44bからなる半導体層44を形成する。a−Si層44aはTFT14の能動層となるものであり、n+型a−Si層44bはドレイン電極42及びソース電極43とa−Si層44aとのオーミックコンタクトを確保するためのものである。(図5(b)、図8(b))
次に、スパッタにより厚さ100nm〜300nmのCr等の金属膜を成膜、フォトリソ工程を通してパターンニングし、ドレイン電極42、ソース電極43、信号線12を形成する。その後、ドレイン電極42、ソース電極43をマスクにしてドライエッチングを行い、ドレイン電極42とソース電極43の間のn+型a−Si層44bを除去する。これは、ドレイン電極42とソース電極43との間をn+型a−Si層13bを介して直接電流が流れるのを防止するためである。ここでも配線材料としては、Crに限らず、MoやAlもしくはAl合金の上下にCr、Mo、Ti等のバリアメタルを形成した積層構造の配線膜のように、抵抗が低く、薄膜形成及びフォトリソグラフィー技術によるパターンニングが容易な材料であればよい。(図5(c)、図8(b))
次に、プラズマCVDにより厚さ100nm〜300nmの窒化シリコンを成膜してパッシベーション膜54を形成し(図8(c))、ソース電極43上のパッシペーション膜54と、走査線端子15、信号線端子16、共通配線端子18の端子部金属膜61上のパッシペーション膜54及びゲート絶縁膜53とをパターニングして、それぞれコンタクトホール55および端子部コンタクトホール62を開口する。このとき、図示していないが、共通配線13の端部上のパッシベーション膜54およびゲート絶縁膜53と、信号線端子16の端子部金属膜61端部上のパッシベーション膜54及びゲート絶縁膜53と、信号線端子16側の信号線12端部上のパッシベーション膜54とを同時にパターンニングして開口する。このパッシベーション膜54は、イオン等の不純物がa−Si層44aに拡散し、TFT14が動作不良を起こすのを防ぐためのものである。(図5(d)、図8(d)) 次に、スパッタにより厚さ40nm〜100nmのITO等の透明導電膜を成膜、フォトリソ工程を通してパターンニングし、走査線端子15、信号線端子16、共通配線端子18の端子部金属膜61上に接続電極63と、共通配線13の端部上に共通配線結束線17(図示せず)と、信号線端子16の端子部金属膜61と信号線12とを接続するための接続電極(図示せず)とを形成する。このとき、表示領域には透明導電膜のパターンは形成しない。従って、ソース電極43にMoやAlもしくはAl合金の上下にMoを積層したような金属膜を用いた場合、ITOのパターニングはシュウ酸等のMoをエッチングしないエッチング液で行う必要がある。ソース電極43にCrやAlもしくはAl合金の上下にCrやTiを積層したような金属膜を用いた場合は、王水系や塩化第2鉄系のエッチング液を用いてもさしつかえない。ここで、表示領域には透明導電膜のパターンは形成しないのは、コンタクトホール55部において、後述するITO−Al間の電池作用による透明導電膜の剥がれの危険性をできるだけ回避するためである。また、走査線端子15、信号線端子16、共通配線端子18の端子部金属膜61上に透明導電膜で接続電極63を形成するのは、COG実装時の端子部での接続信頼性を確保するためである。(図5(d)、図8(e))
次に、例えば、感光性ノボラック樹脂を厚さ1〜3μm塗布し、フォトリソ工程を通しアルカリ現像液でパターニングして、表示領域内部に不規則に第1の絶縁膜51を形成する。第1の絶縁膜51としては、感光性を有さない樹脂又は感光性を有する樹脂のいずれを用いることもでき、感光性を有さない樹脂を用いる場合の形成工程は、基板上への(1)第1の絶縁膜51の塗布、(2)第1の絶縁膜51のパターンニング用レジスト塗布、(3)露光、(4)現像、(5)第1の絶縁膜51のエッチング、(6)レジスト剥離の各工程処理からなる。一方、感光性を有する樹脂を用いる場合の形成工程は、基板上への(1)第1の絶縁膜51の塗布、(2)露光、(3)現像の各工程処理からなり、パターンニング用レジストの塗布、剥離の工程を省略することができる。(図6(a)、図8(e)) 次に、この第1の絶縁膜51に所定の表面形状変換処理を施して、なだらかな凸形状にする。これは、80℃〜200℃程度の温度で熱処理を行うことで、パターン形成後の第1の絶縁膜51表面をメルトさせ、滑らかな形状に変換するものである。表面形状変換処理は熱処理に限定されず、例えば、NMP(N−メチル−2−ピロリドン)のような薬品による溶融処理等を用いてもよい。表面形状変換処理後、200℃〜250℃程度の温度で再度焼成を行う。(図6(b)、図8(e))
次に、例えば、感光性ノボラック樹脂を厚さ0.3〜1.5μm塗布し、フォトリソ工程を通しアルカリ現像液でパターニングし、200℃〜250℃程度の温度で焼成して、第2の絶縁膜52を形成すると共に、ソース電極43上のパッシベーション膜54に開口されたコンタクトホール55に対応して、画素部コンタクトホール45を形成する。(図6(c)、図8(e))
ここでは、第1の絶縁膜51と第2の絶縁膜52はノボラック系の有機樹脂材料を用いた例を示した。例えば、JSR製のPC403等を用いることができる。しかし、これらの材料は、同じ種類である必要はなく、異なる種類であってもよい。また、ノボラック樹脂のみではなく、アクリル樹脂とポリイミド樹脂、シリコン窒化膜とアクリル樹脂、シリコン酸化膜とポリイミド樹脂等の無機系樹脂と有機系樹脂の組み合わせを用いても、あるいはその逆の組み合わせを用いても、所望の凹凸を形成することができる。
First, on a transparent insulating substrate 10a made of alkali-free glass having a thickness of 0.5 mm, a metal film such as Cr having a thickness of 100 nm to 300 nm is formed by sputtering, and using a known photolithography technique and etching technique. The terminal metal film 61 of the gate electrode 41, the scanning line 11 (not shown), the common wiring 13 (not shown), the scanning line terminal 15, the signal line terminal 16, and the common wiring terminal 18 is formed. In addition, the wiring material is not limited to Cr, and the resistance is low and the thin film is formed like a wiring film having a laminated structure in which a barrier metal such as Cr, Mo, titanium (Ti) is formed on Mo, Al, or an Al alloy. Any material can be used as long as it can be easily patterned by photolithography. (Fig. 5 (a), Fig. 8 (a))
Next, a gate insulating film 53 made of silicon nitride (SiNx) having a thickness of 300 nm to 500 nm is formed by plasma CVD, and subsequently 150 nm to 300 nm of undoped amorphous silicon is formed on the gate insulating film 53 by plasma CVD. (A-Si) and an amorphous silicon (n + -type a-Si) doped with n + -type having a thickness of 30 nm to 50 nm are formed and patterned through a photolithography process, and the a-Si layer 44a and the n + -type are patterned. A semiconductor layer 44 made of the a-Si layer 44b is formed. The a-Si layer 44a is an active layer of the TFT 14, and the n + -type a-Si layer 44b is for ensuring ohmic contact between the drain electrode 42 and the source electrode 43 and the a-Si layer 44a. . (Fig. 5 (b), Fig. 8 (b))
Next, a metal film such as Cr having a thickness of 100 nm to 300 nm is formed by sputtering and patterned through a photolithography process to form the drain electrode 42, the source electrode 43, and the signal line 12. Thereafter, dry etching is performed using the drain electrode 42 and the source electrode 43 as a mask, and the n + -type a-Si layer 44b between the drain electrode 42 and the source electrode 43 is removed. This is to prevent direct current from flowing between the drain electrode 42 and the source electrode 43 via the n + -type a-Si layer 13b. Here, the wiring material is not limited to Cr, but has a low resistance, such as a laminated wiring film in which barrier metals such as Cr, Mo, and Ti are formed on the upper and lower sides of Mo, Al, or Al alloy. Any material that can be easily patterned by a lithography technique may be used. (Fig. 5 (c), Fig. 8 (b))
Next, a silicon nitride film having a thickness of 100 nm to 300 nm is formed by plasma CVD to form a passivation film 54 (FIG. 8C), the passivation film 54 on the source electrode 43, the scanning line terminal 15, and the signal. The passivation film 54 and the gate insulating film 53 on the terminal part metal film 61 of the line terminal 16 and the common wiring terminal 18 are patterned to open a contact hole 55 and a terminal part contact hole 62, respectively. At this time, although not shown, the passivation film 54 and the gate insulating film 53 on the end of the common wiring 13, and the passivation film 54 and the gate insulating film 53 on the end of the terminal metal film 61 of the signal line terminal 16 The passivation film 54 on the end of the signal line 12 on the signal line terminal 16 side is simultaneously patterned and opened. The passivation film 54 is for preventing impurities such as ions from diffusing into the a-Si layer 44a and causing the TFT 14 to malfunction. (FIG. 5 (d), FIG. 8 (d)) Next, a transparent conductive film such as ITO having a thickness of 40 nm to 100 nm is formed by sputtering and patterned through a photolithography process, and the scanning line terminal 15 and the signal line terminal 16 are formed. The connection electrode 63 on the terminal part metal film 61 of the common wiring terminal 18, the common wiring binding wire 17 (not shown) on the end part of the common wiring 13, the terminal part metal film 61 of the signal line terminal 16 and the signal A connection electrode (not shown) for connecting the line 12 is formed. At this time, a transparent conductive film pattern is not formed in the display region. Therefore, when a metal film in which Mo is laminated on top and bottom of Mo, Al, or an Al alloy is used for the source electrode 43, the ITO patterning needs to be performed with an etching solution such as oxalic acid that does not etch Mo. When the source electrode 43 is made of a metal film in which Cr or Ti is laminated on top and bottom of Cr, Al, or an Al alloy, an aqua regia or ferric chloride etchant may be used. Here, the reason why the transparent conductive film pattern is not formed in the display region is to avoid as much as possible the risk of peeling of the transparent conductive film due to the battery action between ITO and Al, which will be described later, in the contact hole 55 portion. In addition, the connection electrode 63 formed of the transparent conductive film on the metal film 61 of the scanning line terminal 15, the signal line terminal 16, and the common wiring terminal 18 ensures the connection reliability at the terminal part during COG mounting. It is to do. (Fig. 5 (d), Fig. 8 (e))
Next, for example, a photosensitive novolac resin is applied in a thickness of 1 to 3 μm, and patterned with an alkaline developer through a photolithography process, thereby forming the first insulating film 51 irregularly in the display region. As the first insulating film 51, either a resin having no photosensitivity or a resin having photosensitivity can be used, and a formation process in the case of using a resin having no photosensitivity is performed on a substrate ( (1) Application of first insulating film 51, (2) Application of resist for patterning of first insulating film 51, (3) Exposure, (4) Development, (5) Etching of first insulating film 51, 6) Each process of resist stripping. On the other hand, the formation process when using a resin having photosensitivity consists of (1) application of the first insulating film 51 on the substrate, (2) exposure, and (3) development processes. The resist coating and stripping steps can be omitted. (FIG. 6A, FIG. 8E) Next, the first insulating film 51 is subjected to a predetermined surface shape conversion process to form a gentle convex shape. In this method, the surface of the first insulating film 51 after pattern formation is melted and converted into a smooth shape by performing heat treatment at a temperature of about 80 ° C. to 200 ° C. The surface shape conversion treatment is not limited to heat treatment, and for example, a melting treatment with a chemical such as NMP (N-methyl-2-pyrrolidone) may be used. After the surface shape conversion treatment, firing is performed again at a temperature of about 200 ° C to 250 ° C. (Fig. 6 (b), Fig. 8 (e))
Next, for example, a photosensitive novolac resin is applied in a thickness of 0.3 to 1.5 μm, patterned with an alkali developer through a photolithography process, and baked at a temperature of about 200 ° C. to 250 ° C. A film 52 is formed, and a pixel portion contact hole 45 is formed corresponding to the contact hole 55 opened in the passivation film 54 on the source electrode 43. (Fig. 6 (c), Fig. 8 (e))
Here, an example in which the first insulating film 51 and the second insulating film 52 are made of a novolac organic resin material is shown. For example, a JSR PC403 or the like can be used. However, these materials do not have to be the same type and may be different types. Also, not only novolac resin, but also a combination of inorganic resin and organic resin such as acrylic resin and polyimide resin, silicon nitride film and acrylic resin, silicon oxide film and polyimide resin, or vice versa However, desired irregularities can be formed.

また、ここではフォトリソ法を用いて第1の絶縁膜51と第2の絶縁膜52を形成する方法を述べたが、印刷法を用いてもよい。この場合は製造工程が簡略化できる。さらに、液相成長法などの湿式処理、プラズマ重合法などの乾式処理を用いて形成することもできる。即ち、本願でいう塗布系の絶縁膜(層間絶縁膜)とは出ガスを生じる絶縁膜の総称である。   Although the method of forming the first insulating film 51 and the second insulating film 52 by using a photolithography method has been described here, a printing method may be used. In this case, the manufacturing process can be simplified. Furthermore, it can also be formed using a wet process such as a liquid phase growth method or a dry process such as a plasma polymerization method. That is, the coating-type insulating film (interlayer insulating film) referred to in the present application is a general term for insulating films that generate outgas.

次に、スパッタにより厚さ50nm〜200nmのMo膜と厚さ100nm〜300nmのAl−Nd合金膜を順次成膜し、フォトリソ工程を通してパターンニングし、高反射率の反射電極31を形成する。このパターニングは、40℃〜60℃に加熱したリン酸、酢酸及び硝酸からなる混酸によるウェットエッチングにより行う。このとき、反射電極31は、各々の画素のソース電極43と接続され、画素電極としても機能するために、各々の画素領域の間(走査線11上、及び信号線12上)で除去されると共に、表示領域の外側も合わせて除去される。従って、走査線端子15、信号線端子16、共通配線端子18の各端子部上にはMoとAl−Nd合金膜は残っていない。ここで、Mo膜は端子部の接続電極63である透明導電膜(ITO膜)とAl−Nd合金膜とのバリアメタルであり、フォトリソ工程の現像時に現像液がしみ込んで発生するITO−Al間の電池作用による透明導電膜の剥がれを防止する役割があり、この電池作用を防止するために十分な膜厚が必要になる。(図6(d)、図8(e))
次に、反射電極31となる金属膜の成膜方法について詳細に述べる。スパッタ装置において、図6(c)、図8(e)の状態のTFT基板10をまず加熱室に搬送し、70℃〜170℃の温度に加熱して、1〜2分間程度第1及び第2の絶縁膜に含まれる水分を十分放出させる。次にTFT基板10を成膜室に搬送し、速やかにMo膜とAl−Nd合金膜の成膜を連続して行う。ここで、加熱室と成膜室は異なるチャンバーで独立に真空排気される方が望ましい。これはTFT基板10の塗布系の絶縁膜(第1及び第2の絶縁膜)からの出ガスが、Mo膜やAl−Nd合金膜の膜質や下層の金属膜との間のコンタクト抵抗に悪影響を与えないようにするためである。加熱と成膜が同じチャンバーで行われる場合は、加熱時間を2〜5分程度に長めにとり、基板加熱(保温)の最中にチャンバーを十分排気することが大切である。これにより、白濁のない高反射率のAl−Nd合金膜が得られ、同時にソース電極43と反射電極31の間のコンタクト抵抗を低く安定化できる(後述する)。
Next, a Mo film having a thickness of 50 nm to 200 nm and an Al—Nd alloy film having a thickness of 100 nm to 300 nm are sequentially formed by sputtering and patterned through a photolithography process to form a reflective electrode 31 having a high reflectivity. This patterning is performed by wet etching using a mixed acid composed of phosphoric acid, acetic acid and nitric acid heated to 40 ° C. to 60 ° C. At this time, the reflective electrode 31 is connected to the source electrode 43 of each pixel and functions as a pixel electrode, so that the reflective electrode 31 is removed between the pixel regions (on the scanning line 11 and the signal line 12). At the same time, the outside of the display area is also removed. Therefore, the Mo and Al—Nd alloy film does not remain on the terminal portions of the scanning line terminal 15, the signal line terminal 16, and the common wiring terminal 18. Here, the Mo film is a barrier metal between the transparent conductive film (ITO film) which is the connection electrode 63 of the terminal portion and the Al—Nd alloy film, and the ITO-Al gap generated by the developer soaking in the development of the photolithography process. There is a role to prevent peeling of the transparent conductive film due to the battery action, and a sufficient film thickness is required to prevent this battery action. (Fig. 6 (d), Fig. 8 (e))
Next, a method for forming a metal film to be the reflective electrode 31 will be described in detail. In the sputtering apparatus, the TFT substrate 10 in the state of FIGS. 6C and 8E is first transported to a heating chamber and heated to a temperature of 70 ° C. to 170 ° C. for about 1 to 2 minutes. The moisture contained in the insulating film 2 is sufficiently released. Next, the TFT substrate 10 is transported to the film formation chamber, and the Mo film and the Al—Nd alloy film are rapidly formed continuously. Here, it is desirable that the heating chamber and the film formation chamber are evacuated independently in different chambers. This is because the outgas from the coating system insulating film (first and second insulating films) of the TFT substrate 10 adversely affects the film quality of the Mo film and Al—Nd alloy film and the contact resistance between the underlying metal film. This is to avoid giving When heating and film formation are performed in the same chamber, it is important that the heating time is extended to about 2 to 5 minutes and the chamber is sufficiently evacuated during substrate heating (heat retention). Thereby, an Al—Nd alloy film having high reflectivity without white turbidity can be obtained, and at the same time, the contact resistance between the source electrode 43 and the reflective electrode 31 can be stabilized low (described later).

なお、上記でMo膜成膜時の基板加熱とAl−Nd合金膜成膜時の基板加熱は必ずしも同じ温度で行う必要はなく、例えば、Mo膜成膜時を150℃、Al−Nd合金膜成膜時を120℃のように、Mo膜成膜時の基板加熱温度を高く制御してもよい。これはMo膜成膜時の基板加熱温度が低いと、Mo膜の結晶性が悪くなり、Al−Nd合金膜の膜質やAl−Nd合金/Mo膜のエッチング性に悪影響を与えるためである。   Note that the substrate heating at the time of forming the Mo film and the substrate heating at the time of forming the Al—Nd alloy film do not necessarily have to be performed at the same temperature. The substrate heating temperature at the time of forming the Mo film may be controlled to be high, such as 120 ° C. during the film formation. This is because if the substrate heating temperature during the formation of the Mo film is low, the crystallinity of the Mo film is deteriorated, and the film quality of the Al—Nd alloy film and the etching property of the Al—Nd alloy / Mo film are adversely affected.

また、Al−Nd合金膜のNd濃度は0.5wt%以上とするのが望ましい。これにより、後工程の配向膜焼成等の熱処理工程でのヒロックを抑制でき、高反射率の反射電極31が得られる。さらに、成膜時の基板温度を170℃以下にすることにより、反射電極31の表面モホロジー(微細な凹凸)を平均ピッチ1μm以下に制御でき、波長域200nm〜400nmの反射率を可視光領域の反射率の90%以上にすることできる。これにより、配向膜の種類にかかわらず、黄変のない反射電極31を得ることができる(後述する)。一方、Nd濃度は10wt%以下とするのが望ましい。これにより、高反射率のAl−Nd合金膜が得られる(後述する)。   The Nd concentration of the Al—Nd alloy film is desirably 0.5 wt% or more. Thereby, the hillock in heat processing processes, such as alignment film baking of a post process, can be suppressed, and the reflective electrode 31 with a high reflectance is obtained. Furthermore, by setting the substrate temperature during film formation to 170 ° C. or less, the surface morphology (fine irregularities) of the reflective electrodes 31 can be controlled to an average pitch of 1 μm or less, and the reflectance in the wavelength region of 200 nm to 400 nm is in the visible light region. The reflectance can be 90% or more. Thereby, the reflective electrode 31 without yellowing can be obtained irrespective of the type of the alignment film (described later). On the other hand, the Nd concentration is preferably 10 wt% or less. Thereby, an Al—Nd alloy film with high reflectivity is obtained (described later).

なお、ここでは、反射電極31の材料として、反射率が高くTFTプロセスとの整合性がよいAl−Nd合金を用いた例を示したが、これに限定されるものではなく、反射率の高い金属であれば良く、例えば、Al−Ti合金やAl−Mo合金等の他のAl合金、あるいは、さらに高反射率の銀(Ag)もしくは銀合金を用いてもよい。   Here, an example in which an Al—Nd alloy having a high reflectivity and a good consistency with the TFT process is used as the material of the reflective electrode 31 is not limited to this, but the reflectivity is high. Any metal may be used. For example, other Al alloys such as an Al—Ti alloy and an Al—Mo alloy, or silver (Ag) or a silver alloy having higher reflectivity may be used.

次に、上記TFT基板10の上に、印刷により厚さ50nm〜100nmの配向膜34を形成し、200℃〜230℃程度の温度で焼成し、配向処理を行う。一方、透明絶縁性基板20a上に表示領域に対応して、カラーフィルタ21とその上にITO等の透明導電膜からなる対向電極33が形成され、周辺部にブラックマトリクス22が形成された対向基板20の上に、同様に、印刷により厚さ50nm〜100nmの配向膜34を形成し、200℃〜230℃程度の温度で焼成し、配向処理を行う。ここで、配向膜は波長域300nm〜600nmの光透過率が95%以上であるものを用いるのが望ましい。これにより、黄変のない反射電極31を得ることができる(後述する)。   Next, an alignment film 34 having a thickness of 50 nm to 100 nm is formed on the TFT substrate 10 by printing, and is baked at a temperature of about 200 ° C. to 230 ° C. to perform an alignment process. On the other hand, a counter substrate in which a color filter 21 and a counter electrode 33 made of a transparent conductive film such as ITO are formed on the transparent insulating substrate 20a corresponding to the display area, and a black matrix 22 is formed in the peripheral portion. Similarly, an alignment film 34 having a thickness of 50 nm to 100 nm is formed on the substrate 20 by printing, and is baked at a temperature of about 200 ° C. to 230 ° C. to perform an alignment process. Here, it is desirable to use an alignment film having a light transmittance of 95% or more in a wavelength range of 300 nm to 600 nm. Thereby, the reflective electrode 31 without yellowing can be obtained (described later).

これらのTFT基板10と対向基板20とを、エポキシ系樹脂接着剤からなるシール材23(図示せず)及びプラスチック粒子等からなる面内スペーサー35(図示せず)を介して、各々の膜面が対向するようにして所定間隔に重ね合わせる。その後、TFT基板10と対向基板20との間に液晶36を注入し、液晶36を注入したシール材23(図示せず)の空間(注入口)をUV硬化型アクリレート系樹脂からなる封孔材24(図示せず)で密閉する。最後に、対向基板20の膜面とは反対側の面に、1/4波長板37と偏向板38を貼って、液晶表示パネルを完成する。(図7)
この後、図示していないが、走査線端子15部、信号線端子16部、共通配線端子18部に駆動回路となるICチップをCOG実装し、液晶表示装置を完成する。以上のようにして、高反射率で黄変がなく、書き込み不良の問題のない反射型液晶表示装置が得られる。
The film surfaces of the TFT substrate 10 and the counter substrate 20 are connected to each other through a sealing material 23 (not shown) made of an epoxy resin adhesive and an in-plane spacer 35 (not shown) made of plastic particles. Are overlapped at a predetermined interval so as to face each other. Thereafter, the liquid crystal 36 is injected between the TFT substrate 10 and the counter substrate 20, and the space (injection port) of the sealing material 23 (not shown) into which the liquid crystal 36 is injected is sealed with a UV curable acrylate resin. Seal with 24 (not shown). Finally, a quarter-wave plate 37 and a deflection plate 38 are pasted on the surface opposite to the film surface of the counter substrate 20 to complete the liquid crystal display panel. (Fig. 7)
Thereafter, although not shown, an IC chip serving as a drive circuit is COG mounted on the scanning line terminal 15, the signal line terminal 16, and the common wiring terminal 18, thereby completing the liquid crystal display device. As described above, a reflective liquid crystal display device with high reflectivity, no yellowing, and no problem of writing failure can be obtained.

次に、本発明の第2の実施形態について図面を参照して説明する。第2の実施形態も凹凸を有する有機層間絶縁膜上に反射電極を形成する反射型表示装置の例である。本実施形態は、TFT基板の製造工程の簡略化を目的とするものであり、他の部分の構造、製造方法については、前述した第1の実施形態と全く同様である。   Next, a second embodiment of the present invention will be described with reference to the drawings. The second embodiment is also an example of a reflective display device in which a reflective electrode is formed on an organic interlayer insulating film having irregularities. This embodiment is intended to simplify the manufacturing process of the TFT substrate, and the structure of other parts and the manufacturing method are exactly the same as those of the first embodiment described above.

本発明の第2の実施形態の液晶表示装置のTFT基板の構成及びその製造方法について、図4、図5、図8〜図10を参照して詳細に説明する。図4は本実施形態の液晶表示装置のTFT基板の一画素部分の構成を示す平面図であり、図5、図9〜図10は図4のB−B線部分に対応する工程断面図である。ここでは、スイッチング素子として逆スタガード構造のTFTを用いた例を示し、図1の一番左側の最外周画素部の図を示す。また、図8は走査線端子15、信号線端子16、共通配線端子18の短辺方向の工程断面図である。   The configuration of the TFT substrate of the liquid crystal display device according to the second embodiment of the present invention and the manufacturing method thereof will be described in detail with reference to FIGS. 4, 5, and 8 to 10. FIG. 4 is a plan view showing the configuration of one pixel portion of the TFT substrate of the liquid crystal display device of this embodiment, and FIGS. 5 and 9 to 10 are process cross-sectional views corresponding to the BB line portion of FIG. is there. Here, an example in which a reverse staggered TFT is used as a switching element is shown, and a diagram of the leftmost outermost pixel portion in FIG. 1 is shown. FIG. 8 is a process sectional view in the short side direction of the scanning line terminal 15, the signal line terminal 16, and the common wiring terminal 18.

本実施形態では、図10(b)に示すように、反射電極31に所定の凹凸を形成するため、絶縁膜71が一体的に形成され、不規則にかつなだらかに配設されている。即ち、第1の実施形態における第1の絶縁膜と第2の絶縁膜の役割が、本実施形態の絶縁膜71に持たされている。   In the present embodiment, as shown in FIG. 10B, in order to form predetermined unevenness on the reflective electrode 31, an insulating film 71 is integrally formed and irregularly and gently disposed. That is, the insulating film 71 of this embodiment has the role of the first insulating film and the second insulating film in the first embodiment.

上記構成のTFT基板の製造工程は、図5(a)〜図5(c)、図9(a)〜図10(b)及び図8に示すように、大別すると、(1)ゲート電極41の金属膜の成膜・パターンニング、(2)ゲート絶縁膜53、a−Si層44a、n+型a−Si層44bの成膜、パターンニング、(3)ドレイン電極42、ソース電極43の金属膜の成膜、パターンニング、(4)パッシベーション膜54の成膜、パターンニング、(5)端子部接続電極63の透明導電膜の成膜、パターンニング、(6)絶縁膜71の成膜、パターンニング及び表面形状変換処理、(7)反射電極31の金属膜の成膜、パターンニングの全部で7工程からなる。 As shown in FIGS. 5A to 5C, FIGS. 9A to 10B, and FIG. 8, the manufacturing process of the TFT substrate having the above structure is roughly divided into (1) gate electrode. 41 metal film formation / patterning, (2) gate insulating film 53, a-Si layer 44a, n + -type a-Si layer 44b film formation, patterning, (3) drain electrode 42, source electrode 43 (4) Formation and patterning of passivation film 54, (5) Formation and patterning of transparent conductive film of terminal connection electrode 63, and (6) Formation of insulating film 71. The film, patterning, and surface shape conversion treatment, (7) the metal film formation of the reflective electrode 31, and the patterning are composed of seven steps.

工程(1)〜(5)は、第1の実施形態と全く同様であり、透明絶縁性基板10a上にTFT14と、走査線端子15、信号線端子16、共通配線端子18を形成する。(図9(a)、図8(e))
次に、例えば、感光性ノボラック樹脂からなる絶縁膜71を厚さ2〜4.5μm塗布する。そして、この絶縁膜71を露光、現像して凹凸を形成するが、本実施形態では、フォトマスクとして露光の光を透過する透過領域と、所定の量だけ減衰して透過する半透過領域と、遮光領域とが形成されたハーフトーンマスクを用いることを特徴とする。即ち、凸部を形成する領域72aには遮光領域が対応し、凹部を形成する領域72bには半透過領域が対応し、絶縁膜71を完全に除去する領域72cには透過領域が対応するように位置合わせをして露光を行う。(図9(b))
次に、現像を行い、遮光領域では絶縁膜71はそのまま残り、半透過領域ではある程度絶縁膜71がエッチングされるために、絶縁膜71に所定の凹凸が形成される。なお、絶縁膜71を完全に除去する領域(透過領域72c)の隣には、必ずある程度の膜が残る領域(半透過領域72b)を配置するようにし、絶縁膜71によって急峻な段差が生じないようにしている。このように、露光の際に、ハーフトーンマスクを用いて、長い時間露光するか強い光を当てて、絶縁膜71を完全に感光させて現像にて絶縁膜71を完全に除去する領域、短い時間露光するか弱い光を当てて、絶縁膜71をある程度残す領域、光を当てずに膜を除去しない領域をつくることにより、第1の実施形態の第1の絶縁膜51と第2の絶縁膜52の形成工程を一つの工程で行うことができる。(図9(c))
次に、第1の実形態と同様に、表面形状変換処理を行う。これは、80℃〜200℃程度の温度で熱処理を行うことにより、パターン形成後の絶縁膜71の表面をメルトさせ、滑らかな形状に変換させる。なお、表面形状変換処理では熱処理に限定されず、例えば、薬品による溶融処理等を用いてもよい。表面形状変換処理後、200℃〜250℃程度の温度で再度焼成を行う。(図10(a))
次に、第1の実形態と同様に、スパッタにより厚さ50nm〜200nmのMo膜と厚さ100nm〜300nmのAl−Nd合金膜を順次成膜し、フォトリソ工程を通してパターンニングし、高反射率の反射電極31を形成し、TFT基板を完成させる。高反射率の反射電極31の形成方法は第1の実施形態と全く同様である。(図10(b)、図8(e))
このように、ハーフトーンマスクを用いることにより、凹凸を有する絶縁膜71を一工程で形成することができ、第1の実施形態に比べて工程の削減を図ることができる。
Steps (1) to (5) are exactly the same as those of the first embodiment, and the TFT 14, the scanning line terminal 15, the signal line terminal 16, and the common wiring terminal 18 are formed on the transparent insulating substrate 10a. (Fig. 9 (a), Fig. 8 (e))
Next, for example, an insulating film 71 made of a photosensitive novolac resin is applied to a thickness of 2 to 4.5 μm. Then, the insulating film 71 is exposed and developed to form irregularities, but in this embodiment, as a photomask, a transmissive region that transmits exposure light, a semi-transmissive region that attenuates and transmits a predetermined amount, A halftone mask in which a light shielding region is formed is used. In other words, the light shielding region corresponds to the region 72a forming the convex portion, the semi-transmissive region corresponds to the region 72b forming the concave portion, and the transmissive region corresponds to the region 72c from which the insulating film 71 is completely removed. Align and align the exposure. (Fig. 9 (b))
Next, development is performed, and the insulating film 71 remains as it is in the light shielding region, and the insulating film 71 is etched to some extent in the semi-transmissive region, so that predetermined unevenness is formed in the insulating film 71. It should be noted that a region where a certain amount of film remains (semi-transmissive region 72b) is always arranged next to a region where the insulating film 71 is completely removed (transmission region 72c), and no steep step is generated by the insulating film 71. I am doing so. As described above, in the exposure, the halftone mask is used to expose the insulating film 71 for a long time or to expose the insulating film 71 completely by applying strong light, and the region where the insulating film 71 is completely removed by development is short. The first insulating film 51 and the second insulating film of the first embodiment are formed by creating a region where the insulating film 71 is left to some extent by applying time exposure or weak light, and a region where the film is not removed without being exposed to light. The forming process 52 can be performed in one process. (Fig. 9 (c))
Next, similarly to the first embodiment, surface shape conversion processing is performed. In this process, the surface of the insulating film 71 after pattern formation is melted and converted into a smooth shape by performing heat treatment at a temperature of about 80 ° C. to 200 ° C. Note that the surface shape conversion process is not limited to heat treatment, and for example, a melting process using chemicals or the like may be used. After the surface shape conversion treatment, firing is performed again at a temperature of about 200 ° C to 250 ° C. (Fig. 10 (a))
Next, as in the first embodiment, a Mo film with a thickness of 50 nm to 200 nm and an Al—Nd alloy film with a thickness of 100 nm to 300 nm are sequentially formed by sputtering, patterned through a photolithography process, and have a high reflectivity. The reflective electrode 31 is formed to complete the TFT substrate. The method of forming the reflective electrode 31 with high reflectivity is exactly the same as in the first embodiment. (Fig. 10 (b), Fig. 8 (e))
Thus, by using the halftone mask, the insulating film 71 having projections and depressions can be formed in one step, and the number of steps can be reduced as compared with the first embodiment.

なお、本実施形態では、ハーフトーンマスクを用いて凹凸を形成する方法について述べたが、ハーフトーンマスクを用いる方法の他にも、半残し領域と全残し領域用に別々のマスクを用い、露光量を変えることによって同様の凹凸を形成する方法や、露光の解像能力の限界よりも微細にパターンを配置することで、擬似的に半透過とする方法で、絶縁膜71に照射する露光量を場所によって変える方法を適用することもできる。   In the present embodiment, the method of forming irregularities using a halftone mask has been described. However, in addition to the method using a halftone mask, exposure is performed using separate masks for the half-remaining region and the entire remaining region. Exposure amount to irradiate the insulating film 71 by a method of forming the same unevenness by changing the amount, or a method of making the pattern semi-transparent by arranging a pattern finer than the limit of the resolution of exposure. It is also possible to apply a method of changing the position depending on the location.

次に、本発明の第3の実施形態について図面を参照して説明する。第3の実施形態は凹凸を有する有機層間絶縁膜上に反射電極を形成し、かつ透明導電膜からなる画素電極も形成する半透過型液晶表示装置の例である。本実施形態は、TFT基板の製造工程に透明導電膜からなる画素電極の形成工程が追加されるだけで、他の部分の構造、製造方法については、前述した第1の実施形態と全く同様である。   Next, a third embodiment of the present invention will be described with reference to the drawings. The third embodiment is an example of a transflective liquid crystal display device in which a reflective electrode is formed on an organic interlayer insulating film having irregularities and a pixel electrode made of a transparent conductive film is also formed. In this embodiment, a pixel electrode forming process made of a transparent conductive film is added to the TFT substrate manufacturing process, and the structure and manufacturing method of the other parts are exactly the same as those of the first embodiment described above. is there.

本発明の第3の実施形態の液晶表示装置のTFT基板の構成及びその製造方法について、図11〜図15及び図8を参照して詳細に説明する。図11は本実施形態の液晶表示装置のTFT基板の一画素部分の構成を示す平面図であり、図12〜図15は図11のB−B線部分に対応する工程断面図である。ここでは、スイッチング素子として逆スタガード構造のTFTを用いた例を示し、図1の一番左側の最外周画素部の図を示す。また、図8は走査線端子15、信号線端子16、共通配線端子18の短辺方向の工程断面図である。   The configuration of the TFT substrate of the liquid crystal display device according to the third embodiment of the present invention and the manufacturing method thereof will be described in detail with reference to FIGS. FIG. 11 is a plan view showing a configuration of one pixel portion of the TFT substrate of the liquid crystal display device of the present embodiment, and FIGS. 12 to 15 are process cross-sectional views corresponding to the BB line portion of FIG. Here, an example in which a reverse staggered TFT is used as a switching element is shown, and a diagram of the leftmost outermost pixel portion in FIG. 1 is shown. FIG. 8 is a process sectional view in the short side direction of the scanning line terminal 15, the signal line terminal 16, and the common wiring terminal 18.

本実施形態では、図11、図15に示すように、本実施形態の液晶表示装置のTFT基板の一画素部分は、互いに直交する走査線11及び信号線12と、これらの配線で囲まれる画素領域に各々設けられたスイッチング素子であるTFT14と、各画素領域に入射する光を反射、透過すると共に、対向基板20との間に狭持された液晶36に電圧を印加する反射電極31、透明導電膜からなる画素電極81と、反射電極31に所定の凹凸を形成するための第1の絶縁膜51及び第2の絶縁膜52とを含み、ゲート電極41は走査線11に、ドレイン電極42は信号線12に、ソース電極43は反射電極31に、反射電極31は透明導電膜からなる画素電極81に各々接続されている。   In the present embodiment, as shown in FIGS. 11 and 15, one pixel portion of the TFT substrate of the liquid crystal display device of the present embodiment includes a scanning line 11 and a signal line 12 that are orthogonal to each other and pixels surrounded by these wirings. A reflective electrode 31 that applies a voltage to the liquid crystal 36 sandwiched between the TFT 14 that is a switching element provided in each region and the light incident on each pixel region and reflects and transmits light that is sandwiched between the counter substrate 20 and a transparent electrode It includes a pixel electrode 81 made of a conductive film, a first insulating film 51 and a second insulating film 52 for forming predetermined irregularities on the reflective electrode 31, and the gate electrode 41 is connected to the scanning line 11 and the drain electrode 42. Are connected to the signal line 12, the source electrode 43 is connected to the reflective electrode 31, and the reflective electrode 31 is connected to the pixel electrode 81 made of a transparent conductive film.

ここで、反射電極31は画素電極81の周囲を囲むようにして形成され、画素電極81を構成する透明導電膜の周囲が反射電極31を構成する金属膜で被覆され、この部分で電気的接続がとられるようになっている。   Here, the reflective electrode 31 is formed so as to surround the periphery of the pixel electrode 81, and the periphery of the transparent conductive film constituting the pixel electrode 81 is covered with the metal film constituting the reflective electrode 31. It is supposed to be.

上記構成のTFT基板の製造工程は、図12(a)〜図15及び図8に示すように、大別すると、(1)ゲート電極41の金属膜の成膜・パターンニング、(2)ゲート絶縁膜53、a−Si層44a、n+型a−Si層44bの成膜、パターンニング、(3)ドレイン電極42、ソース電極43の金属膜の成膜、パターンニング及びパッシベーション膜54の成膜、(4)第1の絶縁膜51の成膜、パターンニング及び表面形状変換処理、(5)第2の絶縁膜52の成膜、パターンニング、(6)パッシベーション膜54のパターンニング、(7)画素電極81及び端子部接続電極63の透明導電膜の成膜、パターンニング、(8)反射電極31の金属膜の成膜、パターンニングの全部で8工程からなる。 As shown in FIGS. 12A to 15 and 8, the manufacturing process of the TFT substrate having the above configuration is roughly divided into (1) film formation / patterning of the metal film of the gate electrode 41, and (2) gate. Deposition and patterning of insulating film 53, a-Si layer 44a and n + -type a-Si layer 44b, (3) Deposition of metal film of drain electrode 42 and source electrode 43, patterning and formation of passivation film 54 (4) film formation, patterning and surface shape conversion treatment of the first insulating film 51, (5) film formation and patterning of the second insulating film 52, (6) patterning of the passivation film 54, ( 7) The film formation and patterning of the transparent conductive film of the pixel electrode 81 and the terminal portion connection electrode 63, and (8) the film formation and patterning of the metal film of the reflective electrode 31 are all comprised of 8 steps.

工程(1)〜(3)は、第1の実施形態のパッシベーション膜54成膜までの工程と全く同様であり、透明絶縁性基板10a上にTFT14を形成する。パッシベーション膜54の開口はこの時点では行わない。(図12(d)、図8(c))工程(4)〜(5)は、第1の実施形態の工程(6)〜(7)と全く同様である。但し、本実施形態は半透過型液晶表示装置のため、第1の絶縁膜51と第2の絶縁膜52の色つきを防止するため、現像後に全面露光を行うことが、第1の実施形態と異なる。(図13(c)、図8(c))
次に、ソース電極43上のパッシべーション膜54と、走査線端子15、信号線端子16、共通配線端子18の端子部金属膜61上のパッシベーション膜54及びゲート絶縁膜53とをパターンニングして、それぞれコンタクトホール55、端子部コンタクトホール62を開口する。このとき、図示していないが、共通配線13の端部上のパッシベーション膜54及びゲート絶縁膜53と、信号線端子16の端子部金属膜61端部上のパッシペーション膜54及びゲート絶縁膜53と、信号線端子16側の信号線12端部上のパッシペーション膜54とを、同時にパターンニングして開口する。(図14(a)、図8(d))
次に、スパッタにより厚さ40nm〜100nmのITO等の透明導電膜を成膜、フォトリソ工程を通してパターンニングし、画素電極81と、走査線端子15、信号線端子16、共通配線端子18の端子部金属膜61上に接続電極63と、共通配線13の端部上に共通配線結束線17(図示せず)と、信号線端子16の端子部金属膜61と信号線12とを接続するための接続電極(図示せず)とを形成する。このとき、透明導電膜の成膜も、第1の実施形態で述べた反射電極31となる金属膜の成膜と同様な方法で行ない、出ガスの影響を避けることが望ましい。また、ソース電極43上の画素部コンタクトホール45上には透明導電膜のパターンは形成しないのも第1の実施形態で述べた通りである。(図14(b)、図8(e))
次に、第1の実施形態と同様に、スパッタにより厚さ50nm〜200nmのMo膜と厚さ100nm〜300nmのAl−Nd合金膜を順次成膜し、フォトリソ工程を通してパターンニングし、高反射率の反射電極31を形成し、TFT基板を完成させる。高反射率の反射電極31の形成方法は第1の実形態と全く同様である。このとき、反射電極31は、各々の画素のソース電極43及び画素電極81と接続され、各々の画素領域の間(走査線11上、及び信号線12上)で除去されると共に、表示領域の外側も合わせて除去される。従って、走査線端子15、信号線端子16、共通配線端子18の各端子部上にはMoとAl−Nd合金膜は残っていない。この事情も、第1の実施形態と全く同様である。また、画素電極81を構成する透明導電膜(ITO膜)の周囲を反射電極31を構成する金属膜(Al−Nd合金/Mo膜)で被覆するようにしているので、フォトリソ工程の現像時に現像液が金属膜を通して透明導電膜の端部からしみ込む危険性がなく(透明導電膜の端部上はフォトレジストが現像されず、金属膜が現像液にさらされることがないため)、ITO−Al間の電池作用による透明導電膜の剥がれを防止することができ、液晶表示装置の点欠陥不良を大幅に低減できる。(図14(c)、図8(e))
以降、第1の実施形態と全く同様にして、液晶表示パネルを製造し(図15)、液晶表示装置を完成する。以上のようにして、高反射率で黄変がなく、書き込み不良の問題のない半透過型液晶表示装置が得られる。
Steps (1) to (3) are exactly the same as the steps up to the formation of the passivation film 54 of the first embodiment, and the TFT 14 is formed on the transparent insulating substrate 10a. The opening of the passivation film 54 is not performed at this point. (FIGS. 12D and 8C) Steps (4) to (5) are exactly the same as steps (6) to (7) of the first embodiment. However, since the present embodiment is a transflective liquid crystal display device, in order to prevent coloring of the first insulating film 51 and the second insulating film 52, the entire exposure is performed after the development. And different. (FIG. 13 (c), FIG. 8 (c))
Next, the passivation film 54 on the source electrode 43, and the passivation film 54 and the gate insulating film 53 on the scanning line terminal 15, the signal line terminal 16, and the terminal metal film 61 of the common wiring terminal 18 are patterned. Then, a contact hole 55 and a terminal part contact hole 62 are opened, respectively. At this time, although not shown, the passivation film 54 and the gate insulating film 53 on the end portion of the common wiring 13, and the passivation film 54 and the gate insulating film 53 on the end portion of the terminal portion metal film 61 of the signal line terminal 16. Then, the passivation film 54 on the end of the signal line 12 on the signal line terminal 16 side is simultaneously patterned and opened. (Fig. 14 (a), Fig. 8 (d))
Next, a transparent conductive film such as ITO having a thickness of 40 nm to 100 nm is formed by sputtering and patterned through a photolithography process, and the pixel electrode 81, the scanning line terminal 15, the signal line terminal 16, and the common wiring terminal 18 terminal portion. For connecting the connection electrode 63 on the metal film 61, the common wire binding wire 17 (not shown) on the end of the common wire 13, and the terminal metal film 61 of the signal line terminal 16 and the signal line 12. A connection electrode (not shown) is formed. At this time, the transparent conductive film is preferably formed by the same method as the formation of the metal film to be the reflective electrode 31 described in the first embodiment to avoid the influence of the outgas. Further, as described in the first embodiment, the transparent conductive film pattern is not formed on the pixel portion contact hole 45 on the source electrode 43. (FIG. 14 (b), FIG. 8 (e))
Next, as in the first embodiment, a Mo film having a thickness of 50 nm to 200 nm and an Al—Nd alloy film having a thickness of 100 nm to 300 nm are sequentially formed by sputtering, and patterned through a photolithography process to obtain a high reflectance. The reflective electrode 31 is formed to complete the TFT substrate. The method of forming the reflective electrode 31 with high reflectivity is exactly the same as in the first embodiment. At this time, the reflective electrode 31 is connected to the source electrode 43 and the pixel electrode 81 of each pixel, and is removed between the pixel regions (on the scanning lines 11 and the signal lines 12). The outside is also removed. Therefore, the Mo and Al—Nd alloy film does not remain on the terminal portions of the scanning line terminal 15, the signal line terminal 16, and the common wiring terminal 18. This situation is also exactly the same as in the first embodiment. Further, since the periphery of the transparent conductive film (ITO film) constituting the pixel electrode 81 is covered with the metal film (Al—Nd alloy / Mo film) constituting the reflective electrode 31, development is performed during development in the photolithography process. There is no risk that the liquid penetrates from the edge of the transparent conductive film through the metal film (because the photoresist is not developed on the edge of the transparent conductive film and the metal film is not exposed to the developer), ITO-Al It is possible to prevent the transparent conductive film from being peeled off due to the battery action, and to greatly reduce point defects of the liquid crystal display device. (FIG. 14 (c), FIG. 8 (e))
Thereafter, a liquid crystal display panel is manufactured in the same manner as in the first embodiment (FIG. 15), and the liquid crystal display device is completed. As described above, a transflective liquid crystal display device with high reflectivity, no yellowing, and no problem of writing failure can be obtained.

次に、本発明の第4の実施形態について図面を参照して説明する。第4の実施形態は、第1から第3までの実施形態のように、出射光の散乱を凹凸を有する反射電極で行うのではなく、対向基板20側のカラーフィルタ21上につけた散乱膜91で行う反射型液晶表示装置の例である。本実施形態では、TFT基板10に凹凸を有する絶縁膜を形成する工程がない。即ち、反射電極31は、パッシベーション膜54上に直接形成される。   Next, a fourth embodiment of the present invention will be described with reference to the drawings. In the fourth embodiment, unlike the first to third embodiments, the scattering of the emitted light is not performed by the reflective electrode having unevenness, but the scattering film 91 provided on the color filter 21 on the counter substrate 20 side. FIG. In this embodiment, there is no step of forming an insulating film having irregularities on the TFT substrate 10. That is, the reflective electrode 31 is formed directly on the passivation film 54.

本発明の第4の実施形態の液晶表示装置の構成及びその製造方法について、図16を参照して簡単に説明する。図16は本実施形態の液晶表示装置のパネル断面図であり、図2のA−A線、C−C線及び一画素部分の断面図である(B−B線部分は図4に示される断面に対応している)。   A configuration of a liquid crystal display device according to a fourth embodiment of the present invention and a manufacturing method thereof will be briefly described with reference to FIG. 16 is a panel cross-sectional view of the liquid crystal display device of the present embodiment, and is a cross-sectional view of the AA line, the CC line, and one pixel portion of FIG. 2 (the BB line portion is shown in FIG. 4). Corresponds to the cross section).

上記構成の液晶表示装置のTFT基板の製造工程は、大別すると、(1)ゲート電極41の金属膜の成膜・パターンニング、(2)ゲート絶縁膜53、a−Si層44a、n+型a−Si層44bの成膜、パターンニング、(3)ドレイン電極42、ソース電極43の金属膜の成膜、パターンニング、(4)パッシベーション膜54の成膜、パターンニング、(5)端子部接続電極63の透明導電膜の成膜、パターンニング、(6)反射電極31の金属膜の成膜、パターンニングの全部で6工程からなる。これは、第1の実施形態から工程(6)〜工程(7)を削除したものであるので、説明は省略する。 The manufacturing process of the TFT substrate of the liquid crystal display device having the above configuration is roughly classified as follows: (1) Formation / patterning of a metal film of the gate electrode 41, (2) Gate insulating film 53, a-Si layer 44a, n + Film formation and patterning of type a-Si layer 44b, (3) Metal film formation and patterning of drain electrode 42 and source electrode 43, (4) Film formation and patterning of passivation film 54, (5) Terminal The film formation and patterning of the transparent conductive film of the partial connection electrode 63 and (6) the film formation and patterning of the metal film of the reflective electrode 31 are all comprised of six steps. Since this is one obtained by deleting the steps (6) to (7) from the first embodiment, the description thereof will be omitted.

但し、反射電極31が、塗布系の絶縁膜でなく、プラズマCVDにより形成された窒化シリコンからなるパッシベーション膜54上に形成されるため、反射電極となる金属膜の成膜方法が第1の実施形態と少し異なる。つまり、本実施形態では、スパッタ装置において、図5(d)、図8(e)の状態のTFT基板10をまず加熱室に搬送し、室温のまま、または170℃以下の温度に加熱した後、TFT基板10を成膜室に搬送し、速やかにMo膜とAl−Nd合金膜の成膜を連続して行う。ここで、加熱室と成膜室は同じチャンバーであっても、異なるチャンバーであってもよい。これは第1の実施形態と異なり、TFT基板10には塗布系の絶縁膜が存在せず、出ガスの影響がほとんどないためである。これにより、白濁のない高反射率のAl−Nd合金膜が得られる(後述する)。本実施形態では、パッシベーション膜54の膜厚を300nm〜800nm程度に厚くするのが望ましい。なお、パッシベーション膜54上を塗布系の絶縁膜で平坦化する場合は、第1の実施形態で工程(6)(第1の絶縁膜51による凹凸形成工程)が削除されるだけであり、反射電極となる金属膜の成膜方法は第1の実施形態と同じになるので、出ガスの影響をほとんどなくすという目的を有する本実施形態にはそぐわない。   However, since the reflective electrode 31 is formed not on the coating type insulating film but on the passivation film 54 made of silicon nitride formed by plasma CVD, the film forming method of the metal film serving as the reflective electrode is the first implementation. A little different from the form. That is, in this embodiment, after the TFT substrate 10 in the state of FIGS. 5D and 8E is first transferred to the heating chamber and heated to room temperature or a temperature of 170 ° C. or lower in the sputtering apparatus. Then, the TFT substrate 10 is transported to the film forming chamber, and the Mo film and the Al—Nd alloy film are rapidly formed continuously. Here, the heating chamber and the film formation chamber may be the same chamber or different chambers. This is because, unlike the first embodiment, the TFT substrate 10 has no coating-type insulating film and is hardly affected by the outgas. Thereby, an Al—Nd alloy film having high reflectivity without white turbidity is obtained (described later). In the present embodiment, it is desirable to increase the thickness of the passivation film 54 to about 300 nm to 800 nm. Note that, when the passivation film 54 is planarized with a coating-type insulating film, the step (6) (unevenness forming step by the first insulating film 51) is merely deleted in the first embodiment, and reflection is performed. Since the method for forming the metal film to be the electrode is the same as that of the first embodiment, it is not suitable for the present embodiment having the purpose of almost eliminating the influence of the outgas.

また、Al−Nd合金膜のNd濃度については、第1の実施形態と全く同様に、0.5wt%以上10wt%以下とするのが望ましい。さらに、成膜時の基板温度を170℃以下にすることにより、反射電極の表面モホロジー(微細な凹凸)を平均ピッチ1μm以下に制御でき、波長域200nm〜400nmの反射率を波長400nmでの反射率の90%以上にすることできる。これにより、後工程の配向膜焼成等の熱処理工程でのヒロックを抑制でき、高反射率の反射電極31が得られると同時に、配向膜の種類にかかわらず、黄変のない反射電極31を得ることができる(後述する)。   The Nd concentration of the Al—Nd alloy film is desirably 0.5 wt% or more and 10 wt% or less, just as in the first embodiment. Furthermore, by setting the substrate temperature during film formation to 170 ° C. or less, the surface morphology (fine irregularities) of the reflective electrodes can be controlled to an average pitch of 1 μm or less, and the reflectance in the wavelength range of 200 nm to 400 nm is reflected at the wavelength of 400 nm. It can be 90% or more of the rate. Thereby, hillocks in a heat treatment step such as alignment film baking in the subsequent step can be suppressed, and a reflective electrode 31 with high reflectivity can be obtained. At the same time, a reflective electrode 31 without yellowing can be obtained regardless of the type of alignment film. (To be described later).

以降、第1の実施形態と同様にして、液晶表示パネルを製造し、液晶表示装置を完成するが、第1の実施形態と異なるのは、対向基板20のカラーフィルタ21上に散乱膜91を設けていることである。この散乱膜91は、例えば、ノボラック系樹脂の中にプラスチック粒子等からなるビーズを混入したものから構成されている。プラスチック粒子の径や配合割合を最適化することにより、凹凸を形成した反射電極と同様な散乱効果が得られる。以上のようにして、高反射率で黄変がなく、書き込み不良の問題のない反射型液晶表示装置が得られる。   Thereafter, in the same manner as in the first embodiment, a liquid crystal display panel is manufactured and a liquid crystal display device is completed. The difference from the first embodiment is that a scattering film 91 is formed on the color filter 21 of the counter substrate 20. It is to provide. The scattering film 91 is made of, for example, a novolac resin in which beads made of plastic particles or the like are mixed. By optimizing the diameter and blending ratio of the plastic particles, the same scattering effect as that of the reflective electrode having irregularities can be obtained. As described above, a reflective liquid crystal display device with high reflectivity, no yellowing, and no problem of writing failure can be obtained.

なお、以上の実施形態では、スイッチング素子として逆スタガードチャネルエッチ型のTFTを用いた例を述べたが、チャネル保護型のTFTや順スタガード型のTFTを用いてもよい。また、これらスタガード型のTFTのみならずコプレナー型のTFTを用いてもよく、さらに、ポリシリコン(p−Si)TFTを用いてもよい。また、スイッチング素子として、TFTでなく、MIMダイオードを用いてもよい。また、スイッチング素子を有する基板と対向基板は、ガラス基板でなく、これ以外の基板、例えばプラスチック基板、セラミックス基板、半導体基板(半透過型液晶表示装置の場合は除く)等を用いてもよい。   In the above embodiment, an example of using an inverted staggered channel etch type TFT as a switching element has been described. However, a channel protection type TFT or a forward staggered type TFT may be used. In addition to these staggered TFTs, coplanar TFTs may be used, and polysilicon (p-Si) TFTs may also be used. Further, an MIM diode may be used as the switching element instead of the TFT. In addition, the substrate having the switching element and the counter substrate may be other than the glass substrate, for example, a plastic substrate, a ceramic substrate, a semiconductor substrate (except for a transflective liquid crystal display device), or the like.

さらに、本発明は、アクティブマトリックス型液晶表示装置のみならず、STN液晶表示装置等にも適用できる。また、第4の実施形態の反射電極となる金属膜の成膜方法は、下地に塗布系の絶縁膜を用いない、例えば、反射電極の凹凸を粗面化したガラス基板で形成するような、反射型もしくは半透過型液晶表示装置全般に広く応用できることは言うまでもない。   Furthermore, the present invention can be applied not only to an active matrix liquid crystal display device but also to an STN liquid crystal display device. In addition, the method for forming a metal film to be a reflective electrode according to the fourth embodiment does not use a coating-type insulating film as a base, for example, the reflective electrode is formed with a roughened glass substrate. Needless to say, the present invention can be widely applied to all reflective or transflective liquid crystal display devices.

次に、本発明の数値限定の根拠について、図17〜図23を参照して以下に説明する。   Next, the grounds for limiting the numerical values of the present invention will be described below with reference to FIGS.

図17は、Al−Nd合金成膜時の基板温度とAl−Nd合金膜の微細な表面凹凸の平均ピッチとの関係を示すグラフの一例である。ここで、Al−Nd合金の組成はNd4.5wt%のものを用い、これをガラス基板上にスパッタにより基板温度を変えて成膜し、サンプルとした。表面凹凸は5万倍の真上からのSEM写真を撮り、定規で計測して求めた。サンプルの斜め方向からのSEM写真から、Alの表面モホロジーは基板温度が下がるにつれて微細になり、凹凸の大きさ、深さ共小さくなることを確認した。基板温度が200℃のときは、凹凸の平均ピッチは1.5μm程度だが、150℃で0.9μm程度、100℃以下で0.5μm以下となることがわかった。一方、凹凸の深さは、正確ではないが、基板温度が200℃のとき0.5μm程度、150℃のとき0.3μm程度、100℃以下で0.1μm〜0.2μm程度になっている。   FIG. 17 is an example of a graph showing the relationship between the substrate temperature during Al—Nd alloy film formation and the average pitch of fine surface irregularities of the Al—Nd alloy film. Here, the composition of the Al—Nd alloy was Nd 4.5 wt%, and this was formed on a glass substrate by changing the substrate temperature by sputtering to prepare a sample. The surface irregularities were determined by taking a SEM photograph from directly above 50,000 times and measuring with a ruler. From the SEM photograph of the sample from an oblique direction, it was confirmed that the surface morphology of Al became finer as the substrate temperature decreased, and the size and depth of the irregularities became smaller. When the substrate temperature was 200 ° C., the average pitch of the irregularities was about 1.5 μm, but was found to be about 0.9 μm at 150 ° C. and 0.5 μm or less at 100 ° C. or less. On the other hand, the depth of the unevenness is not accurate, but is about 0.5 μm when the substrate temperature is 200 ° C., about 0.3 μm when the substrate temperature is 150 ° C., and about 0.1 μm to 0.2 μm at 100 ° C. or less. .

図18は、図17の成膜により得られたAl−Nd合金膜の反射率を示すグラフの一例である。ここで、反射率は測定装置に付属しているAl蒸着膜の反射率を100%として規格化している。成膜時の基板温度が120℃のときは、短波長側になるにつれて、反射率が徐々に上がっていることがわかる。一方、成膜時の基板温度が200℃のときは、400nm程度までは、同じ傾向を示すが、200nm〜400nmの波長域で急激に反射率が低下することがわかった。   FIG. 18 is an example of a graph showing the reflectance of the Al—Nd alloy film obtained by the film formation of FIG. Here, the reflectance is normalized with the reflectance of the Al vapor deposition film attached to the measuring apparatus as 100%. It can be seen that when the substrate temperature during film formation is 120 ° C., the reflectance gradually increases as the wavelength becomes shorter. On the other hand, when the substrate temperature at the time of film formation is 200 ° C., the same tendency is shown up to about 400 nm, but it has been found that the reflectance rapidly decreases in the wavelength range of 200 nm to 400 nm.

図19、図20は、Al−Nd合金膜の膜厚がそれぞれ150nm、300nmのときの、成膜時の基板温度による反射率を示すグラフの一例である。この反射率は図18で成膜時の基板温度が120℃のときのサンプルの反射率を100%として規格化した相対的な反射率である。グラフ中でRTは室温で成膜したデータである。成膜時の基板温度が150℃以上では、200nm〜400nmの波長域で反射率が低下する傾向が見られ、特に、200℃のときは急激に低下することがわかる。また、Al膜厚が厚いほど、この傾向が大きいことがわかる。   FIGS. 19 and 20 are examples of graphs showing the reflectivity depending on the substrate temperature during film formation when the film thickness of the Al—Nd alloy film is 150 nm and 300 nm, respectively. This reflectance is a relative reflectance normalized in FIG. 18 assuming that the reflectance of the sample when the substrate temperature during film formation is 120 ° C. is 100%. In the graph, RT is data formed at room temperature. It can be seen that when the substrate temperature during film formation is 150 ° C. or higher, the reflectance tends to decrease in the wavelength range of 200 nm to 400 nm, and particularly when the substrate temperature is 200 ° C. Moreover, it turns out that this tendency is so large that Al film thickness is thick.

図21は配向膜の透過率を示すグラフの一例である。ここでは、日産化学製の配向膜とJSR製の一般的な配向膜を用いた。配向膜によっては、600nmより短波長側の透過率が低下するものがあることがわかった。成分であるポリイミド等に色がつきやすい材料を用いた場合、このような透過率特性になると推定される。   FIG. 21 is an example of a graph showing the transmittance of the alignment film. Here, an alignment film manufactured by Nissan Chemical Industries and a general alignment film manufactured by JSR were used. It was found that some alignment films have reduced transmittance on the shorter wavelength side than 600 nm. It is presumed that such a transmittance characteristic is obtained when a material that is easily colored is used for the component polyimide or the like.

図22はAl−Nd合金のNd濃度と熱処理によるヒロック及び反射率との関係を示す表である。ここで、ヒロックは、配向膜焼成と同等の230℃、1時間の熱処理行い、光学顕微鏡により観察した。Nd濃度が0.1wt%のときはヒロックが発生した(×印)が、0.5wt%以上では発生しなかった(○印)。また、反射率は、Nd濃度が0.1wt%〜5wt%では、室温で成膜した純Alと同等の反射率を維持できたが、10wt%では波長400nmで約6〜8%低下し、さらに、20wt%では、波長400nmで10%以上低下した。   FIG. 22 is a table showing the relationship between the Nd concentration of the Al—Nd alloy and the hillocks and reflectivity due to heat treatment. Here, hillocks were heat-treated at 230 ° C. for 1 hour, which was equivalent to the alignment film baking, and observed with an optical microscope. When the Nd concentration was 0.1 wt%, hillocks were generated (x mark), but not 0.5 wt% or more (◯ mark). Further, the reflectivity was maintained at the same reflectivity as that of pure Al deposited at room temperature when the Nd concentration was 0.1 wt% to 5 wt%, but at 10 wt%, the reflectivity decreased by about 6 to 8% at a wavelength of 400 nm. Furthermore, at 20 wt%, the wavelength decreased by 10% or more at a wavelength of 400 nm.

図23はAl−Nd合金(Nd濃度4.5wt%)の成膜時の基板温度と製造した液晶表示装置の色見、反射率及び下層金属膜と反射電極となる金属膜とのコンタクト抵抗との関係を示す表である。色見については、Al−Nd合金の成膜時の基板温度が200℃のときで、かつ、配向膜を図21に示した配向膜Bのような透過率特性を持つものを用いたときのみ、黄変が観察された(×印)。また、反射率については、基板温度が170℃、200℃では、波長400nmで約1〜5%低下した(△印)(図19、図20参照)。基板温度が20℃(室温)では、ガラス上では全く問題ないが、有機絶縁膜上では、出ガスの影響で白濁を生じ、波長400nmで5%程度低下した(△印)。また、コンタクト抵抗については、基板温度が70℃以上の場合は問題なかったが、基板温度が20℃(室温)では、出ガスの影響でコンタクト抵抗の増大が確認された(×印)。   FIG. 23 shows the substrate temperature at the time of film formation of the Al—Nd alloy (Nd concentration 4.5 wt%), the color appearance of the manufactured liquid crystal display device, the reflectance, and the contact resistance between the lower metal film and the metal film serving as the reflective electrode. It is a table | surface which shows these relationships. As for coloration, only when the substrate temperature at the time of film formation of the Al—Nd alloy is 200 ° C. and the alignment film has a transmittance characteristic such as the alignment film B shown in FIG. Yellowing was observed (x mark). Further, the reflectance decreased by about 1 to 5% at a wavelength of 400 nm (Δ mark) when the substrate temperature was 170 ° C. and 200 ° C. (see FIGS. 19 and 20). When the substrate temperature was 20 ° C. (room temperature), there was no problem on the glass, but on the organic insulating film, white turbidity was generated due to the influence of the outgas and decreased by about 5% at a wavelength of 400 nm (Δ mark). As for the contact resistance, there was no problem when the substrate temperature was 70 ° C. or higher. However, when the substrate temperature was 20 ° C. (room temperature), an increase in contact resistance was confirmed due to the effect of outgassing (× mark).

以上の実験結果を総合すると、液晶表示装置の反射電極を構成するAl−Nd合金膜に関し、下地がプラズマCVD法で形成された窒化シリコンのような絶縁膜の場合は、その成膜温度は170℃以下であることが望ましい。一方、下地が樹脂のような塗布系の絶縁膜の場合は、70℃以上170℃以下であることが望ましい。これにより、配向膜に図21の配向膜Bのような透過率特性のものを用いた場合でも、液晶表示装置の色見の黄変を防止し、高反射率にすることができる。同時に、下層金属膜と反射電極となる金属膜とのコンタクト不良を防止することができる。このとき、図17から、反射電極を構成するAl−Nd合金膜の表面モホロジーは、その微細な凹凸の平均ピッチが1μm以下であることが望ましく、さらに望ましくは、0.6μm以下であればよい。即ち、このような表面モホロジーに制御する必要がある。また、図19、図20から、反射電極を構成するAl−Nd合金膜の反射率は、波長域200nm〜400nmの反射率が波長400nmでの反射率の95%以上であることが望ましい。すなわち、このような反射率特性を有する膜質に制御する必要がある。   Summarizing the above experimental results, regarding the Al—Nd alloy film constituting the reflective electrode of the liquid crystal display device, when the base is an insulating film such as silicon nitride formed by plasma CVD, the film forming temperature is 170. It is desirable that the temperature is not higher than ° C. On the other hand, when the base is a coating-type insulating film such as a resin, the temperature is desirably 70 ° C. or higher and 170 ° C. or lower. Thereby, even when the alignment film having a transmittance characteristic such as the alignment film B in FIG. 21 is used, yellowing of the color of the liquid crystal display device can be prevented and high reflectance can be achieved. At the same time, it is possible to prevent contact failure between the lower metal film and the metal film serving as the reflective electrode. At this time, from FIG. 17, the surface morphology of the Al—Nd alloy film constituting the reflective electrode is preferably such that the average pitch of the fine irregularities is 1 μm or less, and more preferably 0.6 μm or less. . That is, it is necessary to control to such a surface morphology. Further, from FIGS. 19 and 20, it is desirable that the reflectance of the Al—Nd alloy film constituting the reflective electrode is 95% or more of the reflectance in the wavelength region of 200 nm to 400 nm at the wavelength of 400 nm. That is, it is necessary to control the film quality having such reflectance characteristics.

一方、反射電極を構成するAl−Nd合金膜のNd組成は0.5wt%以上10wt%以下であることが望ましく、さらに望ましくは、0.5wt%以上5wt%以下であればよい。これにより、後工程での熱処理による反射電極へのヒロックの発生を防止でき(従って、配向処理時のラビングロールの汚染等を防止でき)、同時に、高反射率の液晶表示装置にすることができる。   On the other hand, the Nd composition of the Al—Nd alloy film constituting the reflective electrode is preferably 0.5 wt% or more and 10 wt% or less, and more preferably 0.5 wt% or more and 5 wt% or less. As a result, the occurrence of hillocks on the reflective electrode due to the heat treatment in the subsequent process can be prevented (thereby preventing contamination of the rubbing roll during the alignment process), and at the same time, a highly reflective liquid crystal display device can be obtained. .

また、液晶表示装置の反射電極上に形成される配向膜は、波長域300nm〜600nmの光透過率が95%以上であることが望ましい。これにより、液晶表示装置の色見の黄変を防止することができる。   In addition, the alignment film formed on the reflective electrode of the liquid crystal display device desirably has a light transmittance of 95% or more in a wavelength region of 300 nm to 600 nm. Thereby, yellowing of the color of the liquid crystal display device can be prevented.

反射電極の表面モホロジーと配向膜との組合せで、反射型もしくは半透過型液晶表示装置の色見の黄変が発生するのは、いまだ明確ではないが、次のようなメカニズムが推定される。即ち、反射電極表面の凹凸が大きいと、この中に配向膜が入りこみ、配向膜を通過する光路が実効的に長くなり、その分、図21の配向膜Bのような吸収を受けやすくなるためと考えられる。特に、反射型液晶表示装置では、配向膜を光が計4回通過するため、透過型液晶表示装置よりも配向膜による光吸収が多くなる。紫外光領域での光吸収が増えた結果、液晶表示装置の色見が黄変すると考えられる。   It is not clear yet that the color change of the reflective or transflective liquid crystal display device is caused by the combination of the surface morphology of the reflective electrode and the alignment film, but the following mechanism is presumed. That is, if the unevenness of the reflective electrode surface is large, the alignment film will enter this, and the optical path passing through the alignment film will be effectively lengthened, and accordingly, it will be more susceptible to absorption as in the alignment film B of FIG. it is conceivable that. In particular, in a reflective liquid crystal display device, light passes through the alignment film a total of four times, so that light absorption by the alignment film is greater than in the transmissive liquid crystal display device. As a result of increased light absorption in the ultraviolet region, it is considered that the color of the liquid crystal display device turns yellow.

ここで述べた事情は、反射電極がAl−Nd合金や他のAl合金の場合のみならず、他の反射電極材料、例えば、Alよりも反射率の高い銀、銀合金の場合も全く同じように当てはまると考えられる。   The situation described here is exactly the same not only when the reflective electrode is an Al—Nd alloy or another Al alloy, but also when another reflective electrode material, for example, silver or silver alloy having a higher reflectance than Al is used. It seems that this is true.

以上説明したように、本発明によれば、高反射率で色見に黄変がなく、ソース電極と反射電極間のコンタクト抵抗に起因する書き込み不良のない反射型もしくは半透過型液晶表示装置を高歩留で提供することができる。   As described above, according to the present invention, there is provided a reflective or transflective liquid crystal display device having high reflectivity, no color change, and no writing failure due to contact resistance between the source electrode and the reflective electrode. Can be provided with high yield.

本発明の第1の実施形態の液晶表示装置に使用する薄膜トランジスタアレイ基板(TFT基板)の構成を示す概念図である。(第2、第3及び第4の実施形態と共通)It is a conceptual diagram which shows the structure of the thin-film transistor array substrate (TFT substrate) used for the liquid crystal display device of the 1st Embodiment of this invention. (Common to the second, third and fourth embodiments) 本発明の第1の実施形態の液晶表示装置のパネル平面図である。(第2、第3及び第4の実施形態と共通)It is a panel top view of the liquid crystal display device of the 1st Embodiment of this invention. (Common to the second, third and fourth embodiments) 図2のA−A線、C−C線及び一画素部分(図4のB−B線部分の断面に対応)のパネル断面図である。FIG. 5 is a panel cross-sectional view of the AA line, the CC line, and one pixel portion (corresponding to the cross section of the BB line portion of FIG. 4) in FIG. 2. 本発明の第1の実施形態の液晶表示装置のTFT基板の一画素部分の構成を示す平面図である。(第2の実施形態と共通)It is a top view which shows the structure of the one pixel part of the TFT substrate of the liquid crystal display device of the 1st Embodiment of this invention. (Common with the second embodiment) 図4のB−B線部分に対応する工程断面図である。(第2の実施形態と共通)It is process sectional drawing corresponding to the BB line part of FIG. (Common with the second embodiment) 図5に続く製造工程を示す工程断面図である。(第2の実施形態と共通)It is process sectional drawing which shows the manufacturing process following FIG. (Common with the second embodiment) 図6に続く製造工程を示す工程断面図であり、パネル断面図である。It is process sectional drawing which shows the manufacturing process following FIG. 6, and is panel sectional drawing. 本発明の第1の実施形態の液晶表示装置の走査線端子15、信号線端子16、共通配線端子18の短辺方向の工程断面図である。(第2及び第3の実施形態と共通)FIG. 5 is a process cross-sectional view in the short side direction of a scanning line terminal 15, a signal line terminal 16, and a common wiring terminal 18 of the liquid crystal display device according to the first embodiment of the present invention. (Common with the second and third embodiments) 本発明の第2の実施形態の液晶表示装置のTFT基板の製造工程を示す工程断面図であり、図4のB−B線部分に対応し、図5の工程(c)に続く工程断面図である。FIG. 10 is a process cross-sectional view illustrating a manufacturing process of a TFT substrate of a liquid crystal display device according to a second embodiment of the present invention, corresponding to the line B-B in FIG. 4 and a process cross-sectional view subsequent to process (c) in FIG. It is. 図9に続く製造工程を示す工程断面図である。FIG. 10 is a process cross-sectional view illustrating the manufacturing process following FIG. 9. 本発明の第3の実施形態の液晶表示装置のTFT基板の一画素部分の構成を示す平面図である。It is a top view which shows the structure of the one pixel part of the TFT substrate of the liquid crystal display device of the 3rd Embodiment of this invention. 図11のB−B線部分に対応する工程断面図である。It is process sectional drawing corresponding to the BB line part of FIG. 図12に続く製造工程を示す工程断面図である。It is process sectional drawing which shows the manufacturing process following FIG. 図13に続く製造工程を示す工程断面図である。It is process sectional drawing which shows the manufacturing process following FIG. 図14に続く製造工程を示す工程断面図であり、パネル断面図である。It is process sectional drawing which shows the manufacturing process following FIG. 14, and is panel sectional drawing. 本発明の第4の実施形態の液晶表示装置のパネル断面図であり、図2のA−A線、C−C線及び一画素部分(図4のB−B線部分の断面に対応)の断面図である。FIG. 6 is a cross-sectional view of a liquid crystal display device according to a fourth embodiment of the present invention, which is taken along lines AA, CC, and one pixel portion (corresponding to the cross section of the line BB in FIG. 4). It is sectional drawing. Al−Nd合金成膜時の基板温度とAl−Nd合金膜の表面凹凸の平均ピッチとの関係を示すグラフの一例である。It is an example of the graph which shows the relationship between the substrate temperature at the time of Al-Nd alloy film-forming, and the average pitch of the surface unevenness | corrugation of an Al-Nd alloy film. 図17の成膜により得られたAl−Nd合金膜の反射率を示すグラフの一例である。It is an example of the graph which shows the reflectance of the Al-Nd alloy film obtained by the film-forming of FIG. Al−Nd合金膜の膜厚が150nmのときの、成膜時の基板温度による反射率を示すグラフの一例である。It is an example of the graph which shows the reflectance by the substrate temperature at the time of film-forming when the film thickness of an Al-Nd alloy film is 150 nm. Al−Nd合金膜の膜厚が300nmのときの、成膜時の基板温度による反射率を示すグラフの一例である。It is an example of the graph which shows the reflectance by the substrate temperature at the time of film-forming when the film thickness of an Al-Nd alloy film is 300 nm. 配向膜の透過率を示すグラフの一例である。It is an example of the graph which shows the transmittance | permeability of an alignment film. Al−Nd合金のNd濃度と熱処理によるヒロック及び反射率との関係を示す表である。It is a table | surface which shows the relationship between the Nd density | concentration of an Al-Nd alloy, the hillock by heat processing, and a reflectance. Al−Nd合金(Nd濃度4.5wt%)の成膜時の基板温度と製造した液晶表示装置の色見、反射率及び下層金属膜と反射電極となる金属膜とのコンタクト抵抗との関係を示す表である。The relationship between the substrate temperature at the time of film formation of the Al—Nd alloy (Nd concentration 4.5 wt%), the color appearance of the manufactured liquid crystal display device, the reflectance, and the contact resistance between the lower metal film and the metal film serving as the reflective electrode. It is a table | surface shown. 従来の一般的な反射型液晶表示装置の断面図である。It is sectional drawing of the conventional general reflection type liquid crystal display device.

符号の説明Explanation of symbols

10 TFT基板
11 走査線
12 信号線
13 共通配線
14 TFT
15 走査線端子
16 信号線端子
17 共通配線結束線
18 共通配線端子
20 対向基板
21 カラーフィルタ
22 ブラックマトリクス
23 シール材
24 封孔材
31 反射電極
32 有機層間絶縁膜
33 対向電極
34 配向膜
35 面内スペーサー
36 液晶
37 1/4波長板
38 偏向板
41 ゲート電極
42 ドレイン電極
43 ソース電極
44 半導体層
45 画素部コンタクトホール
51 第1の絶縁膜
52 第2の絶縁膜
53 ゲート絶縁膜
54 パッシベーション膜
55 コンタクトホール
61 端子部金属膜
62 端子部コンタクトホール
63 接続電極
71 絶縁膜
81 画素電極
91 散乱膜
10 TFT substrate 11 Scanning line 12 Signal line 13 Common wiring 14 TFT
DESCRIPTION OF SYMBOLS 15 Scan line terminal 16 Signal line terminal 17 Common wiring bundling line 18 Common wiring terminal 20 Counter substrate 21 Color filter 22 Black matrix 23 Seal material 24 Sealing material 31 Reflective electrode 32 Organic interlayer insulation film 33 Counter electrode 34 Orientation film 35 In-plane Spacer 36 Liquid crystal 37 1/4 wavelength plate 38 Deflection plate 41 Gate electrode 42 Drain electrode 43 Source electrode 44 Semiconductor layer 45 Pixel part contact hole 51 First insulating film 52 Second insulating film 53 Gate insulating film 54 Passivation film 55 Contact Hole 61 Terminal part metal film 62 Terminal part contact hole 63 Connection electrode 71 Insulating film 81 Pixel electrode 91 Scattering film

Claims (3)

基板上にバス配線と、前記バス配線に接続されるスイッチング素子と、前記スイッチング素子に接続されるアルミニウムを主体とする合金からなる反射電極と、前記反射電極上に配向膜を有する液晶表示装置の製造方法において、
前記反射電極をガラス基板上または非塗布系の層間絶縁膜上に形成し、前記反射電極の成膜時の基板温度を170℃以下とし、前記反射電極の波長域200nm乃至400nmの反射率を波長400nmでの反射率の90%以上とすることを特徴とする液晶表示装置の製造方法。
A liquid crystal display device comprising: a bus wiring on a substrate; a switching element connected to the bus wiring; a reflective electrode made mainly of an aluminum connected to the switching element ; and an alignment film on the reflective electrode. In the manufacturing method,
The reflective electrode is formed on a glass substrate or an uncoated interlayer insulating film, the substrate temperature at the time of forming the reflective electrode is 170 ° C. or less, and the reflectance of the reflective electrode in a wavelength range of 200 nm to 400 nm is set to a wavelength. A method for manufacturing a liquid crystal display device, characterized in that the reflectivity at 400 nm is 90% or more.
基板上にバス配線と、前記バス配線に接続されるスイッチング素子と、前記スイッチング素子に接続されるアルミニウムを主体とする合金からなる反射電極と、前記反射電極上に配向膜を有する液晶表示装置の製造方法において、
前記反射電極を樹脂基板上または塗布系の層間絶縁膜上に形成し、前記反射電極の成膜時の基板温度を70℃以上150℃以下とし、前記反射電極の波長域200nm〜400nmの反射率を波長400nmでの反射率の90%以上とすることを特徴とする液晶表示装置の製造方法。
A liquid crystal display device comprising: a bus wiring on a substrate; a switching element connected to the bus wiring; a reflective electrode made mainly of an aluminum connected to the switching element ; and an alignment film on the reflective electrode. In the manufacturing method,
The reflective electrode is formed on a resin substrate or a coated interlayer insulating film, the substrate temperature at the time of forming the reflective electrode is set to 70 ° C. or higher and 150 ° C. or lower, and the reflective electrode has a reflectance in a wavelength range of 200 nm to 400 nm. Is 90% or more of the reflectance at a wavelength of 400 nm.
前記反射電極の成膜時の基板加熱を少なくとも成膜前に行うことを特徴とする請求項2記載の液晶表示装置の製造方法。   3. The method of manufacturing a liquid crystal display device according to claim 2, wherein the substrate is heated at the time of forming the reflective electrode at least before the film formation.
JP2005023414A 2001-03-29 2005-01-31 Manufacturing method of liquid crystal display device Expired - Lifetime JP4019080B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005023414A JP4019080B2 (en) 2001-03-29 2005-01-31 Manufacturing method of liquid crystal display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001095824 2001-03-29
JP2005023414A JP4019080B2 (en) 2001-03-29 2005-01-31 Manufacturing method of liquid crystal display device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2004091581A Division JP3655917B2 (en) 2001-03-29 2004-03-26 Liquid crystal display

Publications (2)

Publication Number Publication Date
JP2005141250A JP2005141250A (en) 2005-06-02
JP4019080B2 true JP4019080B2 (en) 2007-12-05

Family

ID=34702664

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005023414A Expired - Lifetime JP4019080B2 (en) 2001-03-29 2005-01-31 Manufacturing method of liquid crystal display device

Country Status (1)

Country Link
JP (1) JP4019080B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7399690B2 (en) 2019-11-22 2023-12-18 カゴメ株式会社 Method for collecting tomato pollen, method for producing stored pollen, and method for producing tomatoes

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20060134540A (en) 2005-06-23 2006-12-28 삼성전자주식회사 Display substrate and method of manufacturing the same, and display apparatus having the display substrate
US8149346B2 (en) * 2005-10-14 2012-04-03 Semiconductor Energy Laboratory Co., Ltd. Display device and manufacturing method thereof
JP4907193B2 (en) * 2006-02-24 2012-03-28 株式会社 日立ディスプレイズ Liquid crystal display
JP5179604B2 (en) * 2010-02-16 2013-04-10 株式会社神戸製鋼所 Al alloy film for display devices

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7399690B2 (en) 2019-11-22 2023-12-18 カゴメ株式会社 Method for collecting tomato pollen, method for producing stored pollen, and method for producing tomatoes

Also Published As

Publication number Publication date
JP2005141250A (en) 2005-06-02

Similar Documents

Publication Publication Date Title
JP3908552B2 (en) Liquid crystal display device and manufacturing method thereof
KR100799440B1 (en) Liquid crystal display device and method of manufacturing the same
KR100497759B1 (en) Liquid crystal display device and manufacturing method of same
US7833813B2 (en) Thin film transistor array panel and method of manufacturing the same
KR20020000921A (en) A method for fabricating array substrate for liquid crystal display device and the same
JP4651826B2 (en) Reflective display device and manufacturing method thereof
JP2007003779A (en) Transflective liquid crystal display device
US20060290830A1 (en) Semi-transmissive liquid crystal display device and method of manufacture thereof
KR20030070549A (en) Liquid crystal display device and manufacturing method thereof
JP4170110B2 (en) Liquid crystal display device and manufacturing method thereof
JP4019080B2 (en) Manufacturing method of liquid crystal display device
KR20060032034A (en) In-plain switching liquid cristal display device
US20070188682A1 (en) Method for manufacturing a display device
KR20050111867A (en) Liquid crystal display and manufacturing method thereof
JP3655917B2 (en) Liquid crystal display
JP4628693B2 (en) SUBSTRATE FOR LIQUID CRYSTAL DISPLAY DEVICE, ITS MANUFACTURING METHOD, AND LIQUID CRYSTAL DISPLAY DEVICE EQUIPPED
JP2004004164A (en) Substrate for liquid crystal display device, liquid crystal display device equipped with the same, and method for manufacturing the same
JP2001305583A (en) Liquid crystal display device
KR100783594B1 (en) Method of forming wiring layer in liquid crystal display device
KR101006433B1 (en) Liquid crystal display and substrate for the same
KR20080034634A (en) Thin film transistor substrate and method of manufacturing the same, and liquid crystal display having the same
US20110095300A1 (en) Thin film transistor array panel and method for manufacturing the same
JP2009300636A (en) Liquid crystal display panel and method of manufacturing the same

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050222

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20070411

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20070420

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070530

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070729

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20070907

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20070921

R150 Certificate of patent or registration of utility model

Ref document number: 4019080

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100928

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110928

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120928

Year of fee payment: 5

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120928

Year of fee payment: 5

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120928

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130928

Year of fee payment: 6

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term