JP3901925B2 - Active matrix type liquid crystal display device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The invention disclosed in this specification relates to a configuration of a pixel region of an active matrix liquid crystal display device, and in particular, a configuration of an auxiliary capacitor connected in parallel to a pixel electrode and a boundary portion between adjacent pixels. The present invention relates to a configuration of a black matrix for preventing light leakage.
[0002]
[Prior art]
A liquid crystal display device having an active matrix circuit is known. This includes a plurality of source bus lines for transmitting image data, a plurality of gate bus lines arranged so as to intersect with the source bus lines, and a plurality of pixels provided at intersections thereof. A transistor (particularly a thin film transistor) is usually used as the switching element.
[0003]
The pixel has not only a transistor for switching but also a pixel electrode, and has a structure in which the gate electrode of the transistor is connected to the gate bus line, the source is connected to the source bus line, and the drain is connected to the pixel electrode. Note that in the operation of the transistor, the distinction between the source and the drain is not a steady one and varies depending on the signal according to the normal electric circuit definition. In the following description, the impurity region provided in the transistor Of these, the one simply connected to the source bus line is called the source, and the one connected to the pixel electrode is called the drain.
[0004]
Each pixel has one or more transistors. In particular, the connection of two or more transistors in series is effective because the leakage current can be reduced even when the transistors are not selected. Even in such a case, the above definition is applied, and an impurity region that is not connected to either the source bus line or the pixel electrode is not particularly defined.
[0005]
The pixel electrode forms a capacitor (capacitor) between the opposing electrodes across the liquid crystal. The above-described transistor functions as a switching element that takes charge into and out of this capacitor.
However, in actual operation, the capacitance is too small with only the pixel electrode portion, and the necessary charge cannot be held for a sufficient time. Therefore, it is necessary to provide an auxiliary capacity separately.
[0006]
Conventionally, this auxiliary capacitor (also referred to as a storage capacitor) has been separately provided with an opaque conductive material such as metal, and a capacitor is formed between this auxiliary capacitor and a pixel electrode or a semiconductor layer. Usually, the gate bus line in the next row was used as the counter electrode. However, when the pixel area is large, the capacitance formed using the gate bus line is sufficient, but when the pixel area is small, the capacitance is insufficient with the original gate bus line alone, and the auxiliary capacitance electrode In order to secure the area, it was required to expand the gate bus line more than necessary. In such a structure, there is a portion that shields light in the pixel, so that the aperture ratio decreases.
[0007]
[Problems to be solved by the invention]
An object of the invention disclosed in this specification is to provide a structure in which an auxiliary capacitance is increased without reducing the aperture ratio of a pixel. In addition, an object of the present invention is to provide a configuration of a black matrix for solving light leakage that occurs at a boundary portion between adjacent pixels.
[0008]
[Means for Solving the Problems]
The invention disclosed in this specification is
The pixel has a pixel electrode made of the first transparent conductive film,
The pixel electrode overlaps the gate bus line and the source bus line;
Between the gate bus line and the source bus line and the pixel electrode, a layer of a common electrode made of a second transparent conductive film is provided so as to cover the gate bus line and the source bus line,
The common electrode is held at a constant potential.
[0009]
That is, the common electrode is disposed so as to cover the bus line, and the pixel electrode is disposed so as to overlap the bus line. Therefore, the common electrode and the pixel electrode overlap each other, and an auxiliary capacitance is obtained by this overlap. In addition, in the conventional auxiliary capacitor, at least one of the electrodes is made of an opaque material, but in the present invention, since any electrode is made of a transparent material, it is not a factor that hinders display, The aperture ratio is maintained.
[0010]
In the above configuration, the pixel electrode is overlapped with the source bus line and the gate bus line, and the boundary of the pixel electrode is provided on the source bus line and the gate bus line, so that the source bus line and the gate bus line are the black matrix. can do. In general, liquid crystal display devices are affected by the electric field of an adjacent electrode at the boundary between pixel electrodes, so that an image different from the display image of the pixel is generated, or light leakage occurs due to the blank of the electric field. Or
[0011]
Accordingly, it is not appropriate to use such a boundary portion of the pixel electrode for display, and usually this portion is shielded by a black matrix. Conventionally, it has been required to form the black matrix by another layer. For example, Japanese Patent Laid-Open No. 6-216421 proposes to use a bus line as a black matrix. However, in practice, the display becomes unstable because the signal of the bus line affects the pixel electrode.
[0012]
In the present invention, this problem is solved. That is, since a common electrode exists between the bus line and the pixel electrode, a signal on the bus line is shielded by the common electrode and does not affect the pixel electrode.
When a top gate type (transistor having a gate electrode on a semiconductor layer) is used as the switching transistor, if the main light is incident from above the substrate, that is, from the pixel electrode side, it is below the gate electrode. Light can be prevented from entering the semiconductor layer, which is effective in stabilizing the operation of the transistor.
If a coating made of the same material as the source bus line is provided on the gate bus line at the intersection of the semiconductor layer and the gate bus line, the light shielding effect can be further enhanced and the operation can be further stabilized. it can.
[0013]
As an insulating material between the common electrode and the pixel electrode, an organic resin may be used in addition to an inorganic material (for example, silicon oxide or silicon nitride). In particular, when a flat insulating layer is formed by a spin coating method or the like, it is effective in reducing unevenness on the surface and making the electric field applied to the liquid crystal molecules uniform.
As the transparent conductive film in the invention disclosed in the present specification, SnO ₂ in addition to ITO (indium tin oxide), and further, a material mainly composed of these materials can be used.
[0014]
【Example】
Embodiment 1 FIGS. 1 and 2 show a pixel configuration of an active matrix liquid crystal display device using the invention disclosed in this specification. FIG. 1 shows an outline of a manufacturing process sectional view of this embodiment, and FIG. 2 shows an arrangement of each bus line, common electrode, pixel electrode, semiconductor layer, and the like of this embodiment. The numbers in FIG. 2 correspond to those in FIG. 1 is conceptual and is not exactly the same as the arrangement of FIG.
[0015]
FIG. 1 and FIG. 2 show only the configuration on the substrate side where the thin film transistor is arranged. In fact, there is a counter substrate (opposite substrate), and the counter substrate and the counter substrate are shown in FIG. The liquid crystal is held with a gap of several μm between the substrate and the substrate.
Hereinafter, the manufacturing process will be described with reference to FIG. As shown in FIG. 1A, a semiconductor layer (active layer) 12 of a transistor is provided on a glass substrate 11 provided with a base silicon oxide film (not shown).
[0016]
The active layer 12 is composed of a crystalline silicon film obtained by crystallizing an amorphous silicon film by heating or laser light irradiation. A gate insulating film 13 is formed covering the active layer 12. The material of the gate insulating film 13 is preferably silicon oxide or silicon nitride. For example, a silicon oxide film formed by a plasma CVD method may be used. On the gate insulating film, a gate bus line (gate electrode) 14 is formed of an aluminum-titanium alloy by a known sputtering method. (Fig. 1 (A))
The circuit arrangement in this state is shown in FIG. (Fig. 2 (A))
[0017]
Next, N-type or P-type impurities are introduced into the active layer by a known ion doping method using the gate bus line as a mask to form the source 15 and the drain 16. After the introduction of the impurities, if necessary, the impurities may be activated (recrystallization of the semiconductor film) by thermal annealing or laser annealing.
After the above steps, a silicon nitride film (or silicon oxide film) 17 is deposited by plasma CVD. This functions as a first interlayer insulator. (Fig. 1 (B))
[0018]
Next, contact holes reaching the source 15 and the drain 16 are formed in the first interlayer insulator 17. Then, a multilayer film of titanium and aluminum is formed by a known sputtering method, and this is etched to form the source bus line 18 and the drain electrode 19.
After the above steps, a silicon nitride film (or silicon oxide film) 20 is deposited by plasma CVD. This functions as a second interlayer insulator. (Figure 1 (C))
The circuit arrangement in this state is shown in FIG. (Fig. 2 (B))
[0019]
Next, the first organic resin layer 21 is formed by spin coating. The upper surface of the organic resin layer is formed flat. Then, an ITO film is formed by a known sputtering method, and this is etched to form the common electrode 22. (Figure 1 (D))
The circuit arrangement in this state is shown in FIG. In the figure, the position of the common electrode is shown by shading for easy understanding. As can be seen from the figure, the common electrode is formed so as to cover the source bus line and the gate bus line. (Fig. 2 (C))
[0020]
Further, the second organic resin layer 23 is formed by a spin coating method. Then, an ITO film is formed by a known sputtering method, and this is etched to form pixel electrodes 24a and 24b. The pixel electrode 24b is a pixel electrode of the transistor, and the pixel electrode 24a is an adjacent pixel electrode. Capacitors 25a and 25b are formed in the portions where the pixel electrodes 24a and 24b overlap the common electrode 22, respectively. (Figure 1 (E))
[0021]
The circuit arrangement in this state is shown in FIG. In the drawing, the pixel electrode and the position of the overlapping portion of the pixel electrode and the common electrode (that is, the portion where the capacitance exists) are shown by shading for easy understanding. As can be seen from the figure, the pixel electrode is formed so as to overlap the source bus line and the gate bus line. As a result, all the boundary portions of the pixel electrodes exist on the bus line, and the bus line functions as a black matrix. (Fig. 2 (D))
[0022]
Embodiment 2 FIGS. 3 and 4 show a pixel configuration of an active matrix liquid crystal display device using the invention disclosed in this specification. FIG. 3 shows an outline of a manufacturing process sectional view of this embodiment, and FIG. 4 shows an arrangement of each bus line, common electrode, pixel electrode, semiconductor layer, and the like of this embodiment. The numbers in FIG. 4 correspond to those in FIG. 3 is conceptual and is not exactly the same as the arrangement of FIG.
[0023]
As shown in FIG. 1A, a semiconductor layer (active layer) 32 of a transistor is provided on a glass substrate 31 provided with a base silicon oxide film (not shown). A gate insulating film 33 is formed covering the active layer 32. A gate bus line (gate electrode) 34 is formed of an aluminum-titanium alloy on the gate insulating film. (Fig. 3 (A))
[0024]
FIG. 4A shows the circuit arrangement in this state. Unlike the case of the first embodiment, in this embodiment, the gate bus line of the gate electrode portion of the transistor has a narrow shape. (Fig. 4 (A))
Next, an N-type or P-type impurity is introduced to form a source 35 and a drain 36. After the above steps, a first interlayer insulator 37 of a silicon nitride film (or silicon oxide film) is deposited. (Fig. 3 (B))
[0025]
Next, contact holes reaching the source 35 and the drain 36 are formed in the first interlayer insulator 37. Then, a source bus line 38, a drain electrode 39, and a protective film 40 are formed. After the above steps, a second interlayer insulator 41 of a silicon nitride film (or silicon oxide film) is deposited. (Figure 3 (C))
The circuit arrangement in this state is shown in FIG. The protective film 40 has a floating potential insulated from the source bus line 38, the drain electrode 39, and other wirings / electrodes. Such a protective film 40 is effective in blocking light incident on the transistor from above. (Fig. 4 (B))
[0026]
Next, the common electrode 42 is formed from an ITO film. Further, an organic resin layer 43 is formed. (Fig. 3 (D))
The circuit layout in this state is shown in FIG. In the figure, the position of the common electrode is shown by shading for easy understanding. As can be seen from the figure, the common electrode is formed so as to cover the source bus line and the gate bus line. Strictly speaking, the protective film 40 does not need to be covered with the common electrode. This is because since the protective film has a floating potential, the protective film is unlikely to have any influence on the pixel electrode. However, in this embodiment, as shown in the figure, the protective film 40 is also covered with the common electrode 42. (Fig. 4 (C))
[0027]
Then, the pixel electrodes 44a and 44b are formed from the ITO film. The pixel electrode 44b is a pixel electrode of the transistor, and the pixel electrode 44a is an adjacent pixel electrode. Capacitors 45a and 45b are formed in portions where the pixel electrodes 44a and 44b overlap the common electrode 42, respectively. (Figure 3 (E))
The circuit arrangement in this state is shown in FIG. In the drawing, the pixel electrode and the position of the overlapping portion of the pixel electrode and the common electrode (that is, the portion where the capacitance exists) are shown by shading for easy understanding. As can be seen from the figure, the pixel electrode is formed so as to overlap the source bus line and the gate bus line. As a result, all the boundary portions of the pixel electrodes exist on the bus line, and the bus line functions as a black matrix. (Fig. 4 (D))
[0028]
【The invention's effect】
By configuring the electrode facing the pixel electrode constituting the auxiliary capacitance with a transparent conductive film, the auxiliary capacitance can be increased without causing a decrease in the groove opening ratio. In addition, the source bus line and the gate bus line can also function as a black matrix. In particular, the present invention is effective in improving the aperture ratio in a state where the pixel is small and the design rule is maintained. Thus, the present invention is industrially useful.
[Brief description of the drawings]
FIG. 1 shows a cross-sectional view of a manufacturing process of one embodiment of the present invention. Example 1
FIG. 2 shows an arrangement of wiring and the like in the first embodiment.
FIG. 3 is a sectional view showing a manufacturing process of one embodiment of the present invention. (Example 2)
4 shows an arrangement of wiring and the like in Example 2. FIG.
[Explanation of symbols]
11, 31 Glass substrate 12, 32 Active layer 13, 33 Gate insulating film 14, 34 Gate bus line (gate electrode)
15, 35 Source 16, 36 Drain 17, 37 First interlayer insulator 18, 38 Source bus line 19, 39 Drain electrode 20, 41 Second interlayer insulator 21, 43 (first) organic resin layer 22, 42 Common electrode 23 Second organic resin layer 24, 44 Pixel electrode 25, 45 Auxiliary capacitor 40 Protective film

Claims (6)

A semiconductor layer;
A gate insulating film on the semiconductor layer;
A gate electrode on the gate insulating film;
A first interlayer insulating film on the semiconductor layer, the gate insulating film and the gate electrode;
A source bus line and a light shielding film electrically connected to a source of the semiconductor layer on the first interlayer insulating film;
A second interlayer insulating film on the source bus line and the light shielding film;
A common electrode to which a constant potential is applied on the second interlayer insulating film;
A third interlayer insulating film on the common electrode;
A pixel electrode made of a transparent conductive film electrically connected to the drain of the semiconductor layer on the third interlayer insulating film;
Have
The portion where the gate electrode intersects the semiconductor layer has a shape narrower than the gate bus line,
The light shielding film is provided on a portion where the gate electrode and the semiconductor layer intersect with each other, and is provided in the same layer as the source bus line with the same material, and the potential of the light shielding film is a floating potential. An active matrix liquid crystal display device. A semiconductor layer;
A gate insulating film on the semiconductor layer;
A gate electrode on the gate insulating film;
A first interlayer insulating film on the semiconductor layer, the gate insulating film and the gate electrode;
A source bus line and a light shielding film electrically connected to a source of the semiconductor layer on the first interlayer insulating film;
A second interlayer insulating film on the source bus line and the light shielding film;
A common electrode to which a constant potential is applied on the second interlayer insulating film;
A third interlayer insulating film on the common electrode;
A pixel electrode made of a transparent conductive film electrically connected to the drain of the semiconductor layer on the third interlayer insulating film;
Have
The portion where the gate electrode intersects the semiconductor layer has a shape narrower than the gate bus line,
The light shielding film is provided on a portion where the gate electrode and the semiconductor layer intersect, is provided in the same layer as the source bus line, and the potential of the light shielding film is a floating potential,
The active matrix liquid crystal display device, wherein the common electrode is provided so as to cover the source bus line and the gate bus line. 3. The active matrix liquid crystal display device according to claim 1 , wherein a boundary portion of the pixel electrode exists above the gate bus line and the source bus line. 4. The active matrix liquid crystal display device according to claim 1, wherein the common electrode is made of a transparent conductive film. 5. The active matrix liquid crystal display device according to claim 1, wherein the third interlayer insulating film is made of an organic resin layer. 6. The light shielding film according to claim 1, wherein the light shielding film is not covered with the common electrode. An active matrix type liquid crystal display device.

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