JP3892865B2 - Semiconductor device, communication device, and inspection method of semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device, a communication device, and a semiconductor device inspection method.

Insertion loss of a high-frequency switch circuit provided between an antenna and a transmission circuit or between an antenna and a reception circuit in accordance with a reduction in power consumption of a mobile communication device that transmits and receives a high-frequency signal (hereinafter also referred to as an RF (Radio Frequency) signal) And a reduction in current consumption consumed by the RF switch circuit itself are required. For this reason, it is preferable that the switching element has a small insertion loss and does not require a DC bias current unlike a diode. As such a switching element, for example, a HEMT (High Electron Mobility Transistor) which is one of high performance FETs (Field Effect Transistors) has been adopted. This is because the high-frequency switch circuit constituted by the HEMT has its own consumption current substantially zero, and can realize high isolation characteristics and low insertion loss. The configuration of the high frequency switch circuit includes a shunt type switch circuit and a resonance type switch circuit (see Patent Document 1).
JP-A-6-152361 JP-A-11-27122 Japanese Patent Laid-Open No. 10-308602

  FIG. 13 is a circuit diagram of a typical conventional shunt type SPST (Single-Pole Single-Throw) switch circuit. This shunt-type switch circuit includes two field effect transistors (hereinafter referred to as transistors) T1 and T2, and switches an RF signal using them. In a pre-shipment inspection of a product including a shunt switch circuit, the quality of the transistors T1 and T2 is usually determined by measuring the direct current (DC) characteristics of the transistors T1 and T2. In general, even if a transistor is used for an RF signal, it can be determined whether the transistor is good or bad by inspecting the DC characteristics without inspecting the RF characteristics.

  FIG. 14 is a circuit diagram of a conventional typical resonance type SPST switch circuit. The resonant switch circuit includes a transistor T3 as a switching element and an inductor L1 connected in parallel to the transistor T3. In general, a resonance type switch circuit is superior in isolation characteristics with respect to an RF signal as compared with a shunt type switch circuit.

  However, in the pre-shipment inspection of the product including the resonant switch circuit, the DC characteristic of the transistor T3 cannot be inspected. This is because the source and drain of the transistor T3 are connected by the inductor L1, and therefore the source and drain are short-circuited for direct current. Therefore, in the pre-shipment inspection of the product including the resonance type switch circuit, the RF characteristics as the resonance circuit of the transistor T3 and the inductor L1 must be inspected in order to judge the quality of the transistor T3. This means that a dedicated inspection device for inspecting the RF characteristics is required in the inspection process. As a result, there is a problem that the inspection of the product including the resonance type switch circuit is more expensive than the inspection of the product including the shunt type switch circuit.

  SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a semiconductor device, a semiconductor device inspection method, and such a semiconductor device capable of measuring DC characteristics of a switching element in the circuit in an inspection process of a semiconductor device including a resonant switch circuit. A communication device including a semiconductor device is provided.

  A semiconductor device according to an embodiment of the present invention includes a first electrode, a second electrode, and a third electrode, and the first electrode and the second electrode are based on a potential of the third electrode. A semiconductor switching element in which a high-frequency signal is conducted between the first electrode and the second electrode, the bias voltage at the first electrode and the second electrode being substantially the same, and the first electrode in parallel with the semiconductor switching element, An inductive element and a capacitive element connected to the second electrode and connected in series with each other are provided.

A communication device according to an embodiment of the present invention includes a first antenna, a first electrode, a second electrode, and a third electrode, and is received by the first electrode via the antenna. A first semiconductor switching element that conducts a high-frequency received signal to the second electrode based on the potential of the third electrode, and the bias voltages of the first electrode and the second electrode are substantially the same; The first inductive element and the first capacitive element connected in parallel to the first electrode and the second electrode in parallel with the first semiconductor switching element, and connected in series with each other, and the second A receiving-side amplifier that amplifies the received signal output from the electrode;
A transmission-side amplifier that amplifies a high-frequency transmission signal; a fourth electrode, a fifth electrode, and a sixth electrode; and the transmission signal input from the transmission-side amplifier to the fourth electrode is 6 is conducted to the fifth electrode based on the potential of the sixth electrode, the transmission signal is output from the fifth electrode to the antenna, and the bias voltages at the fourth electrode and the fifth electrode are substantially the same. And a second inductive element and a second capacitive element that are connected in parallel to the second semiconductor switching element and connected in series to each other.

  A semiconductor device according to another embodiment of the present invention includes a first electrode, a second electrode, and a third electrode, and the first electrode and the third electrode are based on a potential of the third electrode. A high frequency signal is conducted between the second electrodes, and a first semiconductor switching element having substantially the same bias voltage at the first electrode and the second electrode, and a first semiconductor switching element coupled to the first electrode A first bonding pad; a second bonding pad coupled to the second electrode; a first capacitive element connected in series between the first electrode and the first bonding pad; A second capacitor connected in series between a second electrode and the second bonding pad; and a first capacitor connected to a node between the first capacitor and the first electrode. A test pad, the second capacitive element, and the second electrode; A first test pad connected to the first electrode and the second electrode in parallel to the first semiconductor switching element and connected to the first test pad connected in series with each other An inductive element and a third capacitive element.

A method for inspecting a semiconductor device according to an embodiment of the present invention includes a first electrode, a second electrode, and a third electrode, and the first electrode and the third electrode are based on the potential of the third electrode. A switching element that conducts or cuts off a high-frequency signal between the second electrode and the first electrode and the second electrode has substantially the same bias voltage, and the switching element is connected in parallel to the switching element. A method for inspecting a semiconductor device comprising an inductive element and a capacitive element connected to one electrode and the second electrode and connected in series to each other,
Applying a DC voltage to the first electrode, the second electrode, and the third electrode; and between the first electrode and the second electrode when the switching element is in an ON state. And measuring a resistance value or a current value between the first electrode and the second electrode when the switching element is in an OFF state.

  The semiconductor device according to the present invention makes it possible to measure the DC characteristics of the switching elements in the circuit in the inspection process of the semiconductor device including the resonant switch circuit.

  Embodiments according to the present invention will be described below with reference to the drawings. However, the present invention is not limited to these embodiments. A semiconductor device according to an embodiment of the present invention includes a field effect transistor (hereinafter referred to as a transistor), and an inductor and a capacitor connected in parallel to the transistor and connected in series to each other. Yes. Accordingly, the transistor characteristics can be inspected by performing the DC characteristic inspection without performing the RF characteristic inspection.

(First embodiment)
FIG. 1 is a circuit diagram of a resonant SPST (Single-Pole Single-Throw) switch circuit 100 (hereinafter simply referred to as a switch circuit 100) according to the first embodiment of the present invention. The switch circuit 100 includes a transistor T10, an inductor L10, a capacitor C10, and a resistor R10.

  The transistor T10 is a field effect transistor, for example, a HEMT. In normal use, the transistor T10 conducts an RF signal from the terminal 10 connected to the drain to the terminal 20 connected to the source based on the potential of the terminal 30 connected to the gate. Alternatively, the transistor T <b> 10 blocks conduction of the RF signal between the terminal 10 and the terminal 20 based on the potential of the terminal 30.

  One end of the inductor L10 is connected to the drain of the transistor T10, and the other end is connected to one end of the capacitor C10. The other end of the capacitor C10 is connected to the source of the transistor T10. Therefore, the inductor L10 and the capacitor C10 are connected in series with each other, and are connected in parallel between the source and drain of the transistor T10. The resistor R10 is connected to the gate of the transistor T10.

  As described above, the capacitor C10 is provided between the inductor L10 and the source of the transistor T10, whereby the DC current flowing through the inductor L10 is cut off. That is, when a DC signal is applied between the terminal 10 and the terminal 20, the DC signal cannot pass between the terminal 10 and the terminal 20 unless it passes through the transistor T10. The capacitor C10 can be realized by, for example, a MIM (Metal-Insulator-Metal) capacitance.

  FIG. 2 is a flowchart showing a flow of the inspection method of the switch circuit 100. First, a DC voltage is applied to the terminals 10, 20 and 30 (S10). The resistance value between the source and the drain when the transistor T10 is in the on state is measured. Further, the resistance value between the source and the drain when the transistor T10 is in the OFF state is measured (S20). Instead of the resistance value between the source and the drain, a current value may be measured. Further, other DC characteristics of the transistor T10 are measured. Thereby, the quality of the switch circuit 100 can be determined.

  Since the capacitor C10 blocks the DC current flowing through the inductor L10, the DC characteristic of the transistor T10 can be measured in this way. That is, although the switch circuit 100 according to the present embodiment is a resonant switch circuit, the transistor T10 can be inspected with a DC signal in the inspection process of the semiconductor device. As a result, a dedicated inspection device for inspecting the RF characteristics is not required, and the manufacturing cost of the semiconductor device is reduced.

FIG. 3 is an equivalent circuit diagram of the switch circuit 100 in the OFF state according to the present embodiment. FIG. 4 is an equivalent circuit diagram of the conventional resonant switch circuit shown in FIG. 14 in the OFF state. Therefore, the transistor T10 is indicated as a source-drain parasitic capacitance C _off (T10) (hereinafter referred to as an off-capacitance C _off (T10)), and the transistor T3 is indicated as a source-drain parasitic capacitance C _off (T3) ( Hereinafter, it is indicated as “off-capacitance C _off (T3)”.

  FIG. 5 is a graph comparing the isolation characteristics of the switch circuit 100 according to the present embodiment and the conventional resonant switch circuit. This graph shows a simulation result when the isolation characteristic is measured using the equivalent circuit shown in FIG. 3 and FIG. The isolation characteristic is indicated by an electrical transfer coefficient between the terminal 10 and the terminal 20 when the transistor T10 or T3 is in an off state, so-called S parameter (| S21 |).

The simulation conditions for the equivalent circuit shown in FIG. 3 are as follows. The on-resistance of the transistor T10 is 4Ω when the gate voltage of the transistor T10 is 0V. When the gate voltage of the transistor T10 is −3 V, the off-capacitance C _off (T10) of the transistor T10 is 187 fF. The switch circuit 100 is assumed to be a circuit for the 5.2 GHz band, and the resonance frequency of the equivalent circuit shown in FIG. 3 is set to 5.2 GHz. The capacitance of the capacitor C10 was 1 pF. When the 1 pF capacitor C10 is formed with an MIM capacitor, the capacitor C10 can be added to the switch circuit 100 without substantially increasing the area of the switch circuit 100.

  At this time, the value of the inductor L10 was 5.96 nH. When such an inductor L10 is designed in the form of a square spiral inductor made of gold wiring having a thickness of 1.2 μm, a line width of 15 μm, and a line interval of 5 μm, the length of one side of the inductor L10 is about 295 μm, and the number of turns is It became 4.75 volumes. Further, the wiring resistance of the inductor L10 considering the skin effect was 8.74Ω. This wiring resistance was taken into the simulation conditions as a parasitic resistance Rs10 of the inductor L10. As a result, the isolation characteristic of the switch circuit 100 was | S21 | = −30 dB at 5.2 GHz as shown in FIG.

  The simulation conditions for the equivalent circuit shown in FIG. 4 are as follows. The resonance frequency of the equivalent circuit shown in FIG. 4 is also 5.2 GHz, and the on-resistance and off-capacitance of the transistor T3 are the same as the conditions in the transistor T10. At this time, the value of the inductor L1 was 5.02 nH. When such an inductor L1 is designed in the form of a square spiral inductor using the same gold wiring as that used for the inductor L10, the length of one side of the inductor L1 is about 273 μm and the number of turns is 4.75. It became a volume. Further, the wiring resistance of the inductor L1 considering the skin effect was 7.8Ω. This wiring resistance was taken into the simulation conditions as the parasitic resistance Rs1 of the inductor L1. As a result, the isolation characteristic of the conventional resonant switch circuit was | S21 | = −31 dB at 5.2 GHz as shown in FIG.

  From these results, it was found that the switch circuit 100 according to the present embodiment deteriorates only by 1 dB as compared with the conventional resonance type switch circuit. This means that the switch circuit 100 has an isolation characteristic comparable to that of a conventional resonant switch circuit.

  As can be seen from FIG. 5, the switch circuit 100 is greatly different in isolation characteristics from the conventional resonant switch circuit for low-frequency signals. However, the switch circuit 100 has substantially the same isolation characteristics as the conventional resonant switch circuit for high-frequency signals. This is because the impedance of the capacitor C10 is large for a low-frequency signal, but the impedance of the capacitor C10 decreases as the frequency of the signal increases. Therefore, the switch circuit 100 is preferably applied to a signal in a higher frequency band in actual use. However, it is also possible to apply the switch circuit 100 to a signal in a lower frequency band by increasing the capacitance of the capacitor C10.

Further, in the simulation of the equivalent circuit shown in FIG. 3, the simulation was performed with the capacitor C10 smaller than 0.1 pF and the off capacitance C _off (T10). Other conditions are as described above. In this case, the inductor L10 was 14.4 nH. When the inductor L10 was designed in the form of a square spiral inductor using the same gold wiring as that used for the inductor L10, the length of one side of the inductor L10 was about 400 μm and the number of turns was 7. In this case, although the isolation characteristic is equivalent to −30 dB, it has been found that the area of the inductor L10 is about 1.8 times the area of the inductor L10 when the capacitor C10 is 1 pF. Therefore, in order to reduce the area of the switch circuit 100, the capacitor C10 is preferably larger than the off-capacitance C _off (T10).

  The switch circuit 100 according to the present embodiment can inspect the transistor T10 by measuring DC characteristics while having an isolation characteristic substantially equal to that of the conventional resonant switch circuit. That is, although the switch circuit 100 is a resonance type switch circuit, it does not require the RF measurement that is indispensable in the inspection of the conventional resonance type switch circuit, and is inspected by the DC measurement like the test of the shunt type switch circuit. Can do. As a result, the RF evaluation cost that occupies a large proportion of the product cost can be reduced.

  Capacitors and inductors have higher reproducibility in manufacturing than transistors. Therefore, if the quality of the transistor is found by measuring the DC characteristics of the transistor, the quality of the entire switch circuit is almost found. Further, the determination of the RF signal switching element by the inspection of the DC characteristic is actually performed in the shunt type switch circuit, and thus the reliability of the inspection has been proven.

  In this embodiment, even if the positional relationship between the capacitor C10 and the inductor L10 is reversed, the effect of this embodiment is not lost. Even if the positional relationship between the drain and source of the transistor T10 is reversed, the effect of this embodiment is not lost.

  By the way, a circuit in which a capacitor and an inductor connected in series with each other are connected in parallel to a bipolar transistor or a diode is known (see Patent Document 1 and Patent Document 2). In these known examples, the capacitor is indispensable during normal use in order to differentiate the bias across the bipolar transistor or diode. Therefore, these circuits do not operate normally without a capacitor.

  On the other hand, in the present embodiment, the capacitor C10 is unnecessary during normal use. Therefore, this embodiment operates normally without the capacitor C10. However, the inventor has paid attention to the fact that the cost required for the inspection process can be reduced by intentionally adding the capacitor C10 which is not necessary at the time of normal use. That is, the present embodiment is similar in structure to the known example, but both are remarkably different in conception and effect.

(Second Embodiment)
FIG. 6 is a circuit diagram of a resonant SPDT (Single-Pole Double-Throw) switch circuit 200 (hereinafter simply referred to as a switch circuit 200) according to the second embodiment of the present invention. The switch circuit 200 includes circuit portions 201 and 202 having the same configuration as the switch circuit 100. One terminal of the circuit portions 201 and 202 is shared by the terminal 11. Transistors T21 and T22 each correspond to transistor T10. The inductors L21 and L22 correspond to the inductor L10, respectively. Capacitors C21 and C22 correspond to the capacitor C10, respectively. The resistors R21 and R22 correspond to the resistor R10, respectively.

  The switch circuit 200 receives the signal RF_COM from the terminal 11 and outputs the signal RF1 or RF2 from either the terminal 21 or 22 based on the control signals Cont1 and Cont2. Alternatively, the switch circuit 200 inputs the signal RF1 or RF2 at either the terminal 21 or 22 based on the control signals Cont1 and Cont2, and outputs the signal RF_COM from the terminal 11.

  Since the capacitor C21 is provided, the DC current flowing through the inductor L21 is cut off. That is, when a DC signal is applied between the terminal 11 and the terminal 21, the DC signal cannot pass between the terminal 11 and the terminal 21 unless passing through the transistor T21. Further, since the capacitor C22 is provided, the DC current flowing through the inductor L22 is cut off. That is, when a DC signal is applied between the terminal 11 and the terminal 22, the DC signal cannot pass between the terminal 11 and the terminal 22 unless it passes through the transistor T22.

  FIG. 7 is a flowchart showing a flow of an inspection method for the switch circuit 200. First, a DC voltage is applied to the terminals 11, 21 and 31 (S11). The resistance value between the source and the drain when the transistor T21 is in the on state is measured. Further, the resistance value between the source and the drain when the transistor T21 is in the OFF state is measured (S21). Further, other DC characteristics of the transistor T21 are measured.

  Subsequently, a DC voltage is applied to the terminals 11, 22 and 32 (S31). The resistance value between the source and the drain when the transistor T22 is in the on state is measured. Further, the resistance value between the source and the drain when the transistor T22 is in the OFF state is measured (S41). Further, other DC characteristics of the transistor T22 are measured. Thereby, the quality of the switch circuit 200 can be determined. In the inspection of the transistors T21 and T22, the current value may be measured instead of the resistance value between the source and the drain.

  Similar to the characteristics of the switch circuit 100 shown in FIG. 5, the switch circuit 200 according to the present embodiment has substantially the same isolation characteristics as the conventional resonant switch circuit, and measures the DC characteristics to thereby measure the transistors T21 and T22. Each of these can be inspected. That is, the switch circuit 200 is a resonance type switch circuit, but does not require the RF measurement that has been indispensable in the conventional inspection, and can be inspected by DC measurement like the inspection of the shunt type switch circuit. That is, it has the same effect as the first embodiment.

(Third embodiment)
FIG. 8 is a circuit diagram of a resonant DPDT (Double-Pole Double-Throw) switch circuit 300 (hereinafter simply referred to as a switch circuit 300) according to the third embodiment of the present invention. The switch circuit 300 includes circuit portions 301, 302, 303, and 304 that have the same configuration as the switch circuit 100. One terminal of the circuit portions 301 and 302 is shared by the terminal 12. One terminal of the circuit portions 303 and 304 is shared by the terminal 13. Transistors T31 to T34 correspond to the transistor T10, respectively. Inductors L31 to L34 correspond to inductor L10, respectively. Capacitors C31 to C34 correspond to the capacitor C10, respectively. The resistors R31 to R34 correspond to the resistor R10, respectively.

  The switch circuit 300 receives the signal RF_COM1 from the terminal 12, and outputs the signal RF3 or RF4 from either the terminal 23 or 24 based on the control signals Cont3 and Cont4. Alternatively, the switch circuit 300 inputs the signal RF3 or RF4 from either the terminal 23 or 24 and outputs the signal RF_COM1 from the terminal 12 based on the control signals Cont3 and Cont4.

  The switch circuit 300 receives the signal RF_COM2 from the terminal 13 and outputs the signal RF5 or RF6 from either of the terminals 23 and 24 based on the control signals Cont5 and Cont6. Alternatively, the switch circuit 300 inputs the signal RF5 or RF6 from either of the terminals 23 and 24 and outputs the signal RF_COM2 from the terminal 13 based on the control signals Cont5 and Cont6.

  Since the capacitors C31 to C34 are provided, the DC currents flowing through the inductors L31 to L34 are cut off. That is, when a DC signal is applied between the terminal 12 and the terminal 23, the DC signal cannot pass between the terminal 12 and the terminal 23 unless passing through the transistor T31. When a DC signal is applied between the terminal 12 and the terminal 24, the DC signal cannot pass between the terminal 12 and the terminal 24 unless it passes through the transistor T32. When a DC signal is applied between the terminal 13 and the terminal 23, the DC signal cannot pass between the terminal 13 and the terminal 23 unless passing through the transistor T33. When a DC signal is applied between the terminal 13 and the terminal 24, the DC signal cannot pass between the terminal 13 and the terminal 24 unless it passes through the transistor T34.

  FIG. 9 is a flowchart showing the flow of the inspection method of the switch circuit 300. First, a DC voltage is applied to the terminals 12, 23 and 33 (S12). The resistance value between the source and the drain when the transistor T31 is in the on state is measured. Further, the resistance value between the source and the drain when the transistor T31 is in the OFF state is measured (S22). Further, other DC characteristics of the transistor T31 are measured.

  Subsequently, a DC voltage is applied to the terminals 12, 24 and 34 (S32). The resistance value between the source and the drain when the transistor T32 is in the on state is measured. Further, the resistance value between the source and the drain when the transistor T32 is in the OFF state is measured (S42). Further, other DC characteristics of the transistor T32 are measured.

  Subsequently, a DC voltage is applied to the terminals 13, 23 and 35 (S52). The resistance value between the source and the drain when the transistor T33 is in the on state is measured. Further, the resistance value between the source and the drain when the transistor T33 is in the OFF state is measured (S62). Further, other DC characteristics of the transistor T33 are measured.

  Further, a DC voltage is applied to the terminals 13, 24 and 36 (S72). The resistance value between the source and the drain when the transistor T34 is in the on state is measured. Further, the resistance value between the source and the drain when the transistor T34 is in the OFF state is measured (S82). Further, other DC characteristics of the transistor T34 are measured. In the inspection of the transistors T31 to T34, the current value may be measured instead of the resistance value between the source and the drain.

  Similar to the characteristics of the switch circuit 100 shown in FIG. 5, the switch circuit 300 according to the present embodiment has substantially the same isolation characteristics as those of the conventional resonant switch circuit, but measures the DC characteristics, thereby measuring the transistors T31 to T34. Each of these can be inspected. That is, although the switch circuit 300 is a resonance type switch circuit, it does not require the RF measurement that has been indispensable in the conventional inspection, and can be inspected by DC measurement like the inspection of the shunt type switch circuit. As a result, the RF evaluation cost that occupies a large proportion of the product cost can be reduced.

  In the first to third embodiments, each component may be formed on the same semiconductor substrate. In addition to the first to third embodiments, the present invention can be applied to all high-frequency switch circuits using FETs.

(Fourth embodiment)
FIG. 10 is a circuit diagram showing a part of a communication apparatus 400 according to the fourth embodiment of the present invention. The communication device 400 includes an antenna AN1, a switch circuit SW1, a low noise amplifier LNA1, and a power amplifier PA1.

  The switch circuit SW1 includes, for example, a switch circuit 200 shown in FIG. When the switch circuit 200 is applied to the switch circuit SW1, the antenna AN1 is connected to the terminal 11, the low noise amplifier LNA1 is connected to the terminal 21, and the power amplifier PA1 is connected to the terminal 22.

  When the communication device 400 receives a reception signal via the antenna AN1, the transistor T21 is turned on. Thereby, the transistor T21 conducts the reception signal from the terminal 11 to the terminal 21, and sends the reception signal to the low noise amplifier LNA1. The low noise amplifier LNA1 amplifies this received signal and sends it to the internal circuit of the communication device 400.

  On the other hand, when the communication apparatus 400 transmits a transmission signal via the antenna AN1, the transmission signal is transmitted from the internal circuit of the communication apparatus 400 to the power amplifier PA1, and is amplified by the power amplifier PA1. At this time, the transistor T22 is turned on. The transistor T22 conducts the transmission signal amplified by the power amplifier PA1 from the terminal 22 to the terminal 11 and sends it to the antenna AN1. Thus, the communication apparatus 400 can transmit and receive a high frequency signal via the antenna AN1.

  The switch circuit SW1 can be inspected as in the second embodiment. Therefore, this embodiment has the same effect as the second embodiment.

(Fifth embodiment)
FIG. 11 is a circuit diagram showing a part of a communication device 500 according to the fifth embodiment of the present invention. The communication device 500 includes an antenna AN2, switch circuits SW2 and SW3, a low noise amplifier LNA2, and power amplifiers PA2 and PA3.

  Each of the switch circuits SW2 and SW3 includes a switch circuit 200, for example. For convenience, the switch circuit 200 in the switch circuit SW2 is referred to as a switch circuit 200a, and the terminal 11, the terminal 21, and the terminal 22 of the switch circuit 200a are referred to as a terminal 11a, a terminal 21a, and a terminal 22a, respectively. The switch circuit 200 in the switch circuit SW3 is a switch circuit 200b, and the terminal 11, the terminal 21, and the terminal 22 of the switch circuit 200b are a terminal 11b, a terminal 21b, and a terminal 22b, respectively. Further, the transistor T21 of the switch circuit 200a is referred to as a transistor T21a, and the transistor T21 of the switch circuit 200b is referred to as a transistor T21b.

  The antenna AN2 is connected to the terminal 11a, the low noise amplifier LNA2 is connected to the terminal 21a, and the terminal 11b of the switch circuit SW3 is connected to the terminal 22a. A power amplifier PA2 is connected to the terminal 21b, and a power amplifier PA3 is connected to the terminal 22b.

  In the present embodiment, the power amplifier PA2 is used for transmitting a CDMA (Code Division Multiple Access) transmission signal, and the power amplifier PA3 is used for transmitting a PDC (Personal Digital Cellular) transmission signal.

  When the communication device 500 receives a reception signal via the antenna AN2, the transistor T21a is turned on. Thereby, the transistor T21a conducts the reception signal from the terminal 11a to the terminal 21a, and sends the reception signal to the low noise amplifier LNA2. The low noise amplifier LNA2 amplifies this received signal and sends it to the internal circuit of the communication device 500.

  When the communication apparatus 500 transmits a CDMA transmission signal, the transmission signal is sent from the internal circuit of the communication apparatus 500 and amplified by the power amplifier PA2. At this time, in the switch circuit SW3, the transistor T21b is turned on. The transistor T21b conducts the transmission signal amplified by the power amplifier PA2 from the terminal 21b to the terminal 11b and sends it to the switch circuit SW2.

  When communication device 500 transmits a PDC transmission signal, the transmission signal is sent from an internal circuit of communication device 500 and amplified by power amplifier PA3. At this time, in the switch circuit SW3, the transistor T22b is turned on. The transistor T22b conducts the transmission signal amplified by the power amplifier PA3 from the terminal 22b to the terminal 11b and sends it to the switch circuit SW2.

  When the communication device 500 transmits a CDMA or PDC transmission signal, the transistor T22a is turned on in the switch circuit SW2. Thereby, the transistor T22a conducts the transmission signal obtained from the switch circuit SW3 from the terminal 22a to the terminal 11a, and sends the transmission signal to the antenna AN2. Thus, the communication apparatus 500 can transmit and receive a high frequency signal via the antenna AN2.

  The switch circuits SW2 and SW3 can be inspected as in the second embodiment. Therefore, this embodiment has the same effect as the second embodiment.

(Sixth embodiment)
FIG. 12 is a circuit diagram showing a part of a communication apparatus 600 according to the fifth embodiment of the present invention. The communication device 600 includes antennas AN3 and AN4, a switch circuit SW4, a low noise amplifier LNA3, and a power amplifier PA4.

  The switch circuit SW4 includes, for example, a switch circuit 300. The antenna AN2 is connected to the terminal 12, the antenna AN4 is connected to the terminal 13, the low noise amplifier LNA3 is connected to the terminal 23, and the power amplifier PA4 is connected to the terminal 24.

  When the communication device 600 receives a reception signal via the antenna AN3, the transistor T31 is turned on. Thereby, the transistor T31 conducts the reception signal from the terminal 12 to the terminal 23, and sends the reception signal to the low noise amplifier LNA3. The low noise amplifier LNA3 amplifies this received signal and sends it to the internal circuit of the communication device 600.

  The communication device 600 may receive a reception signal via the antenna AN4. At this time, the transistor T33 is turned on. Thereby, the transistor T33 conducts the reception signal from the terminal 13 to the terminal 23, and sends the reception signal to the low noise amplifier LNA3. The low noise amplifier LNA3 amplifies this received signal and sends it to the internal circuit of the communication device 600.

  When communication device 600 transmits a transmission signal, the transmission signal is sent from the internal circuit of communication device 600 and amplified by power amplifier PA4. At this time, in the switch circuit SW4, the transistor T34 is turned on. The transistor T34 conducts the transmission signal amplified by the power amplifier PA4 from the terminal 24 to the terminal 13 and sends it to the antenna AN4.

  The communication device 600 may transmit a transmission signal via the antenna AN3. In this case, in the switch circuit SW4, the transistor T32 is turned on. The transistor T32 conducts the transmission signal amplified by the power amplifier PA4 from the terminal 24 to the terminal 12 and sends it to the antenna AN3. As described above, the communication device 600 can transmit and receive high-frequency signals via the antennas AN3 and AN4.

  The switch circuit SW4 can be inspected similarly to the third embodiment. Therefore, this embodiment has the same effect as the third embodiment.

  The fourth to sixth embodiments can be applied not only to mobile communication devices but also to wireless LANs according to standards such as IEEE802.11a and 802.11g.

(Seventh embodiment)
FIG. 15 is a circuit diagram of the switch circuit 110 according to the seventh embodiment of the present invention. The switch circuit 110 corresponds to the SPST switch circuit shown in FIG.

  Usually, the bonding pad BP10 and the electrode TR10 of the semiconductor package are connected by a bonding wire BW10. Further, the bonding pad BP20 and the electrode TR20 of the semiconductor package are connected by a bonding wire BW20.

The parasitic inductance of the bonding wires BW10 and BW20 affects the characteristics of the switch circuit 110 for high frequency signals of 500 MHz or higher. For example, when the parasitic inductance of the bonding wires BW10 and BW20 is 1.0 nH, the imaginary number component (X = ωL) of the impedance Z (Z = R + jX) with respect to a high-frequency signal of 5.2 GHz is 32.7. The on-resistance of the transistor T10 is 4Ω. Therefore, the magnitude | Z | (| Z | = (R ² + X ² ) ^1/2 ) of the impedance Z is 32.9, which is understood to depend on the bonding wires BW10 and BW20. That is, most of the insertion loss is caused by the bonding wire.

  In order to reduce the passage loss, capacitors Cc10 and Cc20 are connected in series between the transistor T10 and the bonding pad BP10 and between the transistor T10 and the bonding pad BP20, respectively.

  In such a switch circuit, since the capacitors Cc10 and Cc20 block a direct current, the DC characteristics of the transistor T10 cannot be inspected using the bonding pads BP10 and BP20.

  Therefore, in the seventh embodiment, the test pads TP10 and TP20 are connected to the node between the capacitor Cc10 and the transistor T10 and the node between the capacitor Cc20 and the transistor T10, respectively.

  Since the inspection pads TP10 and TP20 are not used for bonding, it is sufficient if the inspection pads TP10 and TP20 are large enough to be in contact with the inspection needle. Accordingly, the inspection pads TP10 and TP20 may be smaller than the bonding pads BP10 and BP20.

  The inspection pads TP10 and TP20 are connected to the source electrode and the drain electrode of the transistor T10 without passing through the capacitors Cc10 and Cc20. Thereby, even when the capacitors Cc10 and Cc20 are provided, the DC characteristics of the transistor T10 can be inspected.

(Eighth embodiment)
FIG. 16 is a circuit diagram of the switch circuit 210 according to the eighth embodiment of the present invention. The switch circuit 210 corresponds to the SPDT switch circuit shown in FIG.

  In the eighth embodiment, in order to reduce the passage loss of the bonding wires BW21 to BW23, the capacitors Cc21 to Cc23 are arranged between the transistor T21 and the bonding pad BP21, between the transistor T22 and the bonding pad BP22, and between the transistor T21, Each is connected in series between T22 and bonding pad BP23.

  Test pads TP21 and TP22 are connected to a node between the capacitor Cc21 and the transistor T21 and a node between the capacitor Cc22 and the transistor T22, respectively. Further, the test pad TP23 is connected to a node between the transistors T21 and T22. It should be noted that here, the portions where the bonding pad and the MIM capacitor are formed are important, and the details of the spiral inductor and the transistor are omitted.

  Since the inspection pads TP21 to TP23 are not used for bonding, it is sufficient if the inspection pads TP21 to TP23 are large enough to be in contact with the inspection needle. Accordingly, the inspection pads TP21 to TP23 may be smaller than the bonding pads BP21 and BP22.

  The test pads TP21 and TP23 are connected to the source electrode and the drain electrode of the transistor T21 without passing through the capacitors Cc21 and Cc23. The test pads TP22 and TP23 are connected to the source electrode and the drain electrode of the transistor T22 without passing through the capacitors Cc22 and Cc23. As a result, by performing the inspection method shown in FIG. 7 using the inspection pads TP21 to TP23, the DC characteristics of the transistors T21 and T22 can be inspected even when the capacitors Cc21 and Cc22 are provided. .

(Ninth embodiment)
FIG. 17 is a circuit diagram of the switch circuit 310 according to the ninth embodiment of the present invention. The switch circuit 310 corresponds to the switch circuit of the DPDT shown in FIG.

  In the ninth embodiment, capacitors Cc31 to Cc34 are connected in series between the transistors T31 to T34 and the bonding pads BP31 to BP34, respectively, in order to reduce the passage loss of the bonding wires BW31 to BW34.

  Test pads TP31 to TP34 are connected to nodes between capacitors Cc31 to Cc34 and transistors T31 to T34, respectively.

  Since the inspection pads TP31 to TP34 are not used for bonding, it is sufficient if the inspection pads TP31 to TP34 are large enough to be in contact with the inspection needle. Therefore, the inspection pads TP31 to TP34 may be smaller than the bonding pads BP31 to BP34.

  The test pads TP31 and TP32 are connected to the source electrode and the drain electrode of the transistor T31 without passing through the capacitors Cc31 and Cc32. The test pads TP32 and TP34 are connected to the source electrode and the drain electrode of the transistor T32 without passing through the capacitors Cc32 and Cc34. The inspection pads TP31 and TP33 are connected to the source electrode and the drain electrode of the transistor T33 without passing through the capacitors Cc31 and Cc33. The test pads TP33 and TP34 are connected to the source electrode and the drain electrode of the transistor T34 without passing through the capacitors Cc33 and Cc34. As a result, by performing the inspection method shown in FIG. 9 using the inspection pads TP31 to TP34, the DC characteristics of the transistors T31 to T34 can be inspected even when the capacitors Cc31 to Cc34 are provided. .

(Tenth embodiment)
18 is a schematic layout diagram of the switch circuit 120 in which the test pads TP10 and TP20 are omitted from the switch circuit 110 shown in FIG. FIG. 19 is a cross-sectional view taken along line XX of FIG.

  The tenth embodiment enables the inspection of the DC characteristics of the transistor T10 even if the inspection pads TP10 and TP20 are removed from the switch circuit 110.

  Usually, the capacitor Cc10 is configured by MIM (Metal-Insulator-Metal). Therefore, when manufacturing the switch circuit 120 on the semiconductor wafer, it is necessary to deposit at least two metal layers.

  FIG. 20 shows a flowchart from the metal layer to the formation of the protective film. First, the first metal layer M1 is formed (S110). Next, an intermediate insulating layer IL is deposited (S120). The intermediate insulating layer IL on the bonding pad BP10 is removed through photolithography and etching processes. Next, a second metal layer is deposited (S130). Through the photolithography and etching processes, the second metal layer M21 is formed on the bonding pad BP10, and the second metal layer M22 is formed on the capacitor Cc10. First and second metal layers are also formed in the region of capacitor Cc20.

  Here, the DC characteristic of the transistor T10 is inspected (S140). The second metal layer M22 illustrated by hatching functions as an electrode of the capacitor Cc10 and is also connected to the electrode of the transistor T10. Therefore, a DC signal can be applied to the electrode of the transistor T10 by bringing the inspection needle into contact with the second metal layer M22. The same can be said for the capacitor Cc20. Therefore, the DC characteristic of the transistor T10 can be inspected using the second metal layer.

  After inspecting the DC characteristics, a protective film P is deposited (S150). The protective film P on the bonding pads BP10 and BP20 is removed through photolithography and etching processes. At this time, since the inspection of the DC characteristics is completed, the second metal layer M22 may remain covered with the protective film P.

  According to the tenth embodiment, the DC characteristic of the switch circuit 120 is inspected before the protective film P is deposited on the semiconductor wafer on which the switch circuit 120 is formed. Thereby, even if it is the switch circuit 120 without the inspection pads TP10 and TP20, the DC characteristics of the switch circuit 120 can be inspected. This can also be applied to the switch circuits 210 and 310 shown in FIGS.

  The high frequency signal used in the above description is a radio signal of 500 MHz or higher.

1 is a circuit diagram of a resonant SPST switch circuit according to a first embodiment of the present invention. The flowchart which shows the flow of the test | inspection method of the switch circuit 100. FIG. The equivalent circuit diagram at the time of OFF of the switch circuit 100 by this embodiment. The equivalent circuit diagram at the time of OFF of the conventional resonance type switch circuit shown in FIG. The graph which compared the switch circuit 100 by this embodiment, and the conventional resonant switch circuit about the isolation characteristic. The circuit diagram of the resonance type SPDT switch circuit according to the second embodiment of the present invention. The flowchart which shows the flow of the test | inspection method of the switch circuit 200. FIG. The circuit diagram of the resonance type DPDT switch circuit according to the third embodiment of the present invention. The flowchart which shows the flow of the test | inspection method of the switch circuit 300. FIG. The circuit diagram which shows a part of communication apparatus 400 according to 4th Embodiment which concerns on this invention. The circuit diagram which shows a part of communication apparatus 500 according to 5th Embodiment which concerns on this invention. The circuit diagram which shows a part of communication apparatus 600 according to 5th Embodiment concerning this invention. The circuit diagram of the conventional typical shunt type | mold SPST switch circuit. The circuit diagram of the conventional typical resonance type SPST switch circuit. The circuit diagram of the switch circuit 110 according to 7th Embodiment. The circuit diagram of the switch circuit 210 according to 8th Embodiment. The circuit diagram of the switch circuit 310 according to 9th Embodiment. FIG. 3 is a schematic layout diagram of a switch circuit 120 in which test pads TP10 and TP20 are omitted from the switch circuit 110. FIG. 19 is a cross-sectional view taken along line XX in FIG. 18. The flowchart from formation of a protective film to a metal layer.

Explanation of symbols

100 switch circuit T10 transistor L10 inductor C10 capacitor R10 resistor 400 communication device AN1 antenna SW1 switch circuit LNA1 low noise amplifier PA1 power amplifier

Claims (6)

A first electrode, a second electrode, and a third electrode, and a high-frequency signal is conducted between the first electrode and the second electrode based on a potential of the third electrode; a semiconductor switching element bias voltage at the first electrode and the second electrode are substantially the same, derived connected between said second electrode and the first electrode in parallel with the semiconductor switching elements A resonant switch circuit including an element;
A semiconductor device comprising: a DC blocking capacitive element connected in series with the inductive element between the first electrode and the second electrode for DC inspection of the semiconductor switching element. apparatus. Two semiconductor switching elements are connected in series;
The inductive element and the capacitive element are connected in parallel to each of the semiconductor switching elements;
The semiconductor device according to claim 1, further comprising an input terminal for a high-frequency signal that is used in common between the two semiconductor switching elements. An antenna,
A first electrode, a second electrode, and a third electrode, and a second radio frequency received signal received by the first electrode via the antenna based on the potential of the third electrode; A first semiconductor switching element having a bias voltage substantially equal to the first electrode and the second electrode;
A first inductive element connected to the first electrode and the second electrode in parallel to the first semiconductor switching element ;
A receiving-side amplifier that amplifies the received signal output from the second electrode;
A transmission-side amplifier for amplifying a high-frequency transmission signal;
A fourth electrode, a fifth electrode, and a sixth electrode, and the transmission signal input from the transmission-side amplifier to the fourth electrode is transmitted to the fifth electrode based on a potential of the sixth electrode. A second semiconductor switching element that conducts to an electrode, outputs the transmission signal from the fifth electrode to the antenna, and the bias voltage at the fourth electrode and the fifth electrode is substantially the same;
A resonant switch circuit including a second inductive element connected in parallel to the second semiconductor switching element ;
A first capacitive element for DC blocking connected in series with the first inductive element between the first electrode and the second electrode for DC inspection of the first semiconductor switching element; ,
A second capacitive element for blocking DC, connected in series with the second inductive element between the fourth electrode and the fifth electrode, for DC inspection of the second semiconductor switching element; A communication apparatus comprising: A first electrode, a second electrode, and a third electrode, and a high-frequency signal is conducted between the first electrode and the second electrode based on a potential of the third electrode; A first semiconductor switching element having substantially the same bias voltage at the first electrode and the second electrode;
A first bonding pad coupled to the first electrode;
A second bonding pad coupled to the second electrode;
A first capacitive element connected in series between the first electrode and the first bonding pad;
A second capacitive element connected in series between the second electrode and the second bonding pad;
A first test pad connected to a node between the first capacitive element and the first electrode;
A second test pad connected to a node between the second capacitive element and the second electrode;
A resonant switch circuit including a first inductive element connected to the first electrode and the second electrode in parallel to the first semiconductor switching element ;
A third capacitive element for DC blocking connected in series with the first inductive element between the first electrode and the second electrode for DC inspection of the first semiconductor switching element; A semiconductor device comprising: A fourth electrode, a fifth electrode, and a sixth electrode, and a high-frequency signal is conducted between the fourth electrode and the fifth electrode based on a potential of the sixth electrode; A second semiconductor switching element having substantially the same bias voltage at the fourth electrode and the fifth electrode, a third bonding pad coupled to the fifth electrode,
A fourth capacitive element connected in series between the fifth electrode and the third bonding pad;
A third test pad connected to a node between the fourth capacitive element and the fifth electrode;
A second inductive element connected to the fourth electrode and the fifth electrode in parallel to the second semiconductor switching element ;
A DC blocking fifth capacitive element connected in series with the second inductive element between the fourth electrode and the fifth electrode for DC inspection of the second semiconductor switching element; Further comprising
The semiconductor device according to claim 4, wherein the fourth electrode is connected to the second electrode. A first electrode, a second electrode, and a third electrode, wherein a high-frequency signal is conducted or blocked between the first electrode and the second electrode based on a potential of the third electrode; A switching element having substantially the same bias voltage in the first electrode and the second electrode, and connected to the first electrode and the second electrode in parallel to the switching element, and in series with each other A method for inspecting a semiconductor device including a connected inductive element and a capacitive element,
Applying a DC voltage to the first electrode, the second electrode, and the third electrode;
The resistance value or the current value between the first electrode and the second electrode when the switching element is in the on state, and the first electrode and the current value when the switching element is in the off state And a step of measuring a resistance value or a current value between the second electrode and the second electrode.

Images