JP3862632B2 - Metal-based multilayer circuit board and hybrid integrated circuit using the same - Google Patents

Metal-based multilayer circuit board and hybrid integrated circuit using the same Download PDF

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JP3862632B2
JP3862632B2 JP2002232336A JP2002232336A JP3862632B2 JP 3862632 B2 JP3862632 B2 JP 3862632B2 JP 2002232336 A JP2002232336 A JP 2002232336A JP 2002232336 A JP2002232336 A JP 2002232336A JP 3862632 B2 JP3862632 B2 JP 3862632B2
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metal plate
metal
conductive layer
layer
circuit board
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JP2004072003A (en
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直己 米村
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Denka Co Ltd
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Denki Kagaku Kogyo KK
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires
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    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Abstract

<P>PROBLEM TO BE SOLVED: To provide a hybrid integrated circuit wherein the influence of noises generated when operating its semiconductor element is reduced largely, and it is excellent in its heat radiating characteristic and its cost. <P>SOLUTION: In a multilayer circuit board having metal bases, there are formed a conductive layer (a) (not shown) provided on a metal plate (1) (not shown) via an insulation layer (A) (not shown), a conductive layer (b) (not shown) provided on the conductive layer (a) (not shown) via a solder layer, and further, a metal plate (2) (not shown) mounted thereon via an insulation layer (B) (not shown). In the hybrid integrated circuit, by using the multilayer circuit board having the metal bases, a semiconductor element is provided on the opposite surface of the metal plate (1) (not shown) to the conductive layer (a) (not shown) or is provided on the opposite surface of the metal plate (2) (not shown) to the conductive layer (b) (not shown). Further, the semiconductor element and the metal plate (1) (not shown) or the semiconductor element and the metal plate (2) (not shown) are connected electrically with the conductive layers (a), (b) (not shown) by aluminum or gold wires. <P>COPYRIGHT: (C)2004,JPO

Description

【０００１】
【発明の属する技術分野】
本発明は、安価で放熱性及びノイズシールド性に優れる金属ベース多層回路基板、ことにオーディオ等の家庭電化製品用途の電子モジュールに用いて好適な金属ベース回路基板とそれを用いた混成集積回路に関する。
【０００２】
【従来の技術】
図２は、従来の、半導体素子が搭載された金属ベース回路基板を使用した混成集積回路の１例を示したものであり、半導体素子は当該半導体素子から発生される熱を拡散させるために、銅ブロック１３に半田を介して搭載されている。
【０００３】
しかし、半導体素子と金属ベース回路基板は電気的及び静電的に接続されているために、スイッチング等の操作時に半導体素子で発生したノイズは、絶縁層７を介してアルミニウム製のベース板からアースを介して他の電子モジュールに悪影響を与え問題がある。
【０００４】
図３は、銅ブロックの代わりに両面セラミック基板に変えたものであり、回路パターン１４をシールド層にすることで半導体素子から発生するスイッチングノイズをモジュール外への放出を低減する構造になっている。該セラミック基板は高放熱性が必要となるため、高価なセラミック基板を用いる必要がある。そのため、コスト的な問題が残る。
【０００５】
【発明が解決しようとする課題】
本発明は、かかる従来技術における問題点に鑑みてなされたものであって、半導体の動作時に発生するノイズの影響を大きく低減し、熱放散性及びコスト的に優れた混成集積回路を提供することを目的としている。
【０００６】
【課題を解決するための手段】
本発明は、第１の金属板上に第１の絶縁層を介して第１の導電層を設け、第１の導電層上に、半田層を介して第２の導電層を設け、更に第２の絶縁層を介して第２の金属板を載置してなることを特徴とする金属ベース多層回路基板であり、好ましくは、第１の金属板と第２の金属板とは、アルミニウム、アルミニウム合金、銅及び銅合金から選ばれる１種以上であることを特徴とする前記の金属ベース多層回路基板であり、また、好ましくは、第１の金属板又は第２の金属板の第１の導電層及び第２の導電層が存在しない側の面に、部分的に又は全面にニッケル層及び／又は金層が設けられていることを特徴とする前記の金属ベース多層回路基板である。
【０００７】
又、本発明は、前記の金属ベース多層回路基板の第１の金属板又は第２の金属板のいずれかの第１の導電層及び第２の導電層が配置されていない側の面に半導体素子を配置し、更に、前記半導体素子並びに第２の金属板がアルミニウムワイヤー若しくは金ワイヤーを介して第１の導電層に、又は、前記半導体素子並びに第１の金属板がアルミニウムワイヤー若しくは金ワイヤーを介して第２の導電層に電気的に接続されていることを特徴とする混成集積回路である。
【０００８】
【発明の実施の形態】
以下、図を用いて本発明について詳細に説明する。図１は、本発明の金属ベース回路基板の一例を示す断面図である。本発明の金属ベース多層回路基板は、上記の通りに、半田層９を介して面対象の構造を有しているので、半導体素子１は
第１の金属板８側に設けることも可能であるが、以下では、第１の金属板８が下方に、第２の金属板が上方に位置し、半導体素子が第２の金属板上方に配置される場合について説明する。
【０００９】
第１の金属板８上に第１の絶縁層７を介して回路パターン６、１０、１１を形成している第１の導電層を設けてなる金属ベース回路基板の該回路パターン６上に、半田層９を介して第２の導電層からなる回路パターン５を設け、更に第２の絶縁層１７を介して第２の金属板４を載置した構造になっている。このような構造を有することで、更に、第２の金属板４上に半導体素子１を搭載し、半導体素子１及び第２の金属板４とを第１の導電層に電気的に接続させることにより、第２の金属板４上に搭載される半導体素子１のオンオフ操作時に発生するノイズが第１の金属板８からアースを介する経路等から他の電子モジュールに悪影響を与えるという問題が解消できると共に、充分な熱放散性をも確保できる効果が得られる。
【００１０】
つまり、本発明においては、第２の導電層からなる回路パターン５をシールド層として使用することにより、半導体素子１から発生するノイズを、第２の絶縁層１７そして第１の絶縁層７を介させることで、第１の金属板８からモジュール外に放出されるノイズを大幅に低減可能となる。また、熱伝導性の良好な第２の金属板４上に半導体素子を搭載しているため、放熱性は非常に良好であり、かつ、高価なセラミック基板を用いていないのでコスト的にすぐれる特徴を有している。
【００１１】
また、本発明の金属ベース多層回路基板において、第２の金属板４と第１の金属板８は、電気伝導性と熱伝導性に優れた材質のものであればかまわないが、電気用途での信頼性が高く、安価で入手可能性が高いことから、アルミニウム、アルミニウム合金、銅及び銅合金から選ばれる１種以上が選択される。第１の金属板、第２の金属板の厚みについては、特に制限はないが０．５ｍｍ〜３．０ｍｍが一般に用いられる。また、第１の金属板と第２の金属板とは同一組成のものを採用することが、熱膨張率が等しく実使用条件下で熱履歴を受けても材質が異なるときに発生しがちな熱応力を、小さくでき、その結果得られる混成集積回路の電気的信頼性を高めることができるので、好ましい。
【００１２】
更に、本発明の金属ベース回路基板において、第２の金属板４の回路パターン５が存在しない面に、部分的に又は全面にニッケル層及び／又は金層が設けられていることが好ましい。半導体素子１を第２の金属板４上に搭載するに際して、半田層を介して接合されるが、前記のとおりに第２の金属層４の所望部分に前記ニッケル層及び／又は金層を予め設けておくことで、良好な半田濡れ性が確保でき、その結果得られる混成集積回路の電気的信頼性が一層高めることができる。
【００１３】
第１の金属板、第２の金属板に設ける第１の絶縁層と第２の絶縁層については、電気絶縁性と熱伝導性に富むものが選択されるが、例えば、各種セラミックス、無機粉体を含有する樹脂絶縁層、ガラス繊維を含有する樹脂絶縁層、及び耐熱性樹脂絶縁層が挙げられる。その厚みは２０〜２００μｍが一般的である。
【００１４】
また、第１の絶縁層、第２の絶縁層に含有される前記の無機粉体としては、アルミナ、ベリリヤ、窒化ホウ素、マグネシア、シリカ、窒化ケイ素、窒化アルミ等が好ましく用いられ、樹脂としては、エポキシ樹脂、フェノール樹脂、ポリイミド樹脂、各種エンジニアプラスチックが好ましく用いられる。
【００１５】
本発明の混成集積回路は、前記の金属ベース多層回路基板の第２の金属板４のニッケル層及び／又は金層からなる接合層３面上に半田層２を介して半導体素子１を固着し、更に、半導体素子１並びに第２の金属板４が第１の金属板８上の第１の絶縁層上に設けられた第１の導電層からなる回路パターン１１とアルミニウムワイヤー又は金ワイヤーで電気的に接続されている。ここで、前記回路パターンは、第２の金属板４に設けられている第２の絶縁層下面に設けられていても本発明の効果が得られることは言うまでもない。しかし、熱放散の面からは、第１の金属板８上の第１の絶縁層上に設けられた第１の導電層からなる回路パターンと接続する方法が好ましい。
【００１６】
【実施例】
（実施例）
＜第１工程＞
５０ｍｍ×５０ｍｍ×１．５ｍｍのアルミニウム板上に、酸化アルミニウムを８０質量％配合したエポキシ樹脂を硬化後の厚さが５０μｍになるように塗布し、更にアルミニウム／銅のクラッド箔を接着し、金属ベース基板を得た。
【００１７】
＜第２工程＞
前記金属ベース基板のアルミニウム／銅のクラッド箔をエッチングして、１０ｍｍ×１０ｍｍの表面がアルミニウムからなるパッド部を含む回路パターン及び周辺回路パターンを作製し、金属ベース回路基板を得た。
【００１８】
＜第３工程＞
１２ｍｍ×１２ｍｍ×１．５ｍｍのアルミニウム板上に、酸化アルミニウムを６０質量％配合したエポキシ樹脂を硬化後の厚さが５０μｍになるように塗布し、更に厚さ３５μｍの銅箔をラミネートした後、前記銅箔をエッチングして１０ｍｍ×１０ｍｍの回路パターンを作成し、搭載用金属ベース回路基板を得た。
【００１９】
＜第４工程＞
前記搭載用金属ベース回路基板の銅箔をラミネートしていない面側のアルミニウム板上に、厚さ５μｍのＮｉメッキを処理した。
【００２０】
＜第５工程＞
前記第２工程で得られた金属ベース回路基板上に、前記第４工程で得られた搭載用金属ベース回路基板を、図３に示したとおりに、回路パターン同士が向き合うように半田により接合し、本発明に係る金属ベース多層回路基板を得た。
【００２１】
＜第６工程＞
前記搭載用金属ベース回路基板の金属板のニッケルメッキした部分に、半導体素子（ＭＯＳ−ＦＥＴ）を半田付けし、更に、図３に示した通りに、半導体素子と金属ベース回路基板上の回路、搭載用金属ベース回路基板の金属板と金属ベース回路基板上の回路とを、アルミニウムワイヤーを用いて超音波ボンディング法により電気的に接続し、混成集積回路を得た。
【００２２】
前記混成集積回路について、ＭＯＳ−ＦＥＴトランジスタを動作させ、下記に示す方法にて熱抵抗及びノイズ強度を測定した。その結果、熱抵抗は１．６℃／Ｗ、スイッチングノイズ強度は−１２０ｄＢであった。
【００２３】
＜熱抵抗測定＞
動作周波数５０ＭＨｚにて消費電力２０Ｗ条件においてΔＶBE法にて熱抵抗を測定した。
【００２４】
＜ノイズ測定＞
動作周波数５０ＭＨｚにて消費電力２０Ｗ条件においてＭＯＳ−ＦＥＴトランジスタ（半導体チップ）を定常スイッチング動作させ、金属ベース回路基板のアルミニウム板からアース間で発生するノイズをスペクトルアナライザーにより強度を測定した。
【００２５】
（比較例１）
図２に例示される従来構造（銅ブロック使用）の混成集積回路を作成し、実施例と同じ評価を行ったところ、熱抵抗は１．５℃／Ｗ、ノイズ強度は−６０ｄＢであった。
【００２６】
（比較例２）
図３に例示される従来構造（セラミックス基板使用）の混成集積回路を作成し、実施例と同じ評価を行ったところ、熱抵抗は１．５℃／Ｗ、ノイズ強度は−１２０ｄＢであった。なお、用いたセラミックス基板は、０．６３５ｍｍ厚さの窒化アルミニウム基板の両面に厚さ０．３ｍｍの銅箔が両面に搭載された構造のものである。
【００２７】
【発明の効果】
本発明の金属ベース多層回路基板は、第１の金属板上に第１の絶縁層を介して第１の導電層を設けてなる金属ベース回路基板の前記第１の導電層上に、半田層を介して第２の導電層を設け、更に第２の絶縁層を介して第２の金属板を載置した構造を有するので、これを用いて、第２の金属板上に半導体素子を搭載し、半導体素子及び第２の金属板を第１の導電層に電気的に接続させて得られる混成集積回路は、充分な熱放散性を有し、しかも半導体素子のオンオフ操作時に発生するノイズが第１の金属板からアースを介して他の電子モジュールに悪影響を与えるという問題が解消できるので、オーディオ等の家庭電化製品用途を初めとするいろいろな電子モジュールとして好適である。
【図面の簡単な説明】
【図１】本発明の実施例に係る金属ベース多層回路基板とそれを用いた混成集積回路の断面図。
【図２】比較例１に係る、銅ブロックを用いた混成集積回路の断面図。
【図３】比較例２に係る、セラミックス回路基板を用いた混成集積回路の断面図。
【符号の説明】
１．半導体素子
２．半田層
３．接合層（ニッケル層及び／又は金層）
４．第２の金属板
５．回路
６．回路
７．第１の絶縁層
８．第１の金属板
９．半田層
１０．回路（銅）
１１．回路（アルミニウム）
１２．ボンディングワイヤー（アルミニウム線又は金線）
１３．銅ブロック
１４．Ｎｉメッキ層
１５．回路（銅）
１６．セラミックス基板
１７．第２の絶縁層 [0001]
BACKGROUND OF THE INVENTION
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a metal base multilayer circuit board that is inexpensive and excellent in heat dissipation and noise shielding properties, and more particularly to a metal base circuit board suitable for use in electronic modules for home appliances such as audio and hybrid integrated circuits using the same .
[0002]
[Prior art]
FIG. 2 shows an example of a conventional hybrid integrated circuit using a metal base circuit board on which a semiconductor element is mounted. In order to diffuse the heat generated from the semiconductor element, It is mounted on the copper block 13 via solder.
[0003]
However, since the semiconductor element and the metal base circuit board are electrically and electrostatically connected, noise generated in the semiconductor element during an operation such as switching is grounded from the aluminum base plate via the insulating layer 7. There is a problem that adversely affects other electronic modules via the.
[0004]
FIG. 3 shows a structure in which a double-sided ceramic substrate is used in place of the copper block, and the switching noise generated from the semiconductor element is reduced to the outside of the module by using the circuit pattern 14 as a shield layer. . Since the ceramic substrate requires high heat dissipation, it is necessary to use an expensive ceramic substrate. Therefore, a cost problem remains.
[0005]
[Problems to be solved by the invention]
The present invention has been made in view of the problems in the prior art, and provides a hybrid integrated circuit that greatly reduces the influence of noise generated during the operation of a semiconductor and is excellent in heat dissipation and cost. It is an object.
[0006]
[Means for Solving the Problems]
The present invention, the first metal plate on through the first insulating layer provided with the first conductive layer, the first conductive layer, providing a second conductive layer through the solder layer, further the A metal-based multilayer circuit board, wherein the second metal plate is placed via two insulating layers , preferably, the first metal plate and the second metal plate are made of aluminum, The metal-based multilayer circuit board is one or more selected from aluminum alloy, copper and copper alloy, and preferably the first metal plate or the first metal plate of the first metal plate In the metal-based multilayer circuit board, a nickel layer and / or a gold layer is partially or entirely provided on a surface on which the conductive layer and the second conductive layer are not present.
[0007]
The present invention also provides a semiconductor on the surface of the metal-based multilayer circuit board on which the first conductive layer and the second conductive layer of either the first metal plate or the second metal plate are not disposed. An element is disposed, and the semiconductor element and the second metal plate are connected to the first conductive layer via an aluminum wire or a gold wire, or the semiconductor element and the first metal plate are an aluminum wire or a gold wire. A hybrid integrated circuit is characterized in that it is electrically connected to the second conductive layer via the second conductive layer .
[0008]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a cross-sectional view showing an example of a metal base circuit board of the present invention. Since the metal-based multilayer circuit board according to the present invention has a surface-target structure through the solder layer 9 as described above, the semiconductor element 1 includes
Although it is possible to provide the first metal plate 8 side, in the following, the first metal plate 8 is located below, the second metal plate is located above, and the semiconductor element is located above the second metal plate . The case where it arrange | positions is demonstrated.
[0009]
On the circuit pattern 6 of the metal base circuit board in which the first conductive layer forming the circuit patterns 6, 10, 11 is formed on the first metal plate 8 via the first insulating layer 7, The circuit pattern 5 made of the second conductive layer is provided via the solder layer 9, and the second metal plate 4 is placed via the second insulating layer 17. By having such a structure, further, the semiconductor element 1 is mounted on the second metal plate 4, thereby electrically connecting the semiconductor element 1 and the second metal plate 4 to the first conductive layer Thus, it is possible to solve the problem that noise generated when the semiconductor element 1 mounted on the second metal plate 4 is turned on and off adversely affects other electronic modules from the path through the ground from the first metal plate 8. At the same time, the effect of ensuring sufficient heat dissipation can be obtained.
[0010]
In other words, in the present invention, by using the circuit pattern 5 made of the second conductive layer as the shield layer, noise generated from the semiconductor element 1 is transmitted through the second insulating layer 17 and the first insulating layer 7. By doing so, the noise emitted from the first metal plate 8 to the outside of the module can be greatly reduced. In addition, since the semiconductor element is mounted on the second metal plate 4 having good thermal conductivity, the heat dissipation is very good and an expensive ceramic substrate is not used, so that the cost is excellent. It has characteristics.
[0011]
In the metal-based multilayer circuit board of the present invention, the second metal plate 4 and the first metal plate 8 may be made of a material having excellent electrical conductivity and thermal conductivity. Therefore, at least one selected from aluminum, aluminum alloys, copper and copper alloys is selected. The thickness of the first metal plate and the second metal plate is not particularly limited, but 0.5 mm to 3.0 mm is generally used. Also, adopting the same composition for the first metal plate and the second metal plate tends to occur when the materials are different even if they have the same coefficient of thermal expansion and undergo thermal history under actual use conditions. It is preferable because the thermal stress can be reduced and the electrical reliability of the resulting hybrid integrated circuit can be increased.
[0012]
Furthermore, in the metal base circuit board of the present invention, it is preferable that a nickel layer and / or a gold layer is provided partially or entirely on the surface of the second metal plate 4 where the circuit pattern 5 does not exist. When the semiconductor element 1 is mounted on the second metal plate 4, it is bonded via a solder layer. As described above, the nickel layer and / or the gold layer is previously applied to a desired portion of the second metal layer 4. By providing it, good solder wettability can be secured, and the electrical reliability of the resulting hybrid integrated circuit can be further enhanced.
[0013]
For the first insulating layer and the second insulating layer provided on the first metal plate and the second metal plate , those having high electrical insulation and thermal conductivity are selected. For example, various ceramics, inorganic powder Examples thereof include a resin insulating layer containing a body, a resin insulating layer containing glass fiber, and a heat resistant resin insulating layer. The thickness is generally 20 to 200 μm.
[0014]
As the inorganic powder contained in the first insulating layer and the second insulating layer , alumina, beryllia, boron nitride, magnesia, silica, silicon nitride, aluminum nitride, etc. are preferably used, and the resin Epoxy resin, phenol resin, polyimide resin, and various engineer plastics are preferably used.
[0015]
In the hybrid integrated circuit of the present invention, the semiconductor element 1 is fixed to the surface of the bonding layer 3 made of the nickel layer and / or the gold layer of the second metal plate 4 of the metal base multilayer circuit board via the solder layer 2. Furthermore, the semiconductor element 1 and the second metal plate 4 are electrically connected by the circuit pattern 11 made of the first conductive layer provided on the first insulating layer on the first metal plate 8 and the aluminum wire or the gold wire. Connected. Here, it goes without saying that the effect of the present invention can be obtained even if the circuit pattern is provided on the lower surface of the second insulating layer provided on the second metal plate 4. However, from the viewpoint of heat dissipation, a method of connecting to a circuit pattern composed of a first conductive layer provided on the first insulating layer on the first metal plate 8 is preferable.
[0016]
【Example】
(Example)
<First step>
An epoxy resin containing 80% by mass of aluminum oxide is applied onto a 50 mm × 50 mm × 1.5 mm aluminum plate so that the thickness after curing is 50 μm, and an aluminum / copper clad foil is bonded to the metal. A base substrate was obtained.
[0017]
<Second step>
The aluminum / copper clad foil of the metal base substrate was etched to produce a circuit pattern and a peripheral circuit pattern including a pad portion having a 10 mm × 10 mm surface made of aluminum to obtain a metal base circuit substrate.
[0018]
<Third step>
After an epoxy resin containing 60% by mass of aluminum oxide was applied on a 12 mm × 12 mm × 1.5 mm aluminum plate so that the thickness after curing was 50 μm, and a copper foil having a thickness of 35 μm was laminated, The copper foil was etched to create a circuit pattern of 10 mm × 10 mm to obtain a mounting metal base circuit board.
[0019]
<4th process>
Ni plating with a thickness of 5 μm was processed on the aluminum plate on the side of the mounting metal base circuit board on which the copper foil was not laminated.
[0020]
<5th process>
On the metal base circuit board obtained in the second step, the mounting metal base circuit board obtained in the fourth step is joined by solder so that the circuit patterns face each other as shown in FIG. A metal-based multilayer circuit board according to the present invention was obtained.
[0021]
<6th process>
A semiconductor element (MOS-FET) is soldered to the nickel-plated portion of the metal plate of the mounting metal base circuit board. Further, as shown in FIG. 3, the circuit on the semiconductor element and the metal base circuit board, The metal plate of the mounting metal base circuit board and the circuit on the metal base circuit board were electrically connected by an ultrasonic bonding method using an aluminum wire to obtain a hybrid integrated circuit.
[0022]
With respect to the hybrid integrated circuit, a MOS-FET transistor was operated, and thermal resistance and noise intensity were measured by the following method. As a result, the thermal resistance was 1.6 ° C./W, and the switching noise intensity was −120 dB.
[0023]
<Measurement of thermal resistance>
Thermal resistance was measured by the ΔVBE method at an operating frequency of 50 MHz and power consumption of 20 W.
[0024]
<Noise measurement>
The MOS-FET transistor (semiconductor chip) was subjected to steady switching operation at an operating frequency of 50 MHz and a power consumption of 20 W, and the intensity of noise generated between the aluminum plate of the metal base circuit board and the ground was measured with a spectrum analyzer.
[0025]
(Comparative Example 1)
When a hybrid integrated circuit having a conventional structure (using a copper block) illustrated in FIG. 2 was prepared and evaluated in the same manner as in the example, the thermal resistance was 1.5 ° C./W and the noise intensity was −60 dB.
[0026]
(Comparative Example 2)
When a hybrid integrated circuit having a conventional structure (using a ceramic substrate) illustrated in FIG. 3 was prepared and evaluated in the same manner as in the example, the thermal resistance was 1.5 ° C./W and the noise intensity was −120 dB. The ceramic substrate used has a structure in which a copper foil having a thickness of 0.3 mm is mounted on both sides of a 0.635 mm-thick aluminum nitride substrate.
[0027]
【The invention's effect】
The metal base multilayer circuit board according to the present invention has a solder layer on the first conductive layer of the metal base circuit board in which the first conductive layer is provided on the first metal plate via the first insulating layer. Since the second conductive layer is provided via the second metal plate and the second metal plate is further placed via the second insulating layer , the semiconductor element is mounted on the second metal plate using this structure. However, the hybrid integrated circuit obtained by electrically connecting the semiconductor element and the second metal plate to the first conductive layer has sufficient heat dissipation, and noise generated when the semiconductor element is turned on / off is generated. Since the problem of adversely affecting other electronic modules from the first metal plate via the ground can be solved, the present invention is suitable as various electronic modules including home appliances such as audio.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a metal-based multilayer circuit board according to an embodiment of the present invention and a hybrid integrated circuit using the same.
2 is a cross-sectional view of a hybrid integrated circuit using a copper block according to Comparative Example 1. FIG.
3 is a cross-sectional view of a hybrid integrated circuit using a ceramic circuit board according to Comparative Example 2. FIG.
[Explanation of symbols]
1. 1. Semiconductor element 2. Solder layer Bonding layer (nickel layer and / or gold layer)
4). Second metal plate 5. Circuit 6 Circuit 7 First insulating layer 8. First metal plate 9. Solder layer 10. Circuit (copper)
11. Circuit (aluminum)
12 Bonding wire (aluminum wire or gold wire)
13. Copper block 14. Ni plating layer 15. Circuit (copper)
16. Ceramic substrate 17. Second insulating layer

Claims (4)

第１の金属板上に第１の絶縁層を介して第１の導電層を設け、前記第１の導電層上に、半田層を介して第２の導電層を設け、更に第２の絶縁層を介して第２の金属板を載置してなることを特徴とする金属ベース多層回路基板。A first conductive layer is provided on the first metal plate via a first insulating layer, a second conductive layer is provided on the first conductive layer via a solder layer, and further a second insulating layer is provided. A metal-based multilayer circuit board comprising a second metal plate placed through a layer. 第１の金属板と第２の金属板とは、アルミニウム、アルミニウム合金、銅及び銅合金から選ばれる１種以上であることを特徴とする請求項１記載の金属ベース多層回路基板。The metal-based multilayer circuit board according to claim 1, wherein the first metal plate and the second metal plate are at least one selected from aluminum, an aluminum alloy, copper, and a copper alloy. 第１の金属板又は第２の金属板の第１の導電層及び第２の導電層が存在しない側の面に、部分的に又は全面にニッケル層及び／又は金層が設けられていることを特徴とする請求項１又は請求項２記載の金属ベース多層回路基板。A nickel layer and / or a gold layer is provided partially or entirely on the surface of the first metal plate or the second metal plate on the side where the first conductive layer and the second conductive layer do not exist. The metal-based multilayer circuit board according to claim 1 or 2, characterized by the above-mentioned. 請求項１、請求項２又は請求項３のいずれか１項に記載の金属ベース多層回路基板の第１の金属板又は第２の金属板のいずれかの第１の導電層及び第２の導電層が配置されていない側の面に半導体素子を配置し、更に、前記半導体素子並びに第２の金属板がアルミニウムワイヤー若しくは金ワイヤーを介して第１の導電層に、又は、前記半導体素子並びに第１の金属板がアルミニウムワイヤー若しくは金ワイヤーを介して第２の導電層に電気的に接続されていることを特徴とする混成集積回路。4. The first conductive layer and the second conductive layer of the first metal plate or the second metal plate of the metal-based multilayer circuit board according to claim 1, claim 2, or claim 3. The semiconductor element is arranged on the surface on which the layer is not arranged, and the semiconductor element and the second metal plate are connected to the first conductive layer via the aluminum wire or the gold wire, or the semiconductor element and the second metal plate. A hybrid integrated circuit, wherein one metal plate is electrically connected to the second conductive layer through an aluminum wire or a gold wire .
JP2002232336A 2002-08-09 2002-08-09 Metal-based multilayer circuit board and hybrid integrated circuit using the same Expired - Fee Related JP3862632B2 (en)

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