JP3837938B2 - Method for manufacturing thin film semiconductor device - Google Patents

Method for manufacturing thin film semiconductor device Download PDF

Info

Publication number
JP3837938B2
JP3837938B2 JP27373798A JP27373798A JP3837938B2 JP 3837938 B2 JP3837938 B2 JP 3837938B2 JP 27373798 A JP27373798 A JP 27373798A JP 27373798 A JP27373798 A JP 27373798A JP 3837938 B2 JP3837938 B2 JP 3837938B2
Authority
JP
Japan
Prior art keywords
film
semiconductor device
plasma
nitrogen
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP27373798A
Other languages
Japanese (ja)
Other versions
JP2000106439A (en
Inventor
光敏 宮坂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP27373798A priority Critical patent/JP3837938B2/en
Publication of JP2000106439A publication Critical patent/JP2000106439A/en
Application granted granted Critical
Publication of JP3837938B2 publication Critical patent/JP3837938B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Description

【0001】
【発明の属する技術分野】
本発明は薄膜トランジスタ(TFT)やシリコン・オン・インシュレーター(SOI)等に代表される薄膜半導体装置の製造方法に関する。更に詳しくは、本願発明は高性能で信頼性に富む薄膜半導体装置を425℃程度以下の比較的低温にて製造する方法に関する。
【0002】
【従来の技術】
多結晶硅素薄膜トランジスタ(p−Si TFT)に代表される薄膜半導体装置を汎用ガラス基板を使用し得る425℃程度以下の低温にて製造する場合、従来以下の如き製造方法が取られて居た。まずエキシマレーザー照射法などで多結晶硅素膜(p−Si膜)形成した後、ゲート絶縁膜と成る酸化硅素膜を化学気相堆積法(CVD法)や物理気相堆積法(PVD法)にて形成する。次にタンタル等でゲート電極を作成して、金属(ゲート電極)−酸化膜(ゲート絶縁膜)−半導体(多結晶硅素膜)から成る電界効果トランジスタ(MOS−FET)を構成する。次に層間絶縁膜を堆積し、コンタクトホールを開孔した後に金属薄膜にて配線を施す。必要に応じて電気特性を改善する為に、最後に水素100%から成るプラズマ照射の処理を2時間程行い、薄膜半導体装置が完成する。
【0003】
【発明が解決しようとする課題】
しかしながら此等従来の薄膜半導体装置の製造方法では半導体特性を改善する為に水素プラズマ照射を施しても、半導体特性は僅かしか改善されなかった。しかもその処理時間が余りにも長い為に半導体膜や酸化硅素膜、更にはプラズマ処理装置自身にもプラズマに依る損傷が入ったり、高価格なプラズマ処理装置を何台も購入せねばならぬ等、多くの問題を抱えて居た。斯くした事実に則し、従来の製造方法にてp−Si TFT等の半導体装置を製造すると、製造価格は高騰し、完成した半導体装置もその電気特性に優れぬにのみならず、使用途上に経時劣化が生ずる等の信頼性にも課題を有して居た。
【0004】
そこで本発明は上述の諸事情を鑑み、その目的とする所は425℃程度以下との低温工程で優良な薄膜半導体装置を製造する方法を提供する事に有る。
【0005】
【課題を解決するための手段】
本発明の薄膜半導体装置の製造方法は、絶縁性物質を含む基板上に硅素単体または硅素を主体とする半導体物質を含む半導体膜を形成する第一工程と、前記半導体膜上に酸化硅素を含む絶縁膜を形成する第二工程と、前記絶縁膜に窒素原子活性種を照射し前記絶縁膜と前記半導体膜とを前記基板の温度を425℃以下に保ちながら窒化処理する第三工程とを含み、前記窒素原子活性種は希ガスと窒素含有気体との混合気体から成るプラズマにて生成され、前記プラズマのプラズマ源はラジオ波であり、前記混合気体中に占める窒素含有気体の割合は1%以上6%以下であることを特徴とする。
【0006】
【発明の実施の形態】
まず本発明は第一工程としてガラス基板や三次元半導体装置の層間絶縁膜等の縁性物質上に多結晶硅素(p−Si)に代表される半導体膜を形成する。この半導体膜は単結晶状態に有っても、多結晶状態に有っても、或いは非晶質状態に有っても構わないが、多結晶状態に有る時に本願発明は殊の外その効果を示す。此は本願発明が半導体膜と絶縁膜との界面に存在する捕獲準位(界面準位)を低減せしめると共に、結晶粒と結晶粒との間に位置する捕獲準位(粒界準位)をも低減せしめるが故で有る。言う迄もなく界面準位は結晶状態に拘わらず半導体膜と絶縁膜との接合界面には必ず存在する。この界面準位を低減させるから、本願発明は半導体膜の状態の如何に拘わらず有効なので有る。一方、多結晶膜に対しては此の効果に加え、粒界準位を減らすとの効果も認められる。半導体膜は硅素(Si)や硅素ゲルマニウム(SixGe1-x:0<x<1)等如何なる半導体物質で有っても構わないが、簡便に良好なMOS界面を構成するとの視点からは、硅素単体や硅素をその主構成元素(硅素原子構成比が80%程度以上)として居る半導体物質が優れて居る。半導体膜は物理気相堆積法(PVD法)や化学気相堆積法(CVD法)等の気相堆積法等で形成される。PVD法にはスパッター法や蒸着法等が考えられる。又CVD法には常圧化学気相堆積法(APCVD法)や低圧化学気相堆積法(LPCVD法)、プラズマ化学気相堆積法(PECVD法)等が使用され得る。気相堆積法で形成された半導体膜は、堆積直後には通常多結晶状態か非晶質状態に、又は此等の混合状態に有る。多結晶状態に有る薄膜は多結晶膜と称され、非晶質状態や混合状態に有る薄膜は非晶質膜や混晶質膜と其々称される。半導体装置の能動部(電界効果型トランジスタのソース・ドレイン領域やチャンネル形成領域、及びバイポーラ型トランジスタのエミッター・ベース・コレクター領域)としては堆積直後に得られた多結晶膜をその侭使用する事も可能で有る。此とは対照的に非晶質膜や混晶質膜を結晶化したり、或いは多結晶膜を再結晶化するなどして、新たな多結晶膜を得た後に此等を能動部として使用する事も可能で有る。結晶化や再結晶化を簡単に行うにはレーザー照射や急速熱処理が用いられる。
【0007】
次に第二工程としてプラズマ化学気相堆積装置(PECVD装置)等を用いて絶縁膜を半導体膜上に形成する。絶縁膜の形成はPECVD法の他にもスパッター法や蒸着法等のPVD法や、常圧化学気相堆積法(APCVD法)や低圧化学気相堆積法(LPCVD法)等の他のCVD法に依っても良い。只、第三工程の窒素活性種照射を第二工程の絶縁膜形成に引き続いて連続で行うとの立場からはPECVD法が最も適している。斯うすれば基板が空気等に触れて空気中の水分等の不純物が絶縁膜中や界面に混入する前に窒素活性種照射が出来るので、界面や半導体膜内、及び酸化膜内に存在する不対結合対等の欠陥を効率的に終端化出来るからで有る。更に連続工程とする事で生産性は向上する。絶縁膜形成時の温度は高くとも425℃程度以下、通常は400℃程度以下で有る。此は本願が対象として居る半導体装置を非晶質硅素薄膜半導体装置(a−Si TFT)が製造される汎用ガラス基板や、プラスチック基板等の耐熱性の乏しい基板上に製造する事を前提として居るからで有る。又、後述する様に第三工程の温度は400℃程度以下が好ましく、第二工程と第三工程とは連続で有る事が望ましい事にも依る。絶縁膜の形成は酸素等を含む酸化性気体のプラズマを半導体膜に照射して、半導体膜表層部に3nm程度から10nm程度の極薄酸化硅素膜を成長させる。10nm程度以上の厚みを有する絶縁膜が必要な場合には極薄酸化硅素膜上にCVD法で酸化硅素膜や窒化硅素膜を堆積し絶縁膜を積層構造とする。此の場合、半導体膜表層部に第一のプラズマ酸化膜を形成した後、真空を破る事無く連続して第二の絶縁膜を堆積する。ゲート絶縁膜内での不用意な準位形成やゲート絶縁膜への不純物混入等の不具合を避ける為にも、プラズマ酸化が終了した後直ちに、長くとも5分程度以内に第二の絶縁膜の堆積を開始する。プラズマ酸化終了から絶縁膜堆積開始迄の間、プラズマ処理室はプラズマを立てる事を除いて絶縁膜堆積時と同一条件としておく。斯様な工程を実行するには、プラズマ酸化に於ける基板温度と絶縁膜堆積に於ける基板温度とが略同等でなければ成らない。即ち、両者の温度差は大きくとも30℃程度未満とする。斯うする事で先の短時間内で有っても基板温度は平衡に達し、均質な絶縁膜を安定的に堆積する事が可能と成る。
【0008】
堆積絶縁膜として酸化硅素を利用する時には原料気体としてモノシラン(SiH4)やジシラン(Si26)、ジクロールシラン(Si22Cl2)等のシラン気体、乃至はTEOS(Si(0C254)等の硅素含有化合物と、酸素(O2)や亜酸化窒素(N2O)等の酸化性気体とを用いる。窒化硅素を利用する時には上述のシラン気体と、アンモニア(NH3)や窒素(N2)等の窒化性気体とを用いる。
【0009】
斯様にして得られた絶縁膜をMOS−FETのゲート絶縁膜として利用する。しかしながら此等の絶縁膜は1100℃程度以上の温度で形成される硅素の熱酸化膜に比べて膜中に絶縁膜捕獲準位や固定電荷を多量に含み、更に界面準位も遥かに高いのが普通で有る。それ故、本願発明では以下の工程を以て、ゲート絶縁膜と界面、及び同時に半導体膜の結晶粒界の改質を図る訳で有る。
【0010】
第二工程が終了した後に、第三工程として半導体膜や酸化硅素等の絶縁膜、及び半導体膜と酸化硅素膜との界面が有する不対結合対に水素や窒素を結合させる窒化処理を行う。本第三工程で半導体膜内や界面に存在する不対結合対を水素や窒素、及びアミノ基やイミノ基で終端し(本願では斯うした処理を広く窒化処理と称す)、禁制帯中の中心部付近(真性フェルミレベル近傍)に於ける捕獲準位(ディープ・ステイツ)を減少させるので有る。同時に酸化膜中や絶縁膜中に存在する不対結合対も此等の官能基で終端し、酸化膜固定電荷等の絶縁膜中電荷を減少させる。ディープ・ステイツの主因は半導体膜の界面や粒界に存在する不対結合対で有る。此等は窒化処理に依り容易に不活性とされ、不活性化されれば捕獲準位は減少する。又、絶縁膜中の固定電荷はフラットバンド電位に変動をもたらしたり、絶縁膜への電荷の注入を容易として半導体装置の動作信頼性を低下させる。従って第三工程の窒化処理を行う事で半導体装置のフラットバンド電位を理想値に近づけ、ディープ・ステイツを減少させ、更に半導体装置の信頼性を増す事が可能と成る。
【0011】
最も効果的に窒化処理を行うには半導体膜と絶縁膜が形成された基板に窒素活性種を照射する事で有る。窒素活性種はヘリウム等の希ガスとアンモニアや窒素等の窒素含有気体との混合気体から成るプラズマにて生成される。従って本願発明での窒化処理はプラズマ化学気相堆積装置(PECVD装置)等のプラズマ処理装置にて行われる。窒化処理時に於ける基板温度は、それが低過ぎる(100℃程度未満)と反応が進行せず、反対に高過ぎる(425℃程度以上)と窒素や水素の離脱と言った逆反応の進行が速く成るので、100℃程度から425℃程度の間の基板温度で行う。理想的には250℃程度から400℃程度の間の温度で有る。生産性を高めるとの視点からは第二工程と第三工程は同じPECVD装置にて連続処理されるのが好ましい。此の場合、第二工程の処理温度と第三工程の処理温度が大きく異なると基板が熱平衡に達する迄に長時間を費やす事と成る。5分程度以内の短時間内に熱平衡を実現するには第二工程と第三工程との温度差は30℃程度以下でなくてはならない。
【0012】
窒素活性種照射はヘリウム(He)やネオン(Ne)、アルゴン(Ar)、クリプトン(Kr)、キセノン(Xe)と云った希ガスと、窒素(N2)や亜酸化窒素(N2O)、アンモニア(NH3)、硝酸(HNO3)と云った窒素含有気体との混合気体から成るプラズマで窒素等の原子状活性種を生成し、此の窒素原子活性種を含むプラズマを半導体膜や絶縁膜に照射する事で行われる。斯様なプラズマ照射にて半導体膜表層部や多結晶半導体膜の粒界部、及び絶縁膜中に存在する不対結合対が先に記述した官能基等で終端化され、此等の欠陥が不活性化されるので有る。
【0013】
希ガスと窒素含有気体との混合気体から成るプラズマのプラズマ源としてはラジオ波(rf波:13.56MHzや此の整数倍の周波数で27.12MHz等)や超高周波(VHF波:100MHz程度から数百MHzの周波数を有する電磁波)、或いはマイクロ波(2.45GHzや8.3GHz等のGHz帯の周波数を有する電磁波)が使用される。超高周波やマイクロ波を用いればプラズマ密度が上がるので、窒化処理が迅速に進行する。しかしながら550mm×650mmと云った様な大型基板に対応する汎用PECVD装置を使用出来るとの視点からは13.56MHzに代表されるラジオ波の使用が最適で有る。混合プラズマの照射を行う際には、希ガスと窒素含有気体との混合気体中に占める窒素含有気体の割合を1%程度以上10%程度以下とする。特にラジオ波をプラズマ源としているPECVD装置を使用する場合にはプラズマ密度の低下に応じて、窒素含有気体の割合を1%程度以上6%程度未満とせねばならない。これは本願発明が希ガスの励起状態を多量に生成し、此の励起状態からのエネルギー遷移を以て窒素含有気体の原子状活性種(水素原子活性種H*、ニトロ基活性種NO2 *、ニトロシル基活性種NO*、アミノ基活性種NH2 *、イミノ基活性種NH*、窒素原子活性種N*)を生成し、不対結合対に此等の官能基を結合させるとの原理に基づいて居るからで有る。従来の水素化では、例えば純水素のプラズマを用いて多結晶硅素膜表面の水素化を行って居た。此の場合、プラズマ中に発生する活性種の殆ど総てが水素分子の活性種(H2 *)で有る。本願の様に硅素等の半導体物質表面や多結晶性半導体膜の粒界部を425℃程度未満の低温で効果的に窒化処理を行う場合、窒素原子が無作為に存在する各不対結合対に一つずつ結合しなければならない。分子状の活性種では分子が原子に解離する必要が有り、此の解離エネルギーの多くは基板から熱的に供給されて居る。それ故、基板温度が425℃程度未満との低温では水素化や窒化の進行が著しく抑制されて仕舞うので有る。此に対して本願ではプラズマ中に希ガスの活性種を多量に生成する。希ガスの活性種は励起エネルギーが20eV程度と高い。一方、例えば窒素分子が二つの窒素原子に解離し、その内の一つの窒素原子が第一励起状態に迄達する総エネルギーも凡そ20eVで有る。従って窒素分子が希ガスの励起種からエネルギーを受け取れば、容易に窒素原子の第一励起種、即ち窒素原子活性種が生成される。斯うして生成された窒素原子活性種は化学的に窮めて活性で、425℃乃至は400℃程度未満との低温で有っても半導体膜表面や粒界部に於ける不対結合対を終端する事が出来、斯くして半導体膜の低温での欠陥補修が進行する訳で有る。此の場合、窒素含有気体の割合が1%程度未満ではプラズマ中の窒素含有気体の原子状活性種の数が少なく、逆に10%程度以上だと希ガスの活性種の数が減少して窒素含有気体の分子状活性種が増えて仕舞う為、矢張り窒素含有気体の原子状活性種の数は減って仕舞う。取り分けプラズマ密度の低いラジオ波を用いたプラズマでは窒素含有気体の原子状活性種の数を多くする必要が有り、混合気体中に於ける窒素含有気体の割合を1%程度以上6%程度未満とせねばならない。斯うすればrfプラズマで有っても捕獲準位が低い良質な界面や粒界を、比較的短時間で形成出来る訳で有る。本願発明の半導体装置の製造工程中で第二工程乃至は第三工程を除いた最高温度は半導体膜堆積時で凡そ425℃程度と成って居る。此の半導体装置製造工程中での最高温度以下、或いは半導体膜堆積時の温度以下、即ち425℃程度以下の低温で本第三工程を行うには、低温化に伴う窒化反応速度の低下を補償する為に窒素含有気体の原子状活性種の数を最大とせねば成らず、故に混合気体中に於ける窒素含有気体の割合を1.5%程度以上4.5%程度未満とする必要が有る。更に結晶粒界が存在する多結晶性半導体膜に於いては、粒界での乱れた結合を解き放して此等に水素や窒素を新たに結合させる必要が有る為、優良な半導体装置を得るには混合気体中に於ける窒素含有気体の割合を2%程度以上4%程度未満とするのが好ましい。尚、低温でのプラズマ窒化反応を促進するにはプラズマ照射の直前に基板を希釈沸酸水溶液等に浸して、半導体膜表面や粒界部を水素で終端化しておく。斯うすると半導体膜表面等は秩序有る状態と成っており、乱れた結合を解く必要がないので窒化処理は容易に進行する。
【0014】
従来の水素化処理は2時間から6時間も行われていた。此に対して本願発明の第三工程に於ける窒化処理時間は10秒間程度から10分間程度で有る。此は従来の方法ではゲート電極(厚さ500nm程度以上)や層間絶縁膜(厚さ500nm程度以上)、金属配線(厚さ500nm程度以上)等が出来上がった後に水素化処理を行って居た為で有る。水素化を効率的に行うにはプラズマ等で水素の活性種を生成する必要が有るが、此等は化学的に不安定で有る為、その寿命が短く、ゲート電極や層間絶縁膜、金属配線等が存在すると、ゲート絶縁膜や能動層半導体膜迄はなかなか達しない。それが故、従来は水素プラズマ処理時間を長くせざるを得ず、斯くして水素化処理と同時に半導体装置には多くのプラズマ損傷が入り、プラズマ処理装置も自身が発生するプラズマにその寿命を短くして居たので有った。此に対して本願発明ではゲート絶縁膜が形成された直後に窒化処理を施す。ゲート電極も層間絶縁膜も金属配線も存在せぬ状況下にて直に窒化処理を行うので有る。然も本願発明の半導体装置ではゲート絶縁膜が5nm程度から120nm程度と薄い為、水素や窒素、アンモニア等の原子状活性種は容易に半導体膜迄達する。これが本願発明では窒化処理時間を従来に比べて10分の1から100分の1へと大幅に短縮し得た理由で有る。プラズマ照射時間の短縮に伴い、薄膜半導体装置に対するプラズマ損傷も10分の1から100分の1へと低減され、プラズマ処理装置の寿命内での処理枚数も10倍から100倍へと増加するので有る。窒化処理時間は10秒程度未満だと窒化の効果は現れず、10分程度以上だと酸化膜や半導体膜にプラズマ損傷が後に修繕出来ぬ程入る恐れが有る。理想的には30秒程度から120秒程度で有る。
【0015】
斯様にして半導体膜と絶縁膜、及び其れ等の間の界面に気ガスと窒素含有気体との混合気体のプラズマで生成された窒素含有気体の原子状活性種を多量に照射して、絶縁膜内の欠陥や多結晶性半導体膜の粒界部、及び半導体膜の表面を効率的に終端化させるので、斯うした部位に於ける不対結合対の数が著しく減少する。取り分け、多結晶性半導体膜の粒界部終端化は半導体膜の禁制帯中での捕獲準位数を低減し、以て薄膜半導体装置のサブスレーシュホールド特性や閾値電圧を小さくし、同時に粒界部に於ける荷電単体の非弾性散乱数を減らす事で移動度の向上をもたらす。又、界面近傍に於ける酸化膜中の欠陥が減少してゲート絶縁膜の品質が向上するが故、薄膜半導体装置の動作信頼性が高く、寿命の長い薄膜半導体装置が得られる。
【0016】
(実施例1)
図1(a)〜(d)はMOS型電界効果トランジスタを形成する薄膜半導体装置の製造工程を断面で示した図で有る。本実施例1では基板101として歪点が650℃程度の汎用無アルカリガラスを用いた。まず基板101上にECR−PECVD法で酸化硅素膜を200nm程度堆積し、下地保護膜102とした。酸化硅素膜のECR−PECVD法での堆積条件は以下の通りで有る。
【0017】
モノシラン(SiH4)流量・・・60sccm
酸素(O2)流量・・・100sccm
圧力・・・2.40mTorr
マイクロ波(2.45GHz)出力・・・2250W
印可磁場・・・875Gauss
基板温度・・・100℃
成膜時間・・・40秒
此の下地保護膜上に半導体膜として真性非晶質硅素膜をLPCVD法にて50nm程度の膜厚に堆積した。LPCVD装置はホット・ウォール型で容積が184.5lで、基板挿入後の反応総面積は約44000cm2で有る。堆積温度は425℃で原料ガスとして純度99.99%以上のジシラン(Si26)を用い、200sccm反応炉に供給した。堆積圧力は凡そ1.1Torrで有り、此の条件下で硅素膜の堆積速度は0.77nm/minで有った。斯様にして得られた非晶質半導体膜にキセノン塩素(XeCl)エキシマレーザーを照射して半導体膜の結晶化を進めた。照射レーザーエネルギー密度は425mJ・cm-2で、半導体膜が膜厚方向全体に渡り完全溶融して微結晶化が生ずるエネルギー密度よりも10mJ・cm-2低いエネルギー密度で有った。レーザー結晶化終了後の多結晶硅素薄膜に厚みは61.8nmで有った。こうして結晶性半導体膜(多結晶硅素膜)を形成した(第一工程)後、この結晶性半導体膜を島状に加工して、後に半導体装置の能動層と成る半導体膜の島103を形成した。(図1−a)
次にパターニング加工された半導体膜の島103を被う様に酸化硅素膜104をPECVD法にて形成(第二工程)した。此の酸化硅素膜は半導体装置のゲート絶縁膜として機能する。ゲート絶縁膜形成に先立ち基板を次の手順で洗浄した。
【0018】
(1)超音波照射に依るイソプロピルアルコール洗浄(27℃、5分間)
(2)窒素バブリングされた純水洗浄(27℃、5分間)
(3)アンモニア過水洗浄(80℃、5分間)
(4)窒素バブリングされた純水洗浄(27℃、5分間)
(5)硫酸過水洗浄(97℃、5分間)
(6)窒素バブリングされた純水洗浄(27℃、5分間)
(7)希釈弗酸水溶液(弗酸濃度1.67%)洗浄(27℃、20秒間)
(8)窒素バブリングされた純水洗浄(27℃、5分間)
上記8番目の純水洗浄が終了してから基板がPECVD装置のプラズマ処理室に設置される迄の時間は約15分間で有った。
【0019】
PECVD装置は枚葉式容量結合型でプラズマは工業用周波数(13.56MHz)のラジオ高周波電源を用いて平行平板電極間に発生させる。プラズマ処理室は反応容器に依り外気から隔絶され、プラズマ処理中で凡0.1Torrから10Torr程度の減圧状態とされる。反応容器内には下部平板電極と上部平板電極が互いに平行に設置されて居り、これら二枚の電極が平行平板電極を形成する。この平行平板電極間がプラズマ処理室となる。本願発明で用いたPECVD装置は470mm×560mmの平行平板電極を備え、此等平行平板電極間距離は下部平板電極の位置を上下させる事に依り、18.0mmから37.0mmの間で自由に設定し得る。此に応じてプラズマ処理室の容積は4738cm3から9738cm3と変化する。又電極間距離を所定の値に設定した場合、470mm×560mmの平板電極面内での電極間距離の偏差は僅か0.5mmで有る。従って電極間に生ずる電界強度の偏差は平板電極面内で2%程度以下となり窮めて均質なプラズマがプラズマ処理室に発生する。下部平板電極上に酸化膜を形成すべき硅素基板を置く。下部平板電極内部にはヒーターが設けられて居り、下部平板電極の温度を250℃から400℃の間で任意に調整し得る。周辺2mmを除いた下部平板電極内の温度分布は設定温度に対して±5℃以内で有り、基板として360mm×465mmとの大きな物を使用しても基板内温度偏差を±2℃以内に保つ事が出来る。プラズマ処理に使用する原料気体は配管を通じて上部平板電極内に導入され、更に上部平板電極内に設けられたガス拡散板の間を擦り抜けて上部平板電極全面より略均一な圧力でプラズマ処理室に流れ出る。処理中で有れば混合気体の一部は上部平板電極から出た所で電離し、平行平板電極間にプラズマを発生させる。原料気体の一部乃至全部は酸化膜成長や窒素活性種照射に関与し、成長や照射に関与しなかった残留混合気体及び酸化膜形成等の化学反応の結果として生じた生成ガスは排気ガスと成って反応容器周辺上部に設けられた排気穴を介して排気される。排気穴のコンダクタンスは平行平板電極間のコンダクタンスに比べて十分に大きく、その値は平行平板電極間のコンダクタンスの100倍以上が好ましい。更に平行平板電極間のコンダクタンスはガス拡散板のコンダクタンスよりも十分に大きく、やはりその値はガス拡散板のコンダクタンスの100倍以上が好ましい。こうした構成に依り470mm×560mmとの大型上部平板電極全面より略均一な圧力で反応ガスがプラズマ処理室に導入され、同時に排気ガスがプラズマ処理室から総ての方向に均等な流量で排気されるので有る。各種反応ガスの流量は配管に導入される前にマス・フロー・コントローラーに依り所定の値に調整される。又プラズマ処理室内の圧力は排気穴出口に設けられたコンダクタンス・バルブに依り所望の値に調整される。コンダクタンス・バルブの排気側にはターボ分子ポンプ等の真空排気装置が設けられて居る。本願発明ではオイル・フリーのドライ・ポンプが真空排気装置の一部として用いられ、プラズマ処理室等の反応容器内の背景真空度を10ー5Torr台として居る。反応容器及び下部平板電極は接地電位に有り、これらと上部平板電極は絶縁リングに依り電気的に絶縁状態が保たれる。プラズマ発生時には高周波発振源から出力された13.56MHzのラジオ高周波がインピーダンス・マッチング回路を介して上部平板電極に印加される。
【0020】
本発明に用いたPECVD装置は上述の如く窮めて精巧たる電極間制御と均質なガス流を実現した事に依り360mm×465mmとの大型基板に対応可能な薄膜形成装置となった。しかしながらこれらの基礎概念さえ踏襲すれば、更なる基板の大型化には寧ろ容易に対応出来、実際550mm×650mmとのより大型な基板に対応し得る装置も実現可能で有る。又本願発明では最も汎用性の高い周波数13.56MHzの高周波を用いているが、この他にこの高周波の整数倍の高周波を利用しても良い。例えば2倍の27.12MHzや3倍の40.68MHz、4倍の54.24MHz等も有効で有る。更には100MHz〜1GHz程度のVHF波を利用しても良い。周波数が10MHz程度のrf波から数百MHz程度のVHF波で有れば平行平板電極間にプラズマを発生させる事が可能で有る。従って本願発明に用いたPECVD装置の高周波発振源とインピーダンス・マッチング回路を交換する事に依り容易に所望の周波数の高周波を用いてプラズマを発生出来る。
【0021】
本実施例1では、基板は下部平板電極の温度が375℃に保たれているプラズマ処理室に設置される。設置基板がプラズマ処理室と平衡状態となった後の基板表面温度は350℃で有る。半導体膜表面にはまず酸素プラズマを照射して3nm程度の厚みを有する酸化膜を形成する。酸化条件は酸素を5000SCCM流し、プラズマ処理室内の圧力を1.5Torrに保つ。平行平板電極間距離は21.6mmで、ラジオ高周波出力を500W(0.19W/cm2)とする。酸素プラズマ照射時間は300秒で有る。酸素プラズマ照射後、プラズマ処理室を酸化膜堆積条件とプラズマを立てる事を除いて同一とする。酸化膜堆積前の処理室条件は以下の通りとなる。
【0022】
酸素流量:O2=1200SCCM
アルゴン流量:Ar=4700SCCM
TEOS流量:TEOS=100SCCM
ラジオ高周波出力:RF=0W(プラズマは立てない)
圧力:P=1.5Torr
電極間距離:S=20.9mm
下部平板電極温度:Tsus=375℃
ガラス基板表面温度:Tsub=350℃
安定化時間:t=20秒間
此の状態に連続して、上部平板電極にラジオ高周波を印加してプラズマを発生させ、半導体膜表面に酸化膜を堆積する。高周波出力は1000Wで有る。即ち、以下の条件にて絶縁膜を堆積する。
【0023】
酸素流量:O2=1200SCCM
アルゴン流量:Ar=4700SCCM
TEOS流量:TEOS=100SCCM
ラジオ高周波出力:RF=1000W(0.38W/cm2
圧力:P=1.5Torr
電極間距離:S=20.9mm
下部平板電極温度:Tsus=375℃
ガラス基板表面温度:Tsub=350℃
堆積時間:t=33秒
斯様にして第二工程で酸化硅素膜を形成した後、プラズマ処理室を真空引きし、更に連続して半導体膜と酸化膜に対してヘリウムとアンモニアとの混合気体プラズマが照射された(第三工程)。プラズマ処理条件は以下の通りで有る。
【0024】
ヘリウム流量:He=4900SCCM
アンモニア流量:NH3=100SCCM
ラジオ高周波出力:RF=400W(0.152W/cm2
圧力:P=1.0Torr
電極間距離:S=25mm
下部平板電極温度:Tsus=375℃
ガラス基板表面温度:Tsub=350℃
プラズマ処理時間:t=90秒
次に第四工程として酸化性雰囲気下にて第一熱処理を行った。濃度16%の塩化水素酸水溶液を空気中に露点で96℃含む塩酸水蒸気空気下にて熱処理は施こされた。処理温度は345℃で処理時間は2時間、処理室内圧力は1気圧で有った。この塩酸に依る熱処理が終了した後、引き続いて酸化膜中のハロゲン元素を抜く目的で1時間の熱処理を継続した。この熱処理雰囲気は露点96℃の水蒸気含有空気中で行われ、雰囲気に塩酸は含まれて居ない。熱処理温度は矢張り345℃で圧力は1気圧で有る。
【0025】
斯うして第四工程が終了した後に第五工程の第二熱処理を行い、酸化膜を乾燥さた。第二熱処理はアルゴン中に水素を3%含む非酸化性雰囲気下にて1気圧、350℃で2時間施された。第五工程終了後にゲート絶縁膜の厚みを測定したところ、その厚みは93nmで有った。斯様にしてゲート絶縁膜形成と、半導体膜及び酸化膜と界面の改質が完了した。(図1−b)
引き続いて金属薄膜に依りゲート電極105をスパッター法にて形成する。スパッター時の基板温度は150℃で有った。本実施例1では750nmの膜厚を有するタンタル(Ta)にてゲート電極を作成し、このゲート電極のシート抵抗は2.44Ω/□で有った。次にゲート電極をマスクとして、ドナー又はアクセプターとなる不純物イオン106を打ち込み、ソース・ドレイン領域107とチャンネル形成領域108をゲート電極に対して自己整合的に作成する。本実施例1ではCMOS半導体装置を作製した。NMOSトランジスタを作製する際にはPMOSトランジスタ部をアルミニウム(Al)薄膜で覆った上で、不純物元素として水素中に5%の濃度で希釈されたフォスヒィン(PH3)を選び、加速電圧70kVにて水素を含んだ総イオンを5×1015cm-2の濃度でNMOSトランジスタのソース・ドレイン領域に打ち込んだ。反対にPMOSトランジスタを作製する際にはNMOSトランジスタ部をアルミニウム(Al)薄膜で覆った上で、不純物元素として水素中に5%の濃度で希釈されたジボラン(B26)を選び、加速電圧70kVにて水素を含んだ総イオンを4×1015cmー2の濃度でPMOSトランジスタのソース・ドレイン領域に打ち込んだ。(図1−c)イオン打ち込み時の基板温度は300℃で有る。
【0026】
次にPECVD法でTEOS(Si−(OCH2CH34)と酸素を原料気体として、基板温度300℃で層間絶縁膜109を堆積した。層間絶縁膜は二酸化硅素膜から成り、その膜厚は凡そ500nmで有った。層間絶縁膜堆積後、層間絶縁膜の焼き締めとソース・ドレイン領域に添加された不純物元素の活性化を兼ねて、窒素雰囲気下350℃にて2時間の熱処理を施した。最後にコンタクト・ホールを開穴し、スパッター法で基板温度を180℃としてアルミニウムを堆積し、配線110を作成して薄膜半導体装置が完成した。(図1−d)
この様にして作成した薄膜半導体装置の伝達特性を測定した。測定した半導体装置のチャンネル形成領域の長さは10μmで幅は10μmで有った。伝達特性の測定は室温にて行われた。NMOSトランジスタのVds=8Vに於ける飽和領域より求めた移動度は104cm2・Vー1・s-1で有り、閾値電圧は3.083V、サブスレーシュホールド・スイングは0.301Vで有った。又、PMOSトランジスタのVds=−8Vに於ける飽和領域より求めた移動度は81cm2・Vー1・s-1で有り、閾値電圧は−2.082V、サブスレーシュホールド・スイングは0.373Vで有った。此に対して水素プラズマ照射を水素100%で薄膜半導体装置の完成後に2時間行った比較例(従来技術に相当、本実施例中の第三、四、五工程は行われない)ではNMOSの移動度は55cm2・Vー1・s-1で有り、閾値電圧は3.685V、サブスレーシュホールド・スイングは0.336Vで有った。又、比較例のPMOSの移動度は77cm2・Vー1・s-1で有り、閾値電圧は−2.639V、サブスレーシュホールド・スイングは0.486Vで有った。此の例が示す様に本願発明に依りN型とP型の両半導体装置共に大きな移動度を有し、急峻なサブスレーシュホールド特性を示す優良な薄膜半導体装置を安定的に製造出来る様に成った。然も界面遷移領域の酸化膜質が高い為に酸化膜の信頼性が良く、長寿命の薄膜半導体装置を汎用ガラス基板を使用し得る低温工程にて、簡便且つ容易に作成し出来る様に成った。更に窒化処理時間を従来の水素化処理時間の二時間余りから数分へと低減し得た。
【0027】
【発明の効果】
以上詳述してきた様に、従来長時間を有しながら其の効果が僅かで有った水素化処理を本館発明により短時間で、而も窮めて効果的に行い得る様に成った。これに依り薄膜トランジスタに代表される半導体装置の高速動作や省エネ化、並びに低価格化を促進し、同時に半導体装置の動作安定性をも高めるとの効果が認められる。
【図面の簡単な説明】
【図1】 本願発明の製造工程を説明した図。
【符号の説明】
101・・・基板
102・・・下地保護膜
103・・・半導体膜の島
104・・・酸化硅素膜
105・・・ゲート電極
106・・・不純物イオン
107・・・ソース・ドレイン領域
108・・・チャネル形成領域
109・・・層間絶縁膜
110・・・配線
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method of manufacturing a thin film semiconductor device typified by a thin film transistor (TFT), a silicon on insulator (SOI), or the like. More specifically, the present invention relates to a method of manufacturing a high-performance and reliable thin film semiconductor device at a relatively low temperature of about 425 ° C. or less.
[0002]
[Prior art]
In the case of manufacturing a thin film semiconductor device represented by a polycrystalline silicon thin film transistor (p-Si TFT) at a low temperature of about 425 ° C. or lower where a general-purpose glass substrate can be used, the following manufacturing method has been conventionally employed. First, a polycrystalline silicon film (p-Si film) is formed by an excimer laser irradiation method or the like, and then a silicon oxide film to be a gate insulating film is applied to a chemical vapor deposition method (CVD method) or a physical vapor deposition method (PVD method). Form. Next, a gate electrode is made of tantalum or the like, and a field effect transistor (MOS-FET) composed of metal (gate electrode) -oxide film (gate insulating film) -semiconductor (polycrystalline silicon film) is formed. Next, an interlayer insulating film is deposited, contact holes are opened, and wiring is performed using a metal thin film. In order to improve the electrical characteristics as necessary, a plasma irradiation treatment consisting of 100% hydrogen is finally performed for about 2 hours, thereby completing the thin film semiconductor device.
[0003]
[Problems to be solved by the invention]
However, in these conventional methods of manufacturing a thin film semiconductor device, even if hydrogen plasma irradiation is performed to improve the semiconductor characteristics, the semiconductor characteristics are only slightly improved. Moreover, because the processing time is too long, the semiconductor film, the silicon oxide film, and the plasma processing apparatus itself are damaged by plasma, and many expensive plasma processing apparatuses must be purchased. I had many problems. In accordance with these facts, if a semiconductor device such as p-Si TFT is manufactured by a conventional manufacturing method, the manufacturing price increases, and the completed semiconductor device not only has excellent electrical characteristics but also is in use. There was also a problem in reliability such as deterioration over time.
[0004]
In view of the above-described circumstances, the present invention is intended to provide a method for manufacturing an excellent thin film semiconductor device in a low temperature process of about 425 ° C. or lower.
[0005]
[Means for Solving the Problems]
The method for manufacturing a thin film semiconductor device according to the present invention includes a first step of forming a semiconductor film containing a semiconductor substance containing silicon alone or a silicon substance on a substrate containing an insulating substance, and silicon oxide on the semiconductor film. A second step of forming an insulating film; and a third step of irradiating the insulating film with a nitrogen atom active species and nitriding the insulating film and the semiconductor film while keeping the temperature of the substrate at 425 ° C. or lower. The nitrogen atom active species is generated by a plasma composed of a mixed gas of a rare gas and a nitrogen-containing gas, the plasma source of the plasma is a radio wave, and the proportion of the nitrogen-containing gas in the mixed gas is 1% It is characterized by being 6% or less.
[0006]
DETAILED DESCRIPTION OF THE INVENTION
First, in the present invention, as a first step, a semiconductor film typified by polycrystalline silicon (p-Si) is formed on an edge substance such as a glass substrate or an interlayer insulating film of a three-dimensional semiconductor device. The semiconductor film may be in a single crystal state, in a polycrystalline state, or in an amorphous state. However, the present invention is particularly effective when it is in a polycrystalline state. Indicates. This is because the present invention reduces the trap level (interface level) existing at the interface between the semiconductor film and the insulating film, and the trap level (grain boundary level) located between the crystal grains. This is also because of the reduction. Needless to say, the interface state always exists at the junction interface between the semiconductor film and the insulating film regardless of the crystalline state. Since this interface state is reduced, the present invention is effective regardless of the state of the semiconductor film. On the other hand, in addition to this effect for the polycrystalline film, an effect of reducing the grain boundary level is also recognized. The semiconductor film may be any semiconductor material such as silicon (Si) or silicon germanium (Si x Ge 1-x : 0 <x <1), but from the viewpoint of easily forming a good MOS interface. Semiconductor materials having silicon as a main constituent element (silicon atom constituent ratio of about 80% or more) are excellent. The semiconductor film is formed by a vapor deposition method such as a physical vapor deposition method (PVD method) or a chemical vapor deposition method (CVD method). As the PVD method, a sputtering method, a vapor deposition method, or the like can be considered. As the CVD method, an atmospheric pressure chemical vapor deposition method (APCVD method), a low pressure chemical vapor deposition method (LPCVD method), a plasma chemical vapor deposition method (PECVD method), or the like can be used. A semiconductor film formed by vapor deposition is usually in a polycrystalline state, an amorphous state, or a mixed state immediately after deposition. A thin film in a polycrystalline state is called a polycrystalline film, and a thin film in an amorphous state or a mixed state is called an amorphous film or a mixed crystal film, respectively. Polycrystalline films obtained immediately after deposition may be used as active parts of semiconductor devices (source / drain regions and channel forming regions of field effect transistors and emitter / base / collector regions of bipolar transistors). It is possible. In contrast to this, an amorphous film or a mixed crystal film is crystallized, or a polycrystalline film is recrystallized to obtain a new polycrystalline film, which is then used as an active part. Things are also possible. Laser irradiation or rapid heat treatment is used to easily perform crystallization and recrystallization.
[0007]
Next, as a second step, an insulating film is formed on the semiconductor film using a plasma chemical vapor deposition apparatus (PECVD apparatus) or the like. In addition to the PECVD method, the insulating film is formed by other CVD methods such as a PVD method such as sputtering or vapor deposition, an atmospheric pressure chemical vapor deposition method (APCVD method), or a low pressure chemical vapor deposition method (LPCVD method). You may depend on. The PECVD method is most suitable from the standpoint that the nitrogen active species irradiation in the third step is performed continuously following the formation of the insulating film in the second step. In this case, the active species of nitrogen can be irradiated before impurities such as moisture in the air are mixed into the insulating film or the interface when the substrate touches the air or the like. This is because defects such as paired bonds can be efficiently terminated. Furthermore, productivity is improved by making it a continuous process. The temperature during the formation of the insulating film is at most about 425 ° C., usually about 400 ° C. or less. This is based on the premise that the semiconductor device targeted by the present application is manufactured on a general-purpose glass substrate on which an amorphous silicon thin film semiconductor device (a-Si TFT) is manufactured or a substrate having poor heat resistance such as a plastic substrate. It is from. As will be described later, the temperature of the third step is preferably about 400 ° C. or less, and it depends on the fact that the second step and the third step are preferably continuous. The insulating film is formed by irradiating the semiconductor film with plasma of an oxidizing gas containing oxygen or the like to grow an ultrathin silicon oxide film having a thickness of about 3 nm to 10 nm on the surface layer of the semiconductor film. In the case where an insulating film having a thickness of about 10 nm or more is required, a silicon oxide film or a silicon nitride film is deposited on the ultrathin silicon oxide film by a CVD method to form a laminated structure. In this case, after forming the first plasma oxide film on the surface layer of the semiconductor film, the second insulating film is continuously deposited without breaking the vacuum. In order to avoid problems such as inadvertent level formation in the gate insulating film and contamination of impurities into the gate insulating film, immediately after the plasma oxidation is completed, the second insulating film is formed within about 5 minutes at the latest. Start deposition. From the end of plasma oxidation to the start of insulating film deposition, the plasma processing chamber is set to the same conditions as those for insulating film deposition except that plasma is generated. In order to execute such a process, the substrate temperature in the plasma oxidation and the substrate temperature in the insulating film deposition must be substantially equal. That is, the temperature difference between the two is at most less than about 30 ° C. As a result, the substrate temperature reaches equilibrium even within the short time period, and a uniform insulating film can be stably deposited.
[0008]
When silicon oxide is used as the deposited insulating film, the raw material gas is a silane gas such as monosilane (SiH 4 ), disilane (Si 2 H 6 ), dichlorosilane (Si 2 H 2 Cl 2 ), or TEOS (Si (0C). 2 H 5 ) 4 ) or the like, and an oxidizing gas such as oxygen (O 2 ) or nitrous oxide (N 2 O) are used. When silicon nitride is used, the silane gas described above and a nitriding gas such as ammonia (NH 3 ) or nitrogen (N 2 ) are used.
[0009]
The insulating film thus obtained is used as a gate insulating film of a MOS-FET. However, these insulating films contain a large amount of insulating film trapping levels and fixed charges in the film as compared with silicon thermal oxide films formed at temperatures of about 1100 ° C. or higher, and the interface levels are much higher. Is normal. Therefore, in the present invention, the following steps are used to improve the gate insulating film and the interface, and at the same time, the crystal grain boundary of the semiconductor film.
[0010]
After the second step is completed, as a third step, nitriding treatment is performed in which hydrogen or nitrogen is bonded to an insulating film such as a semiconductor film or silicon oxide, and an unpaired pair at the interface between the semiconductor film and the silicon oxide film. In this third step, the unpaired bond pair existing in the semiconductor film or at the interface is terminated with hydrogen, nitrogen, amino group or imino group (in this application, such treatment is widely referred to as nitriding treatment) This is because the trap level (deep states) near the center (near the intrinsic Fermi level) is reduced. At the same time, unpaired bond pairs existing in the oxide film or the insulating film are also terminated by these functional groups, and the charge in the insulating film such as the fixed charge of the oxide film is reduced. The main cause of deep states is an unpaired bond pair existing at the interface or grain boundary of the semiconductor film. These are easily deactivated by nitriding, and the trap level decreases if deactivated. In addition, the fixed charge in the insulating film causes a fluctuation in the flat band potential, or facilitates injection of the charge into the insulating film, thereby reducing the operation reliability of the semiconductor device. Therefore, by performing the nitriding process in the third step, it is possible to bring the flat band potential of the semiconductor device close to the ideal value, reduce deep states, and further increase the reliability of the semiconductor device.
[0011]
The most effective nitriding treatment is to irradiate the substrate on which the semiconductor film and the insulating film are formed with nitrogen active species. The nitrogen active species is generated by plasma composed of a mixed gas of a rare gas such as helium and a nitrogen-containing gas such as ammonia or nitrogen. Therefore, the nitriding process in the present invention is performed by a plasma processing apparatus such as a plasma enhanced chemical vapor deposition apparatus (PECVD apparatus). When the substrate temperature during nitriding is too low (less than about 100 ° C.), the reaction does not proceed. Conversely, when the substrate temperature is too high (about 425 ° C. or higher), the reverse reaction such as nitrogen or hydrogen desorption occurs. Since it becomes faster, it is performed at a substrate temperature between about 100 ° C. and 425 ° C. Ideally, the temperature is between about 250 ° C. and about 400 ° C. From the viewpoint of increasing productivity, it is preferable that the second process and the third process are continuously processed in the same PECVD apparatus. In this case, if the processing temperature in the second step and the processing temperature in the third step are greatly different, it takes a long time for the substrate to reach thermal equilibrium. In order to achieve thermal equilibrium within a short time of about 5 minutes, the temperature difference between the second step and the third step must be about 30 ° C. or less.
[0012]
Nitrogen active species irradiation is performed with noble gases such as helium (He), neon (Ne), argon (Ar), krypton (Kr), and xenon (Xe), nitrogen (N 2 ), and nitrous oxide (N 2 O). Atomic active species such as nitrogen are generated by a plasma consisting of a mixed gas with a nitrogen-containing gas such as ammonia (NH 3 ) and nitric acid (HNO 3 ), and the plasma containing this nitrogen atomic active species is converted into a semiconductor film or This is done by irradiating the insulating film. By such plasma irradiation, the unpaired bond pair existing in the semiconductor film surface layer part, the grain boundary part of the polycrystalline semiconductor film, and the insulating film is terminated by the functional group described above, and these defects are eliminated. Yes, because it is inactivated.
[0013]
As a plasma source of a plasma composed of a mixed gas of a rare gas and a nitrogen-containing gas, a radio wave (rf wave: 13.56 MHz or an integer multiple of 27.12 MHz or the like) or a super-high frequency (VHF wave: about 100 MHz) An electromagnetic wave having a frequency of several hundred MHz) or a microwave (an electromagnetic wave having a frequency in the GHz band such as 2.45 GHz or 8.3 GHz) is used. If ultra-high frequency or microwave is used, the plasma density increases, so that the nitriding process proceeds rapidly. However, from the viewpoint that a general-purpose PECVD apparatus corresponding to a large substrate such as 550 mm × 650 mm can be used, use of a radio wave represented by 13.56 MHz is optimal. When performing the mixed plasma irradiation, the ratio of the nitrogen-containing gas in the mixed gas of the rare gas and the nitrogen-containing gas is set to about 1% or more and about 10% or less. In particular, when a PECVD apparatus using a radio wave as a plasma source is used, the ratio of the nitrogen-containing gas must be about 1% or more and less than about 6% in accordance with a decrease in plasma density. This is because the present invention generates a large amount of excited states of a rare gas, and with the energy transition from this excited state, the nitrogen-containing gaseous atomic active species (hydrogen atom active species H * , nitro group active species NO 2 * , nitrosyl) Group active species NO * , amino group active species NH 2 * , imino group active species NH * , nitrogen atom active species N * ), and these functional groups are bonded to an unpaired bond pair. Because it is. In the conventional hydrogenation, for example, hydrogenation of the surface of the polycrystalline silicon film is performed using pure hydrogen plasma. In this case, almost all active species generated in the plasma are active species of hydrogen molecules (H 2 * ). When effectively nitriding the surface of a semiconductor material such as silicon or the grain boundary portion of a polycrystalline semiconductor film at a low temperature of less than about 425 ° C. as in the present application, each unpaired bond pair in which nitrogen atoms are present randomly Must be joined one by one. Molecular active species require molecules to dissociate into atoms, and much of this dissociation energy is thermally supplied from the substrate. Therefore, at low temperatures where the substrate temperature is less than about 425 ° C., the progress of hydrogenation and nitridation is remarkably suppressed. In contrast, in the present application, a large amount of rare gas active species is generated in the plasma. The active species of the rare gas has a high excitation energy of about 20 eV. On the other hand, for example, the total energy that a nitrogen molecule dissociates into two nitrogen atoms and one of the nitrogen atoms reaches the first excited state is about 20 eV. Therefore, when the nitrogen molecule receives energy from the excited species of the rare gas, the first excited species of the nitrogen atom, that is, the nitrogen atom active species is easily generated. The nitrogen atom active species thus generated is chemically active and is an unpaired bond pair on the surface of the semiconductor film or at the grain boundary even at a low temperature of about 425 ° C. or less than about 400 ° C. Thus, the defect repair of the semiconductor film at a low temperature proceeds. In this case, when the ratio of nitrogen-containing gas is less than about 1%, the number of atomic active species of nitrogen-containing gas in the plasma is small, and conversely, when it is about 10% or more, the number of active species of rare gas decreases. Since the number of molecular active species of nitrogen-containing gas increases, the number of atomic active species of nitrogen-containing gas decreases and ends up. In particular, in plasma using radio waves with low plasma density, it is necessary to increase the number of atomic active species of nitrogen-containing gas, and the ratio of nitrogen-containing gas in the mixed gas should be about 1% or more and less than about 6%. I have to. In this case, even if it is rf plasma, a high quality interface and grain boundary having a low trapping level can be formed in a relatively short time. The maximum temperature excluding the second step or the third step in the manufacturing process of the semiconductor device of the present invention is about 425 ° C. when the semiconductor film is deposited. In order to carry out the third step at a temperature lower than the maximum temperature in the semiconductor device manufacturing process or the temperature at which the semiconductor film is deposited, that is, about 425 ° C. or less, the decrease in the nitriding reaction rate due to the lower temperature is compensated. Therefore, it is necessary to maximize the number of atomically active species of nitrogen-containing gas, and therefore the ratio of nitrogen-containing gas in the mixed gas must be about 1.5% or more and less than about 4.5%. . Furthermore, in the case of a polycrystalline semiconductor film in which crystal grain boundaries exist, it is necessary to release disordered bonds at the grain boundaries and newly bond hydrogen and nitrogen to these, so that an excellent semiconductor device can be obtained. The ratio of the nitrogen-containing gas in the mixed gas is preferably about 2% or more and less than about 4%. In order to promote the plasma nitriding reaction at a low temperature, the substrate is immersed in a dilute hydrofluoric acid solution or the like immediately before the plasma irradiation, and the semiconductor film surface and the grain boundary portion are terminated with hydrogen. In this case, the surface of the semiconductor film and the like is in an orderly state, and it is not necessary to break the disordered bond, so that the nitriding process proceeds easily.
[0014]
Conventional hydrogenation treatment has been performed for 2 to 6 hours. In contrast, the nitriding time in the third step of the present invention is about 10 seconds to 10 minutes. This is because in the conventional method, hydrogenation treatment was performed after the gate electrode (thickness of about 500 nm or more), the interlayer insulating film (thickness of about 500 nm or more), the metal wiring (thickness of about 500 nm or more), etc. were completed. It is. In order to efficiently perform hydrogenation, it is necessary to generate active species of hydrogen by plasma or the like. However, since these are chemically unstable, their lifetime is short, and gate electrodes, interlayer insulating films, metal wirings, etc. Etc., it is difficult to reach the gate insulating film and the active layer semiconductor film. Therefore, conventionally, the hydrogen plasma treatment time has to be lengthened, and thus, the semiconductor device suffers a lot of plasma damage at the same time as the hydrogenation treatment, and the plasma treatment device also has its life to the plasma generated by itself. It was because it was short. In contrast, in the present invention, nitriding is performed immediately after the gate insulating film is formed. This is because the nitriding process is performed directly under the condition that there is no gate electrode, interlayer insulating film, or metal wiring. However, in the semiconductor device of the present invention, since the gate insulating film is as thin as about 5 nm to about 120 nm, atomic active species such as hydrogen, nitrogen, and ammonia easily reach the semiconductor film. This is the reason why the nitriding time can be greatly shortened from 1/10 to 1/100 in the present invention. As the plasma irradiation time is shortened, the plasma damage to the thin film semiconductor device is reduced from 1/10 to 1/100, and the number of processing within the lifetime of the plasma processing apparatus is increased from 10 times to 100 times. Yes. If the nitriding time is less than about 10 seconds, the effect of nitriding does not appear, and if it is longer than about 10 minutes, the oxide film or the semiconductor film may be damaged so that it cannot be repaired later. Ideally, it is about 30 seconds to 120 seconds.
[0015]
In this way, a large amount of atomic active species of nitrogen-containing gas generated by plasma of a mixed gas of gas and nitrogen-containing gas is irradiated to the interface between the semiconductor film and the insulating film, and the like, Since the defects in the insulating film, the grain boundary portions of the polycrystalline semiconductor film, and the surface of the semiconductor film are terminated efficiently, the number of unpaired pairs at such sites is significantly reduced. In particular, the grain boundary termination of the polycrystalline semiconductor film reduces the number of trap levels in the forbidden band of the semiconductor film, thereby reducing the subthreshold characteristics and threshold voltage of the thin film semiconductor device, and at the same time The mobility is improved by reducing the number of inelastic scattering of a single charged substance at the boundary. Further, since defects in the oxide film near the interface are reduced and the quality of the gate insulating film is improved, a thin film semiconductor device with high operational reliability and a long life can be obtained.
[0016]
Example 1
1A to 1D are cross-sectional views showing a manufacturing process of a thin film semiconductor device for forming a MOS field effect transistor. In Example 1, general-purpose non-alkali glass having a strain point of about 650 ° C. was used as the substrate 101. First, a silicon oxide film having a thickness of about 200 nm was deposited on the substrate 101 by the ECR-PECVD method to form a base protective film 102. The deposition conditions of the silicon oxide film by the ECR-PECVD method are as follows.
[0017]
Monosilane (SiH 4 ) flow rate: 60 sccm
Oxygen (O 2 ) flow rate: 100 sccm
Pressure ... 2.40 mTorr
Microwave (2.45 GHz) output: 2250 W
Applied magnetic field: 875 Gauss
Substrate temperature ... 100 ° C
Deposition time: 40 seconds An intrinsic amorphous silicon film as a semiconductor film was deposited on the undercoat protective film to a thickness of about 50 nm by LPCVD. The LPCVD apparatus has a hot wall type and a volume of 184.5 l. The total reaction area after the substrate is inserted is about 44000 cm 2 . The deposition temperature was 425 ° C., disilane (Si 2 H 6 ) having a purity of 99.99% or more was used as a source gas, and the resulting gas was supplied to a 200 sccm reactor. The deposition pressure was approximately 1.1 Torr. Under these conditions, the deposition rate of the silicon film was 0.77 nm / min. The amorphous semiconductor film thus obtained was irradiated with a xenon chlorine (XeCl) excimer laser to promote crystallization of the semiconductor film. In the irradiation laser energy density is 425mJ · cm -2, the semiconductor film is there at 10 mJ · cm -2 lower energy density than the energy density micro-crystallization occurs completely melted throughout the thickness direction. The thickness of the polycrystalline silicon thin film after laser crystallization was 61.8 nm. After the crystalline semiconductor film (polycrystalline silicon film) was formed in this way (first step), this crystalline semiconductor film was processed into an island shape to form a semiconductor film island 103 that later became the active layer of the semiconductor device. . (Fig. 1-a)
Next, a silicon oxide film 104 was formed by PECVD so as to cover the island 103 of the patterned semiconductor film (second process). This silicon oxide film functions as a gate insulating film of the semiconductor device. Prior to forming the gate insulating film, the substrate was cleaned by the following procedure.
[0018]
(1) Isopropyl alcohol cleaning by ultrasonic irradiation (27 ° C, 5 minutes)
(2) Nitrogen bubbled pure water cleaning (27 ° C., 5 minutes)
(3) Ammonia overwater cleaning (80 ° C., 5 minutes)
(4) Cleaning with pure water with nitrogen bubbling (27 ° C, 5 minutes)
(5) Sulfuric acid overwater cleaning (97 ° C, 5 minutes)
(6) Nitrogen bubbled pure water cleaning (27 ° C., 5 minutes)
(7) Diluted hydrofluoric acid aqueous solution (hydrofluoric acid concentration 1.67%) cleaning (27 ° C., 20 seconds)
(8) Pure water cleaning with nitrogen bubbling (27 ° C., 5 minutes)
The time from the completion of the eighth pure water cleaning until the substrate was placed in the plasma processing chamber of the PECVD apparatus was about 15 minutes.
[0019]
The PECVD apparatus is a single-wafer capacitively coupled type, and plasma is generated between parallel plate electrodes using a radio high frequency power source with an industrial frequency (13.56 MHz). The plasma processing chamber is isolated from the outside air by the reaction vessel, and is in a reduced pressure state of about 0.1 Torr to 10 Torr during the plasma processing. A lower plate electrode and an upper plate electrode are installed in parallel in the reaction vessel, and these two electrodes form a parallel plate electrode. A space between the parallel plate electrodes is a plasma processing chamber. The PECVD apparatus used in the present invention has parallel plate electrodes of 470 mm × 560 mm, and the distance between these parallel plate electrodes can be freely set between 18.0 mm and 37.0 mm depending on the position of the lower plate electrode. Can be set. Accordingly, the volume of the plasma processing chamber changes from 4738 cm 3 to 9738 cm 3 . When the distance between the electrodes is set to a predetermined value, the deviation of the distance between the electrodes within the flat electrode surface of 470 mm × 560 mm is only 0.5 mm. Accordingly, the deviation of the electric field strength generated between the electrodes is about 2% or less within the plane electrode surface, and a homogeneous plasma is generated in the plasma processing chamber. A silicon substrate on which an oxide film is to be formed is placed on the lower plate electrode. A heater is provided inside the lower plate electrode, and the temperature of the lower plate electrode can be arbitrarily adjusted between 250 ° C and 400 ° C. The temperature distribution in the lower plate electrode excluding the periphery of 2 mm is within ± 5 ° C with respect to the set temperature, and the substrate temperature deviation is kept within ± 2 ° C even if a large substrate of 360 mm x 465 mm is used. I can do it. The raw material gas used for the plasma processing is introduced into the upper plate electrode through the pipe, and further passes through the gas diffusion plate provided in the upper plate electrode, and flows out from the entire surface of the upper plate electrode to the plasma processing chamber with a substantially uniform pressure. If the process is in progress, a part of the mixed gas is ionized when it exits from the upper plate electrode, and plasma is generated between the parallel plate electrodes. Part or all of the source gas is involved in oxide film growth and nitrogen active species irradiation, and the residual mixed gas that was not involved in growth and irradiation and the product gas generated as a result of chemical reactions such as oxide film formation are exhaust gas and Then, it is exhausted through an exhaust hole provided in the upper periphery of the reaction vessel. The conductance of the exhaust hole is sufficiently larger than the conductance between the parallel plate electrodes, and the value is preferably 100 times or more the conductance between the parallel plate electrodes. Furthermore, the conductance between the parallel plate electrodes is sufficiently larger than the conductance of the gas diffusion plate, and the value is preferably 100 times or more the conductance of the gas diffusion plate. Due to such a configuration, the reaction gas is introduced into the plasma processing chamber from the entire surface of the large upper plate electrode of 470 mm × 560 mm with a substantially uniform pressure, and at the same time, the exhaust gas is exhausted from the plasma processing chamber at a uniform flow rate in all directions. So there. The flow rates of the various reaction gases are adjusted to predetermined values by the mass flow controller before being introduced into the pipe. The pressure in the plasma processing chamber is adjusted to a desired value by a conductance valve provided at the outlet of the exhaust hole. A vacuum exhaust device such as a turbo molecular pump is provided on the exhaust side of the conductance valve. In the present invention the dry pump of the oil-free is used as part of the vacuum exhaust system, there background vacuum degree in the reaction vessel of a plasma processing chamber such as 10 @ 5 Torr stand. The reaction vessel and the lower plate electrode are at ground potential, and these and the upper plate electrode are electrically insulated by the insulating ring. At the time of plasma generation, a radio frequency of 13.56 MHz output from the high frequency oscillation source is applied to the upper plate electrode via the impedance matching circuit.
[0020]
The PECVD apparatus used in the present invention has become a thin film forming apparatus that can handle a large substrate of 360 mm × 465 mm because it has given up elaborate electrode control and homogeneous gas flow as described above. However, as long as these basic concepts are followed, it is possible to easily cope with the further increase in the size of the substrate, and it is possible to realize an apparatus that can actually handle a larger substrate of 550 mm × 650 mm. In the present invention, the most versatile high frequency of 13.56 MHz is used. Alternatively, a high frequency that is an integral multiple of this high frequency may be used. For example, double 27.12 MHz, triple 40.68 MHz, quadruple 54.24 MHz, etc. are also effective. Furthermore, a VHF wave of about 100 MHz to 1 GHz may be used. If the frequency is from an rf wave of about 10 MHz to a VHF wave of about several hundred MHz, it is possible to generate plasma between parallel plate electrodes. Therefore, plasma can be easily generated using a high frequency of a desired frequency by exchanging the impedance matching circuit with the high frequency oscillation source of the PECVD apparatus used in the present invention.
[0021]
In the first embodiment, the substrate is installed in a plasma processing chamber in which the temperature of the lower plate electrode is maintained at 375 ° C. The substrate surface temperature after the installation substrate is in equilibrium with the plasma processing chamber is 350 ° C. First, an oxygen film having a thickness of about 3 nm is formed on the surface of the semiconductor film by irradiating oxygen plasma. Oxidation conditions are oxygen flow of 5000 SCCM and the pressure in the plasma processing chamber is maintained at 1.5 Torr. The distance between the parallel plate electrodes is 21.6 mm, and the radio high frequency output is 500 W (0.19 W / cm 2 ). The oxygen plasma irradiation time is 300 seconds. After the oxygen plasma irradiation, the plasma processing chamber is the same as the oxide film deposition condition except that plasma is generated. The processing chamber conditions before the oxide film deposition are as follows.
[0022]
Oxygen flow rate: O 2 = 1200 SCCM
Argon flow rate: Ar = 4700 SCCM
TEOS flow rate: TEOS = 100SCCM
Radio high-frequency output: RF = 0W (No plasma can be generated)
Pressure: P = 1.5 Torr
Distance between electrodes: S = 20.9mm
Lower plate electrode temperature: Tsus = 375 ° C.
Glass substrate surface temperature: Tsub = 350 ° C.
Stabilization time: t = 20 seconds Continuously in this state, radio high frequency is applied to the upper plate electrode to generate plasma, and an oxide film is deposited on the surface of the semiconductor film. The high frequency output is 1000W. That is, an insulating film is deposited under the following conditions.
[0023]
Oxygen flow rate: O 2 = 1200 SCCM
Argon flow rate: Ar = 4700 SCCM
TEOS flow rate: TEOS = 100SCCM
Radio high frequency output: RF = 1000 W (0.38 W / cm 2 )
Pressure: P = 1.5 Torr
Distance between electrodes: S = 20.9mm
Lower plate electrode temperature: Tsus = 375 ° C.
Glass substrate surface temperature: Tsub = 350 ° C.
Deposition time: t = 33 seconds In this way, after forming a silicon oxide film in the second step, the plasma processing chamber is evacuated, and a mixed gas of helium and ammonia is continuously applied to the semiconductor film and the oxide film. Plasma was irradiated (third step). The plasma processing conditions are as follows.
[0024]
Helium flow rate: He = 4900SCCM
Ammonia flow rate: NH 3 = 100 SCCM
Radio high frequency output: RF = 400 W (0.152 W / cm 2 )
Pressure: P = 1.0 Torr
Distance between electrodes: S = 25mm
Lower plate electrode temperature: Tsus = 375 ° C.
Glass substrate surface temperature: Tsub = 350 ° C.
Plasma treatment time: t = 90 seconds Next, a first heat treatment was performed in an oxidizing atmosphere as a fourth step. Heat treatment was performed in hydrochloric acid steam air containing a 16% concentration hydrochloric acid aqueous solution in air with a dew point of 96 ° C. The processing temperature was 345 ° C., the processing time was 2 hours, and the processing chamber pressure was 1 atm. After the heat treatment using hydrochloric acid was completed, the heat treatment was continued for 1 hour for the purpose of removing the halogen element from the oxide film. This heat treatment atmosphere is performed in steam-containing air having a dew point of 96 ° C., and the atmosphere does not contain hydrochloric acid. The heat treatment temperature is 345 ° C. and the pressure is 1 atm.
[0025]
Thus, after the fourth step was completed, the second heat treatment of the fifth step was performed, and the oxide film was dried. The second heat treatment was performed at 1 atm and 350 ° C. for 2 hours in a non-oxidizing atmosphere containing 3% hydrogen in argon. When the thickness of the gate insulating film was measured after completion of the fifth step, the thickness was 93 nm. In this way, the gate insulating film formation and the modification of the interface with the semiconductor film and the oxide film were completed. (Fig. 1-b)
Subsequently, a gate electrode 105 is formed by sputtering using a metal thin film. The substrate temperature during sputtering was 150 ° C. In Example 1, a gate electrode was made of tantalum (Ta) having a thickness of 750 nm, and the sheet resistance of the gate electrode was 2.44Ω / □. Next, impurity ions 106 serving as donors or acceptors are implanted using the gate electrode as a mask, and source / drain regions 107 and a channel formation region 108 are formed in a self-aligned manner with respect to the gate electrode. In Example 1, a CMOS semiconductor device was produced. When fabricating an NMOS transistor, the PMOS transistor portion is covered with an aluminum (Al) thin film, and phosphine (PH 3 ) diluted in hydrogen at a concentration of 5% is selected as an impurity element, and the acceleration voltage is 70 kV. Total ions containing hydrogen were implanted into the source / drain regions of the NMOS transistor at a concentration of 5 × 10 15 cm −2 . Conversely, when fabricating a PMOS transistor, the NMOS transistor part is covered with an aluminum (Al) thin film, and diborane (B 2 H 6 ) diluted in hydrogen at a concentration of 5% is selected as an impurity element to accelerate. implanted into the source and drain regions of the PMOS transistor at a concentration of 4 × 10 15 cm -2 to total ion containing hydrogen at a voltage 70 kV. (FIG. 1-c) The substrate temperature at the time of ion implantation is 300 ° C.
[0026]
Next, an interlayer insulating film 109 was deposited by a PECVD method using TEOS (Si— (OCH 2 CH 3 ) 4 ) and oxygen as source gases at a substrate temperature of 300 ° C. The interlayer insulating film was made of a silicon dioxide film, and the film thickness was about 500 nm. After the interlayer insulating film was deposited, heat treatment was performed at 350 ° C. for 2 hours in a nitrogen atmosphere to serve as both the baking of the interlayer insulating film and the activation of the impurity element added to the source / drain regions. Finally, a contact hole was opened, aluminum was deposited at a substrate temperature of 180 ° C. by sputtering, and a wiring 110 was formed to complete a thin film semiconductor device. (Fig. 1-d)
The transfer characteristics of the thin film semiconductor device thus prepared were measured. The measured channel formation region of the semiconductor device had a length of 10 μm and a width of 10 μm. The transfer characteristics were measured at room temperature. The mobility obtained from the saturation region at Vds = 8V of the NMOS transistor is 104 cm 2 · V −1 · s −1 , the threshold voltage is 3.083 V, and the subthreshold swing is 0.301 V. It was. The mobility obtained from the saturation region of the PMOS transistor at Vds = −8V is 81 cm 2 · V −1 · s −1 , the threshold voltage is −2.082 V, and the sub-threshold hold swing is 0. It was 373V. On the other hand, in the comparative example (corresponding to the prior art, the third, fourth, and fifth steps in this embodiment are not performed) in which hydrogen plasma irradiation is performed with 100% hydrogen for 2 hours after the completion of the thin film semiconductor device, The mobility was 55 cm 2 · V −1 · s −1 , the threshold voltage was 3.685 V, and the subthreshold swing was 0.336 V. Further, the mobility of the PMOS of the comparative example was 77 cm 2 · V −1 · s −1 , the threshold voltage was −2.639 V, and the sub-threshold swing was 0.486 V. As shown in this example, according to the present invention, both N-type and P-type semiconductor devices have high mobility, and can stably manufacture excellent thin film semiconductor devices exhibiting steep subthreshold characteristics. Made. However, because the oxide film quality in the interface transition region is high, the oxide film has high reliability, and it has become possible to easily and easily create a long-life thin-film semiconductor device in a low-temperature process that can use a general-purpose glass substrate. . Furthermore, the nitriding time could be reduced from over two hours of the conventional hydrogenation time to several minutes.
[0027]
【The invention's effect】
As described in detail above, the hydrogenation treatment, which has been effective for a long time while having a long time, can be effectively performed in a short time by the invention of the main building. Accordingly, it is recognized that the semiconductor device typified by the thin film transistor promotes high-speed operation, energy saving, and cost reduction, and at the same time, increases the operational stability of the semiconductor device.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a manufacturing process according to the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 101 ... Substrate 102 ... Underlayer protection film 103 ... Semiconductor film island 104 ... Silicon oxide film 105 ... Gate electrode 106 ... Impurity ion 107 ... Source / drain region 108 ... Channel forming region 109 ... interlayer insulating film 110 ... wiring

Claims (5)

絶縁性物質を含む基板上に硅素単体または硅素を主体とする半導体物質を含む半導体膜を形成する第一工程と、
前記半導体膜上に酸化硅素を含む絶縁膜を形成する第二工程と、
前記絶縁膜に窒素原子活性種を照射し前記絶縁膜と前記半導体膜とを前記基板の温度を425℃以下に保ちながら窒化処理する第三工程とを含み、
前記窒素原子活性種は希ガスと窒素含有気体との混合気体から成るプラズマにて生成され、前記プラズマのプラズマ源はラジオ波であり、前記混合気体中に占める窒素含有気体の割合は1%以上6%以下であることを特徴とする薄膜半導体装置の製造方法。
Forming a semiconductor film containing a silicon substance or a semiconductor substance mainly containing silicon on a substrate containing an insulating substance;
A second step of forming an insulating film containing silicon oxide on the semiconductor film;
Irradiating the insulating film with nitrogen atom active species, and nitriding the insulating film and the semiconductor film while keeping the temperature of the substrate at 425 ° C. or lower,
The nitrogen atom active species is generated by a plasma composed of a mixed gas of a rare gas and a nitrogen-containing gas, the plasma source of the plasma is a radio wave, and the proportion of the nitrogen-containing gas in the mixed gas is 1% or more A manufacturing method of a thin film semiconductor device, characterized by being 6% or less.
請求項1に記載の半導体装置の製造方法において、
前記半導体膜が多結晶膜であることを特徴とする薄膜半導体装置の製造方法。
In the manufacturing method of the semiconductor device according to claim 1,
A method of manufacturing a thin film semiconductor device, wherein the semiconductor film is a polycrystalline film.
請求項1または2に記載の半導体装置の製造方法において、
前記第三工程中の前記基板の温度と前記第二工程中の前記基板の温度との差が30℃以下であることを特徴とする薄膜半導体装置の製造方法。
In the manufacturing method of the semiconductor device according to claim 1 or 2,
The method of manufacturing a thin film semiconductor device, wherein a difference between the temperature of the substrate in the third step and the temperature of the substrate in the second step is 30 ° C. or less.
請求項1乃至3のいずれかに記載の半導体装置の製造方法において、
前記第三工程における前記窒素含有気体の前記混合気体中に占める割合が1.5%以上4.5%以下であることを特徴とする薄膜半導体装置の製造方法。
In the manufacturing method of the semiconductor device according to claim 1,
A method for manufacturing a thin film semiconductor device, wherein a ratio of the nitrogen-containing gas in the mixed gas in the third step is 1.5% to 4.5%.
請求項1乃至3のいずれかに記載の半導体装置の製造方法において、
前記第三工程における前記窒素含有気体の前記混合気体中に占める割合が2%以上4%以下であることを特徴とする薄膜半導体装置の製造方法。
In the manufacturing method of the semiconductor device according to claim 1,
The method for manufacturing a thin film semiconductor device, wherein a ratio of the nitrogen-containing gas in the mixed gas in the third step is 2% or more and 4% or less.
JP27373798A 1998-09-28 1998-09-28 Method for manufacturing thin film semiconductor device Expired - Fee Related JP3837938B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27373798A JP3837938B2 (en) 1998-09-28 1998-09-28 Method for manufacturing thin film semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27373798A JP3837938B2 (en) 1998-09-28 1998-09-28 Method for manufacturing thin film semiconductor device

Publications (2)

Publication Number Publication Date
JP2000106439A JP2000106439A (en) 2000-04-11
JP3837938B2 true JP3837938B2 (en) 2006-10-25

Family

ID=17531872

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27373798A Expired - Fee Related JP3837938B2 (en) 1998-09-28 1998-09-28 Method for manufacturing thin film semiconductor device

Country Status (1)

Country Link
JP (1) JP3837938B2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1912253A3 (en) * 2000-03-13 2009-12-30 OHMI, Tadahiro Method of forming a dielectric film
WO2002059956A1 (en) * 2001-01-25 2002-08-01 Tokyo Electron Limited Method of producing electronic device material
KR100724096B1 (en) * 2005-08-30 2007-06-04 한국표준과학연구원 Film forming method using a highly activated atom source and film thereof
US7855153B2 (en) * 2008-02-08 2010-12-21 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
JP5477303B2 (en) * 2011-01-12 2014-04-23 信越化学工業株式会社 Manufacturing method of solar cell
CN114836730B (en) * 2021-12-30 2024-01-02 长江存储科技有限责任公司 Atomic layer deposition method of oxide film

Also Published As

Publication number Publication date
JP2000106439A (en) 2000-04-11

Similar Documents

Publication Publication Date Title
WO2004079826A1 (en) Method for manufacturing thin film transistor, display, and electronic device
JPH06232158A (en) Thin film transistor and manufacture thereof
JPWO2003056622A1 (en) Substrate processing method and semiconductor device manufacturing method
US6777354B2 (en) Semiconductor device and method of manufacturing the same
JP3837938B2 (en) Method for manufacturing thin film semiconductor device
JP3596188B2 (en) Method for manufacturing thin film transistor
JP3837935B2 (en) Method for manufacturing thin film semiconductor device
Lee et al. Oxidation of silicon using electron cyclotron resonance nitrous oxide plasma and its application to polycrystalline silicon thin film transistors
JP3359794B2 (en) Method for manufacturing semiconductor device
JP3837937B2 (en) Method for manufacturing thin film semiconductor device
JP2000269133A (en) Manufacture of thin film semiconductor device
JP3837934B2 (en) Manufacturing method of semiconductor device
JP3565910B2 (en) Method for manufacturing semiconductor device
JP3565911B2 (en) Method for manufacturing semiconductor device
JP3603611B2 (en) Method for manufacturing semiconductor device
JP3221129B2 (en) Semiconductor device manufacturing method
JP3941316B2 (en) Semiconductor device manufacturing method, electronic device manufacturing method, semiconductor device, and electronic device
JP3173757B2 (en) Method for manufacturing semiconductor device
JP4200530B2 (en) Thin film transistor manufacturing method
JP3707287B2 (en) Manufacturing method of semiconductor device
JP4214989B2 (en) Manufacturing method of semiconductor device
JP3648998B2 (en) Manufacturing method of semiconductor device
Higashi et al. Development of high-performance polycrystalline silicon thin-film transistors (TFTs) using defect control process technologies
JP3627529B2 (en) Manufacturing method of semiconductor device
JP3173758B2 (en) Semiconductor device and manufacturing method thereof

Legal Events

Date Code Title Description
RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20040512

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20040707

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20041019

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20041208

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20050913

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20051005

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20060711

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20060724

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090811

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100811

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110811

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120811

Year of fee payment: 6

LAPS Cancellation because of no payment of annual fees