JP3802411B2 - Data copy method for nonvolatile semiconductor memory device - Google Patents

Data copy method for nonvolatile semiconductor memory device Download PDF

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Publication number
JP3802411B2
JP3802411B2 JP2001388327A JP2001388327A JP3802411B2 JP 3802411 B2 JP3802411 B2 JP 3802411B2 JP 2001388327 A JP2001388327 A JP 2001388327A JP 2001388327 A JP2001388327 A JP 2001388327A JP 3802411 B2 JP3802411 B2 JP 3802411B2
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Prior art keywords
page
data
address
memory cell
cell array
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JP2003186758A (en
Inventor
博 助川
民男 西面
武裕 長谷川
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東芝マイクロエレクトロニクス株式会社
株式会社東芝
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/102External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
    • G11C16/105Circuits or methods for updating contents of nonvolatile memory, especially with 'security' features to ensure reliable replacement, i.e. preventing that old data is lost before new data is reliably written
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/102External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor

Description

[0001]
BACKGROUND OF THE INVENTION
  The present invention relates to a nonvolatile semiconductor memory having a data copy function in a chip.The present invention relates to a data copy method for an apparatus.
[0002]
[Prior art]
A NAND flash memory is known as a kind of nonvolatile semiconductor memory device. In the NAND flash memory, the chip size can be reduced as compared to the NOR type by cascading memory cells and reducing the number of selection gates and bit line contacts. However, data cannot be erased in units of pages, and data must be erased in units of blocks (units of pages sandwiched between selection gates). For this reason, the chip size can be reduced, but it adds complexity to the user.
[0003]
When erasing can be performed in units of pages, when rewriting page data, the original page can be erased and the rewritten page data can be programmed there. On the other hand, when erasing must be performed in units of blocks, it is necessary to erase other page data areas in the same block, so in order to write to the physical page area that was originally written, It is necessary to read and save other data in the same block, erase that block, and then program the saved data again. Such a rewriting operation is very complicated and requires time. Therefore, when page data is rewritten, a method of programming the page data that has been physically rewritten to another erased empty block is used. In this case, the address of the data that has been physically changed needs to be associated with the address seen from the outside, and this process is usually performed by the controller.
[0004]
The correspondence between the addresses seen from the outside and the internal physical addresses is such that if a conversion table is created for each page, the data size of the conversion table increases. Yes. When the device having the control configuration as described above is used to rewrite data in units of pages, it is necessary to copy other pages in the same conversion unit to the destination block.
[0005]
Next, a conventional method for copying page data to another page will be described with reference to the flowcharts of FIGS. First, as shown in FIG. 10, page data is once read into the buffer in the chip (STEP 1), then the address of the copy destination page is input (STEP 2), a program command is input (STEP 3), and the status is read. There is a method of performing (STEP 4). In this case, if an error has occurred in a part of the data when reading to the page buffer, the error data is programmed to another page as it is. If the same page is copied to the page and a new error occurs, the previous error and the newly generated error are programmed. Thus, in the conventional page copy operation, even if an error occurs at the time of reading, it cannot be detected, and if copying is continued many times, the error may be accumulated.
[0006]
As another method of copying page data to another page, there is a method of performing normal read / write operations as shown in FIG. In this method, page data is read out of the chip (STEP 1 and 2), a copy destination address is input (STEP 3), the read data is input (STEP 4), and a program command is input (STEP 5). This is a method of reading the status (STEP 6). In this case, since the page data is once read out of the chip, if there is an error in a part of the page data, it can be detected and corrected by the controller. However, there is a problem that the copy operation takes time because page data is read out of the chip and input again to the copy destination address for each copy.
[0007]
[Problems to be solved by the invention]
As described above, the conventional nonvolatile semiconductor memory device has a problem that an error is accumulated when copying is continued, and a copying operation takes time.
[0008]
  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a nonvolatile semiconductor memory capable of reducing errors and shortening copy time.How to copy data from the deviceIt is to provide.
[0009]
[Means for Solving the Problems]
  Of this inventionAccording to one aspect of the present invention, there is provided a data copy method for a non-volatile semiconductor memory device, in which non-volatile memory cells are arranged in a matrix, data is erased in units of blocks, and page data read from the memory cell array is stored. A memory unit having a sense amplifier for latching, a page buffer to which page data is transferred from the sense amplifier, and a non-volatile semiconductor memory device including the memory unit; And a controller for controlling the page buffer, the method including a step of moving a block including the page data to another physically different block when rewriting page data, The page through the sense amplifier A step of reading page data into a buffer; a step of inputting an address of a copy destination page in the erased block in the memory cell array; and a memory cell of an address of the copy destination page in the erased block by inputting a program command Reading the page data being programmed to the controller, checking whether there is an error in the data being programmed, and a page in which no error exists in the memory cell array. For a page in which an error exists in the erased block, the address of the copy destination in the erased block in the memory cell array is modified by correcting the read data in the controller for a page having an error. When And a step of the program in another address.
[0013]
  According to another aspect of the present invention, there is provided a data copy method for a non-volatile semiconductor memory device in which non-volatile memory cells are arranged in a matrix and data is erased in units of blocks, and data is read from the memory cell array. A memory unit having a sense amplifier that latches the read page data, a page buffer to which page data is transferred from the sense amplifier, and a non-volatile semiconductor memory device that includes the memory unit. A controller configured to control the cell array, the sense amplifier, and the page buffer, and to store page buffer data that has been corrected for an error when an error is detected, and includes the page data when rewriting the page data Move a block to another physically different block A step of reading page data from the memory cell array to the page buffer via the sense amplifier, and inputting an address of a copy destination page in an erased block in the memory cell array. The program command is input to program the memory cell at the address of the copy destination page in the erased block, the page data to be programmed is read to the controller, and there is an error in the data to be programmed The controller checks whether the error is detected, corrects and holds the error when it is detected, and sets a page having no error to an address different from the copy destination address in the erased block in the memory cell array. It programmed into, and a step of the program on the destination address and the address of the data held by the modifications to the page there is an error in an erased block in the memory cell array.
[0014]
  Furthermore, a data copy method for a nonvolatile semiconductor memory device according to an aspect of the present invention includes a memory cell array in which nonvolatile memory cells are arranged in a matrix and data is erased in units of blocks, and reading from the memory cell array A memory unit having a sense amplifier that latches the read page data, a page buffer to which page data is transferred from the sense amplifier, and a non-volatile semiconductor memory device that includes the memory unit. A controller configured to hold an address in the page buffer in which an error has occurred and repair data when the cell array, the sense amplifier, and the page buffer are detected, and when the page data is rewritten, A block containing page data is separated from another physically different block A data copy method including a step of reading data from the memory cell array to the page buffer via the sense amplifier, a step of reading data from the page buffer, A step of inputting the address of the copy destination page in the erased block, a step of inputting a program command to program the memory cell at the address of the copy destination page in the erased block, and page data to be programmed from now on To the controller and check whether or not there is an error in the data to be programmed, and the page in which no error exists is set to an address different from the copy destination address in the erased block in the memory cell array. And program, pages there are errors and a step of the program on the destination address in the erased block in the memory cell array to partial correction in the page buffer data.
[0015]
According to the above configuration, the page data can be read during the program period, so that the read time can be reduced.
[0016]
Further, when moving the page data within the chip, it is possible to apparently eliminate extra time for error confirmation.
[0017]
Further, when moving the page data within the chip, management data can be added and input.
[0018]
When moving the page data within the chip, it is possible to reliably check the page data error in a short time.
[0019]
Further, when moving the page data within the chip, management data can be added and input.
[0020]
Furthermore, when moving the page data within the chip, the error of the page data can be reliably confirmed in a short time, and when the error is detected and can be corrected, the error part data is written to the destination. You can do the program. Therefore, time loss due to error correction can be reduced.
[0021]
Therefore, it is possible to provide a nonvolatile semiconductor memory device that can reduce errors and shorten the copy time.
[0022]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
[First Embodiment]
FIG. 1 is a flowchart for explaining a nonvolatile semiconductor memory device according to the first embodiment of the present invention, showing a sequence of operations of a controller with respect to a memory. First, page data is read into the page buffer in the chip (STEP 1), a copy destination address is input (STEP 2), a program command is input (STEP 3), and page data is copied to the copy destination cell. To start. After starting the program, the page data being programmed and the status are read out (STEPs 4 and 5). By reading out the page data to be programmed to the outside, it is possible to check with an external controller whether or not there is an error in the data being programmed.
[0023]
The chip of the nonvolatile semiconductor memory device has a function of reading page data to the outside during a program period with respect to a conventional copy sequence. In this example, the page data can be read out of the chip during the program period, so that an error can be confirmed during the program period. For this reason, it is possible to confirm the error while apparently hiding the time for confirming the error. In order to perform such control, a command for reading data to the outside during a program period is provided in the memory, and a controller for controlling the command is required.
[0024]
FIG. 2 is a block diagram showing a schematic configuration of the nonvolatile semiconductor memory device that realizes the operation shown in FIG. The memory unit 11 includes a memory cell array 12, a sense amplifier 13, and a page buffer 14. The memory unit 11 is controlled by the controller 15. The page data read from the memory cell array 12 is latched by the sense amplifier 13 and transferred to the page buffer 14. While programming the data of the sense amplifier 13 to the copy destination page, the connection between the sense amplifier 13 and the page buffer 14 is disconnected, and the data of the page buffer 14 is read out. This makes it possible to read page data without affecting the program operation. Here, it is desirable to separate the ground potential for the output buffer from the ground potential inside the chip so that the output buffer noise generated when reading the page data to the outside of the chip does not affect the program operation.
[0025]
FIG. 3 is a flowchart for explaining a modification example of the nonvolatile semiconductor memory device according to the first embodiment described above, and is a flowchart showing an operation order of the controller with respect to the memory. The basic operation is the same as in the first embodiment, but after reading the data into the Be buffer (STEP 1), inputting the copy destination address (STEP 2), before executing the program, the data is stored in the redundant area of the page. This is an example of writing management data (flag data) (STEP 3). For example, data for notifying that the page has undergone a copy operation can be stored. In this example, it is flag data. For example, only when it is known that there is an error in previously read data and correction is necessary, writing correction of the error part of page data when writing this flag data It is also possible to execute the program by performing the above. The entire copy time is increased by writing the flag data before executing the program. However, since the management data to be written is usually several bits, the overall time increase is not large. It is also possible to write some page data when writing the flag data. Note that writing of these data is not always necessary and depends on the control method of the controller. However, it is effective to prepare such functions for the operation of the chip.
[0026]
When the second embodiment is used, if there is an error in the data to be copied and correction is possible, the series of copying operations that have been performed so far are stopped and separated. The data needs to be rewritten in the erased block.
[0027]
FIG. 4 shows an example of the control method in the case where an error is detected in the data of page 7 when rewriting the data of page 4 of address A, which is managed using the address conversion table in units of 8 pages. From page 0 to page 3, the page data of pages 0 to 3 at address A are copied to erased address B by the method shown in FIG. 1 of the first embodiment. Since page 4 is rewritten data, page data input from the outside is written to address B. Pages 5 to 7 at address A are copied to pages 5 to 7 at address B in the manner shown in FIG. A data error was detected during the program copy of page 7. At this time, after the program of page 7 is completed, the controller performs the same operation at another address (address C) that has been erased again. From page 0 to page 3, the page data of pages 0 to 3 at address A are copied to erased address C by the method shown in FIG. Since page 4 is rewritten data, page data input from the outside is written to address C. Pages 5 and 6 at address A are respectively copied to pages 5 and 6 at address C in the manner shown in FIG. Since it is known that an error already exists in page 7, normal page reading is performed, the data is read into the controller, and data is corrected. Thereafter, the corrected page data is written to the chip, and the program is performed on page 7 at address C. In this way, it is possible to perform processing when an error is detected.
[0028]
The example shown in FIG. 4 is an example in the case where the data corrected inside the controller cannot be held when the first error is found. FIG. 5 shows an example of control in the case of having a memory that can detect and correct an error in the controller at the same time and retain the address, bit, and repair data in which the error occurred.
[0029]
First, from page 0 to page 3, the page data of pages 0 to 3 at address A are copied to erased address B by the method shown in FIG. 1 of the first embodiment. Since page 4 is rewritten data, page data input from the outside is written to address B. Pages 5 to 7 at address A are copied to pages 5 to 7 at address B in the manner shown in FIG. A data error was detected during the program copy of page 7. At this time, the controller corrects the error and stores the address, bit and correction data in which the error has occurred. Further, after the program of page 7 is completed, the controller performs the same operation at another address (address C) that has been erased again. From page 0 to page 3, the page data of pages 0 to 3 at address A are copied to erased address C by the method shown in FIG. Since page 4 is rewritten data, page data input from the outside is written to address C. Pages 5 and 6 at address A are respectively copied to pages 5 and 6 at address C in the manner shown in FIG. Page 7 knows that an error already exists. A copy operation as shown in FIG. 3 is performed. Since the bit in which the error has already occurred is stored, correction writing is performed on the bit in which the error has occurred before the program operation. Thereafter, the program is performed on page 7 of address C. In this way, it is possible to perform processing when an error is detected. In this case, since it is not necessary to write all of the page data, the correction time can be shortened. In the case of this example, when an error is detected, it is necessary to rewrite all the page data having the same management address into another erased block (in this example, it means data from page 0 to page 6). Therefore, the processing time when an error is detected is long. However, the probability that an error will occur is usually very small and does not significantly affect overall performance degradation.
[0030]
[Second Embodiment]
FIG. 6 is a flowchart showing an operation sequence of the nonvolatile semiconductor memory device according to the second embodiment of the present invention. First, page data is read into the page buffer in the chip (STEP 1) and read out to the outside (STEP 2). Next, the copy destination page address is input (STEP 3), and the program is executed (the program command is input (STEP 4) and the status is read (STEP 5)). By doing so, it is possible to confirm errors that may exist when copying page data. Compared with the conventional copy operation, it takes time to read the page data to the outside, but the presence or absence of an error can be surely confirmed. Further, it is not necessary to input page data compared to the conventional method of reading page data outside the chip, inputting the copy destination address again, and inputting the page data, so the time is shortened. By using this, the controller can copy page data to another position in the chip. Further, since the influence of the output noise described in the first embodiment is not given to the program operation, a stable program operation can be performed. FIG. 7 is a block diagram showing the configuration of the nonvolatile semiconductor memory device according to the second embodiment and the internal operation of the chip. The memory unit 21 includes a memory cell array 22, a sense amplifier 23, and a page buffer 24. The memory unit 21 is controlled by the controller 25. The page data read from the memory cell array 22 is latched by the sense amplifier 23 and transferred to the page buffer 24. Reading from the page buffer 24 to the outside. Thereafter, the program is executed.
[0031]
FIG. 8 shows a modification of the nonvolatile semiconductor memory device according to the second embodiment. The basic operation is the same as that of the first embodiment. However, after data is read out from the page buffer 23 (STEP 1), a copy destination address is input, and management data (flag data) of page data is further input. This is a case of inputting. In this example, it is flag data. For example, only when there is an error in the read data and correction is necessary, when the flag data is written, correction of the erroneous part of the page data is written and the program is executed. It is also possible to do.
[0032]
FIG. 9 shows the control method using the procedure of FIG. 8 when an error is detected in the data of page 7 when rewriting the data of page 4 of address A, using the address conversion table in units of 8 pages. An example is shown. From page 0 to page 3, the page data of pages 0 to 3 at address A are copied to erased address B by the method shown in FIG. 8 of the second embodiment. Since page 4 is rewritten data, page data input from the outside is written to address B. Pages 5 to 7 at address A are copied to pages 5 to 7 at address B by the method shown in FIG. A data error was detected after page 7 was read. At this time, the controller corrects the error and writes the corrected data for the error bit. Thereafter, the program is performed on page 7 of address B. When control is performed in this way, when an error is detected, all correction operations are completed by correcting and executing the writing program. There is no need to rewrite another erased block again as in the examples shown in FIGS. Therefore, there is an advantage that the processing time after the error can be reduced.
[0033]
In the first and second embodiments, it is referred to as data. However, this includes redundant data for error detection and correction, and data necessary for other data management.
[0034]
In the present invention, there is no limitation on the page length. However, since it is an object of the present invention to effectively reduce the reading and writing time of page data, the effect is greater when the page is long. The address where the error occurred is shown on page 7, but this can be applied to any page.
[0035]
As described above, when the page data is moved within the same chip, it can be performed at a higher speed and while checking for errors. The present invention is particularly effective for a memory such as a NAND flash memory that performs erasing in units of blocks. However, the lattice of the present invention is not limited to this, but a nonvolatile semiconductor memory device having a copy function and It is also effective for the control device.
[0036]
Although the present invention has been described using the first and second embodiments, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the invention at the stage of implementation. It is possible to deform. Each of the above embodiments includes inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent elements. For example, even if some constituent elements are deleted from all the constituent elements shown in each embodiment, at least one of the problems described in the column of problems to be solved by the invention can be solved, and described in the column of the effect of the invention. In a case where at least one of the obtained effects can be obtained, a configuration in which this configuration requirement is deleted can be extracted as an invention.
[0037]
【The invention's effect】
  As described above, according to the present invention, the nonvolatile semiconductor memory can reduce errors and shorten the copy time.The device data copy method iscan get.
[Brief description of the drawings]
FIG. 1 is a flowchart for explaining a nonvolatile semiconductor memory device according to a first embodiment of the present invention and showing an operation order of a controller with respect to a memory;
2 is a block diagram showing a schematic configuration of a nonvolatile semiconductor memory device that realizes the operation shown in FIG. 1;
FIG. 3 is a flowchart for explaining a modification example of the nonvolatile semiconductor memory device according to the first embodiment and showing an operation order of the controller with respect to the memory;
FIG. 4 is a schematic diagram illustrating an example of a control method when an error is detected using the nonvolatile semiconductor memory device according to the first embodiment.
FIG. 5 is a schematic diagram showing an example of a control method when an error is detected using the changing operation of the nonvolatile semiconductor memory device according to the first embodiment.
FIG. 6 is a flowchart showing an operation sequence of the nonvolatile semiconductor memory device according to the second embodiment of the invention.
FIG. 7 is a block diagram showing a configuration and a chip internal operation of a nonvolatile semiconductor memory device according to a second embodiment of the present invention.
FIG. 8 is a flowchart showing a modification of the nonvolatile semiconductor memory device according to the second embodiment of the invention.
FIG. 9 is a schematic diagram showing an example of a control method when an error is detected using a change operation of the nonvolatile semiconductor memory device according to the second embodiment of the invention.
FIG. 10 is a flowchart showing a method of copying page data to another page in a conventional nonvolatile semiconductor memory device.
FIG. 11 is a flowchart showing another method of copying page data to another page in a conventional nonvolatile semiconductor memory device.
[Explanation of symbols]
11, 21 ... Memory section
12, 22 ... Memory cell array
13, 23 ... sense amplifier
14, 24 ... Page buffer
15, 25 ... Controller

Claims (6)

  1. Nonvolatile memory cells are arranged in a matrix, and a memory cell array in which data is erased in units of blocks; a sense amplifier that latches page data read from the memory cell array; and page data is transferred from the sense amplifier A memory unit having a page buffer;
    A block that is provided outside a chip of a nonvolatile semiconductor memory device having the memory unit, includes the memory cell array, the sense amplifier, and a controller that controls the page buffer, and includes the page data when rewriting page data A data copy method comprising the step of moving to a physically different block,
    Reading page data from the memory cell array to the page buffer via the sense amplifier;
    Inputting an address of a copy destination page in an erased block in the memory cell array;
    Inputting a program command to program the memory cell at the address of the destination page in the erased block;
    Reading the page data being programmed into the controller and checking if there is an error in the data being programmed;
    A page in which no error exists is programmed to an address different from the copy destination address in the erased block in the memory cell array, and for the page in which an error exists, the read data in the controller is corrected to correct the memory Programming to an address different from the destination address in the erased block in the cell array;
    A data copy method for a nonvolatile semiconductor memory device , comprising :
  2. After the step of inputting the address of the copy destination page and before the step of executing the program, the method further comprises the step of writing management data indicating that a copy operation has been performed in the redundant area of the copy destination page. The data copy method for a nonvolatile semiconductor memory device according to claim 1.
  3. 3. The nonvolatile memory according to claim 1, wherein the step of programming includes a step of programming page data for rewriting input from outside to a page address in an erased block in the memory cell array. Data copy method for semiconductor memory device.
  4. After the step of reading the page data and before the step of inputting the address of the copy destination page, the method further comprises the step of reading data from the page buffer to the controller and checking an error during copying. 3. A data copy method for a nonvolatile semiconductor memory device according to claim 1, wherein:
  5. Nonvolatile memory cells are arranged in a matrix, a memory cell array in which data is erased in units of blocks, a sense amplifier that latches page data read from the memory cell array, and page data is transferred from the sense amplifier A memory unit having a page buffer;
    Provided outside the chip of the nonvolatile semiconductor memory device having the memory unit, controls the memory cell array, the sense amplifier, and the page buffer, and holds page buffer data that has been corrected for an error when an error is detected. A data copy method including a step of moving a block including the page data to another physically different block when rewriting the page data.
    Reading page data from the memory cell array to the page buffer via the sense amplifier;
    Inputting an address of a copy destination page in an erased block in the memory cell array;
    Inputting a program command to program the memory cell at the address of the destination page in the erased block; and
    Read the page data from which the program will be executed to the controller, Checking whether or not there is an error in the data to be performed by the controller, correcting and holding the error when detected, and
    A page in which no error exists is programmed to an address different from the copy destination address in the erased block in the memory cell array, and the data that has been corrected and held for the page in which the error exists is stored in the memory cell array Programming to the destination address and address in the erased block of
    A data copy method for a nonvolatile semiconductor memory device, comprising:
  6. Nonvolatile memory cells are arranged in a matrix, a memory cell array in which data is erased in units of blocks, a sense amplifier that latches page data read from the memory cell array, and page data is transferred from the sense amplifier A memory unit having a page buffer;
    Provided outside the chip of the non-volatile semiconductor memory device having the memory unit, controls the memory cell array, the sense amplifier and the page buffer, and detects the address in the page buffer and the repair data in which an error has occurred when detected. A data copy method including a step of moving a block including the page data to another physically different block when rewriting the page data, the controller configured to hold the controller,
    Reading page data from the memory cell array to the page buffer via the sense amplifier;
    Reading data from the page buffer;
    Inputting an address of a copy destination page in an erased block in the memory cell array;
    Inputting a program command to program the memory cell at the address of the destination page in the erased block; and
    The page data to be programmed is read to the controller, and it is confirmed whether or not there is an error in the data to be programmed. The page having no error is the copy destination address in the erased block in the memory cell array. Programming to a different address, and for a page with an error, partially modifying the data in the page buffer and programming to a destination address in an erased block in the memory cell array;
    A data copy method for a nonvolatile semiconductor memory device, comprising:
JP2001388327A 2001-12-20 2001-12-20 Data copy method for nonvolatile semiconductor memory device Expired - Fee Related JP3802411B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001388327A JP3802411B2 (en) 2001-12-20 2001-12-20 Data copy method for nonvolatile semiconductor memory device

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2001388327A JP3802411B2 (en) 2001-12-20 2001-12-20 Data copy method for nonvolatile semiconductor memory device
US10/322,321 US6868007B2 (en) 2001-12-20 2002-12-17 Semiconductor memory system with a data copying function and a data copy method for the same
KR20020081351A KR100521826B1 (en) 2001-12-20 2002-12-18 Semiconductor memory system having data copy function and data copy method thereof
TW91136838A TW583674B (en) 2001-12-20 2002-12-20 Semiconductor memory system with data copy function and the data copy method thereof
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