JP3751463B2 - High voltage semiconductor element - Google Patents

High voltage semiconductor element Download PDF

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Publication number
JP3751463B2
JP3751463B2 JP07719899A JP7719899A JP3751463B2 JP 3751463 B2 JP3751463 B2 JP 3751463B2 JP 07719899 A JP07719899 A JP 07719899A JP 7719899 A JP7719899 A JP 7719899A JP 3751463 B2 JP3751463 B2 JP 3751463B2
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type semiconductor
concentration
conductive
layer
semiconductor layer
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JP2000277726A (en
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彰博 八幡
聡 浦野
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株式会社東芝
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7811Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a high voltage semiconductor device, and more particularly to a high voltage semiconductor device having a termination structure and a vertical super junction.
[0002]
[Prior art]
In response to the recent demand for miniaturization and high performance of power supply equipment in the field of power electronics, power semiconductor elements have improved performance against high loss and high speed as well as high breakdown voltage and high current as well as high breakdown voltage and high current. Has been focused. Among them, a so-called super junction structure has been devised in which striped p-type semiconductor layers and n-type semiconductor layers exist alternately and repeatedly.
[0003]
When used in power semiconductor elements such as diodes and MOSFETs, this super junction structure has the advantage of exhibiting high withstand voltage characteristics because it has a very low on-resistance in the on state and is easily depleted in the off state. Have.
[0004]
For example, as disclosed in JP-A-7-7154, it is described that an auxiliary region corresponding to a super junction structure is formed in an internal region of a power MOSFET. However, in this auxiliary region, it is only disclosed that the charge carrier is emptied when a reverse voltage is applied, and the termination structure which is important for practical use of a device having a super junction structure is disclosed. There is no specific disclosure.
[0005]
[Problems to be solved by the invention]
The present inventors have found that, when a device having a super junction structure is put into practical use, the breakdown voltage is insufficient at the outermost part of the super junction structure, particularly at the termination structure, thereby causing destruction of the device. It was.
[0006]
The present invention has been made in view of such a situation, and an object of the present invention is to provide a termination structure that increases the breakdown voltage of the super junction structure and prevents element destruction.
[0007]
[Means for Solving the Problems]
In order to solve the above-described problems, a first aspect of the present invention includes a first conductivity type semiconductor region, a first conductivity type semiconductor layer formed in contact with the first conductivity type semiconductor region, and the first conductivity type. A second conductive semiconductor layer formed in contact with a semiconductor region and the first conductive semiconductor layer; and a second conductive semiconductor formed in contact with the first conductive semiconductor layer and the second conductive semiconductor layer. The first conductive semiconductor layer and the second conductive semiconductor layer are alternately and repeatedly arranged, and the outermost first conductive semiconductor layer or the layer of the second conductive semiconductor layer The integral value of the carrier concentration in the thickness direction is approximately half of the integral value of the carrier concentration in the layer thickness direction of the first conductive type semiconductor layer and the second conductive type semiconductor layer disposed therein. A high voltage semiconductor device is provided.
[0008]
The second aspect of the present invention is formed by sandwiching a first conductive type semiconductor region, a second conductive type semiconductor region, and the first conductive type semiconductor region and the second conductive type semiconductor region, A first conductive semiconductor layer and a second conductive semiconductor layer, which are alternately and repeatedly arranged, wherein the first conductive semiconductor layer and the second conductive semiconductor layer are repeatedly disposed in the first conductive semiconductor layer. The first conductive semiconductor layer is substantially perpendicular to a direction connecting the region and the second conductive semiconductor region, and the first conductive semiconductor layer allows a drift current to flow in the on state and is depleted in the off state. The first conductive semiconductor in which the layer is depleted in the off state and the integrated value of the carrier concentration in the layer thickness direction of the outermost first conductive semiconductor layer or the second conductive semiconductor layer is disposed therein Layer and the second conductive semiconductor To provide a high voltage semiconductor device which is a layer half outline of the integral value in the thickness direction of the carrier concentration.
[0009]
According to a third aspect of the present invention, there is provided a high-concentration first conductive semiconductor region, a first conductive semiconductor layer formed in contact with the high-concentration first conductive semiconductor region, and the high-concentration first conductive semiconductor. A second conductive type semiconductor layer formed in contact with the region and the first conductive type semiconductor layer; and a high concentration second conductive type formed in contact with the first conductive type semiconductor layer and the second conductive type semiconductor layer. A semiconductor region; a low-concentration first conductive semiconductor region formed surrounding the first conductive semiconductor layer and the second conductive semiconductor layer; and the low-concentration first conductive semiconductor region and the high-concentration second A low-concentration second conductive semiconductor region formed in contact with the conductive semiconductor region and having a lower concentration than the high-concentration second conductive semiconductor region, and the first conductive semiconductor layer and the second conductive semiconductor layer Are arranged alternately and the outermost part The integrated value of the carrier concentration in the layer thickness direction of the first conductivity type semiconductor layer or the second conductivity type semiconductor layer is the thickness of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer disposed therein. A high-breakdown-voltage semiconductor element characterized by being approximately half the integral value of the carrier concentration in the direction is provided.
[0010]
According to a fourth aspect of the present invention, a high-concentration first conductive semiconductor region, a high-concentration second conductive semiconductor region, and the high-concentration first conductive semiconductor region and the high-concentration second conductive semiconductor region The first conductive type semiconductor layer and the second conductive type semiconductor layer, which are sandwiched between the layers and are alternately and repeatedly disposed, and surround the first conductive type semiconductor layer and the second conductive type semiconductor layer. A low-concentration first conductive semiconductor region, and a low-concentration first-conductivity-type semiconductor region and a low-concentration second-conductivity-type semiconductor region formed in contact with the low-concentration first-conductivity-type semiconductor region and the high-concentration second-conduction-type semiconductor region A concentration second conductivity type semiconductor region, and the repeated arrangement direction of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer is the high concentration first conductivity type semiconductor region and the high concentration second conductivity type semiconductor region. And being substantially perpendicular to the direction connecting In addition, the first conductive type semiconductor layer flows a drift current in the on state and is depleted in the off state, the second conductive type semiconductor layer is depleted in the off state, and the outermost first conductive type semiconductor layer or The integral value of the carrier concentration in the layer thickness direction of the second conductivity type semiconductor layer is the integral value of the carrier concentration in the layer thickness direction of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer disposed therein. Provided is a high voltage semiconductor device characterized by being approximately half.
[0011]
According to a fifth aspect of the present invention, there is provided a high-concentration first conductive semiconductor region, a first conductive semiconductor layer formed in contact with the high-concentration first conductive semiconductor region, and the high-concentration first conductive semiconductor. A second conductive type semiconductor layer formed in contact with the region and the first conductive type semiconductor layer; and a high concentration second conductive type formed in contact with the first conductive type semiconductor layer and the second conductive type semiconductor layer. A semiconductor region, a low-concentration first conductive semiconductor region formed surrounding the first conductive semiconductor layer and the second conductive semiconductor layer, and in contact with the low-concentration first conductive semiconductor region; A ring-shaped second conductive semiconductor region layer provided to be spaced apart from the high-concentration second conductive semiconductor region, the first conductive semiconductor layer and the second conductive semiconductor The layers are arranged alternately and repeatedly The integrated value of the carrier concentration in the layer thickness direction of the external first conductive semiconductor layer or the second conductive semiconductor layer is an integral value of the first conductive semiconductor layer and the second conductive semiconductor layer disposed therein. Provided is a high-breakdown-voltage semiconductor element characterized by being approximately half of the integral value of the carrier concentration in the layer thickness direction.
[0012]
Furthermore, a sixth aspect of the present invention is a high concentration first conductivity type semiconductor region, a high concentration second conductivity type semiconductor region, a high concentration first conductivity type semiconductor electrode layer, and a high concentration second conductivity type semiconductor electrode. A first conductive type semiconductor layer and a second conductive type semiconductor layer, which are sandwiched between layers and are alternately and repeatedly arranged, and surround the first conductive type semiconductor layer and the second conductive type. A low-concentration first conductivity type semiconductor region and a ring formed in contact with the low-concentration first conductivity type semiconductor region and spaced from the region so as to surround the high-concentration second conductivity type semiconductor region A second conductive type semiconductor region layer having a shape, and the repeated arrangement direction of the first conductive type semiconductor layer and the second conductive type semiconductor layer is the high concentration first conductive type semiconductor region and the high concentration second conductive type. Approximately perpendicular to the direction connecting the semiconductor regions In addition, the first conductivity type semiconductor layer flows a drift current in an on state and is depleted in an off state, the second conductivity type semiconductor layer is depleted in an off state, and the outermost first conductivity type semiconductor layer or The integral value of the carrier concentration in the layer thickness direction of the second conductivity type semiconductor layer is the integral value of the carrier concentration in the layer thickness direction of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer disposed therein. The high breakdown voltage semiconductor element is characterized by being approximately half of the above.
[0013]
In the third and fourth aspects of the present invention described above, the second conductive type semiconductor region is depleted in an off state, and the depleted region is generated by depletion in the first conductive type semiconductor layer and the second conductive type semiconductor layer. It is preferable to contact the depletion region.
[0014]
In the fifth and sixth aspects of the present invention described above, the low-concentration first conductivity type semiconductor region in contact with the ring-shaped second conductivity type semiconductor region layer is depleted in an off state, and the depletion region is the first conductivity type. It is preferable to contact a depletion region generated by depletion in the type semiconductor layer and the second conductivity type semiconductor layer.
[0015]
In each of the above-described inventions, the first conductive semiconductor layer and the second conductive semiconductor layer are preferably striped layers parallel to each other.
Furthermore, it is preferable that an odd number of the first conductive semiconductor layers and the second conductive semiconductor layers exist.
Furthermore, it is preferable that the high voltage semiconductor element has a vertical structure.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
(First embodiment)
FIG. 1 is a top view showing the structure of a high voltage semiconductor device according to the first embodiment of the present invention. FIG. 2 is a cross-sectional view taken along a dotted line AA ′ in FIG. In this sectional view, only half of the element structure of FIG. 1 is shown.
[0017]
The high voltage semiconductor element shown in FIGS. 1 and 2 relates to a vertical diode. As shown in these drawings, in the vertical diode of this embodiment, a high concentration n-type layer 10 is formed on one surface of a low concentration n-type layer 5 and a high concentration is formed on the other surface. A p-type layer 3 is selectively formed, and a super junction structure is provided between the n-type layer 10 and the p-type layer 3. In this super junction structure, striped p-type layers 1 and n-type layers 2 are alternately provided, and the number thereof is an odd number. When viewed from the upper surface of the element, the existence region of the striped p-type layer 1 and the n-type layer 2 is included in the existence region of the high-concentration p-type layer 3. Originally, the striped p-type layer 1 and n-type layer 2 are hidden under the high-concentration p-type layer 3 and cannot be seen. However, for the sake of clarity, electrodes and the like are omitted here. Super junction structure is shown.
[0018]
The integral value of the carrier concentration in the layer thickness direction of the outermost p-type layer 1 is the carrier concentration in the layer thickness direction of the p-type layer 1 and the n-type layer 2 disposed inside the remaining portion except the outermost side. It is approximately half of the integral value. The integral value of the carrier concentration in the layer thickness direction of the remaining p-type layer 1 and n-type layer 2 excluding these outermost sides is constant. Here, the outermost striped layer is the p-type layer 1, but even if it is the n-type layer 2, the effect is the same as long as the above carrier concentration integrated value condition is satisfied.
[0019]
For example, the concentration and thickness of the outermost p-type layer 1 is 1 × 10 15 cm −3 , 3.5 μm, or 5 × 10 14 cm −3 , 7.0 μm, and the remaining inside except the outermost side. The concentration and thickness of the p-type layer 1 and the n-type layer 2 arranged can be set to 1 × 10 15 cm −3 and 7.0 μm, respectively. Satisfied. Therefore, for example, under the condition that a reverse voltage of 4000 V is applied, the super junction structure is completely depleted even in the outermost peripheral portion in the OFF state, and exhibits a high breakdown voltage characteristic.
[0020]
The high-concentration p-type layer 3 in contact with the striped p-type layer 1 and the n-type layer 2 is a low-concentration p-type layer 4 (for example, the concentration is 1 × 10 13 cm −3 . The same applies to the embodiments described later. ) And this layer acts as a RESURF layer to relax the electric field. For example, the depth of the p-type layer 3 is 6.0 μm and the concentration is 2 × 10 17 cm −3 , and the depth of the p-type layer 4 is 5.0 μm and the concentration is 3 × 10 15 cm −3 . is there.
[0021]
Under such conditions, the depletion layer extending from the pn junction between the p-type layer 4 and the n-type base layer 5 is completely connected to the depletion layer formed in the super junction structure, and a sufficient breakdown voltage is ensured at this terminal portion. Is possible. For example, under the condition where a reverse voltage of 4000 V is applied, the termination portion of the super junction structure is completely depleted in the OFF state, and exhibits high withstand voltage characteristics.
[0022]
1 and 2, reference numeral 6 denotes a high-concentration n-type stopper layer, which prevents a depletion layer extending from the p-type layer 4, which is a RESURF layer, from reaching the edge portion of the substrate to ensure a breakdown voltage. Provided for. Reference numeral 7 denotes an insulating film, 8 denotes an anode electrode, 9 denotes a stopper electrode, and 11 denotes a cathode electrode.
[0023]
According to the diode having the vertical super junction structure having the above-described structure, the super junction structure is completely depleted even in the outermost peripheral portion in the OFF state, and exhibits high breakdown voltage characteristics. In the OFF state, it is possible to completely deplete the terminal portion of the super junction structure to ensure high breakdown voltage characteristics.
[0024]
FIG. 3 is a characteristic diagram showing leakage current characteristics of the vertical diode according to the present embodiment shown in FIG. The horizontal axis represents the applied voltage, and the vertical axis represents the leakage current. As can be seen from FIG. 3, the vertical diode according to the present embodiment has a withstand voltage of about 4400V. The on-resistance of the diode was 0.03 Ωcm 2 , indicating a very low on-resistance.
[0025]
(Second Embodiment)
FIG. 4 is a top view showing the structure of a high voltage semiconductor device according to the second embodiment of the present invention. FIG. 5 is a cross-sectional view taken along a dotted line BB ′ in FIG. In this sectional view, only half of the element structure of FIG. 4 is shown. The same parts as those in FIG. 1 are denoted by the same reference numerals and detailed description thereof is omitted.
[0026]
The high breakdown voltage semiconductor element of this embodiment also relates to a vertical diode. As shown in FIGS. 4 and 5, the vertical diode of this embodiment is different from the diode of the first embodiment in that the high-concentration p-type in contact with the striped p-type layer 1 and the n-type layer 2 is used. Instead of the low-concentration p-type layer (Resurf layer) 4 surrounding the layer 3, a plurality of concentric high-concentration p-type layers (guard ring layers) 12 are provided. The p-type layer (guard ring layer) 12 is provided so as to surround the periphery of the p-type layer 3, and the p-type layer 12 functions to relax the electric field in the same manner as the RESURF layer. For example, the depth of the p-type layer 3 is 6.0 μm and the concentration is 2 × 10 17 cm −3 , and the depth of the p-type layer 12 is 6.0 μm, the width is 10.0 μm, and the concentration is 5 × 10 18 cm −3 , the distance from the p-type layer 3 is 10.0 μm, and the distance from each other is 10.0 to 40.0 μm.
[0027]
Under such conditions, complete depletion is achieved in the super junction structure as in the first embodiment, and the depletion layer extending from the pn junction between the p-type layer 12 and the n-type base layer 5 is the super junction. It is completely connected to the depletion layer of the structure, and it is possible to ensure a sufficient withstand voltage at this terminal portion. For example, it was found that under the condition of applying a reverse voltage of 4000 V, the termination portion of the super junction structure is completely depleted in the OFF state and exhibits the same high breakdown voltage characteristics as in FIG. The on-resistance of the diode was 0.03 Ωcm 2 , indicating a very low on-resistance.
[0028]
(Third embodiment)
FIG. 6 is a cross-sectional perspective view showing the structure of a high voltage semiconductor device according to the third embodiment of the present invention. The same parts as those in FIG. 1 are denoted by the same reference numerals and detailed description thereof is omitted.
[0029]
As shown in FIG. 6, the high-breakdown-voltage semiconductor element of this embodiment is an element (for example, MOSFET) having a vertical planar MOS structure. A high-concentration n-type drain layer 15 is formed on one surface of the low-concentration n-type layer (base layer) 5, and a p-type base layer 13 is selectively formed on the other surface. The same super junction structure (p-type layer 1 and n-type layer 2) as that of the first embodiment is provided between the n-type drain layer 15 and the p-type base layer 13.
[0030]
An n-type source layer 14 is selectively formed on the surface of the p-type base layer 13, and the surfaces of the super junction structure (p-type layer 1 and n-type layer 2), the n-type source layer 14, and the p-type base layer 13 are formed. On the top, a gate electrode 17 is provided via a gate insulating film (silicon oxide film or the like) 16. In the case of this embodiment, the gate insulating film 16 and the gate electrode 17 extend to the super junction structure (p-type layer 1 and n-type layer 2). Thereby, electrons can be efficiently injected into the super junction structure.
[0031]
Also in the element having the MOS structure according to the present embodiment, the super junction structure is completely depleted in the outermost peripheral portion in the OFF state, and exhibits a high breakdown voltage characteristic. Further, in the OFF state, the depletion layer extending from the pn junction between the p-type layer 4 and the n-type layer 5 is completely connected to the depletion layer formed in the super junction structure, and a sufficient breakdown voltage is ensured at this terminal portion. It is possible. In this embodiment, the RESURF layer (p-type layer 4) is shown as the termination structure, but a high breakdown voltage can be obtained even when the guard ring layer (p-type layer 12) shown in FIGS. 4 and 5 is used. . Moreover, the on-resistance was very low whether the termination structure was a RESURF layer or a guard ring layer.
[0032]
(Fourth embodiment)
FIG. 7 is a cross-sectional perspective view showing the structure of a high voltage semiconductor device according to the fourth embodiment of the present invention. The same parts as those in FIG. 6 are denoted by the same reference numerals and detailed description thereof is omitted.
[0033]
As shown in FIG. 7, the high-breakdown-voltage semiconductor element of this embodiment is an element (for example, MOSFET) having a vertical trench MOS structure. A p-type base layer 23 is selectively formed on one surface of a low-concentration n-type layer (base layer) 5, and the first base layer 23 and the n-type drain layer 15 have a first A super junction structure (p-type layer 1 and n-type layer 2) similar to that of the embodiment is provided.
[0034]
An n-type source layer 24 is selectively formed on the surface of the p-type base layer 23, and a trench 28 is provided through the n-type source layer 24 and the p-type base layer 23. The trench 28 is formed so as to reach the n-type layer 5 provided with the super junction structure (p-type layer 1 and n-type layer 2). A gate electrode 27 is provided inside the trench 28 via a gate insulating film (silicon oxide film or the like) 26.
[0035]
Also in the element having the MOS structure according to the present embodiment, the super junction structure is completely depleted in the outermost peripheral portion in the OFF state, and exhibits a high breakdown voltage characteristic. Further, in the OFF state, the depletion layer extending from the pn junction between the p-type layer 4 and the n-type layer 5 is completely connected to the depletion layer formed in the super junction structure, and a sufficient breakdown voltage is ensured at this terminal portion. It is possible. In this embodiment, the RESURF layer (p-type layer 4) is shown as the termination structure, but a high breakdown voltage can be obtained even when the guard ring layer (p-type layer 12) shown in FIGS. 4 and 5 is used. . Moreover, the on-resistance was very low whether the termination structure was a RESURF layer or a guard ring layer.
[0036]
In addition, this invention is not limited to the said embodiment. For example, the present invention can be applied to various types of high-voltage semiconductor elements such as a horizontal high-voltage semiconductor element as well as a vertical high-voltage semiconductor element. In addition, the p-type layer 1 and the n-type layer 2 in the super junction structure may be interchanged, and in this case as well, the super junction structure is completely depleted at the outermost peripheral portion in the OFF state and exhibits a high breakdown voltage characteristic. It becomes like this.
In addition, various modifications can be made without departing from the spirit of the present invention.
[0037]
【The invention's effect】
According to the present invention, a high breakdown voltage of a semiconductor element having a super junction structure can be realized.
[Brief description of the drawings]
FIG. 1 is a top view showing a structure of a vertical diode having a super junction structure according to a first embodiment of the present invention.
FIG. 2 is a cross-sectional view taken along a broken line AA ′ in FIG.
FIG. 3 is a characteristic diagram showing leakage current characteristics of the vertical diode shown in FIG. 1;
FIG. 4 is a top view showing a structure of a vertical diode having a super junction structure according to a second embodiment of the present invention.
FIG. 5 is a cross-sectional view taken along a broken line BB ′ in FIG.
FIG. 6 is a cross-sectional perspective view showing a vertical planar MOS structure element having a super junction structure according to a third embodiment of the present invention.
FIG. 7 is a cross-sectional perspective view showing a vertical trench MOS structure element having a super junction structure according to a fourth embodiment of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Striped p-type layer 2 ... Striped n-type layer 3 ... High concentration p-type layer 4 ... Low concentration p-type layer (Resurf layer)
5 ... Low-concentration n-type layer 6 ... High-concentration n-type stopper layer 7 ... Insulating film 8 ... Anode electrode 9 ... Stopper electrode 10 ... High-concentration n-type layer 11 ... Cathode electrode 12 ... High-concentration p-type layer ( Guard ring layer)
DESCRIPTION OF SYMBOLS 13, 23 ... p-type base layer 14, 24 ... n-type source layer 15 ... n-type drain layer 16, 26 ... Gate insulating film 17, 27 ... Gate electrode 28 ... Trench

Claims (8)

  1.   High-concentration first conductive semiconductor region, first conductive semiconductor layer formed in contact with the high-concentration first conductive semiconductor region, high-concentration first conductive semiconductor region, and first conductive semiconductor layer A second conductive type semiconductor layer formed in contact with the first conductive type semiconductor layer, a high concentration second conductive type semiconductor region formed in contact with the first conductive type semiconductor layer and the second conductive type semiconductor layer, and the first conductive type A low-concentration first conductive semiconductor region formed surrounding the semiconductor layer and the second conductive semiconductor layer; and the low-concentration first conductive semiconductor region and the high-concentration second conductive semiconductor region. A low-concentration second conductive semiconductor region having a lower concentration than the high-concentration second conductive semiconductor region, and the first conductive semiconductor layer and the second conductive semiconductor layer are alternately and repeatedly disposed. The outermost first conductive type semiconductor layer or The integral value of the carrier concentration in the layer thickness direction of the second conductivity type semiconductor layer is the integral value of the carrier concentration in the layer thickness direction of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer disposed therein. A high breakdown voltage semiconductor element characterized by having a vertical structure.
  2.   The high-concentration first conductivity type semiconductor region, the high-concentration second conductivity-type semiconductor region, and the high-concentration first conductivity-type semiconductor region and the high-concentration second conductivity-type semiconductor region that are sandwiched between these regions are alternately formed. 1st conductivity type semiconductor layer and 2nd conductivity type semiconductor layer which were repeatedly arranged, and low concentration 1st conductivity type semiconductor region formed surrounding these 1st conductivity type semiconductor layers and 2nd conductivity type semiconductor layers And a low-concentration second conductive semiconductor region formed in contact with the low-concentration first conductive semiconductor region and the high-concentration second conductive semiconductor region and having a lower concentration than the high-concentration second conductive semiconductor region. And the repetitive arrangement direction of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer is substantially perpendicular to the direction connecting the high concentration first conductivity type semiconductor region and the high concentration second conductivity type semiconductor region. And the first conductivity type half The body layer flows a drift current in the on state and is depleted in the off state, the second conductive semiconductor layer is depleted in the off state, and the outermost first conductive semiconductor layer or the second conductive semiconductor layer The integral value of the carrier concentration in the layer thickness direction is approximately half of the integral value of the carrier concentration in the layer thickness direction of the first conductive type semiconductor layer and the second conductive type semiconductor layer disposed therein, and A high breakdown voltage semiconductor element characterized by having a mold structure.
  3.   High-concentration first conductive semiconductor region, first conductive semiconductor layer formed in contact with the high-concentration first conductive semiconductor region, high-concentration first conductive semiconductor region, and first conductive semiconductor layer A second conductive type semiconductor layer formed in contact with the first conductive type semiconductor layer, a high concentration second conductive type semiconductor region formed in contact with the first conductive type semiconductor layer and the second conductive type semiconductor layer, and the first conductive type A low concentration first conductivity type semiconductor region formed surrounding the semiconductor layer and the second conductivity type semiconductor layer, and the high concentration second conductivity type semiconductor region formed in contact with the low concentration first conductivity type semiconductor region A ring-shaped second conductivity type semiconductor region layer provided so as to surround the region, and the first conductivity type semiconductor layer and the second conductivity type semiconductor layer are alternately and repeatedly disposed. The outermost first conductive type semiconductor The integral value of the carrier concentration in the layer thickness direction of the layer or the second conductivity type semiconductor layer is the carrier concentration in the layer thickness direction of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer disposed therein. A high breakdown voltage semiconductor element characterized by having an approximately half of an integral value and having a vertical structure.
  4.   The high-concentration first conductivity type semiconductor region, the high-concentration second conductivity-type semiconductor region, and the high-concentration first conductivity-type semiconductor electrode layer and the high-concentration second conductivity-type semiconductor electrode layer are sandwiched and formed. First conductive semiconductor layers and second conductive semiconductor layers that are alternately and repeatedly disposed, and low-concentration first conductive semiconductor regions formed surrounding these first conductive semiconductor layers and second conductive types A ring-shaped second conductive semiconductor region layer formed in contact with the low-concentration first conductive semiconductor region and spaced from the region so as to surround the high-concentration second conductive semiconductor region; The repetitive arrangement direction of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer is approximately with respect to the direction connecting the high concentration first conductivity type semiconductor region and the high concentration second conductivity type semiconductor region. The first conductivity type is vertical and The conductor layer flows a drift current in the on state and is depleted in the off state, the second conductivity type semiconductor layer is depleted in the off state, and the outermost first conductivity type semiconductor layer or the second conductivity type semiconductor layer The integral value of the carrier concentration in the layer thickness direction is approximately half of the integral value of the carrier concentration in the layer thickness direction of the first conductive type semiconductor layer and the second conductive type semiconductor layer disposed therein, and A high breakdown voltage semiconductor element characterized by having a mold structure.
  5. The first conductive type semiconductor layer and the second conductive semiconductor layer, a high-voltage semiconductor device according to any one of claims 1 to 4, characterized in that a layer of parallel stripes each other.
  6. The first conductive type semiconductor layer and the second conductive semiconductor layer, a high-voltage semiconductor device according to any one of claims 1 to 5, characterized in that an odd number is present.
  7. The low-concentration second conductivity type semiconductor region is depleted in an off state, and the depletion region is in contact with a depletion region caused by depletion in the first conductivity type semiconductor layer and the second conductivity type semiconductor layer. Item 7. The high breakdown voltage semiconductor element according to any one of Items 1, 2, 5 and 6 .
  8. The low-concentration first conductivity type semiconductor region in contact with the ring-shaped second conductivity type semiconductor region layer is depleted in an off state, and the depletion region is depleted in the first conductivity type semiconductor layer and the second conductivity type semiconductor layer. The high breakdown voltage semiconductor element according to claim 3, wherein the high breakdown voltage semiconductor element is in contact with a depletion region generated by the above.
JP07719899A 1999-03-23 1999-03-23 High voltage semiconductor element Expired - Fee Related JP3751463B2 (en)

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