JP3702015B2 - Frame number correcting apparatus and method - Google Patents

Description

[0001]
[Industrial application fields]
In the present invention, when recording video, audio or various information on a recording medium such as an optical disk, or when reproducing recorded information, a synchronization signal and a frame number necessary for data management are recorded and reproduced. The present invention relates to an apparatus and a method for correcting a frame number effective for the above.
[0002]
[Prior art]
In recent years, optical discs capable of recording and reproducing information using a laser beam as a medium have been developed. Here, various proposals have been made as a format for recording information on an optical disc. In any case, a synchronization signal is indispensable. When reproducing such an optical disc, the synchronization signal is reproduced, the synchronization signal is counted, and the frame is determined based on the count value. That is, the frame is detected by counting the synchronization signal. However, if the disk rotates abnormally, the length of the frame becomes longer or shorter. Then, a synchronization signal count error or the like occurs, and it is unclear which frame in the sector is being reproduced, and all the data reproduced here becomes an error.
[0003]
[Problems to be solved by the invention]
As described above, the frame is detected by detecting the synchronization signal. However, when the disk rotates abnormally, a synchronization signal count error occurs when the length of the frame becomes longer or shorter. Then, it may be unclear which frame in the sector is being reproduced. In such a case, all the data reproduced here will be an error.
[0004]
Accordingly, the present invention provides a frame number correcting apparatus and method that make it possible to reliably recognize the playback position in units of frames, in particular, develop a frame number correcting function, and make its performance highly reliable. It is intended to do.
[0005]
[Means for Solving the Problems]
One sector is composed of a plurality of frames, one frame is composed of a synchronization number and a data area as a synchronization signal, and the synchronization numbers are set so that the numbers when at least three or more are consecutive are all different numbers within one sector. An input unit to which information that is set together and is configured to identify the continuous frame number of each successive frame in the one sector by the numerical value is input, and a plurality of synchronization numbers are detected by detecting the synchronization number A frame number detection means for generating a detection frame number, a synchronization signal generation means for generating a synchronization signal by capturing the synchronization number as a synchronization signal, and a frame number generation for generating an expected frame number at the timing of the synchronization signal Means for comparing the predicted frame number with the detected frame number, Output as a force frame number, a mismatch, and only when the state of the detection frame number satisfies the predetermined condition, in which and a correction means for outputting corrected the expected frame number.
[0006]
The predetermined condition is a case where the detected frame numbers are, for example, two consecutive frames. If it is not continuous, no correction is made. The predetermined condition is that the difference between the detected frame number and the predicted frame number is within ± 2 frames, for example. When the difference between the detected frame number and the predicted frame number is large, correction is not performed. By the above means, the output frame number becomes highly reliable.
[0007]
Embodiment
Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is a diagram showing an embodiment of the present invention, and FIG. 2 is an explanatory diagram of an input signal at the input unit of FIG. This input signal is of the type shown in Japanese Patent Application No. 7-88672, for example. FIG. 3 is a diagram showing a combination of three frame numbers of the input signal and four synchronization number combinations of synchronization numbers.
[0008]
Here, a signal reproduced from a recording medium (optical disk) is assumed. In this reproduction signal, one sector is composed of a plurality of frames (in the example of FIG. 2, one sector is 26 frames). One frame is composed of a synchronization number as a synchronization signal and a data area, and the synchronization numbers are set in combination so that the numerical values when at least three or more consecutive numbers are different within one sector (see FIG. 3). That is, as shown in FIG. 3, the synchronization numbers are assigned in the order of 0, 5, 1, 5, 2, 5, 3, 5, 4 ... in ascending order of frame numbers 0, 1, 2, 3, 4,. It has been. Here, as can be seen from the combination of sync numbers, the sync numbers are set so that the same number does not exist in one sector when the sync numbers are combined in three or four consecutive numbers. Is assigned. Therefore, the frame number can be recognized from the numerical contents of each frame.
[0009]
Returning to FIG. The signal determined as described above is input to the input terminal 100. This input signal is input to the synchronization number detection unit 101. The synchronization number detected by the synchronization number detection unit 101 is input to the frame number detection unit 102. The frame number detection unit 102 generates a numerical value shown in FIG. 3 by combining three or four input synchronization numbers in succession, determines a frame number from this numerical value, and outputs it as a detected frame number. When the combination of the synchronization numbers is “470”, the frame number is output as “0”, when it is “705”, the frame number is “1”, and when it is “051”, the frame number is “2”. This frame number is set as a detection frame number.
[0010]
The input signal is also input to the synchronization signal detection unit 103. The synchronization signal detection unit 103 detects the input timing of the synchronization number as the synchronization signal and outputs the synchronization signal regardless of the content of the synchronization number. The synchronization signal is supplied to the frame number output unit 104. The frame number output unit 104 up-controls a counter that is reset at, for example, 26 every time a synchronization signal is input, and generates an expected frame number.
[0011]
The predicted frame number is input to the correction determination unit 105. The correction determination unit 105 compares the predicted frame number with the detected frame number and determines whether or not they match. When the predicted frame number matches the detected frame number, the correction determination unit 105 outputs, for example, “0” as a correction instruction signal. At this time, the frame number output unit 104 outputs the predicted frame number as the output frame number. On the other hand, when there is a mismatch and the characteristics of the detected frame number satisfy a predetermined condition, the correction determination unit 105 outputs “1” as the correction instruction signal. At this time, the frame number output is output after correcting the predicted frame number, that is, the detected frame number output from the frame number detection unit 102 is taken in and output as the output frame number. The next predicted frame number is generated based on the number.
[0012]
Here, conditions for the correction determination unit 105 to give a correction instruction to the frame number output unit 104 include the following conditions.
FIG. 4A and FIG. 4B each specifically show a configuration example of the correction determination unit 105.
[0013]
The correction determination unit 105 in FIG. 4A and its operation will be described.
In FIG. 4A, the detected frame number is input to the mismatch determination unit 201 and the continuity detection unit 202. The mismatch determination unit 201 compares the detected frame number with the expected frame number, and outputs logic 1 when they do not match. The continuity detecting unit 202 detects whether or not the detected frame numbers are continuous. For example, when the frame number is 2 frames, that is, 2 times, the logic 1 is output. The AND circuit 203 outputs a correction instruction signal when the two inputs are logic one. Therefore, the AND circuit 203 outputs a logic 1 that is a correction instruction signal when the predicted frame number and the detected frame number do not match and the detected frame number continues twice.
[0014]
This means the following. Even if a mismatch between the expected frame number and the detected frame number is detected, the lack of continuity in the detected frame number is due to an error in the detected frame number or an error due to a flaw. It was that there was. Next, when a mismatch between the predicted frame number and the detected frame number is detected and there is continuity of the detected frame number, the detected frame number is correct. If the detected frame number is correct and the predicted frame number is incorrect, it can be said that there is an error or malfunction in the prediction, or that the playback location has changed due to special playback or the like.
[0015]
FIG. 5A shows a timing chart showing the operation of the correction determination unit 105 in FIG. The synchronization number continues from 0, 5, 1, 5, 2, 5, 3, 5, 1,... From the left, but 1 is an error and should be 4 (see the table in FIG. 3). However, after error 1, 5, 1, 6,... That is, the detected frame numbers are not continuous. In such a case, a correction instruction signal cannot be obtained. For this reason, the output frame numbers are stable and continuous.
[0016]
In the above description, the correction instruction signal is output when the detected frame number is continuous twice. However, the present invention is not limited to this, and the correction instruction signal is output when the detection frame number is continuous three or four times. Well. For example, when reproducing a disk with many scratches and pride, such as an old disk, the number of continuous detections may be variable. That is, the change value may be supplied to the continuous detection unit 202.
[0017]
FIG. 5B shows an operation timing chart assuming that there is no continuity detection unit 202 in the correction determination unit 105. Without the continuity detection unit 202, the correction instruction signal is frequently output, and the output frame number changes each time, thereby creating a cause of malfunction.
[0018]
The correction determination unit 105 in FIG. 4B and its operation will be described.
In FIG. 4B, the detected frame number is input to the mismatch determination unit 211 and the difference detection unit 212. The mismatch determination unit 211 compares the detected frame number with the expected frame number, and outputs logic 1 when they do not match. The difference detection unit 212 calculates the difference between the detected frame number and the expected frame number, and outputs a logic 1 when the difference between the two is within 2 (0, 1, 2), for example. The AND circuit 213 outputs a correction instruction signal when both inputs are 1. Therefore, the AND circuit 213 outputs a logic 1 that is a correction instruction signal when the predicted frame number and the detected frame number do not match and the difference between the detected frame number and the predicted frame number is 2 or less.
[0019]
This means the following. Even if a mismatch between the predicted frame number and the detected frame number is detected, if the difference between the detected frame number and the predicted frame number is large, it may be due to an error in the detected frame number or an error due to a flaw. It was a temporary thing. Next, when a mismatch between the predicted frame number and the detected frame number is detected and the difference between the detected frame number and the predicted frame number is small, the detected frame number is relatively correct.
[0020]
FIG. 6 is a flowchart showing the operation of the correction determination unit 105 in FIG. The synchronization number continues from 0, 5, 1, 5, 2, 5, 3, 5, 1,... From the left, but 1 is an error and should be 4 (see the table in FIG. 3). However, after error 1, 5, 1, 6 and so on, it returns to the original course. The detected frame number at the synchronization number 5 of the frame after the error 1 is 3, and the expected frame number is 9, so the difference between the two is large. Since this is not possible in the normal reproduction state, the correction instruction signal is not output.
[0021]
In the above description, the detected frame number and the expected frame number do not match, and the difference between the two is within 2. However, this number is not limited and may be within 3 or within 4. By selecting this number, an allowable range can be given to the number of frames to be jumped during special reproduction or the like. The larger the number is, the more frames can be played back apart. That is, it may be configured such that a change value can be input to the difference detection unit 212.
[0022]
In the above description, the content of a three-digit numerical value combining three consecutive synchronization numbers is used, but the present invention is not limited to this.
As shown in FIG. 3, even when looking at the contents of combining four consecutive synchronization numbers, the same four-digit value does not exist in one sector (26 frames). Therefore, the same effect can be obtained even if this 4-digit numerical value is used.
[0023]
FIG. 7 shows a timing chart for explaining the operation when a correction instruction signal is generated when a 4-digit numerical value is used.
The synchronization number continues from 0, 5, 1, 5, 2, 5, 3, 5, 1,... From the left, but 1 is an error and should be 4 (see the table in FIG. 3). . However, after error 1, 5, 1, 6 and so on, it returns to the original course. The detection frame number when error 1 occurs is a 4-digit numerical value “5351”, but such a detection frame number does not exist in the table of FIG. In such a case, the predicted frame number 8 is set to be the output frame number as it is. In the next frame, the 4-digit numerical value is “3515”, and this numerical value does not exist in the table of FIG. Accordingly, at this time, the predicted frame number 9 becomes the output frame number as it is.
[0024]
In the next frame, the 4-digit numerical value is “5151”, and this numerical value does not exist in the table of FIG. Accordingly, at this time, the predicted frame number 10 becomes the output frame number as it is.
[0025]
In the next frame, the 4-digit numerical value is “1516”, and this numerical value does not exist in the table of FIG. Therefore, at this time, the predicted frame number 11 (the number next to the previous 13) becomes the output frame number as it is.
[0026]
In the next frame, the 4-digit numerical value is “5162”, which is present as frame number 12 in the table of FIG. Therefore, at this time, the frame number 12 is output from the frame number detection unit and compared with the predicted frame number 12. At this time, they match, and the predicted frame number 12 becomes the output frame number as it is.
[0027]
As described above, the output frame number can be stabilized even if a 4-digit numerical value using the 4 consecutive numbers of the synchronization number is used. Further, if the continuous detection unit and the difference detection unit shown in FIG. The stability of the frame number can be obtained.
[0028]
Although the embodiment described above is configured by hardware, it is needless to say that the method of the present invention can be realized by software.
FIG. 8 shows a flowchart capable of realizing the functions and operations shown in FIGS. 4 (A) and 5 (A). FIG. 9 shows a flowchart capable of realizing the functions and operations shown in FIG. 4B and FIG. The flowchart of FIG. 8 will be described. A synchronization number is extracted from the input signal and stored, and a multi-digit numerical value as shown in FIG. 3 is created (steps A1 and A2). Then, it is determined whether or not a multi-digit numerical value exists in the table shown in FIG. 3, and if it exists, the corresponding frame number is set as the detected frame number (step A4). If not, the predicted frame number is output as the output frame number (step A6). Next, when a number that is not detected is obtained, the detected frame number is compared with the predicted frame number to determine whether or not they match (step A5). If they match, the predicted frame number is output as the output frame. It outputs as a number (step A6). If there is a mismatch in step A5, it is determined whether the detected frame number has continuity. If there is no continuity, it is determined that an erroneous frame number has occurred suddenly, and the process proceeds to step A6. The predicted frame number is output as an output frame number (step A7). However, if there is continuity in the detected frame numbers in step A7, the latest detected frame number is replaced with the predicted frame number, and the output frame number is output (step A8).
[0029]
The flowchart of FIG. 9 will be described. This flowchart differs from the flowchart of FIG. 8 in the processing when a mismatch is obtained in step A5. That is, the difference between the detected frame number and the predicted frame number is taken, and it is determined whether or not the difference is within a predetermined range (step A11). If it is within the predetermined range, the latest detected frame number is replaced with the predicted frame number, and the output frame number is output (step A12). However, if it exceeds the predetermined range, it is determined that an erroneous frame number has occurred suddenly, the process proceeds to step A6, and the predicted frame number is output as the output frame number.
[0030]
【The invention's effect】
As described above, according to the present invention, the reproduction position can be reliably recognized in units of frames, and in particular, the frame number correction function can be made highly reliable.
[Brief description of the drawings]
FIG. 1 is a diagram showing an embodiment of the present invention.
FIG. 2 is an explanatory diagram of a format of a signal input to the apparatus of FIG.
FIG. 3 is an explanatory diagram of a frame number and a synchronization number of a signal input to the apparatus of FIG.
4 is a diagram illustrating a configuration example of a correction determination unit in FIG. 1;
FIG. 5 is a timing chart shown for explaining the operation of the determination unit in FIG.
FIG. 6 is a timing chart shown for explaining the operation of the determination unit in FIG.
FIG. 7 is a timing chart for explaining the operation of another determination unit;
FIG. 8 is a flowchart shown for explaining an operation example of the apparatus of the present invention;
FIG. 9 is a flowchart shown for explaining another operation example of the apparatus of the present invention;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 101 ... Synchronization number detection part, 102 ... Frame number detection part, 103 ... Synchronization signal detection part, 104 ... Frame number output part, 105 ... Correction determination part, 201, 211 ... Mismatch determination part, 202 ... Continuity detection part, 203 213... AND circuit, 212.

Claims (6)

One sector consists of a plurality of frames, one frame consists of a synchronization number as a synchronization signal and a data area, and the synchronization number is set so that one or more consecutive numerical values are all different values within one sector. An input unit that receives an input signal that can identify the consecutive frame number of each successive frame in the one sector by the numerical value;
Frame number detection means for detecting the synchronization number from the input signal and generating a detection frame number by combining a plurality of synchronization numbers;
Synchronization signal generating means for capturing the synchronization number of the input signal as a synchronization signal and generating a synchronization signal;
Frame number generating means for generating an expected frame number at the timing of the synchronization signal;
The predicted frame number and the detected frame number are compared, and if they match, the predicted frame number is output as an output frame number, which does not match, and the state of the detected frame number satisfies a predetermined condition A frame number correcting device, comprising: a correcting means for correcting and outputting the predicted frame number only when The correcting means is
When the predicted frame number does not match the detected frame number, and the detected frame number has N continuity in the subsequent frames, the predicted frame number is corrected to the latest detected frame number. The frame number correcting apparatus according to claim 1, wherein the frame number correcting apparatus outputs the frame number. The correcting means is
When the predicted frame number does not match the detected frame number, and the difference between the detected frame number and the predicted frame number is within N, the predicted frame number is corrected to the latest detected frame number. 2. The frame number correcting apparatus according to claim 1, wherein the frame number correcting apparatus outputs the frame number. One sector is composed of a plurality of frames, and one frame is composed of a synchronization number as a synchronization signal and a data area, and the synchronization numbers are set so that the numbers when at least three or more consecutive numbers are different in one sector Using an input signal that is set to match and can identify the consecutive frame number of each successive frame in the one sector by the numerical value,
Detecting the synchronization number from the input signal and accumulating a plurality of synchronization numbers to generate a combination detection frame number;
Capture the synchronization number of the input signal as a synchronization signal and generate a synchronization signal to generate an expected frame number at the timing of the synchronization signal;
The predicted frame number and the detected frame number are compared, and if they match, the predicted frame number is output as an output frame number,
Compare the expected frame number and the detected frame number, if there is a mismatch, determine whether the detected frame number and the next detected frame number are consecutive,
When the determination result is discontinuous, the predicted frame number is output as an output frame number, and when it is continuous, the predicted frame number is corrected to the latest detected frame number and the latest detected frame number is changed. A frame number correction method characterized in that an output frame number is output. One sector is composed of a plurality of frames, one frame is composed of a synchronization number and a data area as a synchronization signal, and the synchronization numbers are set so that the numbers when at least three or more are consecutive are all different numbers within one sector. Using an input signal that is set to match and can identify the consecutive frame number of each successive frame in the one sector by the numerical value,
Detecting the synchronization number from the input signal and accumulating a plurality of synchronization numbers to generate a combination detection frame number;
Capture the synchronization number of the input signal as a synchronization signal and generate a synchronization signal to generate an expected frame number at the timing of the synchronization signal;
The predicted frame number and the detected frame number are compared, and if they match, the predicted frame number is output as an output frame number,
Detecting a difference between the expected frame number and the detected frame number, and determining whether the difference is within a predetermined value;
When the determination result is outside the predetermined value, the predicted frame number is output as an output frame number. When the determination result is within the predetermined value, the predicted frame number is corrected to the latest detected frame number and the latest detected frame number is output. Is output as an output frame number. One sector is composed of a plurality of frames, one frame is composed of a synchronization number and a data area as a synchronization signal, and the synchronization numbers are set so that the numbers when at least three or more are consecutive are all different numbers within one sector. And an input unit that receives an input signal that is set to be combined and can identify the continuous frame number of each continuous frame in the one sector by the numerical value;
Frame number detection means for detecting the synchronization number from the input signal and generating a detection frame number by combining a plurality of synchronization numbers;
Synchronization signal generating means for capturing the synchronization number of the input signal as a synchronization signal and generating a synchronization signal;
Frame number generating means for generating an expected frame number at the timing of the synchronization signal;
Means for comparing the predicted frame number with the detected frame number and outputting the predicted frame number as an output frame number if they match,
The predicted frame number is compared with the detected frame number, and the latest detected frame number is detected when there is a mismatch and the difference between the detected frame number and the predicted frame number is N or less. And a means for correcting the frame number and outputting it.

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