JP3508248B2 - Hybrid integrated circuit device - Google Patents
Hybrid integrated circuit deviceInfo
- Publication number
- JP3508248B2 JP3508248B2 JP27876794A JP27876794A JP3508248B2 JP 3508248 B2 JP3508248 B2 JP 3508248B2 JP 27876794 A JP27876794 A JP 27876794A JP 27876794 A JP27876794 A JP 27876794A JP 3508248 B2 JP3508248 B2 JP 3508248B2
- Authority
- JP
- Japan
- Prior art keywords
- insulating substrate
- heat sink
- integrated circuit
- circuit device
- hybrid integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Description
【０００１】[0001]
【産業上の利用分野】本発明は混成集積回路装置に関
し、特にパワー部を少なくとも１個所以上有する高パワ
ー型の混成集積回路装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit device, and more particularly to a high power type hybrid integrated circuit device having at least one power section.
【０００２】[0002]
【従来の技術】従来のこの種の装置の一例として、特開
昭６１−５１９３４号公報に開示されたものがある。こ
の従来例の詳細な説明は該文献に譲るが、以下その要点
について述べる。パワー部（パワーチップ）を有する混
成集積回路装置において、パワーチップ面と銅片面間を
Ｓｎ−Ｓｂ（Ｓｂ：８〜１０ｗｔ％）で接続、銅片と絶
縁基板間を共晶はんだで接続、さらに絶縁基板とヒート
シンク間を共晶はんだで接続することにより、混成集積
回路装置のパワー部を形成している。2. Description of the Related Art An example of a conventional device of this type is disclosed in Japanese Patent Laid-Open No. 61-51934. The detailed description of this conventional example is given to the document, but the main points will be described below. In a hybrid integrated circuit device having a power section (power chip), a power chip surface and a copper single surface are connected by Sn-Sb (Sb: 8 to 10 wt%), a copper piece and an insulating substrate are connected by eutectic solder, and By connecting the insulating substrate and the heat sink with eutectic solder, the power section of the hybrid integrated circuit device is formed.
【０００３】[0003]
【発明が解決しようとする課題】上述のような従来の混
成集積回路装置においては、最近の斯界産業のパワー部
を有する混成集積回路装置のパワーアップの要求に対し
て、次に述べるような問題があった。すなわち、パワー
チップの断続的な発熱や外部からの熱的変化により、熱
膨張率が異なる材料の組み合わせによって生ずる歪によ
って、はんだ接続部の中で、共晶はんだを使用している
箇所のはんだづけ寿命が短くなってしまい、結果とし
て、パワーチップの特性劣化につながるという問題があ
った。SUMMARY OF THE INVENTION In the conventional hybrid integrated circuit device as described above, there are the following problems in response to the recent demand for power up of the hybrid integrated circuit device having the power section of the industry. was there. In other words, due to the strain generated by the combination of materials with different coefficients of thermal expansion due to the intermittent heat generation of the power chip and the thermal change from the outside, the soldering life of the part where the eutectic solder is used in the solder connection part However, there is a problem that the characteristics of the power chip are deteriorated as a result.
【０００４】[0004]
【課題を解決するための手段】本発明に係る混成集積回
路装置は、ヒートシンクを装置基板とし、このヒートシ
ンク上にパワーチップとドライバ及び絶縁基板を別個に
配設し、この絶縁基板上に銅片、この銅片上にパワーチ
ップを配設してなる混成集積回路装置において、ヒート
シンクの材質を、絶縁基板とヒートシンク間の熱膨脹係
数差が銅片と絶縁基板間の熱膨脹係数差よりも小さなも
のとし、パワーチップと銅片との間、銅片と絶縁基板と
の間を、Ｓｎ−Ｓｂ（８〜１２ｗｔ％）−Ａｇ（２ｗｔ
％）の接続用合金で接続し、絶縁基板とヒートシンクと
の間を共晶はんだで接続してなるものである。この場
合、ヒートシンクは、例えば、鉄板にニッケルめっきを
施したものであってもよい。In a hybrid integrated circuit device according to the present invention, a heat sink is used as a device substrate, a power chip, a driver and an insulating substrate are separately arranged on the heat sink, and a copper strip is placed on the insulating substrate. In the hybrid integrated circuit device in which the power chip is arranged on the copper piece, the material of the heat sink is such that the difference in thermal expansion coefficient between the insulating substrate and the heat sink is smaller than the difference in thermal expansion coefficient between the copper piece and the insulating substrate. Sn—Sb (8 to 12 wt%)-Ag (2 wt) is provided between the power chip and the copper piece and between the copper piece and the insulating substrate.
%) Connection alloy, and the insulating substrate and the heat sink are connected by eutectic solder. In this case, the heat sink may be, for example, an iron plate plated with nickel.
【０００５】[0005]
【作用】本発明による混成集積回路装置においては、ヒ
ートシンクの材質を、パワーチップと銅片との間、銅片
と絶縁基板との間を、Ｓｎ−Ｓｂ（８〜１２ｗｔ％）−
Ａｇ（２ｗｔ％）の接続用合金、すなわちＳｎ（錫）−
Ｓｂ（アンチモン）−Ａｇ（銀）はんだで接続したか
ら、熱膨張率の異なる材料の組み合わせによって生ずる
歪は、全部を共晶はんだを用いて接続するよりも、熱伝
導率がよいことによる放熱性が優れているため、はんだ
部にかかる温度差を減少させることができ、その上、ぬ
れ性がよいので、ボイド等の発生が抑えられ、さらに伸
びが大きいため、はんだ部の繰り返し歪による疲労が和
らぐようになる。In the hybrid integrated circuit device according to the present invention, the material of the heat sink is Sn-Sb (8 to 12 wt%) between the power chip and the copper piece and between the copper piece and the insulating substrate.
Ag (2 wt%) connection alloy, ie Sn (tin)-
Since the connection is made with Sb (antimony) -Ag (silver) solder, the strain caused by the combination of materials with different thermal expansion coefficients is better than that when all are connected with eutectic solder, which results in better heat dissipation. Since it is excellent, it is possible to reduce the temperature difference applied to the solder part, and furthermore, since the wettability is good, the occurrence of voids etc. is suppressed, and since the elongation is large, fatigue due to repeated strain of the solder part It will soften.
【０００６】また、ヒートシンクの材質を、絶縁基板と
ヒートシンク間の熱膨脹係数差が銅片と絶縁基板間の熱
膨脹係数差よりも小さなもの、例えば、鉄板にニッケル
めっきを施したものとしたから、パワーチップの断続的
な発熱や外部からの熱的変化によって熱膨脹係数が異な
る材料の組み合わせによって絶縁基板とヒートシンクと
の間に生ずる歪が軽減されるので、絶縁基板とヒートシ
ンクとの間を共晶はんだで接続しても、長寿命特性が得
られるとともに、性能はさほど劣らないのに、経済性の
優れたものとなる。Further, the heat sink is made of a material whose difference in thermal expansion coefficient between the insulating substrate and the heat sink is smaller than the difference in thermal expansion coefficient between the copper piece and the insulating substrate, for example, an iron plate plated with nickel. The strain generated between the insulating substrate and the heat sink is reduced by the combination of materials having different thermal expansion coefficients due to the intermittent heat generation of the chip and the thermal change from the outside, so eutectic solder is used between the insulating substrate and the heat sink. Even if connected, long life characteristics are obtained, and the performance is not so inferior, but the economy is excellent.
【０００７】[0007]
【実施例】図１は本発明の一実施例を示すパワー部を有
する混成集積回路装置の模式平面図である。また、図２
は図１の実施例のパワー部の模式断面図である。両図に
おいて、６はパワーチップ１を駆動するドライバであ
り、このドライバ６は、装置基板としてのヒートシンク
４の表面片側（図１では左側）に取り付けられている。1 is a schematic plan view of a hybrid integrated circuit device having a power section showing an embodiment of the present invention. Also, FIG.
FIG. 2 is a schematic cross-sectional view of the power section of the embodiment of FIG. In both figures, 6 is a driver for driving the power chip 1, and this driver 6 is attached to one surface side (left side in FIG. 1) of the heat sink 4 as a device substrate.
【０００８】一方、パワー部は、図１に見られるよう
に、ドライバ６の近傍（右側）に位置して設けられる。
この場合、ヒートシンク４は、一例として鉄（Ｆｅ）板
にニッケル（Ｎｉ）めっきを施したものを使用したもの
で形成され、全体の放熱板として機能するようになって
いる。パワー部は、ヒートシンク４の上に配設されたア
ルミナ（Ａｌ2Ｏ3）からなる絶縁基板３、銅片２及びそ
の上に設けられたパワーチップ１とから構成されてい
る。絶縁基板３の両平面部は、はんだ付けが可能なよう
に、周知の技術により、銀（Ａｇ）系の導体でメタライ
ズ（金属化）されている。また、銅片２はパワーチップ
１の発熱部を平均化するために使用されるが、その表面
はニッケルめっきが施されているか、あるいはその上に
金（Ａｕ）めっきされている。On the other hand, the power section is provided near the driver 6 (on the right side) as shown in FIG.
In this case, the heat sink 4 is formed by using, for example, an iron (Fe) plate plated with nickel (Ni), and functions as the entire heat dissipation plate. The power section is composed of an insulating substrate 3 made of alumina (Al 2 O 3 ) provided on a heat sink 4, a copper piece 2 and a power chip 1 provided thereon. Both planes of the insulating substrate 3 are metallized with a conductor of silver (Ag) based on a well-known technique so that they can be soldered. Further, the copper piece 2 is used for averaging the heat generating portion of the power chip 1, and its surface is nickel-plated or gold (Au) -plated thereon.
【０００９】本実施例では、パワーチップ１と銅片２と
の間の接続部５ａ、銅片２と絶縁基板３との間の接続部
５ｂを、いずれも組成式がＳｎ−Ｓｂ（８〜１２ｗｔ
％）−Ａｇ（２ｗｔ％）の合金による同一のＳｎ−Ｓｂ
−Ａｇはんだを使用して接続するとともに、絶縁基板３
とヒートシンク４との間の接続部５ｃを共晶はんだを使
用して接続することにより、パワー部を形成している。In the present embodiment, the connection portion 5a between the power chip 1 and the copper piece 2 and the connection portion 5b between the copper piece 2 and the insulating substrate 3 have composition formulas of Sn-Sb (8- 12 wt
%)-Ag (2 wt%) alloy with the same Sn-Sb
-Connecting using Ag solder and insulating substrate 3
The power portion is formed by connecting the connection portion 5c between the heat sink 4 and the heat sink 4 using eutectic solder.
【００１０】以上のように、上述のパワーチップ１と銅
片２との間の接続部５ａ、銅片２と絶縁基板３との間の
接続部５ｂを、いずれも組成式がＳｎ−Ｓｂ（８〜１２
ｗｔ％）−Ａｇ（２ｗｔ％）の合金による同一のＳｎ−
Ｓｂ−Ａｇはんだを使用して接続したので、熱膨張率の
異なる材料の組み合わせによって生ずる歪は、全部を共
晶はんだを用いて接続した従来のものよりも、熱伝導率
がよいことによる放熱性が優れているため、はんだ部に
かかる温度差を減少させることができ、その上、ぬれ性
がよいので、ボイド等の発生が抑えられ、さらに伸びが
大きいため、はんだ部の繰り返し歪による疲労が和らい
で、熱疲労によるパワーチップの寿命が長くなるという
効果がある。As described above, the connection portion 5a between the power chip 1 and the copper piece 2 and the connection portion 5b between the copper piece 2 and the insulating substrate 3 each have a composition formula of Sn-Sb ( 8-12
wt%)-the same Sn with an alloy of Ag (2 wt%)-
Since Sb-Ag solder was used for the connection, the strain caused by the combination of materials with different thermal expansion coefficients is better than that of the conventional one in which all of the materials were connected by eutectic solder. Since it is excellent, it is possible to reduce the temperature difference applied to the solder part, and furthermore, since the wettability is good, the occurrence of voids etc. is suppressed, and since the elongation is large, fatigue due to repeated strain of the solder part Softening has the effect of prolonging the life of the power chip due to thermal fatigue.
【００１１】また、Ｓｎ−Ｓｂ−Ａｇはんだの中には２
ｗｔ％のＡｇが含まれているので、絶縁基板３上にメタ
ライズされているＡｇ系導体のＡｇくわれ（例えば従来
のＳｎ−Ｓｂはんだの場合ならば、これがメタライズ金
属のＡｇとの合金を作りやすいので、はんだの方へＡｇ
が移行する現象に対する専門用語）防止用にも役立って
いる。Further, some Sn-Sb-Ag solders have 2
Since wt% of Ag is contained, the Ag conductor of the Ag-based conductor metallized on the insulating substrate 3 (for example, in the case of the conventional Sn-Sb solder, this forms an alloy with Ag of the metallized metal). Easy to solder Ag to solder
It is also useful for prevention of the technical term for the phenomenon of transition.
【００１２】上記したように、ヒートシンク４は、一例
として鉄（Ｆｅ）板にニッケル（Ｎｉ）めっきを施した
ものを使用したものとし、絶縁基板３とヒートシンク４
との間の接続部５ｃを共晶はんだを用いて接続してい
る。この場合の構造の特徴は、ヒートシンク４の材質を
選択して、絶縁基板３とヒートシンク４の熱膨脹係数差
が銅片２と絶縁基板３のそれよりも小さなものとしたこ
とである。As described above, the heat sink 4 is, for example, an iron (Fe) plate plated with nickel (Ni), and the insulating substrate 3 and the heat sink 4 are used.
The connection portion 5c between the and is connected using eutectic solder. The characteristic of the structure in this case is that the material of the heat sink 4 is selected so that the difference in thermal expansion coefficient between the insulating substrate 3 and the heat sink 4 is smaller than that between the copper piece 2 and the insulating substrate 3.
【００１３】このように、ヒートシンク４の材質を選択
して、絶縁基板３とヒートシンク４の熱膨脹係数差が銅
片２と絶縁基板３のそれよりも小さなもの例えば鉄とし
たから、パワーチップ１の断続的な発熱や外部からの熱
的変化によって熱膨脹係数が異なる材料の組み合わせに
よって絶縁基板３とヒートシンク４との間に生ずる歪が
軽減されるので、この間の接続に共晶はんだを使用して
も長寿命特性が得られる。As described above, since the material of the heat sink 4 is selected and the difference in thermal expansion coefficient between the insulating substrate 3 and the heat sink 4 is smaller than that of the copper piece 2 and the insulating substrate 3, for example, iron, the power chip 1 of the power chip 1 is used. Since the strain generated between the insulating substrate 3 and the heat sink 4 is reduced by the combination of materials having different thermal expansion coefficients due to intermittent heat generation or thermal change from the outside, even if eutectic solder is used for the connection between them. Long life characteristics can be obtained.
【００１４】なお、上述の実施例では、１個のパワー部
を有する混成集積回路装置の一例を図１の実施例図で示
したが、本発明による構造は、パワー部が複数個有する
混成集積回路装置にも適用可能である。In the above embodiment, an example of the hybrid integrated circuit device having one power section is shown in the embodiment diagram of FIG. 1. However, the structure according to the present invention has a hybrid integrated circuit having a plurality of power sections. It is also applicable to circuit devices.
【００１５】[0015]
【発明の効果】以上のように本発明によれば、ヒートシ
ンクの材質を、パワーチップと銅片との間、銅片と絶縁
基板との間を、Ｓｎ−Ｓｂ（８〜１２ｗｔ％）−Ａｇ
（２ｗｔ％）の接続用合金、すなわちＳｎ（錫）−Ｓｂ
（アンチモン）−Ａｇ（銀）はんだで接続したから、熱
膨張率の異なる材料の組み合わせによって生ずる歪は、
全部を共晶はんだを用いて接続するよりも、熱伝導率が
よいことによる放熱性が優れているため、はんだ部にか
かる温度差を減少させることができ、その上、ぬれ性が
よいので、ボイド等の発生が抑えられ、さらに伸びが大
きいため、はんだ部の繰り返し歪による疲労が和らぐと
いう効果がある。このため、熱疲労によるパワーチップ
の寿命低下が抑えられ、装置の寿命が長くなるという効
果が得られる。As described above, according to the present invention, the material of the heat sink is Sn-Sb (8 to 12 wt%)-Ag between the power chip and the copper piece and between the copper piece and the insulating substrate.
(2 wt%) connecting alloy, that is, Sn (tin) -Sb
Since the connection is made with (antimony) -Ag (silver) solder, the strain caused by the combination of materials having different thermal expansion coefficients is
Compared to connecting all using eutectic solder, it has excellent heat dissipation due to good thermal conductivity, so it is possible to reduce the temperature difference applied to the solder part, and moreover, because the wettability is good, Generation of voids and the like is suppressed, and since the elongation is large, there is an effect that fatigue due to repeated strain of the solder portion is softened. Therefore, the life of the power chip can be prevented from being shortened due to thermal fatigue, and the life of the device can be extended.
【００１６】また、ヒートシンクの材質を、絶縁基板と
ヒートシンク間の熱膨脹係数差が銅片と絶縁基板間の熱
膨脹係数差よりも小さなもの、例えば、鉄板にニッケル
めっきを施したものとしたから、パワーチップの断続的
な発熱や外部からの熱的変化によって熱膨脹係数が異な
る材料の組み合わせによって絶縁基板とヒートシンクと
の間に生ずる歪が軽減されるので、絶縁基板とヒートシ
ンクとの間を共晶はんだで接続しても、長寿命特性が得
られるとともに、性能はさほど劣らないにも拘らず、経
済性の優れた製品が得られる。Further, since the heat sink is made of a material whose difference in thermal expansion coefficient between the insulating substrate and the heat sink is smaller than the difference in thermal expansion coefficient between the copper piece and the insulating substrate, for example, an iron plate plated with nickel, The strain generated between the insulating substrate and the heat sink is reduced by the combination of materials having different thermal expansion coefficients due to the intermittent heat generation of the chip and the thermal change from the outside, so eutectic solder is used between the insulating substrate and the heat sink. Even if connected, long life characteristics can be obtained, and a product with excellent economic efficiency can be obtained although the performance is not so inferior.
【図１】本発明の一実施例を示すパワー部を有する混成
集積回路装置の模式平面図である。FIG. 1 is a schematic plan view of a hybrid integrated circuit device having a power section showing an embodiment of the present invention.
【図２】図１の実施例のパワー部の模式断面図である。FIG. 2 is a schematic cross-sectional view of a power unit of the embodiment shown in FIG.
１ パワーチップ ２ 銅片 ３ 絶縁基板 ４ ヒートシンク ５ａ，５ｂ，５ｃ 接続部 ６ ドライバ 1 power chip 2 Copper pieces 3 insulating substrate 4 heat sink 5a, 5b, 5c connection part 6 drivers
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 23/36 H01L 23/40 ─────────────────────────────────────────────────── ─── Continuation of front page (58) Fields surveyed (Int.Cl. 7 , DB name) H01L 23/36 H01L 23/40
Claims (2)
トシンク上にパワーチップとドライバ及び絶縁基板を別
個に配設し、この絶縁基板上に銅片、この銅片上に前記
パワーチップを配設してなる混成集積回路装置におい
て、前記ヒートシンクの材質を、前記絶縁基板と前記ヒート
シンク間の熱膨脹係数差が前記銅片と前記絶縁基板間の
熱膨脹係数差よりも小さなものとし、 前記パワーチップと前記銅片との間、前記銅片と前記絶
縁基板との間を、Ｓｎ−Ｓｂ（８〜１２ｗｔ％）−Ａｇ
（２ｗｔ％）の接続用合金で接続し、 前記絶縁基板と前記ヒートシンクとの間を共晶はんだで
接続し てなることを特徴とする混成集積回路装置。1. A heatsink is used as a device substrate, a power chip, a driver and an insulating substrate are separately arranged on the heatsink, a copper piece is arranged on the insulating substrate, and the power chip is arranged on the copper piece. In the hybrid integrated circuit device, the heat sink is made of the same material as the insulating substrate and the heat sink.
The difference in the coefficient of thermal expansion between the sinks is between the copper piece and the insulating substrate.
And smaller than the thermal expansion coefficient difference, between the copper strips and the power chip, between the insulation <br/> edge substrate and the copper piece, Sn-Sb (8~12wt%) - Ag
(2 wt%) connection alloy is used for connection , and eutectic solder is used between the insulating substrate and the heat sink.
A hybrid integrated circuit device characterized by being connected .
っきを施したものであることを特徴とする請求項１記載
の混成集積回路装置。2. The heat sink is made of nickel on an iron plate.
The hybrid integrated circuit device according to claim 1, wherein the hybrid integrated circuit device is provided with a stamp .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27876794A JP3508248B2 (en) | 1994-11-14 | 1994-11-14 | Hybrid integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27876794A JP3508248B2 (en) | 1994-11-14 | 1994-11-14 | Hybrid integrated circuit device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08139238A JPH08139238A (en) | 1996-05-31 |
| JP3508248B2 true JP3508248B2 (en) | 2004-03-22 |
Family
ID=17601906
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27876794A Expired - Fee Related JP3508248B2 (en) | 1994-11-14 | 1994-11-14 | Hybrid integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3508248B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19647590A1 (en) * | 1996-11-18 | 1998-05-20 | Abb Research Ltd | High power semiconductor multi-chip module e.g. for power electronics |
| JP2009283741A (en) * | 2008-05-23 | 2009-12-03 | Fuji Electric Device Technology Co Ltd | Semiconductor device |
-
1994
- 1994-11-14 JP JP27876794A patent/JP3508248B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH08139238A (en) | 1996-05-31 |
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