JP3489993B2 - Digital microwave transmitter - Google Patents

Digital microwave transmitter

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Publication number
JP3489993B2
JP3489993B2 JP20320298A JP20320298A JP3489993B2 JP 3489993 B2 JP3489993 B2 JP 3489993B2 JP 20320298 A JP20320298 A JP 20320298A JP 20320298 A JP20320298 A JP 20320298A JP 3489993 B2 JP3489993 B2 JP 3489993B2
Authority
JP
Japan
Prior art keywords
output
signal
agc
frequency
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP20320298A
Other languages
Japanese (ja)
Other versions
JP2000036766A (en
Inventor
伸之 黒柳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Kokusai Electric Inc
Original Assignee
Hitachi Kokusai Electric Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Kokusai Electric Inc filed Critical Hitachi Kokusai Electric Inc
Priority to JP20320298A priority Critical patent/JP3489993B2/en
Publication of JP2000036766A publication Critical patent/JP2000036766A/en
Application granted granted Critical
Publication of JP3489993B2 publication Critical patent/JP3489993B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】 【0001】 【発明の属する技術分野】本発明はディジタルマイクロ
波送信機に関し、特に、ディジタルテレビジョン信号を
マイクロ波無線伝送するための送信機のうちIF信号を
入力しマイクロ波信号を出力する高周波部に関するもの
である。 【0002】 【従来の技術】ディジタルマイクロ波送信機において
は、送信出力は通常規定値の±50%以内に設定される
必要がある。また規定チャンネルが2チャンネル以上あ
る場合は、そのチャンネル切換時に他チャンネルへの妨
害を与えないために、チャンネルを切換えた後、周波数
が十分安定してから出力信号を出力する必要がある。ま
た、この時も送信出力は規定値を大きく越えることがあ
ってはならない。 【0003】従来技術を図3に示す。図3において、第
1中間周波数(IF)信号、通常130MHzはIF入
力端子1に入力され、AGC利得可変素子2によりレベ
ル調整された後、周波数混合器3において、第1局部発
振器4の発振周波数1,370MHzと混合され、その
和の周波数1,500MHz成分を濾波器22から出力
する。この出力は、更に周波数混合器5において、第2
局部発振器6からの発振周波数と混合され、その和成分
は濾波器23からとり出される。この出力を電力増幅器
7で増幅し、方向性結合器8を介して出力端子9より出
力される。上記方向性結合器8で分岐されたマイクロ波
は検波器10で直流電圧に変換され、AGC利得制御回
路17で出力端子9の出力レベルが規定レベルとなるよ
うにAGC利得可変素子2の利得を調節する。ディジタ
ルマイクロ波無線伝送のQAM方式等では回路が直線性
良く動作する必要があり、通常飽和電力から10dBの
バックオフをとっている。 【0004】チャンネル周波数を変更する場合、すなわ
ちチャンネル切換スイッチを操作者が操作した場合、マ
イコンあるいはハードロジックの制御回路30がまず出
力パワー制御信号入力端子11に切換信号を送出するの
で、電源切換回路12は電力増幅器7の電圧がOFFと
なり、出力端子9からの出力がなくなる。次に基準水晶
発振器15に位相同期して駆動されるPLL回路14の
分周データが、制御回路30からの信号で入力端子13
を介して書換えることにより、チャンネル周波数を変更
する。第2局部発振器6の周波数が新しいチャンネル周
波数に設定されるとPLL回路14からPLLロックデ
ィテクト信号16が制御回路30に入力される。その結
果、制御回路30は、電源切換回路12に信号を送出
し、電力増幅器7が制御され、出力端子9に変更された
チャンネル周波数の出力信号が得られる。 【0005】 【発明が解決しようとする課題】上述した従来技術で
は、電力増幅器7の出力をチャンネル切換前に無くすこ
とになるため、AGC制御回路17はAGC利得可変素
子2の利得を最大に調整することになる。更に、エンコ
ーダからの信号を入力し、IF信号に変調する変調部
と、本発明に述べるIF信号を入力しマイクロ波信号を
出力する高周波部は0〜200mのIFケーブルで接続
されるため、このケーブルによる減衰量0〜20dBお
よび電力増幅器を含めた回路の温度による利得変化分
を、補償するため、AGCは30dB以上の利得制御を
行なう必要がある。 【0006】このためチャンネル切換が済み電力増幅器
に電圧を印加した直後、規定出力をオーバーした飽和電
力を出力され、また、飽和することにより、不要波成分
が隣接チャンネルに妨害を与えることになる。 【0007】 【課題を解決するための手段】本発明はこの欠点を除去
するために、チャンネル切換に連動してAGC電圧を切
換えて、高周波電力増幅器を断とする間、規定レベル又
は規定レベル以下のレベルを得る電圧をAGCに印加す
る。 【0008】本発明の実施例を図1に示す。従来実施例
図3に比べ異なる点は検波器出力電圧をAGC電圧切換
回路19を介してAGC利得制御回路17に接続し、上
記AGC電圧切換回路19のもう一方の端子は抵抗器2
0,21で決まる電圧とし、この電圧はAGC利得可変
素子2の利得を標準利得か又はそれ以下に設定する電圧
値とする、そしてAGC電圧切換回路19の切換制御を
制御回路によって高周波電力増幅器を断とする間抵抗器
20,21によって決まる電圧に切換える構成としたこ
とである。 【0009】 【発明の実施の形態】図2により制御の順序について説
明する。制御回路30がチャンネル切換を制御する場
合、まず出力パワー制御信号(端子11に接続)をHi
からLoに切換えた後、チャンネル切換データ(端子1
3に接続)を出力する。このデータ書換えはクロックと
データおよびストローブ信号の3本の信号で行なわれ
る。チャンネル切換データの書換えが完了するとPLL
ロックディテクト信号がHiからLoとなるが、PLL
制御が完了し規定の周波数となるとLoからHiとな
る。AGC切換立下げのタイミングはAGCおよびPL
Lの時定数により決定されるが、立上げは出力パワー制
御信号がHiとなった後となる。AGC切換を行なった
場合とAGC切換を行なわない場合のAGC電圧を比較
した。行なわない場合AGC電圧の変化が大きく、出力
パワー制御切換直後大きな出力を送信してしまう。 【0010】AGC電圧を完全に絞り、IFレベルを最
小とすれば、電力増幅器の切換をしないで済むと考えて
しまうが、実際にはIFレベルを無としても第1局部発
振器1,370MHzの5倍の高調波6,850MHz
がスプリアスとして出力される等の問題があり上記切換
回路は必要である。 【0011】 【発明の効果】チャンネル切換時にも安定した送信出力
を得ることができる。AGCとPLL回路の時定数およ
び切換のタイミングによるが5dBの送信出力が上昇す
る。この場合ディジタル信号変調波どうしの相互変調歪
が10dB上昇し隣接チャンネルへの妨害となる。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital microwave transmitter, and more particularly to a digital microwave transmitter for transmitting an IF signal from a transmitter for microwave radio transmission. The present invention relates to a high-frequency unit that outputs a microwave signal. 2. Description of the Related Art In a digital microwave transmitter, a transmission output usually needs to be set within ± 50% of a specified value. Further, when there are two or more specified channels, it is necessary to output an output signal after switching the channels and after the frequency is sufficiently stabilized so as not to interfere with other channels when the channels are switched. Also at this time, the transmission output must not greatly exceed the specified value. FIG. 3 shows the prior art. In FIG. 3, a first intermediate frequency (IF) signal, usually 130 MHz, is input to an IF input terminal 1, the level of which is adjusted by an AGC gain variable element 2, and then the oscillation frequency of a first local oscillator 4 in a frequency mixer 3. It is mixed with 1,370 MHz, and the 1,500 MHz component of the sum is output from the filter 22. This output is further passed through a frequency mixer 5 to a second
It is mixed with the oscillation frequency from the local oscillator 6, and the sum component is taken out from the filter 23. This output is amplified by a power amplifier 7 and output from an output terminal 9 via a directional coupler 8. The microwave branched by the directional coupler 8 is converted into a DC voltage by the detector 10, and the gain of the AGC gain variable element 2 is adjusted by the AGC gain control circuit 17 so that the output level of the output terminal 9 becomes a specified level. Adjust. In a QAM system or the like for digital microwave radio transmission, the circuit needs to operate with good linearity, and a back-off of 10 dB is usually taken from the saturation power. When the channel frequency is changed, that is, when the operator operates the channel changeover switch, the control circuit 30 of the microcomputer or the hard logic first sends a changeover signal to the output power control signal input terminal 11, so that the power supply changeover circuit In 12, the voltage of the power amplifier 7 is turned off, and the output from the output terminal 9 disappears. Next, frequency-divided data of the PLL circuit 14 driven in phase synchronization with the reference crystal oscillator 15 is input to the input terminal 13 by a signal from the control circuit 30.
To change the channel frequency. When the frequency of the second local oscillator 6 is set to a new channel frequency, a PLL lock detect signal 16 is input from the PLL circuit 14 to the control circuit 30. As a result, the control circuit 30 sends a signal to the power supply switching circuit 12, the power amplifier 7 is controlled, and an output signal of the changed channel frequency is obtained at the output terminal 9. In the above-mentioned prior art, the output of the power amplifier 7 is eliminated before the channel switching, so that the AGC control circuit 17 adjusts the gain of the AGC variable gain element 2 to the maximum. Will do. Furthermore, since a modulation unit that inputs a signal from an encoder and modulates the IF signal and a high-frequency unit that receives an IF signal and outputs a microwave signal according to the present invention are connected by an IF cable of 0 to 200 m, The AGC needs to perform gain control of 30 dB or more in order to compensate for the amount of gain variation due to the temperature of the circuit including the power amplifier and the amount of attenuation by the cable from 0 to 20 dB. For this reason, immediately after the voltage is applied to the power amplifier after the channel switching, the saturation power exceeding the specified output is output, and the saturation causes the unnecessary wave component to interfere with the adjacent channel. SUMMARY OF THE INVENTION In order to eliminate this drawback, the present invention switches the AGC voltage in conjunction with the channel switching, and shuts down the high-frequency power amplifier during a specified level or below a specified level. Is applied to the AGC. FIG. 1 shows an embodiment of the present invention. 3 is different from FIG. 3 in that a detector output voltage is connected to an AGC gain control circuit 17 via an AGC voltage switching circuit 19, and the other terminal of the AGC voltage switching circuit 19 is connected to a resistor 2
0, 21. This voltage is set to a voltage value that sets the gain of the AGC gain variable element 2 to a standard gain or less. The switching control of the AGC voltage switching circuit 19 is controlled by the control circuit to control the high-frequency power amplifier. During the disconnection, the voltage is determined by the resistors 20 and 21. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The control sequence will be described with reference to FIG. When the control circuit 30 controls the channel switching, first, the output power control signal (connected to the terminal 11) is set to Hi.
After switching from “L” to “Lo”, the channel switching data (terminal 1
3) is output. This data rewriting is performed by three signals of a clock, data, and a strobe signal. When rewriting of channel switching data is completed, PLL
The lock detect signal changes from Hi to Lo.
When the control is completed and the frequency becomes a specified frequency, the frequency changes from Lo to Hi. AGC switching fall timing is AGC and PL
Although determined by the time constant of L, the start-up is performed after the output power control signal becomes Hi. The AGC voltages when AGC switching was performed and when AGC switching was not performed were compared. If not performed, the change in the AGC voltage is large, and a large output is transmitted immediately after the output power control is switched. It is considered that if the AGC voltage is completely reduced and the IF level is minimized, the power amplifier does not need to be switched. However, even if the IF level is not used, the first local oscillator 1,370 MHz 5 Double harmonic 6,850 MHz
Is output as a spurious signal, and the switching circuit is required. According to the present invention, a stable transmission output can be obtained even at the time of channel switching. Depending on the time constant of the AGC and the PLL circuit and the switching timing, the transmission output of 5 dB increases. In this case, the intermodulation distortion between the digital signal modulated waves rises by 10 dB and interferes with the adjacent channel.

【図面の簡単な説明】 【図1】本発明の全体構成を示すブロック図。 【図2】各制御信号電圧のタイミングチャート。 【図3】従来技術の全体構成を示すブロック図。 【符号の説明】 1:IF入力端子、2:AGC利得可変素子、3,5:
周波数混合器、4:第1局部発振器、6:第2局部電圧
制御発振器、7:マイクロ波電力増幅器、8:方向性結
合器、9:マイクロ波出力端子、10:検波器、11:
出力パワー制御信号入力端子、12:マイクロ波電力増
幅器の電源切換回路、13:チャンネル分周データ入力
端子、14:第2局部発振器の周波数安定化PLL回
路、15:基準水晶発振器、16:PLLロックディテ
クト信号、17:AGC利得制御回路、18:AGC切
換信号入力端子、19:AGC電圧切換回路、20,2
1:抵抗器、30:制御回路。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing the overall configuration of the present invention. FIG. 2 is a timing chart of each control signal voltage. FIG. 3 is a block diagram showing the entire configuration of a conventional technique. [Description of References] 1: IF input terminal, 2: AGC gain variable element, 3, 5:
Frequency mixer, 4: first local oscillator, 6: second local voltage controlled oscillator, 7: microwave power amplifier, 8: directional coupler, 9: microwave output terminal, 10: detector, 11:
Output power control signal input terminal, 12: power supply switching circuit of microwave power amplifier, 13: channel frequency dividing data input terminal, 14: frequency stabilization PLL circuit of second local oscillator, 15: reference crystal oscillator, 16: PLL lock Detect signal, 17: AGC gain control circuit, 18: AGC switching signal input terminal, 19: AGC voltage switching circuit, 20, 2
1: resistor, 30: control circuit.

Claims (1)

(57)【特許請求の範囲】 【請求項1】 IF信号を入力し、規定のマイクロ波周
波数に周波数変換し、電力増幅後規定電力を出力する送
信装置で、送信出力レベルを検知する手段とその検知結
果に基づき利得を制御する自動利得制御する手段を持
ち、上記規定マイクロ波周波数となっていない場合、送
信出力を断とする機能を有する装置において、上記送信
出力を断とした場合、それに連動して自動利得の制御信
号の利得を通常レベルを得るのに近い電圧又は通常レベ
ルより小さいレベルを得る電圧に切換える手段を具備す
る装置。
(57) [Claims 1] A transmission device which receives an IF signal, converts the frequency to a specified microwave frequency, and outputs a specified power after power amplification, means for detecting a transmission output level. It has a means for automatic gain control to control the gain based on the detection result, and if the specified microwave frequency is not reached, in a device having a function to cut off the transmission output, if the transmission output is cut off, A device comprising means for interlockingly switching the gain of the control signal of automatic gain to a voltage close to obtaining a normal level or a voltage obtaining a level lower than the normal level.
JP20320298A 1998-07-17 1998-07-17 Digital microwave transmitter Expired - Fee Related JP3489993B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20320298A JP3489993B2 (en) 1998-07-17 1998-07-17 Digital microwave transmitter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20320298A JP3489993B2 (en) 1998-07-17 1998-07-17 Digital microwave transmitter

Publications (2)

Publication Number Publication Date
JP2000036766A JP2000036766A (en) 2000-02-02
JP3489993B2 true JP3489993B2 (en) 2004-01-26

Family

ID=16470168

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20320298A Expired - Fee Related JP3489993B2 (en) 1998-07-17 1998-07-17 Digital microwave transmitter

Country Status (1)

Country Link
JP (1) JP3489993B2 (en)

Also Published As

Publication number Publication date
JP2000036766A (en) 2000-02-02

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