JP3377608B2 - Integrated circuit components - Google Patents

Integrated circuit components

Info

Publication number
JP3377608B2
JP3377608B2 JP17472094A JP17472094A JP3377608B2 JP 3377608 B2 JP3377608 B2 JP 3377608B2 JP 17472094 A JP17472094 A JP 17472094A JP 17472094 A JP17472094 A JP 17472094A JP 3377608 B2 JP3377608 B2 JP 3377608B2
Authority
JP
Japan
Prior art keywords
chip
resin
island
mold
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP17472094A
Other languages
Japanese (ja)
Other versions
JPH0817991A (en
Inventor
英樹 村山
宏之 田中
上 高橋
Original Assignee
住友ベークライト株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 住友ベークライト株式会社 filed Critical 住友ベークライト株式会社
Priority to JP17472094A priority Critical patent/JP3377608B2/en
Publication of JPH0817991A publication Critical patent/JPH0817991A/en
Application granted granted Critical
Publication of JP3377608B2 publication Critical patent/JP3377608B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of an integrated circuit component formed by sealing a structure such as a semiconductor integrated circuit with a resin.

[0002]

2. Description of the Related Art Semiconductor integrated circuit components (IC, LSI, etc.)
Is a chip on which an electronic circuit is formed is placed on a metal plate called an island, and the lead and the chip are connected to each other with a gold wire and placed in the cavity of the mold. It is molded by pouring. In order to secure the sealing performance, it is necessary that the entire cavity is uniformly filled with the resin during the molding process.

[0003]

However, in recent years,
In response to the downsizing and high functionality of electronic devices, ICs are becoming thinner, the number of pins is increasing, and the size of chips is increasing. As a result, the thickness and width of the flow path inside the cavity through which the resin flows are becoming smaller. Due to the increase, the rate of occurrence of unfilled voids, island shift in which islands are moved by the flow of resin, short circuit due to deformation of gold wire, disconnection, etc. is increasing.

[0004]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, and the flow of the resin in the mold is smooth, and the entire structure to be sealed can be uniformly sealed with the resin. It is intended to provide a structure.

[0005]

In order to achieve the above-mentioned object, an integrated circuit component according to the present invention is constructed by placing a structure to be sealed in a mold and encapsulating a resin. In the above method, the flow path on the upstream side of the resin in the mold inflow direction is asymmetrical so as to be wider than the flow path on the downstream side.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of an integrated circuit component according to the present invention will be described below with reference to the drawings. As shown in FIG. 1, an integrated circuit component generally has a chip 1 having a circuit formed thereon mounted on an island 2 and a lead 3 and a chip 1 connected to a gold wire 4.
It is formed by sealing with a resin 5 which is poured into the mold in a state of being bonded with.

As shown in FIG. 2, in the mold 10,
The resin 5 is injected from the gate 11 located below the island 2 to fill the space below the island 2 and mainly into the space above the island 2 through the gap S between the island 2 and the lead 3. It also wraps around and is filled. As the resin 5 is filled, the air in the mold 10 is exhausted from the air vent 12 provided on the opposite side of the gate 11.

[0008]

First Embodiment FIGS. 3 to 8 show a first embodiment of an integrated circuit component according to the present invention. In this example, the shape of the island is asymmetrical so that the flow path on the upstream side in the resin inflow direction in the mold is wider than the flow path on the downstream side.

Specifically, as shown in FIG. 3, the size of the island 2 is a gate side region 2a with a diagonal line orthogonal to a straight line connecting the gate 11 and the air vent 12 as a boundary.
Is a half of a 12 mm square, and the air vent side region 2b is a half of a 15 mm square. With such a configuration, the gap between the lead 3 and the island 2, which serves as a main flow path for the resin to flow to the upper side of the chip, is wide on the side close to the gate 11 and narrow on the side far from the gate 11. Therefore, on the side close to the gate 11, it becomes easy for the resin to wrap around the upper side of the island 2, and on the contrary, on the side far from the gate 11, wraparound becomes difficult.

The behavior of the resin at the time of sealing when a component having such an asymmetric island shape is used will be described in comparison with a case where a component having a symmetrical island shape is used.

FIG. 4 is a simulation of the behavior of the resin in the vicinity of the air vent when the island is a 12 mm square. As shown by the shaded portion, the resin 5 that has wrapped around the upper side of the chip 1 reaches the air vent 12 side in the stage of (a), and wraps around from the peripheral side to the center in the stage of (b) when more time has passed. 5 is being filled, and an unfilled void V is generated.

In the case of the component having the asymmetric island shape of FIG. 3, as shown in FIG. 5, the resin 5 reaches the air vent 12 in the stage of (a), but a longer time passes (b). Even at the stage, there is little wraparound from the periphery to the center,
No unfilled voids occur.

Numerical verification of the above simulation is shown in the graphs of FIGS. In FIG. 6, the vertical axis represents the difference in the diagonal direction of the chip, that is, the filling rate in the path from the gate 11 to the air vent 12 minus the filling rate in the side surface of the chip, that is, the path along the outer shape of the chip, and the horizontal axis. The filling rate is taken along the path along the side. In this graph, the simulation result using a square island of 12 mm square is shown by the line XX,
The result using the asymmetric island which combined 12 mm square and 15.5 mm square is represented by the □-□ line.

By looking at this graph, it is possible to determine how much resin wraparound that causes unfilled voids occurs. That is, the large absolute value of the vertical axis means that the filling speed on the side surface side is higher than the filling speed along the diagonal, and the larger this difference is, the more air is involved and the unfilled voids are formed. More likely to occur. On the other hand, if this difference is small, air entrapment is less likely to occur and the possibility of unfilled voids is reduced.

Comparing the parts having symmetrical and asymmetrical islands in FIG. 6, since the shapes are the same up to a filling rate of about 50%, the changes are almost the same. It can be seen that the wraparound to the upper side is more restricted than in the case of symmetry, and the difference in the filling rate between the diagonal and side surfaces is relatively small.

FIG. 7 is a graph showing the difference in filling rate between the top and bottom of the chip along the diagonal direction connecting the gate and the air vent. The vertical axis represents the difference in the rate of progress of the resin front surface position in the diagonal direction between the lower surface and the upper surface of the chip, and the horizontal axis represents the injection time. If the value of the vertical axis is 0, it means that the front surface of the resin has reached the same position on the upper surface and the lower surface of the chip. If the value is positive, the upper surface side precedes, and if the value is negative, the lower surface side precedes. Means

In FIG. 7, the island size is 12 m.
The square of m-square is indicated by ○-○ line, the asymmetrical shape of 12 mm square and 15.5 mm square is indicated by □-□ line, and the square of 15.5 mm square is △-△ line. It is represented by.

The gate 11 into which the resin 5 is injected is the chip 1
Since it is located on the lower side, the filling rate on the lower side increases immediately after the start of injection, but the difference in the filling rate decreases as the resin wraps around the upper side, and becomes zero at the end of filling. 1 island
In the case of 5.5 mm square, since the filling rate on the lower side is high from the beginning to the end of filling, the moment of lifting the island from the bottom tends to be large, and the island shift is likely to occur. In the case of 12 mm square, the filling rate difference becomes relatively small immediately after the start of filling, and the filling up and down of the chips proceeds at almost the same speed, so island shift is unlikely to occur, but in the latter half of filling, the island shift does not occur. Excessive supply of resin increases the possibility of unfilled voids.

On the other hand, when the island is asymmetric,
In the first 12 mm square part, island 2 and lead 3
Since the gap S between and is relatively large, and the resin wraps around the gap S from the lower side of the chip where the gate 11 is located to the upper side of the chip 1, the resin is filled relatively quickly as in the case of the target shape of 12 mm square. The rate difference becomes smaller.

In the latter half of 15.5 mm square, the above-mentioned gap S is relatively small, so that the excessive supply of the resin 5 to the upper side of the chip in this portion is suppressed. This can prevent the occurrence of unfilled voids.

FIG. 8 is a graph showing the distribution of the difference obtained by subtracting the pressure of the resin injected to the lower side from the pressure of the resin injected to the upper side of the chip immediately before the end of filling, by the distance from the gate. . The vertical axis represents the pressure difference, and the horizontal axis represents the distance from the gate.

Also in FIG. 8, the island size is 12
In the case of mm mm, the line is indicated by ◯-◯, in the case of the composite type of 12 mm square and 15.5 mm square, by □-□ line, and in the case of 15.5 mm square is indicated by Δ-Δ line.

In the case of 15.5 mm square, since the resin is hard to wrap around the upper side of the chip, there is a pressure difference immediately before the air vent, whereas in the case of 12 mm square and the composite type, the resin is above the chip. Since it easily goes around, the pressure difference is eliminated relatively near the gate. It can be understood that the island shift is more likely to occur in the 15 mm square than in the other configurations, because the larger the pressure difference is, the easier the island is lifted from the bottom to the top.

As described above, in the first embodiment, by making the shape of the island asymmetric and changing the channel width between the upstream and the downstream, it is possible to prevent the occurrence of unfilled voids and island shift. In the first embodiment,
The island has a shape in which squares of different sizes are connected by diagonal lines. To change the distance between the lead and the island, for example, as shown in FIG. ), Or may be deformed so that the above interval gradually changes toward the downstream side, as shown in FIG.

[0025]

Second Embodiment FIG. 11 shows a second embodiment of the integrated circuit component according to the present invention. In the second embodiment, the distance between the leads 3 on the downstream side is set to be narrower than that on the upstream side.

Specifically, as shown in Table 1, the lead interval in the vicinity of the air vent 12 is 0.09 mm from the outermost root portion to the tip end tip portion in the figure, and the other portions are the root portion. It is set so that it gradually narrows from the end to the tip.

[0027]

[Table 1] Example 2 Reference example                         Air vent side Other     Lead spacing Root 0.09 0.33 0.33       (mm) Middle part 0.09 0.23 0.23                 Tip 0.09 0.13 0.13

In general, when the leads are radially arranged with the chip as the center as in this example, the width of the seed itself is uniform. Wide, narrow tip.

In the second embodiment, the width of the lead itself in the vicinity of the air vent is formed into a special shape so that the root side becomes wider, so that the lead interval is set to a constant value which is narrower than the other portions. At positions other than the vicinity of the air vent, the lead interval of the root portion is set to be wide as in the reference example.

According to the configuration of the second embodiment, the distance between the leads and the island is constant, but the distance between the leads is different between the upstream side and the downstream side. Therefore, the amount of resin flowing between the leads is controlled. It is possible to prevent the occurrence of unfilled voids and island shift.

FIG. 13 shows the results of calculation of the filling pattern on the chip side, that is, the upper surface side, using the integrated circuit component of the second embodiment shown in FIG. 11 and the integrated circuit component of the reference example shown in FIG. 12, respectively. It shows in FIG. In the reference example of FIG. 12, the resin is blown up from the lower side through the gap of the lead near the air vent, and an unfilled void is generated. On the other hand, in Example 2 of FIG. 11, since the lead interval on the air vent side is narrow, the resin does not blow up and no unfilled void is generated.

In the second embodiment, the lead spacing is set in two steps in the vicinity of the air vent and the other portions, but this is set in multiple steps so that the spacing is gradually narrowed toward the downstream side. Good.

In the above two embodiments, the asymmetry of the island and the adjustment of the lead spacing are independently used as separate means, but they can be used at the same time.

[0034]

As described above, according to the present invention, the flow path on the upstream side of the flow of the resin is larger than that of the flow path on the downstream side of the structure to be sealed arranged in the mold. By setting so that the resin flow can be properly controlled, especially when applied to integrated circuit parts, defects such as unfilled voids and island shift can be prevented from occurring, and highly reliable parts can be obtained. It becomes possible to provide.

[Brief description of drawings]

FIG. 1 is a partially cutaway perspective view showing a general configuration of an integrated circuit component.

FIG. 2 is an explanatory diagram showing an arrangement of structures arranged in a mold when manufacturing an integrated circuit.

FIG. 3 is a plan view showing an integrated circuit component according to the first embodiment.

FIG. 4 is an explanatory diagram showing a behavior of a resin when a square island is used.

FIG. 5 is an explanatory diagram showing the behavior of resin when an asymmetric island is used.

FIG. 6 is a graph showing a difference in resin flow between a diagonal path and a lateral path of a chip.

FIG. 7 is a graph showing the difference in filling speed between the upper side and the lower side of the chip.

FIG. 8 is a graph showing a difference in resin pressure between the upper side and the lower side of the chip.

FIG. 9 is a plan view showing an integrated circuit component according to a modification of the first embodiment.

FIG. 10 is a plan view showing an integrated circuit component according to another modification of the first embodiment.

FIG. 11 is a plan view showing an integrated circuit component according to a second embodiment.

FIG. 12 is a plan view showing an integrated circuit component according to a reference example.

FIG. 13 is an explanatory diagram showing the behavior of the resin when Example 2 is used.

FIG. 14 is an explanatory diagram showing the behavior of the resin when the reference example of FIG. 12 is used.

[Explanation of symbols]

1 chip 2 islands 3 leads 4 gold wire 5 resin 10 mold 11 gates 12 Air vent

─────────────────────────────────────────────────── ─── Continuation of front page (56) References JP-A-4-124866 (JP, A) JP-A-7-22560 (JP, A) (58) Fields investigated (Int.Cl. 7 , DB name) H01L 23/50

Claims (5)

(57) [Claims]
1. A sealed structure including a chip on which a circuit is formed is placed in a mold, and a resin is injected into the mold to seal the sealed structure. In the integrated circuit component, the structure to be sealed is a compound that is connected to the chip with a gold wire.
The number of leads, which is provided on the downstream side of the resin inflow direction in the mold
The lead spacing is provided on the upstream side in the inflow direction.
An integrated circuit component characterized in that it is set to be narrower than the interval between the leads .
2. A sealed structure including a chip on which a circuit is formed.
The structure is placed in a mold, resin is injected into the mold, and
An integrated circuit component formed by sealing a structure to be sealed
The structure to be sealed is an island where the chip is mounted.
And a plurality of leads connected to the chip with gold wires.
Having a flow path on the upstream side of the resin inflow direction in the mold
The lead is formed asymmetrically so as to be wider than the flow path on the downstream side, and the space between the leads provided on the downstream side is equal to the upstream side.
Is set to be narrower than the space between the leads on the side
Integrated circuit parts characterized by being
3. The integrated circuit component according to claim 2, wherein the gap between the island and the lead is set so that the upstream side is wider than the downstream side.
4. The integrated circuit component according to claim 3, wherein the island has a dimension on the upstream side set smaller than a dimension on the downstream side.
5. A sealed structure including a chip on which a circuit is formed.
The structure is placed in a mold, resin is injected into the mold, and
An integrated circuit component formed by sealing a structure to be sealed
The structure to be sealed is an island where the chip is mounted.
And a plurality of leads connected to the chip with gold wires.
Having a flow path on the upstream side of the resin inflow direction in the mold
Asymmetrically configured to be wider than the downstream flow path between the island and the tip of each lead.
The gap gradually narrows from the upstream side to the downstream side
Integrated circuits components, characterized in that it is set to.
JP17472094A 1994-07-04 1994-07-04 Integrated circuit components Expired - Fee Related JP3377608B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17472094A JP3377608B2 (en) 1994-07-04 1994-07-04 Integrated circuit components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17472094A JP3377608B2 (en) 1994-07-04 1994-07-04 Integrated circuit components

Publications (2)

Publication Number Publication Date
JPH0817991A JPH0817991A (en) 1996-01-19
JP3377608B2 true JP3377608B2 (en) 2003-02-17

Family

ID=15983476

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17472094A Expired - Fee Related JP3377608B2 (en) 1994-07-04 1994-07-04 Integrated circuit components

Country Status (1)

Country Link
JP (1) JP3377608B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002289758A (en) * 2001-03-23 2002-10-04 Hitachi Chem Co Ltd Semiconductor device
JP5404083B2 (en) * 2009-02-10 2014-01-29 株式会社東芝 Semiconductor device

Also Published As

Publication number Publication date
JPH0817991A (en) 1996-01-19

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