JP3350641B2 - Multi-rate delay multiplexing spread spectrum direct communication system. - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a communication system widely used for transmitting digital data by wireless communication or wired communication, and more particularly to a communication system for performing delay multiplexing in a direct spread spectrum communication system. It is.

[0002]

2. Description of the Related Art In recent years, a spread spectrum communication system has attracted attention as a new communication system. The modulation system used for general data communication is a narrow band modulation system, which can be realized with a relatively small circuit. However, for indoor (offices, factories, etc.), multipath or narrow band colored noise Has the problem of being weak. On the other hand, the spread spectrum communication system has an advantage that these problems can be solved because the spectrum of the data signal is spread by a spread code and transmitted by a wideband transmission wave.

However, on the other hand, high-speed data transmission has been difficult because a wide band is required for the data transmission speed. For example, QP after spreading with a spreading code of 11 chips
Considering the case of SK (Quadrature Phase Shift Keying) modulation transmission, a 22 MHz band is required for 2 Mbps data transmission. When transmitting 10 Mbps data, a 110 MHz band is required. However, since the band that can be transmitted wirelessly is limited, high-speed data transmission has been difficult.

Japanese Patent Application Laid-Open No. 9-55714 proposes a method of delaying and multiplexing spread signals (hereinafter referred to as a delay multiplexing method) as means for performing high-speed transmission in a limited band. I have. By using this method, high-speed transmission can be performed in a limited band. The above example (11 chip spreading code, QPSK (Quadrature Pha
In the case of se shift keying (modulation), when the one described in JP-A-9-55714 is used, 4 Mbp
When s data is multiplexed by 5, 10 Mbps data can be communicated. FIG. 7 shows an example of this delay multiplexing transmission system. However, in order to simplify the explanation, the modulation method is BPSK (Binary Phase Shift Keying).

Hereinafter, the configuration will be described with reference to FIG.
FIG. 7 shows an example in which a multiplier and a delay element are added one by one in parallel to the example shown in JP-A-9-55714, and the number of multiplexes is five. The data generated by the data generation unit 101 is differentiated by a differential encoding unit 102, and then parallel-converted by a serial / parallel conversion unit (hereinafter, referred to as an S / P conversion unit) 103 into a number to be multiplexed.

Thereafter, multipliers 104-1 to 104-5
Then, the PN code generated by the PN generator 105 is spread over each data. Next, delay elements 106-1 to 106-5
Each signal is delayed, and further multiplexed by the multiplexer 107 to become a multi-valued digital signal, modulated by the modulator 108, converted to a transmission frequency by the frequency converter 110, and converted into a transmission frequency by the power amplifier 111. To a predetermined power, and the antenna 112
Sent by

Here, as an example, consider a case where five multiplexes are performed using an 11-chip Barker code as a spreading code. In this case, a Barker code is prepared in the PN code generator 105. The Barker code is (1011011100)
0) is a generally well-known code. In the delay unit, considering dividing 11 chips into 5 multiplexes,
Four are two-chip delays and one is a three-chip delay. Here, suppose that the delay difference between the chips is 2, 2,
Assuming that each chip is 2, 2 or 3 chips, the first delay element 10
Is a delay of 0 chips (that is, no delay), and the delay elements 11 to 14 have delay times of 2, 4, 6, and 8 chips, respectively.

FIG. 8 shows an example of the configuration of a receiver for receiving a signal thus delayed and multiplexed. The signal received by the antenna 131 is frequency-converted by the RF / IF converter 132 and the IF / BB converter 133 to be converted into a baseband signal, and then correlated by the correlator 134. This correlation output is output to the correlation synchronization circuit 135 and the latch section 136.
The latch unit 136 latches the correlation output at the timing obtained by the correlation synchronization circuit 135 (in the case of this example, the correlation synchronization circuit 135 generates signals at the timing of two chips, two chips, two chips, two chips, and three chips). Yes), and canceller 137 cancels the influence of the multiplex wave. After that, the signal is differentially demodulated by the differential demodulation unit 138,
In step 9, the signal is demodulated.

In the canceller section, a canceller which has already been filed by the same applicant as that of the present invention in Japanese Patent Application No. 8-209917 is used. Here, the effect will be briefly described. In the case of the five-multiplex system as described above, if the absolute value of the correlation output in the case of no multiplexing is 11, it will vary to 7, 9, 11, 13, and 15 due to the influence of the multiplex wave. By adding the effected correlation value, dividing by 8, and adding to the data to be demodulated, the correlation output converges to 10.5, there is no variation, and the error rate characteristics are improved.

In the example of five-multiplexing shown here, the eight data before and after the data to be demodulated seem to overlap on the time axis and have an influence.
The overlapping chip portions will be orthogonal, and only four multiplexes will have an effect. In this way, a multiplexed signal can be demodulated in a delay-multiplexed communication system, and high-speed data communication can be performed.

[0011]

In the above-mentioned conventional example, the speeding up of data transmission has been realized, but the correspondence to multirate communication which is the basis of multimedia communication which has been widespread in recent years is not mentioned. The transmitter can easily cope with multi-rate by changing the number of multiplexes, but the receiving side needs receiving means corresponding to the number of multiplexes, which may complicate the configuration.
FIG. 9 shows a block diagram of a demodulation means considering multi-rate. In FIG. 9, the blocks other than the canceller have the same function as the above-described conventional example, and thus description thereof will be omitted. The cancellers 141 to 144 are cancellers corresponding to the respective multiplex numbers.

For a simple example, the transmitting side performs spreading using an 11-chip Barker code, and the realized multi-rate is a bit rate that can be realized by a combination of 1 to 5 multiplexes. Therefore, the transmission rate when not multiplexing is 2M
bps, the realized bit rate is 2, 4,
There are five types of 6, 8, and 10 Mbps. In this demodulation means, the switch S1 can be switched according to the number of multiplexes selected by the transmitter, and any one of the canceller units 141 to 144 can be operated. For example, when 1 (no multiplex wave) is selected as the multiplex number on the transmitter side, the switch S1 is connected to P1, and when 2 is selected as the multiplex number, P2 is used.
Select Hereinafter, P3 to P5 are selected according to the multiplex number.

When the receiver is configured as described above, there is a problem that the circuit scale increases. SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems in the related art, and uses a method for easily canceling the influence of a multiplex wave, and reduces the circuit scale of a receiver. Providing a system is an issue to be solved.

[0014]

According to a first aspect of the present invention, a predetermined multiplex number, which is settable and variable, is assigned to a transmission data sequence on a transmission side, and each data of the transmission data sequence is spread with the same spreading code. Transmitting means for multiplexing each data obtained by delaying the spread data by a predetermined number of chips (an integer of 1 or more) according to the allocation of the multiplexing number, performing predetermined modulation processing on the multiplexed data, and transmitting the multiplexed data; With, on the receiving side, the received signal received is demodulated by a demodulation method according to the modulation performed by the means on the transmitting side, and the obtained signal is despread with the same spreading code used by the means on the transmitting side, A multi-rate delay multiplexing spectrum direct spread communication system including a receiving side means for performing a process of canceling the influence of a multiplexed wave according to the multiplex number allocated by the transmitting side means to the obtained correlation signal. A. Therefore, in spread spectrum communication in which direct spreading is performed, when a signal directly spread with the same spreading code is transmitted after being delayed and multiplexed by an arbitrary number of chips, the number of multiplexes whose setting is variable in the transmission data sequence is arbitrarily set. Assignment, multi-rate, and selection of circuit operation according to the number of multiplexes allocated by the same circuit without having to provide a plurality of cancellation circuits on the receiving side, regardless of which multiplex number is selected on the transmission side. This cancels the influence of the multiplex wave generated on the correlation signal obtained by the despreading.

According to a second aspect of the present invention, in the first aspect of the present invention, the transmitting unit further incorporates and transmits a signal indicating the multiplex number assigned by setting to a predetermined data portion of a transmission data format. And the receiving side means further comprises means for detecting the multiplex number data incorporated in the transmission data format from the received signal, and controlling the operation of canceling the influence of the multiplex wave by the obtained detection signal. This is a multi-rate delay multiplexing spectrum direct spread communication system. Therefore, at the time of multi-rate conversion, the transmitting side inserts and transmits data indicating the number of multiplexes allocated in the transmission data format, and the receiving side has means for demodulating the number of multiplexes from the data. By using the data as a control signal for a circuit for performing processing for canceling the influence of the multiplex wave, the canceller for reducing the influence of the multiplex wave according to claim 1 is operated.

[0016] The invention of claim 3, in claim 1 or 2, wherein the transmitting-side unit further on the basis multiplex number assigned by setting, performing the multiplexing of data in the delay amount of a combination of Jo Tokoro Means, the receiving means further comprising: a multiplex number assigned by the transmitting means;
Blocking allows you to handle the effects of multiple waves internally
This is a multi-rate delay multiplexing spectrum direct spread communication system including means for performing an operation of canceling the influence of a multiplex wave in accordance with the delay amount of such a combination. Therefore, on the transmitting side, multiplexing is performed by controlling the number of delay chips so that the multiplexed wave can be blocked for each multiplexing number, and on the receiving side, the correlation signal obtained by despreading is blocked by the number of multiplexing blocks. The canceling operation in item 1 or 2 is performed, and the same circuit can cancel the influence of the multiplex wave without providing a plurality of canceling circuits.

According to a fourth aspect of the present invention, in the first aspect of the present invention, the means for canceling the influence of the multiplex wave comprises a delay element and a data selector, and the delay element is provided with the correlation signal. And a function of outputting the correlation signal data that does not affect the demodulation of the data from the correlation signal by a set multiplexing number. A multi-rate delay having a function of selecting the correlation signal data affecting demodulation of data from the correlation signal, and a function of selecting the correlation signal data to be latched according to a set multiplex number. A multiplexed spectrum direct spread communication system. Therefore,
Data before and after in a data sequence of correlation values obtained by despreading is generated by a delay element, and either data before or after generation can be selected by a data selector, and the operation of the delay element according to the number of multiplexes In addition, by controlling the operation of the data selector, data selection processing required for cancellation is performed.

[0018]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of a delay multiplexing spread spectrum direct spread communication system according to the present invention. FIG. 1 is a block diagram showing a receiving system of a first embodiment of a delay multiplexing type direct spread spectrum communication system according to the present invention. Here, the transmission system shown in FIG. 7 is used. In FIG. 1, components other than a multi-rate caster unit 51 and a multiplex number selecting unit 52 are the same as those shown in the conventional example, and a description thereof will be omitted.
In the following description, to simplify the description, the code used for spreading is assumed to be an 11-chip Barker code, and the number of multiplexes for realizing a multi-rate is assumed to be 5 types of 1 to 5 multiplexes. The interval (the number of chips) is determined as shown in the table below, and an embodiment exemplified by such numerical values will be described.

[0019]

[Table 1]

When the transmitter is configured according to Table 1 above,
The number of delay chips of the delay unit shown in FIG. 1 is 0 chip, 6 chips for 2 multiplexing, 0 chip, 5 chips, 8 chips for 3 multiplexing, 0 chip, 3 chips, 6 chips, 9 for 4 multiplexing.
Chip, 5 chips, 0 chip, 2 chips, 4 chips,
6 chips and 8 chips.

FIG. 2 is a circuit diagram showing details of the multi-rate canceller unit 51 in FIG. In FIG. 2, reference numerals 51F-1 to 51F-9 denote n-bit delay elements (hereinafter, referred to as n-bit delay elements).
"D-FF"), 51S-6 to 51S-9 are n-bit data selectors for selecting the affected multiplex, and 51S-1 to 51S-4 are for changing the canceller according to the multiplex number. This is an n-bit data selector. Here, n of the n bits is a natural number of 1 or more and indicates an amplitude value of a correlation value, and is appropriately selected according to system accuracy, circuit scale, and the like.

Each of the n-bit D-FFs 51F-1 to 51F-
9 has a CLR input, and when CLR becomes active,
The outputs are all 0. Also, each data selector 51S
Inputs A and B are selected from -1 to 51S-4 and 51S-6 to 51S-9 by a control signal generated by the multiplex number selection unit 52. 51A-1 and 51A-2 are adders;
D is a divider. The multiplex number selection unit 52 is a circuit that sets the multiplex number selected on the transmission side in the receiver. The data selectors 51S-1 to 51S-
4, 51S-6 to 51S-9 and the CLR signal are controlled.

The operation of the multi-rate canceller 51 according to the multiplex number will be described. First, one multiplexing (when there is no multiplexed wave) will be described. In this case, there is actually no need for cancellation because there is no multiplex wave. Therefore, the data selectors 51S-1 to 51S-4 are all controlled by the control signal so as to select A, and the CLR of all the D-FFs except 51F-5 becomes active. The data selectors 51S-6 to 51S-9 have no effect.

In the case of two multiplexing, one of the data before and after the demodulated data affects the demodulated data.
Therefore, the data selector 51S-1 is controlled by the control signal to select B, and the data selectors 51S-2 to 51S-4 are controlled by the control signal to select A. Also, D-FFs 51F-2 to 51-51
The outputs of F-4 and 51F-7 to 51F-9 all become 0 due to CLR. Data selectors 51S-7 to 51S-
The output of 9 has no effect.

The data selector 51S-6 controls the selection by the overlap of the multiplexed waves of the demodulated data. However, if the data to be demodulated is delayed by six chips from the previous data, the data selector 51S-6 operates. Control is performed so that A is selected, and B is selected in the case of 5 chips later. After passing through the adder 51A-1, the data is divided by 11 in the divider 51D and added to the data to be demodulated by the adder 51A-2. As a result, when the influence of the multiplex wave is two-way multiplexing, it can be canceled.

In the case of triple multiplexing, one of the two data before and after the demodulated data affects the demodulated data.
Therefore, the data selectors 51S-3 and 51S-4 output A,
The data selectors 51S-1 and 51S-2 are controlled by a control signal so as to select B. Also, D-FF5
1F-3, 51F-4, 51F-8, 51F-9 are CL
The output becomes all 0 by R. Data selector 51S
The output of -1, 51S-2 has no effect.

Data selectors 51S-3, 51S-4
Is that the selection is controlled by the overlap of the multiplexed waves of the demodulated data.
If the data is delayed by a chip and is delayed by 6 chips from the immediately preceding data, the data selector 51S-7 is controlled to select B and the data selector 51S-6 is controlled to select A.
In this case, since the number of delay chips is all odd, the control of the data selectors 51S-7 and 51S-6 is not affected by the multiplex pattern, and the selector 51S-7 selects B and the selector 51S-6 selects A. . Then, the outputs of both selectors are added by an adder 51A-1, and divided by 10 in a divider 51D, and added to data to be demodulated. As a result, when the influence of the multiplex wave is three-way multiplexing, it can be canceled.

In the case of four multiplexing, one of the three data before and after the demodulated data affects the demodulated data.
Therefore, data selector 51S-4 sets A to 51S-1 to 51S-5.
1S-3 is controlled by a control signal to select B. The D-FFs 51F-4 and 51F-9 are CLR
, The outputs are all zero. Data selector 51S-
9 has no effect.

Data selectors 51S-6 to 51S-8
Is that selection control is performed by the overlap of demodulated data with a large number of waves.
If the data is delayed by a chip, delayed by 5 chips from the data two seconds before, and delayed by 8 chips from the data before three, the data selector 51S-8 selects B, and the data selector 51S
-7 is controlled to select A, and the data selector 51S-6 is controlled to select B.

If the data to be demodulated is 3
If the data is delayed by a chip, delayed by 5 chips from the data two seconds before, and delayed by 8 chips from the data before three, the data selector 51S-8 selects B, and the data selector 51S
-7 is controlled to select A, and the data selector 51S-6 is controlled to select A.

If the data to be demodulated is 3
When the data is delayed by a chip, delayed by 6 chips from the data two data before, and delayed by 8 chips from the data three data before, the data selector 51S-8 selects B, and the data selector 51S
-7 is controlled to select B, and the data selector 51S-6 is controlled to select A.

If the data to be demodulated is 3
If the data is delayed by a chip, delayed by 6 chips from the data two data before, and delayed by 9 chips from the data three data before, the data selector 51S-8 selects A, and the data selector 51S
-7 is controlled to select B, and the data selector 51S-6 is controlled to select A. The outputs of the three selectors are added by an adder 51A-1, divided by 9 in a divider 51D, and added to data to be demodulated. As a result, when the influence of the multiplex wave is four multiplexes, it can be canceled.

In the case of five multiplexing, one of four data before and after the demodulated data affects the demodulated data.
Therefore, the data selectors 51S-1 to 51S-4 are controlled by the control signal so as to select B. The data selectors 51S-6 to 51S-9 control the selection by the overlap of the multiplexed waves of the demodulated data. However, the data to be demodulated is delayed by three chips from the previous data and is shifted from the data before by two chips. If the data is delayed by 5 chips, delayed by 7 chips from the data three data before, and delayed by 9 chips from the data four data before, the data selector 51S-9 selects A and the data selector 51S-8 selects A. , Data selector 51S-
7 is controlled to select A, and the data selector 51S-6 is controlled to select A.

If the data to be demodulated is 2
When the data is delayed by 5 chips from the data two chips before, by 7 chips from the data before three chips, and by nine chips from the data before four chips, the data selector 51S
-9 selects A, the data selector 51S-8 selects A, the data selector 51S-7 selects A, and the data selector 51S-6 selects B.

The data to be demodulated is 2
If the data is delayed by a chip, delayed by 4 chips from the data before two, delayed by seven chips from the data before three, and delayed by nine chips from the data before four, the data selector 51S
-9 selects A, the data selector 51S-8 selects A, the data selector 51S-7 selects B, and the data selector 51S-6 controls B.

If the data to be demodulated is 2
If the data is delayed by a chip, delayed by four chips from the data two data earlier, delayed by six chips from the data three data earlier, and delayed by nine chips from the data four data earlier, the data selector 51S
-9 is controlled to select A, the data selector 51S-8 selects B, the data selector 51S-7 selects B, and the data selector 351S-6 is controlled to select B.

If the data to be demodulated is 2
When the data is delayed by four chips from the data two chips before, six chips from the data three days before, and eight chips from the data four days before, the data selector 51S
-9 selects B, the data selector 51S-8 selects B, the data selector 51S-7 selects B, and the data selector 51S-6 is controlled to select B. The outputs of the three selectors are added by the adder 51A-1, divided by 8 in the divider 51D, and added to the data to be demodulated. As a result, when the influence of the multiplex wave is three-way multiplexing, it can be canceled.

Here, the number used for the division is appropriately changed depending on the multiplex number, and the selection method is described in Japanese Patent Application No. 8-209917 already filed by the present applicant.

In the disclosure of Japanese Patent Application No. 8-209917, one of the methods of selecting a numerical value used for division is a method using a spreading factor. The method uses a spreading code used for spectrum spreading. Regardless of odd correlation or even correlation, when using a code that is uniquely determined by one of the preceding data and the following data, the data of (multiplex number -1) before and after the correlation centering on the correlation to be canceled The correlation of the timing is maintained, the previous data and the subsequent data are selected, and the correlation values of the uniquely determined previous and subsequent data are selected, added, divided by the spreading factor, and the correlation value to be canceled is obtained. The addition and subtraction cancel the side lobe of the autocorrelation.

Further, here, PDI (Post Detection)
In the case of demodulation using an Integrator, the data timing correlation for each (multiplex number) is held before and after the correlation corresponding to the PDI to be canceled, and the data before and after are determined uniquely. Select and add the correlation value of, divide by the spreading factor, and cancel P
By adding / subtracting the DI timing correlation value,
Auto-correlation side lobes can be canceled.

When a Barker code is used as a spread code, when a 11-chip code whose side lobe of autocorrelation is a different code is used as a reference signal used for canceling correlation, a numerical value used for division is k. In the case of multiplexing, division is performed by 11−k + 2. When a 13-chip code in which the side lobe of the autocorrelation has the same code as the reference signal used for canceling the correlation is used, the value used for the division is k multiplexed. Sometimes division by 13 + k-2.

Further, when an 11-chip Barker code is used, the numerical value used for division may be set to 8. In arithmetic processing using this numerical value, a division operation is performed by removing the lower three bits and shifting the data by three bits. When a 13-chip Barker code is used, the division value is set to 16, division is performed by dividing the lower 4 bits and shifting the data by 4 bits.

If the canceller is configured and controlled as described above, the multiplexed wave can be canceled by selecting an appropriate multiplexing number on the transmitting side.

FIG. 3 is a block diagram showing a receiving system of a second embodiment of the delay multiplexing type direct spread spectrum communication system according to the present invention. As in the first embodiment, since the transmission system shown in FIG. 7 is used, the description refers to the description related to FIG. In FIG. 3, the header demodulation unit 53
The configuration is the same as that shown in FIGS. 1 and 2 except for the multi-rate canceller unit 51 'adapted to receive the output, and the above description is referred to.

On the transmitting side, data on the number of multiplexes is superimposed on the data format and transmitted. As a data format for this, for example, 1EE80
The data format of 2.11 can be used.
FIG. 4 shows a transmission data format defined in 1EE 802.11. This data format is roughly divided into a header section and a data section. The header section is composed of a bit synchronization section, a frame synchronization section, and the like. In the present invention, the condition is that the multiplex number is embedded in the header section. Set the multiplex number in the speed part). The header demodulation unit 53 of the block diagram 3 showing the reception system demodulates the information of the multiplex number in the header unit, and controls the multi-rate canceller unit 51 'by the data. In this way, the multiplex number can be selected according to the propagation environment such as packet communication.

FIG. 5 is a block diagram showing a third embodiment of the delay multiplexing type direct spread spectrum communication system according to the present invention. As in the first embodiment, since the transmission system shown in FIG. 7 is used, the description refers to the description related to FIG. In FIG. 5, the operation of each unit except the multi-rate canceller unit 54 is the same as that shown in the first embodiment, and the description of the first embodiment will be referred to.

When performing multiplexing by the delay multiplexing method,
For each multiplexing number, block processing is performed so that the effects of multiplex waves can be processed in the block. A detailed description of such blocking is disclosed in Japanese Patent Application No. 8-209917 filed by the same applicant as the present applicant.

In the blocking method disclosed in Japanese Patent Application No. 8-209917, the correlation value obtained by the correlation processing is divided into blocks by the number of multiplexes, and when one of the blocked data is canceled, it is not necessary. The amount of delay is controlled so that all combinations of preceding and succeeding data can be processed with the data in the block. Correlation is retained only for the block, and correlation values other than the signal to be canceled are selected from the correlation values. Is selected to perform a cancel calculation process.

In order to perform the processing by blocking, it is necessary to select a code to be used and a delay amount.
In order to configure using a one-chip Barker code, it is necessary to set a delay interval (expressed by the number of chips) as follows.

[0050]

[Table 2]

FIG. 6 is a circuit diagram showing details of the multi-rate canceller unit 54 in FIG. In FIG. 6, 54F-1 to 54F-6 are n-bit D-FFs, 54S
Reference numerals -1 to 54S-4 denote n-bit data selectors (data selector group II) for changing the canceller according to the multiplex number. n-bit D-FF54F-1 to 5
4F-6 has a CLR input similarly to the above-described embodiment, and when CLR becomes active, all outputs become 0. Further, the data selectors 54S-1 to 54S-4 select the inputs A and B by the control signal. 54A-
1, 54A-2 is an adder, and 54D is a divider.

The operation of the canceller according to the multiplex number will be described below with reference to FIG. In the case of single multiplexing, it is not necessary to cancel the influence of the multiplexed wave, so that all the data selectors 54S-1 to 54S-4 are controlled so that A is selected. DLRs 54F-1 to 54F-4 other than the D-FF 54F-5 have CLR activated and output 0.

Blocks are configured for 2 to 5 multiplexing. 2 waves in 2 multiplex, 3 waves in 3 multiplex
Wave, and so on. The D-FF 54F-6 is controlled so as to latch the added value when all the multiplexed waves forming the block are input to the delay unit. This does not depend on the multiplex number.

In the case of two multiplexing, the data selector 54S-1
54S-3 selects A, and 54S-4 selects B. The D-FFs 54F-1 to 54F-3 are CL
R becomes active and outputs 0. When the two waves constituting the block are latched by the D-FFs 54F-4 and 54F-5, the D-FF 54F-6 latches the output of the adder 54A-1. Then, after being divided by 10 in the divider 54D, it is added to the demodulated data in the adder 54A-2, so that the influence of the multiplex wave can be canceled.

In the case of triple multiplexing, the data selector 54S-
1, 54S-2 selects A, and 54S-3, 54S-4
Selects B. In addition, D-FF54F-1, 54F-
In 2, the CLR becomes active and outputs O. When the three waves constituting the block are input to the D-FFs 54F-3 to 54F-5, the D-FF 54F-6 outputs the adder 54A-1.
Latch the output of. Then, after dividing by 9 in the divider 54D, the result is added to the demodulated data in the adder 54A-2 to cancel the influence of the multiplex wave.

In the case of 4-multiplexing, the data selector 54S-1
Selects A, and 54S-2 to 54S-4 select B. Also, the D-FF 54F-1 activates the CLR and outputs 0. The four waves that make up the block are D-FF
When input to 54F-2 to 54F-5, the D-FF 54
F-6 latches the output of adder 54A-1. Then, after dividing by 8 in the divider 54D, the result is added to the demodulated data in the adder 54A-2 to cancel the influence of the multiplex wave.

In the case of five multiplexing, the data selector 54S-1
５４54S-4 all select B. When the five waves constituting the block are input to the D-FFs 54F-1 to 54F-5, the D-FF 54F-6 latches the output of the adder 54A-1. Then, after dividing by 7 in the divider 54D, the result is added to the demodulated data in the adder 54A-2 to cancel the influence of the multiplex wave. As described in the first embodiment, the selection of the value of the divider is
Japanese Patent Application No. 8-2099 filed by the same applicant as the present applicant
No.17.

One of the methods of selecting numerical values used for division disclosed in Japanese Patent Application No. 8-209917 uses a spreading factor. That is, when a correlation value obtained by performing a correlation process on a received spread signal is divided into blocks by the number of multiplexes, and one of the blocked data is canceled, all other combinations of the preceding data and the succeeding data are included in the block. The amount of delay is controlled so that it is processed with the data, and the correlation is held for the number of blocks, and among the correlation values, correlation values other than the signal to be canceled are selected, added, and divided by the spreading factor. Then, the side lobe of the autocorrelation is canceled by adding or subtracting the correlation value to be canceled. When performing the same blocking as described above, all the data of the block to which the data to be canceled belongs is added, divided by the spreading factor, and added to the correlation value to be canceled, thereby canceling the side lobe of the autocorrelation. May be used.

Here, the case where the Barker code is used will be described. When using an 11-chip code in which the side lobe of the autocorrelation is a different code as a reference signal used for canceling the correlation, the value to be divided is k-multiplexed. In this case, the value is divided by 11−k + 1, and when a 13-chip code having the same code as the reference signal used to cancel the auto-correlation sidelobe is used to cancel the correlation, the value to be divided is 13 + k− when k-multiplexing. It is good to divide by 1. In the case of this embodiment, the circuit scale can be reduced as compared with the first embodiment,
Alternatively, control by a switch can be simplified.

[0060]

According to the first aspect of the present invention, in the canceller for converging the variation of the correlation output due to the multiplex wave, the selection of the correlation output data and the processing thereof are performed according to the multiplex number set on the transmission side. Therefore, even when multi-rate transmission is performed, it is possible to demodulate received data under optimum conditions and to minimize the number of circuits, and realize high-speed data communication with a low error rate even in spread spectrum communication. It is possible to do.

Effect corresponding to claim 2: In addition to the effect corresponding to claim 1, by incorporating a predetermined part of the transmission data format together with the transmission information, for example, multiplex number data corresponding to the propagation environment for each frame. Thus, it is possible to provide an effective embodying means for automatically setting the canceller means under optimum conditions.

Advantages Corresponding to Claim 3: Claims 1 and 2
In addition to the effect corresponding to the above, by performing the blocking process on the multiplexed signal which has the variation due to the multiplex wave in order to select the optimal data and the process according to the multiplexing number set by the canceller means. The circuit size of the canceller can be further reduced, and the control is simplified.

Advantageous Effect Corresponding to Claim 4: In addition to the effect corresponding to any one of claims 1 to 3, a simple circuit element is used as a concrete means of the canceller means, and an effective implementation means is provided. be able to.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a receiving system according to a first embodiment of a delay multiplexing type direct spread spectrum communication system according to the present invention.

FIG. 2 is a multi-rate canceller section 51 in FIG.
FIG. 3 is a circuit diagram showing details of the embodiment.

FIG. 3 is a block diagram showing a receiving system according to a second embodiment of the delay multiplexing type direct spread spectrum communication system according to the present invention;

FIG. 4 is a diagram showing a transmission data format defined in 1EE 802.11.

FIG. 5 is a block diagram showing a third embodiment of a delay multiplexing type direct spread spectrum communication system according to the present invention;

FIG. 6 shows a multi-rate canceller section 54 in FIG.
FIG. 3 is a circuit diagram showing details of the embodiment.

FIG. 7 is a diagram illustrating an example of a transmission system of a direct spread spectrum communication system using a delay multiplexing method.

FIG. 8 is a diagram illustrating a conventional example of a receiving system of a direct spread spectrum communication system using a delay multiplexing method.

9 is a diagram showing a conventional example in which a canceller corresponding to a multi-rate is used in the canceller unit in FIG.

[Explanation of symbols]

19, 112 ... antenna, 32, 132 ... RF / IF converter, 33, 133 ... IF / BB converter, 34, 134
... Correlator, 35,135 ... Correlation synchronization circuit, 36,136
... Latch section, 38,138 ... Differential demodulation section, 39,139
... Discriminator, 51, 51 ', 54 Multi-rate canceller, 51A-1, 51A-2, 54A-1, 54A
-2: adder, 51D, 54D: divider, 51S-1 to 51S-1
51S-4, 51S-6 to 51S-9, 54S-1 to 5
4S-4: data selector, 52: multiplex number selection unit, 53
... header demodulation unit, 101 ... data generation unit, 102 ... differential encoding unit, 103 ... serial-parallel conversion unit, 104
-1 to 104-5: multiplier, 105: PN generator, 10
6-1 to 106-5: delay element, 107: multiplexer, 10
8: modulator; 110: frequency converter; 111: power amplifier; 137: canceller; 141-144: canceller corresponding to each multiplex number; 201-207: delay element.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04J 13/00

Claims (4)

(57) [Claims] 1. A transmission side is assigned a predetermined multiplex number which is set to be variable to a transmission data sequence, spreads each data of the transmission data sequence with the same spreading code, and divides the spread data into the multiplex number. A predetermined number of chips (1
The transmission side means for multiplexing each data delayed by the above integer), performing predetermined modulation processing on the multiplexed data and transmitting the multiplexed data, and performing the reception signal received on the reception side by the transmission side means. Demodulated by a demodulation method corresponding to the modulation, the obtained signal is despread with the same spreading code used by the transmitting means, and the obtained correlation signal is determined according to the number of multiplexes assigned by the transmitting means. A multi-rate delay multiplexing spread spectrum direct spread communication system including a receiving side means for performing a process of canceling the influence of a multiplexed wave by using the receiving side means. 2. The transmitting means further includes means for incorporating a signal indicating the multiplex number assigned by setting to a predetermined data portion of a transmission data format and transmitting the signal, and the receiving means further comprises: Detects the multiplex number data embedded in the transmission data format from the received signal,
The multi-rate delay multiplexing spread spectrum direct spread communication system according to claim 1, further comprising means for controlling an operation of canceling the influence of the multiplex wave by the obtained detection signal. Wherein said transmitting side unit further on the basis multiplex number assigned by setting comprises means for performing the multiplexing of the data delay amount of a combination of Jo Tokoro, the receiving unit may further The number of multiplexes assigned by the transmitting side means and the influence of multiplexed waves by being blocked are processed internally.
The multi-rate delay multiplexing spread spectrum direct spread communication system according to claim 1 or 2, further comprising means for performing an operation of canceling the influence of the multiplex wave in accordance with a delay amount of a combination that can be controlled . 4. The means for canceling the influence of the multiplex wave comprises a delay element and a data selector, wherein the delay element has a function of latching the correlation signal data affecting demodulation of data from the correlation signal. A function of outputting the correlation signal data that does not affect the demodulation of the data from the correlation signal by the set multiplexing number, wherein the data selector has an effect of affecting the demodulation of the data from the correlation signal. 4. The apparatus according to claim 1, further comprising a function of selecting correlation signal data, and a function of selecting the correlation signal data to be latched according to a set multiplex number.
A multi-rate delay multiplexing spread spectrum direct spread communication system as described.