JP3347086B2 - Satellite broadcast receiving unit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiving unit, and more particularly to a satellite broadcasting receiving unit for receiving satellite broadcasting.

[0002]

2. Description of the Related Art A conventional satellite broadcast receiving unit 90 will be described with reference to FIG. FIG. 9 is a diagram showing a configuration of a main part of a conventional satellite broadcast receiving unit 90. As shown in FIG. Referring to FIG. 9, a conventional satellite broadcast receiving unit 90 includes a plurality of functional blocks 91a, 91b, 91c,..., 91n.
These functional blocks 91a, 91b, 91c,
, 91n perform an operation for receiving a satellite broadcast.

[0003] A microprocessor 96 controls the operation of a plurality of functional blocks. The microprocessor 96 further controls the operation of the power supply circuit 95. Power supply circuit 95
Supplies power to the power terminals 94a, 94b, 94c,..., 94n under the control of the microprocessor 96. Functional blocks 91a, 91b, 91c, ..., 91n
Of the corresponding power terminals 94a, 94b, 94
,..., 94n.

A plurality of functional blocks 91a, 91b, 91
Each of c, ..., and 91n is not always operated. For this reason, in the conventional satellite broadcast receiving unit 90, a power supply terminal corresponding to each functional block is provided, and in some cases, power is individually supplied to only necessary functional blocks, thereby saving power.

[0005]

However, since the conventional satellite broadcast receiving unit 90 is configured as described above, it is necessary to arrange a power supply terminal for each functional block. In this case, it is not possible to meet the demands for miniaturization and further compounding of functions required from the market. In addition, there is a problem that the external power supply design becomes complicated as the number of power supply terminals increases.

SUMMARY OF THE INVENTION Therefore, the present invention has been made to solve the above-described problems, and has as its object to meet the demands for power saving, miniaturization, and multifunctionality, and to design an external power supply. It is to provide a satellite broadcast receiving unit that can be facilitated.

[0007]

Satellite receiver unit according to claim 1 Means for Solving the Problems] is a satellite receiver unit for receiving satellite broadcasting based on the control of an external microprocessor, a power supply terminal for receiving an external power supply, RF R to receive the signal
F input terminal and RF output terminal to output RF signal to outside
A plurality of functional blocks for performing operations related to the reception of satellite broadcasts, and a power supply switching means for selectively supplying external power received at a power supply terminal to each of the plurality of functional blocks based on control of a microprocessor , Multiple function blocks
Block demodulates video and audio signals from RF signals
Signal processing means, and an RF signal received at an RF input terminal.
Distribute and output to signal processing means or RF output terminal
And a power supply switching means.
Receiving means for receiving control data corresponding to the received broadcast from the server
And multiple power switches that receive external power from the power terminals
And each of the plurality of power switches is
Signal processing means
The power switch corresponding to the step is based on the output of the receiving means
Turn on to supply external power to the signal processing means,
The signal processing means converts the output of the distribution means to a baseband signal.
A demodulating baseband signal processing means;
Signal processing means for receiving a signal and demodulating a video signal
And the sound that receives the baseband signal and demodulates the audio signal
Power supply including voice signal processing means and corresponding to the signal processing means
The switch is a first switch corresponding to the baseband signal processing means.
And a second switch corresponding to the video signal processing means.
Switch and a third switch corresponding to the audio signal processing means
And an RF output terminal for receiving an RF signal received at the RF input terminal.
Output from the first switch and the second switch.
Switch and the third switch are turned off.

Therefore, in a satellite broadcasting receiving unit having a complex function, power can be selectively supplied without providing a power terminal for each functional block. As a result, it is possible to satisfy the demand for power saving and multifunction. Further, since it is not necessary to provide a power supply terminal for each functional block, external power supply design can be facilitated. In addition, other than the function block that performs distribution
Regarding the function block,
Power can be supplied to the function block or stopped
You. This will enable power savings for specific broadcasts.
Become. Furthermore, the RF signal is not demodulated and sent to other units.
When transmitting, the function block after the block having the distribution function
Demodulation to baseband signal, demodulation of video signal and
And demodulation of audio signals) can be stopped.
It works. This makes it possible to save power.
You.

[0009]

[0010]

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[0020]

[0021]

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[0027]

[0028]

[0029]

DESCRIPTION OF THE PREFERRED EMBODIMENTS [First Embodiment] An outline of a satellite broadcast receiving unit 1 according to a first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a schematic block diagram showing a configuration of a main part of satellite broadcast receiving unit 1 according to Embodiment 1 of the present invention.

Referring to FIG. 1, satellite broadcast receiving unit 1
Includes a plurality of functional blocks. FIG. 1 illustrates an RF distribution function unit 2, a front end unit 3, a signal switching function unit 4, a video signal processing unit 5, an audio signal processing unit 6, and a power supply switching unit 7 as representatives of functional blocks. I have. These plurality of functional blocks perform operations related to the reception of satellite broadcasts under the control of the external microprocessor 46. The satellite broadcast receiving unit 1 has a single power terminal 4
4 inclusive. The power supply terminal 44 receives power supply from a power supply circuit 45 arranged outside. The power supply circuit 45 supplies power to the power supply terminal 44 under the control of the microprocessor 46.

The RF distribution function unit 2 distributes an RF signal received from the RF input terminal 8 and outputs the RF signal to the RF output terminal 9 or the front end unit 3. The front end part 3 is R
The F signal is demodulated into a baseband signal. The front end unit 3 is connected to a microprocessor 4 via a bidirectional bus I2.
6 is connected.

The signal switching function unit 4 outputs a bit stream signal received from the bit stream input terminal 27 or a bit stream signal demodulated internally from the bit stream output terminal 29 to the outside. The signal switching function unit 4 further outputs a baseband signal received from the baseband input terminal 26 or a baseband signal demodulated internally from the baseband output terminal 28 to the outside.

The video signal processing section 5 demodulates a baseband signal received from the front end section 3 into a video signal. The video signal is output from the video output terminal 34 to the outside. The audio signal processing unit 6 demodulates the baseband signal received from the front end unit 3 into an audio signal and a bit stream signal. The audio signal is output to the outside from the audio output terminal 39, and the bit stream signal is output to the signal switching function unit 4. The audio signal processing section 6 is connected to the microprocessor 46 via the bidirectional bus I2.

The power switch 7 is connected to a power circuit 45 via a power terminal 44. The power switch unit 7 includes power switches 40a, 40b, 4
0c, 40d and 40e. The power supply switch unit 7 is connected to the microprocessor 4 via the bidirectional bus I2.
6 receives control data. Each of the power switches is turned on / off based on the control data, so that the functions of the RF distribution function unit 2, the front end unit 3, the signal switching function unit 4, the video signal processing unit 5, and the audio signal processing unit 6 are performed. Power is selectively supplied to the blocks.

Here, the details of each functional block will be described. FIG. 2 is a diagram showing an example of a specific configuration of the power supply switch unit 7 shown in FIG. 1, and also shows the relationship with the microprocessor 46 for reference. Referring to FIG. 2, power supply switch unit 7 includes a power switch 40.
a, 40b, 40c, 40d and 40e, a control gate 41, a latch circuit 42, and a bus transceiver 43. The power supply terminal 44 is connected to the switches 40a, 40b, 40
c, 40d and 40e, a control gate 41, a latch circuit 42, and a bus transceiver 43.

The bus transceiver 43 includes a bidirectional bus I2
, The control data output from the microprocessor 46 is received. The latch circuit 42 includes a bus transceiver 43
Latch the control data received by. The control gate 41
Based on the control data latched by the latch circuit 42, the power switches 40a, 40b, 40c, 40d and 40e
Are turned on / off, respectively.

Power switches 40a, 40b, 40c, 4
Od and 40e are composed of transistors, and each emitter terminal is connected to the power supply terminal 44. Power switches 40a, 40b, 40c, 40d and 40e
Are connected to the corresponding functional blocks.
When the power switch is turned on, power is supplied to the corresponding function block. Specifically, the RF distribution function unit 2 is a power switch 40a, the front end unit 3 is a power switch 40b, and the audio signal processing unit 6 is a power switch 40a.
c, The video signal processing unit 5 receives power supply via the power switch 40d, and the signal switching function unit 4 receives power supply via the power switch 40e.

FIG. 3 is a diagram showing an example of a specific configuration of the RF distribution function unit 2 shown in FIG. Referring to FIG.
The distribution function unit 2 includes a high-pass filter 10, an RF amplifier 1
1 and a distributor 12. The RF signal received from the RF input terminal 8 is amplified by the RF amplifier 11 after passing through the high-pass filter 10. Distributor 12 is an RF amplifier 11
And distributes it. One signal output from the distributor 12 is output to the front end unit 3, and the other signal is output from the RF output terminal 9 to the outside. R
The F output terminal 9 is connected to the R of another satellite broadcast receiving device (not shown).
Connected to F input terminal. The RF distribution function unit 2 operates by receiving power supply via the power switch 40a as described above.

FIG. 4 is a diagram showing an example of a specific configuration of the front end unit 3 shown in FIG. 1, and also shows the relationship with the microprocessor 46 for reference. Referring to FIG. 4, the front end unit 3 includes an attenuator 13,
Variable bandpass filter 14, mixer 15, local oscillator 16, PLL synthesizer 17, IF amplifier 19, IF
A band pass filter 20 and an FM demodulator 21 are included.

The signal received from the RF distribution function unit 2 passes through an attenuator 13 and a variable band-pass filter 14, is input to a first down-converter mixer 15, and is mixed with a local oscillation signal supplied from a local oscillator 16. Is done.

The PLL synthesizer 17 has a bidirectional bus I
2 and the microprocessor 46.
The PLL synthesizer 17 receives the local oscillation signal output from the local oscillator 16 and the variable bandpass filter 1 based on the data sent from the microprocessor 46.
4 to output a control signal for setting the center frequency.
The PLL synthesizer 17 further switches H (high impedance) / L (low impedance) of the logical output port 18 based on the data sent from the microprocessor 46. The voltage level (H / L) of the logical output port 18 is used for switching an external unit (not shown).

The mixer 15 outputs an intermediate frequency (IF) signal which is the frequency of the difference between the two signals described above. This IF signal is band-limited by passing through the IF amplifier 19 and the IF band-pass filter 20. The output of the IF band-pass filter 20 is FM-detected by the FM demodulator 21 and becomes a baseband signal. The baseband signal is supplied to the signal switching function unit 4 and the video signal processing unit 5
And output to the audio signal processing unit 6. The front end unit 3 operates by receiving power supply via the power switch 40b as described above.

FIG. 5 is a diagram showing an example of a specific configuration of the signal switching function unit 4 shown in FIG. Referring to FIG. 5, signal switching function unit 4 includes changeover switches 22 and 23 and buffer amplifiers 24 and 25. The buffer amplifier 24 includes a baseband output terminal 28 and a switch 2
2 is connected between them. The buffer amplifier 25 is connected between the bit stream output terminal 29 and the switch 23.

The changeover switch 22 receives the baseband signal received from the baseband input terminal 26 or the baseband signal received from the front end unit 3 and transmits the received signal to the buffer amplifier 2.
4 is output. The buffer amplifier 24 includes the changeover switch 2
2. amplify the baseband signal received via

The switch 23 outputs a bit stream signal received from the bit stream input terminal 27 or a bit stream signal received from the audio signal processing unit 6 to the buffer amplifier 25. The buffer amplifier 25 amplifies a bit stream signal received via the changeover switch 23.

The output (baseband signal) of the buffer amplifier 24 is output from a baseband output terminal 28 to the outside. The output (bit stream signal) of the buffer amplifier 25 is output from a bit stream output terminal 29 to the outside. The signal switching function unit 4 receives power supply via the power switch 40e and operates as described above.

FIG. 6 is a diagram showing an example of a specific configuration of the video signal processing section 5 shown in FIG. Referring to FIG. 6, video signal processing unit 5 includes a de-emphasis circuit 30, a clamp circuit 31, a video filter 32, and a video amplifier 33. The baseband signal output from the front end unit 3 is subjected to de-emphasis and clamp processing by passing through a de-emphasis circuit 30 and a clamp circuit, and is further converted into a video signal by passing through a video filter 32. You. Video filter 3
The video signal output from 2 is amplified by a video amplifier 33 and output from a video output terminal 34 to the outside. The video signal processing unit 5 includes the power switch 40d as described above.
It operates by receiving power supply via the.

FIG. 7 is a diagram showing an example of a specific configuration of the audio signal processing section 6 shown in FIG. 1, and shows the relationship with the microprocessor 46 for reference. Referring to FIG. 7, audio signal processing unit 6 includes QPSK demodulation circuit 35, PC
An M demodulation circuit 36, a D / A converter 37 and an audio filter 38 are included. The baseband signal output from the front end unit 3 is output to the QPSK demodulation circuit 35 and the PCM
By passing through the demodulation circuit 36, QPSK demodulation, P
CM demodulation is performed.

A main sound, a sub sound, and an independent sound are selected based on data received from the microprocessor 46 via the bidirectional bus I2. The D / A converter 37 performs D / A conversion on the signal demodulated according to the selection. D /
The output of the A-converter 37 is converted into an audio signal by passing through the audio filter 32. The audio signal is output from the audio output terminal 39 to the outside. PCM demodulation circuit 3
The bit stream signal output from 6 is output to the signal switching function unit 4. The audio signal processing unit 6 operates by receiving power supply via the power switch 40c as described above.

Next, an example of the operation of satellite broadcast receiving unit 1 according to Embodiment 1 of the present invention will be described. M
A case where a high definition broadcast of the USE (Multiple sub-Nyquist sample encoding) system is received will be described.
The broadcasting system is different between the MUSE system high-definition broadcasting and the normal NTSC broadcasting. The video signal processing unit 5 and the audio signal processing unit 6 correspond to the NTSC broadcasting. For the MUSE high-definition broadcasting, the video signal and the audio signal are transmitted by a MUSE decoder or M-N converter (not shown) of another unit. Is demodulated.

Therefore, when receiving the MUSE high definition broadcast, the power supply to the video signal processing unit 5 and the audio signal processing unit 6 is stopped. More specifically, when receiving a MUSE high-definition broadcast,
The switches 40d and 40c are turned off based on the control data output from the microprocessor 46. Note that the microprocessor 46 generates the control data based on, for example, a broadcast channel (BS-9CH). By operating in this manner, power consumption is reduced by about 3
It is possible to reduce 0%.

Further, another example of the operation of satellite broadcast receiving unit 1 according to Embodiment 1 of the present invention will be described. Scrambled JSB (Japan Satellite
Broadcasting) A case of receiving a broadcast will be described.
The broadcast system differs between the scrambled JSB broadcast and the normal NTSC broadcast. The above-described video signal processing unit 5 is compatible with NTSC broadcasting, and uses a separate unit JS (not shown) for scrambled JSB broadcasting.
The video signal is demodulated by the B decoder.

Therefore, when receiving the JSB broadcast, the power supply to the video signal processing unit 5 is stopped. More specifically, the JSB broadcast sends the presence or absence of scrambling as PCM data (information). The audio signal processing unit 6 uses this PC
Demodulate M data. The demodulated information is transmitted to the bidirectional bus I
2 to the microprocessor 46. The microprocessor 46 generates control data based on the demodulated information. Then, the power switch 40c is turned off based on the control data. With such an operation, it is possible to reduce power consumption by about 15%.

Further, another example of the operation of satellite broadcast receiving unit 1 according to Embodiment 1 of the present invention will be described. A case will be described in which the satellite broadcast receiving unit 1 does not receive a broadcast and distributes an RF signal to another satellite broadcast receiving unit (not shown). In this case, only the RF distribution function unit 2 is required, and other function blocks are not required.

Therefore, power is supplied only to the RF distribution function unit 2 and power supply to the front end unit 3, the signal switching function unit 4, the video signal processing unit 5, and the audio signal processing unit 6 is stopped. More specifically, the microprocessor 46
Power switch 40 based on the control data output from
a is turned on, and the power switches 40b, 40c, 40d and 40e are turned off. By operating in this manner, power consumption can be reduced by about 90%.

An example of another configuration of the power supply switch unit according to the embodiment of the present invention will be described with reference to FIG. FIG. 8 is a diagram illustrating a configuration of a main part of the power supply switch unit according to the embodiment of the present invention. FIG. 8 shows the configuration of the main part of the PLL synthesizer 17 and the relationship with the microprocessor 46 for the sake of explanation.

Referring to FIG. 8, PLL synthesizer 17
Includes a control gate 61, a latch circuit 62, a bus transceiver 63, and a transistor 64. Bus transceiver 63 is connected to microprocessor 46 via bidirectional bus I2. Bus transceiver 63 receives control data from microprocessor 46. Control gate 6
1 is a microprocessor 46 via a latch circuit 62.
Receives the control data transmitted from. Note that the latch circuit 6
2 by the programmable divider 65 receiving the output of
The frequency of the local oscillation signal output from local oscillator 16 is determined.

The transistor 64 has a base connected to the control gate, an emitter connected to the ground potential, and a collector connected to the logic output port 18. Transistor 64
Turns on / off based on the output of the control gate 61. Note that the PLL synthesizer 17 receives power supply from a power supply terminal 44.

The power switch 50 includes a resistor 47 and a transistor 48. Resistor 44 is connected between logic output port 18 and the base of transistor 48. The transistor 48 is connected between the power supply terminal 44 and a power supply input portion of the corresponding function block. The functional block here is, for example, the video signal processing unit 5
Or the audio signal processing unit 6.

As described above, the PLL synthesizer 17 switches the logic output port 18 to H / L based on the control data received from the microprocessor 46. The logic output port 18 of the PLL synthesizer 17 has an open collector configuration. Therefore, by providing the PNP transistor 48 with the overcurrent prevention resistor 47 interposed therebetween, the power of the power supply terminal 44 can be supplied to the corresponding function block based on the control data.

It should be understood that the embodiments disclosed this time are illustrative in all aspects and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

[Brief description of the drawings]

FIG. 1 is a schematic block diagram illustrating a configuration of a main part of a satellite broadcast receiving unit 1 according to Embodiment 1 of the present invention.

FIG. 2 is a diagram showing an example of a specific configuration of a power supply switch unit 7 shown in FIG.

FIG. 3 is a diagram showing an example of a specific configuration of an RF distribution function unit 2 shown in FIG.

FIG. 4 is a diagram showing an example of a specific configuration of a front end unit 3 shown in FIG.

FIG. 5 is a diagram illustrating an example of a specific configuration of a signal switching function unit 4 illustrated in FIG. 1;

FIG. 6 is a diagram showing an example of a specific configuration of a video signal processing unit 5 shown in FIG.

7 is a diagram showing an example of a specific configuration of the audio signal processing unit 6 shown in FIG.

FIG. 8 is a diagram illustrating an example of another configuration of the power supply switch unit according to the embodiment of the present invention.

FIG. 9 is a diagram for explaining a conventional satellite broadcast receiving unit.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 satellite broadcast receiving unit 2 RF distribution function unit 3 front end unit 3 4 signal switching function unit 5 video signal processing unit 6 audio signal processing unit 7, 50 power supply switching unit 8 RF input terminal 9 RF output terminal 17 PLL synthesizer 18 logic Output port 26 Baseband input terminal 27 Bit stream input terminal 28 Baseband output terminal 29 Bit stream output terminal 34 Video output terminal 39 Audio output terminal 40a, 40b, 40c, 40d, 40e Power switch 44 Power terminal 45 Power circuit 46 Microprocessor

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N 5/38-5/63 H04B 1/06 H04B 1/16

Claims (1)

(57) [Claims] 1. A satellite broadcast receiving unit for receiving a satellite broadcast under the control of an external microprocessor , comprising: a power supply terminal for receiving an external power supply; an RF input terminal for receiving an RF signal; An RF output terminal, a plurality of functional blocks for performing an operation related to the reception of the satellite broadcast, and the external power received by the power supply terminal is selectively applied to each of the plurality of functional blocks based on control of the microprocessor. Power supply switching means for supplying , wherein the plurality of functional blocks demodulate a video signal and an audio signal from the RF signal.
A signal processing means for distributing the RF signal received at the RF input terminal;
Signal processing means or distribution to output to the RF output terminal
Means, the power supply switching means includes a control data corresponding to the received broadcast from the microprocessor.
Receiving means for receiving external power from the power terminal.
Switch , wherein each of the plurality of power switches is
The signal processing is provided corresponding to each of the blocks.
The power switch corresponding to the means is connected to the output of the receiving means.
And the signal processing means is turned on based on the
Power is supplied, and the signal processing means demodulates the output of the distribution means into a baseband signal.
Receiving the baseband signal and demodulating the video signal;
A video signal processing means for, receiving said baseband signal, to demodulate the audio signal
And a sound signal processing means that the power switch corresponding to the signal processing means, a first switch corresponding to the baseband signal processing unit
, A second switch corresponding to the video signal processing means, and a third switch corresponding to the audio signal processing means.
The RF signal received at the RF input terminal
Output from the first switch and the second switch.
A satellite broadcast receiving unit for turning off a switch and said third switch .