JP3259811B2 - Production method and a nitride semiconductor device of the nitride semiconductor device - Google Patents

Production method and a nitride semiconductor device of the nitride semiconductor device

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JP3259811B2
JP3259811B2 JP14847095A JP14847095A JP3259811B2 JP 3259811 B2 JP3259811 B2 JP 3259811B2 JP 14847095 A JP14847095 A JP 14847095A JP 14847095 A JP14847095 A JP 14847095A JP 3259811 B2 JP3259811 B2 JP 3259811B2
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nitride semiconductor
substrate
conductive substrate
semiconductor layer
electrode
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修二 中村
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日亜化学工業株式会社
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【発明の詳細な説明】 DETAILED DESCRIPTION OF THE INVENTION

【0001】 [0001]

【産業上の利用分野】本発明は発光ダイオード、レーザダイオード等の発光デバイス、又はフォトダイオード等の受光デバイスに使用される窒化物半導体(In X Al Y The present invention is a light emitting diode BACKGROUND OF THE emitting device such as a laser diode, or photodiode nitride semiconductor (In X Al Y used in the light-receiving device such as a
Ga 1-XY N、0≦X、0≦Y、X+Y≦1)よりなる素子とその製造方法に関する。 Ga 1-XY N, 0 ≦ X, 0 ≦ Y, X + Y ≦ 1) than consisting element and its manufacturing method.

【0002】 [0002]

【従来の技術】窒化物半導体はそのバンドギャップエネルギーが1.9eV〜6.0eVまであるので発光素子、受光素子等の各種半導体デバイス用として注目されており、最近この材料を用いた青色LED、青緑色LE Since BACKGROUND OF THE INVENTION nitride semiconductor the band gap energy is to 1.9eV~6.0eV emitting element has attracted attention as a variety of semiconductor devices such as light receiving elements, recently the blue LED using this material, blue-green LE
Dが実用化されたばかりである。 D has just been put to practical use.

【0003】一般に窒化物半導体素子はMBE、MOV [0003] Generally, a nitride semiconductor device MBE, MOV
PE等の気相成長法を用いて、基板上にn型、p型あるいはi型等に導電型を規定した窒化物半導体を積層成長させることによって得られる。 By a vapor deposition method such PE, n-type on the substrate, obtained by a nitride semiconductor which defines the conductivity type be stacked and grown on a p-type or i-type or the like. 基板には例えばサファイア、スピネル、ニオブ酸リチウム、ガリウム酸ネオジウム等の絶縁性基板の他、炭化ケイ素、シリコン、酸化亜鉛、ガリウム砒素等の導電性基板が使用できることが知られているが、窒化物半導体と完全に格子整合する基板は未だ開発されておらず、現在のところ、格子定数が1 Substrate, for example sapphire, spinel, lithium niobate, another insulating substrate such as neodymium gallate, silicon carbide, silicon, zinc oxide, and conductive substrates such as gallium arsenide are known to be used, nitrides substrate to completely lattice-matched with the semiconductor has not yet been developed, at present, the lattice constant is 1
0%以上も異なるサファイアの上に窒化物半導体層を強制的に成長させた青色、青緑色LED素子が実用化されている。 0% more than the blue which forcibly growing a nitride semiconductor layer on a different sapphire, blue-green LED device have been put to practical use.

【0004】図6は従来の青色LED素子の構造を示す模式的な断面図である。 [0004] FIG. 6 is a schematic sectional view showing a structure of a conventional blue LED element. 従来のLED素子は、基本的にサファイア基板61の上に窒化物半導体よりなるn型層62と活性層63とp型層64とが順に積層されたダブルへテロ構造を有している。 Conventional LED elements are basically has a double heterostructure in which the n-type layer 62 and the active layer 63 made of a nitride semiconductor and a p-type layer 64 are stacked in this order on a sapphire substrate 61. 前記のようにサファイアは絶縁性であり基板側から電極を取り出すことができないので、同一窒化物半導体層表面に正電極65と負電極6 Since the sapphire as it is impossible to take out the electrodes from and substrate side insulating, the positive electrode 65 on the same surface of the nitride semiconductor layer negative electrode 6
6とが設けられた、いわゆるフリップチップ方式の素子とされている。 6 and is provided, which is an element of the so-called flip-chip method.

【0005】 [0005]

【発明が解決しようとする課題】しかしながら、サファイアを基板とする従来のフリップチップ方式の素子には数々の問題点がある。 [SUMMARY OF THE INVENTION However, the elements of the conventional flip-chip method in which the sapphire substrate has a number of problems. まず第一に、同一面側から両方の電極を取り出すためチップサイズが大きくなり多数のチップがウェーハから得られない。 First, a large number of chips increases the chip size can not be obtained from a wafer for retrieving the both electrodes from the same side. 第二に、負電極と正電極とが水平方向に並んでいるため電流が水平方向に流れ、その結果電流密度が局部的に高くなりチップが発熱する。 Secondly, the current for the negative and positive electrodes are aligned in the horizontal direction flows in the horizontal direction, resulting current density is locally high will tip generates heat. 第三にサファイアという非常に硬く、劈開性のない基板を使用しているので、チップ化するのに高度な技術を必要とする。 Very hard that third sapphire, because it uses a substrate having no cleavage, and requires advanced technology for chips. さらにLDを実現しようとする際には基板の劈開性を用いた窒化物半導体の劈開面を共振面とできないので共振面の形成が非常に困難である。 It is very difficult to form the resonance surface since the cleavage plane of the nitride semiconductor with cleavage of the substrate can not be the resonance surface when further to be realized the LD.

【0006】以上のような問題を回避するため、上記のように炭化ケイ素、シリコン、酸化亜鉛、ガリウム砒素、ガリウムリン等の導電性基板の上に窒化物半導体を成長する試みも成されているが、未だ成功したという報告はされていない。 [0006] To avoid the above problems, a silicon carbide as described above, silicon, zinc oxide, gallium arsenide, attempts have been made to grow a nitride semiconductor on a conductive substrate of gallium phosphide, etc. There have not been reports that still successful.

【0007】従って本発明はこのような事情を鑑み成されたものであって、その目的とするところは、主として上下より電極を取り出せる構造を有する窒化物半導体素子の製造方法、および窒化物半導体素子を提供することにある。 Accordingly the present invention was made in view of such circumstances, it is an object mainly method of manufacturing a nitride semiconductor device having the structure retrieve electrode than the vertical, and a nitride semiconductor device It is to provide a.

【0008】 [0008]

【課題を解決するための手段】本発明の窒化物半導体素子の製造方法は、絶縁性基板の上に窒化物半導体層が成長されたウェーハの窒化物半導体層面に導電性基板を接着する第一の工程と、導電性基板接着後、前記ウェーハの絶縁性基板の一部、又は全部を除去して窒化物半導体層を露出させる第二の工程とを備えることを特徴とする。 Method for manufacturing a nitride semiconductor device of the present invention According to an aspect of the first bonding the conductive substrate to the nitride semiconductor layer surface of the wafer on which the nitride semiconductor layer is grown on an insulating substrate and step, the conductive substrate after the bonding, a part of the insulating substrate of the wafer, or characterized by comprising a second step of exposing the nitride semiconductor layer by removing all. また、本発明の窒化物半導体素子は導電性基板と窒化物半導体とが接着されてなることを特徴とする。 Further, the nitride semiconductor device of the present invention the conductive substrate and the nitride semiconductor is characterized by comprising adhered.

【0009】本発明の方法において、絶縁性基板には前記のようにサファイア、スピネル、ニオブ酸リチウム、 [0009] In the method of the present invention, sapphire as described above is an insulating substrate, spinel, lithium niobate,
ガリウム酸ネオジウム等が用いられ、好ましくはサファイア、スピネルの上に成長された窒化物半導体が結晶性に優れている。 Neodymium gallate or the like is used, preferably sapphire, a nitride semiconductor grown on the spinel is excellent in crystallinity. 一方、窒化物半導体に接着する導電性基板には、導電性を有する基板材料であればどのようなものでも良く、例えばSi、SiC、GaAs、GaP、 On the other hand, the conductive substrate to adhere to the nitride semiconductor may be any one so long as it is a substrate material having conductivity, for example Si, SiC, GaAs, GaP,
InP、ZnSe、ZnS、ZnO等を用いることができる。 It can be used InP, ZnSe, ZnS, and ZnO, and the like. 但し、導電性基板は窒化物半導体が積層された絶縁性基板とほぼ同じ形状を有し、さらにほぼ同じ面積か、あるいはそれよりも大きな面積を有するウェーハ状の基板を選択することはいうまでもない。 However, the conductive substrate may have substantially the same shape as the insulating substrate on which the nitride semiconductor are stacked, even further to approximately the same or area, or rather to select a wafer-shaped substrate having an area larger than that Absent.

【0010】一方、窒化物半導体層が積層されたウェーハの絶縁性基板を除去するには、例えば研磨、エッチング等の技術を用いる。 On the other hand, to remove the insulating substrate wafer on which the nitride semiconductor layers are laminated, for example polishing, using techniques such as etching. 通常絶縁性基板の厚さは数百μm Usually insulating thickness of the substrate several hundred μm
あり、窒化物半導体層は厚くても20μm以下であるので、研磨により基板を除去する際に研磨厚が制御しにくい場合は、最初研磨で大まかな部分を除去し、その後エッチングで細かい部分を除去して、電極を形成するのに必要とする窒化物半導体面を露出させても良い。 There, removal because it is below 20μm even nitride semiconductor layer is thick, if the polishing thickness is difficult to control in removing the substrate by polishing, to remove the rough parts in the first polishing, a detailed part in a subsequent etching to, may be exposed nitride semiconductor surface which is required to form the electrode. また例えばレーザ素子のように絶縁物を電流狭窄層として窒化物半導体層表面に必要とする素子を作製する場合には、 Also in the case of manufacturing a device which requires the nitride semiconductor layer surface as the current confinement layer insulator as laser element for example,
絶縁性基板全てを除去せずに、選択エッチングにより窒化物半導体層を露出させるのに必要な部分のみを除去することも可能である。 Without removing any insulating substrate, it is also possible to remove only the portion required to expose the nitride semiconductor layer by selective etching.

【0011】さらに本発明の方法及び素子において、窒化物半導体層に接着する導電性基板は劈開性を有することを特徴とする。 Furthermore in the method and device of the present invention, a conductive substrate to adhere to the nitride semiconductor layer is characterized by having a cleavage property. この劈開性を有する導電性基板には、 The conductive substrate having this cleavage,
例えばGaAs、GaP、InP、SiC等を好ましく用いることができる。 For example, GaAs, GaP, InP, are preferably used SiC.

【0012】次に本発明の方法及び素子は窒化物半導体層面と導電性基板とを電極、又は導電性材料を介して接着することを特徴とする。 [0012] Next the method and device of the present invention is characterized in that bonding through the nitride semiconductor layer surface and the conductive substrate and the electrode or conductive material. この方法は導電性基板に劈開性のある基板を使用しても同様に適用可能である。 The method is equally applicable to use a substrate having cleavage property to the conductive substrate. 接着する方法には、導電性基板の接着面と、窒化物半導体層面とを鏡面として、それら鏡面同士を張り合わせた後、 The method of bonding, the bonding surface of the conductive substrate, and a nitride semiconductor layer surface, mirror surface, after they have stuck to mirror each other,
熱圧着するいわゆるウェーハ接着の手法を用いてもよいが、電極又は導電性材料を介することにより簡単に接着することができる。 It may be used a technique called wafer bonding thermocompression bonding, but can be easily bonded by passing through the electrode or conductive material. 導電性材料は窒化物半導体と導電性基板を接着できる材料であればどのようなものでも良く、例えばIn、Au、ハンダ、銀ペースト等の材料を使用することができる。 The conductive material may be any one as long as the material can bond the nitride semiconductor and the conductive substrate, for example an In, Au, can be used solder, a material such as silver paste.

【0013】また前記接着手法において、電極は窒化物半導体層表面に形成されたオーミック電極及び/又は導電性基板表面に形成されたオーミック電極を含むことを特徴とする。 [0013] In the adhesive technique, the electrode is characterized in that it comprises an ohmic electrode formed on the ohmic electrode and / or conductive substrate surface formed on the nitride semiconductor layer surface. なお、オーミック電極とは、一般に窒化物半導体表面に形成される膜厚の薄いオーミック電極と、 Incidentally, the ohmic electrode, a thin ohmic electrode film thickness generally formed on the nitride semiconductor surface,
その電極の上に付けられた膜厚の厚い接着用の金属、例えばAu、In、Al等の金属を含んで本明細書ではオーミック電極と定義する。 Having a large thickness bonding of metal attached on the electrode, for example Au, an In, comprise a metal such as Al herein defined as ohmic electrodes. 窒化物半導体層表面に形成するオーミック電極材料としては、n型層が接着面であれば例えば特開平5−291621号公報に示されたA The ohmic electrode material for forming the nitride semiconductor layer surface, n-type layer is shown, for example, in JP-A 5-291621 discloses If adhesive surface A
l、Cr、Ti、Inの内の少なくとも一種の材料、特に好ましくはTiをn型層と接する側とした電極、また特開平7−45867号公報に示されたTi−Alを含む材料を挙げることができる。 Include l, Cr, Ti, at least one material among In, particularly preferably has a side in contact with Ti and n-type layer electrodes and the material containing Ti-Al shown in JP-A-7-45867 be able to. また接着面がp型層であれば同じく特開平5−291621号公報に示されたA The adhesive surface was shown to also Hei 5-291621 discloses If p-type layer A
u、Pt、Ag、Niの内の少なくとも一種の材料、特に好ましくはNiをp型層と接する側とした電極を挙げることができる。 u, Pt, Ag, at least one material among Ni, particularly preferable examples thereof include electrodes with the side in contact with Ni and p-type layer.

【0014】窒化物半導体はp型層が得られにくく、p [0014] Nitride semiconductors hardly p-type layer is obtained, p
型層を得るため例えば特開平3−218625号公報に開示されるような電子線照射、また特開平5−1831 Electron beam irradiation as disclosed for obtaining -type layer, for example, in JP-A-3-218625 and JP also Hei 5-1831
89号公報に開示されるような熱的アニーリング処理が成長後に行われ、最表面のp型層が低抵抗化される。 Thermal annealing process, as disclosed in 89 JP is performed after the growth, p-type layer of the outermost surface is lower resistance. このため窒化物半導体ウェーハは最上層がp型層になっていることが多い。 Therefore nitride semiconductor wafer often has the uppermost p-type layer. そこで、この窒化物半導体ウェーハと導電性基板を接着する際には、p型層に形成されたオーミック電極を介してp型の導電性基板とを接着することが特に望ましい。 Therefore, when bonding the nitride semiconductor wafer and the conductive substrate, it is particularly desirable for bonding the p-type conductive substrate via an ohmic electrode formed on the p-type layer.

【0015】一方、もう片方の接着面の導電性基板に形成するオーミック電極としては例えば導電性基板がn型GaAsであれば、Ag−Sn、In−Sn、Ni−S Meanwhile, if as an ohmic electrode formed on the other conductive substrate bonding surface, for example conductive substrate an n-type GaAs, Ag-Sn, In-Sn, Ni-S
n、Au−Sn、Au−Si、Au−Ge等を用いることができ、p型GaAsであれば、Au−Zn、Ag− n, Au-Sn, Au-Si, can be used Au-Ge or the like, if a p-type GaAs, Au-Zn, Ag-
Zn、Ag−In等を用いることができる。 Zn, it can be used Ag-In, and the like. その他Si Other Si
C、Si等についても公知のオーミック電極材料を用いることができるが前記のようにp型の導電性基板をその導電性基板のオーミック電極を介して接着することが特に望ましい。 C, it is particularly desirable that it may be a known ohmic electrode materials also Si, etc. adhering over the ohmic electrodes of the conductive substrate a p-type conductive substrate as described above.

【0016】 [0016]

【作用】本発明の方法及び素子では窒化物半導体層に導電性基板を接着している。 In the method and device of the effects of the present invention is adhered to the conductive substrate in the nitride semiconductor layer. つまり、窒化物半導体が絶縁性基板の上に成長されたウェーハでは、窒化物半導体より得られる各種素子はフリップチップ形式とならざるを得ないが、導電性基板をウェーハ最上層の窒化物半導体層に接着することにより、導電性基板が電極を形成する基板となる。 That is, in the wafer nitride semiconductor is grown on the insulating substrate, various elements obtained from the nitride semiconductor inevitably flip chip type, the nitride semiconductor layer of a conductive substrate wafer top layer by adhering to the conductive substrate is a substrate for forming the electrodes. その後、絶縁性基板を除去すると窒化物半導体層が露出するので、露出した窒化物半導体層面にもう一方の電極を形成することができ、従来のような電極が水平方向に並んだ素子ではなく、互いの電極が対向した素子を作製することができる。 Then, because upon removal of the insulating substrate nitride semiconductor layer is exposed, the other electrode can be formed on the nitride semiconductor layer surface exposed, as in the prior art electrodes are not in elements arranged in the horizontal direction, can be each other's electrodes are fabricated opposed elements.

【0017】次に接着する導電性基板に劈開性のある材料を選択すると、劈開性のない絶縁性基板の上に成長された窒化物半導体でも、接着された導電性基板の劈開性を利用してチップ状に分割できる。 [0017] Next Selecting a cleavage property to a conductive substrate to the adhesive material, even grown nitride semiconductor on the no cleavage insulating substrate, utilizing the cleavage of the adhesive electrically conductive substrate It can be divided into chip-like Te. このためチップサイズの小さい素子が得られやすくなり、さらに窒化物半導体の劈開面を光共振面とするレーザ素子が作製できるようになる。 Therefore easily small element is obtained of the chip size, further comprising a cleavage plane of the nitride semiconductor as laser element to the optical resonance surface can be produced.

【0018】また窒化物半導体層面と導電性基板とは一般にウェーハ接着と呼ばれる技術で接着する方法もあるが、特に窒化物半導体層の電極、若しくは導電性基板の電極、又は導電性材料を介して接着すると導電性基板と窒化物半導体層との間の電気的特性も安定化するため好ましい。 [0018] There is also a method of bonding technology and nitride semiconductor layer surface and the conductive substrate, commonly referred to as wafer bonding, but particularly nitride semiconductor layer of the electrode, or a conductive substrate of the electrode, or via a conductive material electrical characteristics between the bonding the conductive substrate and the nitride semiconductor layer is preferable to stabilize. さらにこの導電性材料としてAu、Al、Ag Further Au as the conductive material, Al, Ag
等の窒化物半導体の発光波長を反射できる材料を選択すれば、発光素子を作製した際、これらの導電性材料が接着した導電性基板に来る光を反射して、窒化物半導体層の側に戻す作用があるので発光素子の発光効率が向上する。 By selecting a material capable of reflecting the emission wavelength of the nitride semiconductor and the like, when to produce a light-emitting device, and reflects light of these conductive material comes into the conductive substrate adhered to the side of the nitride semiconductor layer luminous efficiency of the light emitting device is improved because an effect to revert.

【0019】特に接着材料として、窒化物半導体層表面に形成されたオーミック電極及び/又は導電性基板表面に形成されたオーミック電極を含めば、例えば発光素子のような発光デバイスを作製すると、抵抗値が低くなりデバイスのVfを低下させる作用がある。 [0019] In particular the adhesive material, if included ohmic electrode formed on the ohmic electrode and / or conductive substrate surface formed on the surface of the nitride semiconductor layer, for example, when manufacturing the light-emitting devices such as light emitting element, the resistance value it is an effect of lowering the Vf of lower becomes the device.

【0020】 [0020]

【実施例】以下、実施例で本発明を詳説する。 EXAMPLES The following will illustrate the present invention in embodiment. 図1乃至図3は本発明の方法の一工程を説明するウェーハ及び導電性基板の模式的な断面図であり、図4は実施例1により得られた窒化物半導体発光素子の構造を示す模式的な断面図であり、以下これらの図を元に実施例1を述べる。 1 to 3 are schematic cross-sectional view of the wafer and the conductive substrate for explaining one process of the method of the present invention, schematic Figure 4 showing the structure of a nitride semiconductor light emitting device obtained in Example 1 specific sectional views, described in example 1 based on these figures below.

【0021】[実施例1]サファイア基板1の表面に窒化物半導体層2が積層されたウェーハを用意する。 [0021] [Example 1] nitride semiconductor layer 2 on the surface of the sapphire substrate 1 is prepared wafers stacked. なお窒化物半導体層2はサファイア基板1から順にドナー不純物がドープされたAlXGa1-XN(0≦X≦1)よりなるn型層21と、InYGa1-YN(0<Y<1)よりなる活性層22と、アクセプター不純物がドープされたAlXGa1-XN(0≦X≦1)よりなるp型層23とを少なくとも有するダブルへテロ構造を有している。 Note that n-type layer 21 a nitride semiconductor layer 2 is made of AlXGa1-XN donor impurity-doped sapphire substrate 1 in this order (0 ≦ X ≦ 1), InYGa1-YN (0 <Y <1) than becomes the active layer 22, has a hetero structure and a p-type layer 23 acceptor impurities consisting AlXGa1-XN doped (0 ≦ X ≦ 1) to double with at least. なお最上層のp型層23は400℃以上のアニーリングにより低抵抗化されている。 Note uppermost p-type layer 23 is a low resistance by annealing above 400 ° C..

【0022】次に図1に示すように窒化物半導体層2の表面のほぼ全面にNiとAuを含むオーミック電極30 [0022] Next ohmic electrode 30 containing Ni and Au to the substantially entire surface of the nitride semiconductor layer 2 as shown in FIG. 1
を500オングストロームの膜厚で形成する。 To form a film thickness of 500 angstroms. つまり窒化物半導体層2の最上層のp型層のほぼ全面にp型層と好ましいオーミックが得られる第一のオーミック電極3 That first ohmic electrode preferably ohmic p-type layer is obtained over substantially the entire top layer of the p-type layer of the nitride semiconductor layer 2 3
0を形成する。 To form a 0. さらにそのオーミック電極30の上にに接着性を良くするためにAu薄膜を0.1μm形成する。 Further Au thin film 0.1μm formed in order to improve the adhesion on the ohmic electrode 30.

【0023】一方、導電性基板として、サファイア基板1とほぼ同じ大きさを有するp型GaAs基板50を用意し、このp型GaAs基板50の表面にAu−Znよりなる第二のオーミック電極40を500オングストロームの膜厚で形成する。 On the other hand, as the conductive substrate, providing a p-type GaAs substrate 50 having approximately the same size as the sapphire substrate 1, a second ohmic electrode 40 made of Au-Zn on the surface of the p-type GaAs substrate 50 It is formed in a thickness of 500 angstroms. さらにその第二のオーミック電極40の上に接着性を良くするためにAu薄膜を0.1 0.1 The Au thin film to further improve the adhesion over the second ohmic electrode 40
μm形成する。 μm to form.

【0024】次に、図2に示すように第一のオーミック電極30を有する窒化物半導体ウェーハと、第二のオーミック電極40を有するp型GaAs基板50とのオーミック電極同士を貼り合わせ、加熱により圧着する。 Next, bonded to ohmic electrodes of the p-type GaAs substrate 50 having a nitride semiconductor wafer having a first ohmic electrode 30 as shown in FIG. 2, the second ohmic electrode 40, by heating crimping. 但し、圧着時ウェーハのサファイア基板1とp型GaAs However, the sapphire substrate 1 of the pressure during the wafer and the p-type GaAs
基板50とは平行となるようにする。 The substrate 50 to be parallel. 平行でないと次のサファイア基板を除去する工程において、露出される窒化物半導体層の水平面が出ないからである。 In the step of removing the otherwise parallel next sapphire substrate, because no out horizontal plane of the nitride semiconductor layer to be exposed. また第一のオーミック電極30と第二のオーミック電極40とを接着するためにAuを使用したが、この他電極30と40 Although using Au for bonding a first ohmic electrode 30 and a second ohmic electrode 40, the other electrode 30 and 40
との間にインジウム、錫、ハンダ、銀ペースト等の導電性材料を介して接着することも可能である。 It is also possible to bond over indium, tin, solder, a conductive material such as silver paste between. なおp型G It should be noted that the p-type G
aAs基板50を接着する際に窒化物半導体層の劈開性と、基板50との劈開方向を合わせて接着してあることは言うまでもない。 And cleavage of the nitride semiconductor layer at the time of bonding the aAs substrate 50, it is needless to say that combined cleavage direction of the substrate 50 are bonded.

【0025】次にp型GaAs基板50を接着したウェーハを研磨器に設置し、サファイア基板1のラッピングを行い、サファイア基板を除去して、窒化物半導体層2 [0025] The wafer bonding the p-type GaAs substrate 50 is placed on the polisher then performs lapping of the sapphire substrate 1, by removing the sapphire substrate, a nitride semiconductor layer 2
のn型層21を露出させる。 Exposing the n-type layer 21. なおこの工程において、例えばサファイア基板1を数μm程度の厚さが残るようにラッピングした後、さらに残ったサファイア基板をエッチングにより除去することも可能である。 Note in this step, for example after the sapphire substrate 1 is lapped to a thickness of about several μm remains, it is also possible to remove further residual sapphire substrate by etching. サファイア基板1除去後のウェーハの構造を図3に示す。 The structure of the wafer after the sapphire substrate 1 is removed is shown in FIG.

【0026】最後に露出したn型層21の表面をポリシングした後、n型層にオーミック用の電極としてTi− [0026] After polishing the surface of the finally exposed n-type layer 21, as an electrode for ohmic to n-type layer Ti-
Alよりなる負電極25を形成し、一方p型GaAs基板50には同じくオーミック電極としてAu−Znよりなる正電極55を全面に形成する。 Forming a negative electrode 25 made of Al, whereas the p-type GaAs substrate 50 also forms the positive electrode 55 made of Au-Zn as an ohmic electrode on the entire surface.

【0027】以上のようにして正電極および負電極が形成されたウェーハを、p型GaAs基板の劈開性を利用して200μm角の発光チップに分離する。 The above manner the wafers are positive and negative electrodes are formed, by utilizing the cleavage of p-type GaAs substrate is separated into the light-emitting chip 200μm square. 分離後の発光チップの構造を示す模式的な断面図を図4に示す。 The schematic cross-sectional view showing a structure of a light emitting chip after separation shown in Figure 4. この発光チップは電極25と55間に通電することにより、活性層22が発光するLED素子の構造を示している。 By energizing the light emitting chip electrodes 25 and between 55, the active layer 22 shows a structure of an LED element emits light. この発光素子は活性層22の発光が第一のオーミック電極30とp型層23との界面で反射され、p型Ga The light emitting element is reflected at the interface between the emission of the active layer 22 and the first ohmic electrode 30 and the p-type layer 23, p-type Ga
As基板50に吸収されることがないので、従来の発光素子に比べて発光出力が50%以上増大した。 Since it will not be absorbed by the As substrate 50, light emission output is increased more than 50% compared to the conventional light-emitting element.

【0028】またこの例は絶縁性基板がサファイア、導電性基板がp型GaAsについて説明したが、絶縁性基板にはサファイアの他に例えば前記したスピネル、ネオジウムガレートのような絶縁性基板を用いても良く、また導電性基板にはSi、ZnOのような基板を用いても良い。 Further this example the insulating substrate is sapphire, but the conductive substrate has been described p-type GaAs, in addition to for example the spinel sapphire insulating substrate, using an insulating substrate such as a neodymium gallate is good, also the conductive substrate may be used Si, the substrate such as ZnO.

【0029】[実施例2]実施例1においてサファイア基板1をラッピングする際、サファイア基板1が5μm [0029] [Example 2] When wrapping sapphire substrate 1 in Example 1, the sapphire substrate 1 is 5μm
の膜厚で残るようにラッピングする。 Wrapping to remain in the film thickness. 次に残ったサファイア基板1の表面に電流狭窄層が形成できるような形状のマスクを形成し、エッチング装置でマスク開口部のサファイア基板1をエッチングにより除去し、n型層21 To form a next remaining mask shape that allows the current confinement layer is formed on the surface of the sapphire substrate 1, the sapphire substrate 1 of the mask opening is removed by etching in an etching apparatus, n-type layer 21
の一部を露出させる。 To expose a part of. 露出後同様にしてn型層に負電極25とp型GaAs基板50に正電極55を形成する。 After exposure the same way to form a positive electrode 55 to the negative electrode 25 and the p-type GaAs substrate 50 to the n-type layer.

【0030】次にp型GaAs基板50の劈開性を用いて、チップ状に分離してレーザ素子とする。 [0030] Next, using the cleavage of p-type GaAs substrate 50, a laser device is separated into chips. 図5はそのレーザ素子の構造を示す模式的な断面図であり、故意に残したサファイア基板1がレーザ素子の電流狭窄層として作用している。 Figure 5 is a schematic sectional view showing the structure of the laser device, the sapphire substrate 1 is acting as a current confinement layer of the laser element that left intentionally. この例は電流狭窄層としてサファイア基板を残す例を示したが、この他にレーザ素子の電流狭窄層を形成するには実施例1のようにサファイア基板1 This example is an example to leave sapphire substrate as the current confinement layer, sapphire substrate 1 as in Example 1 to form the current confinement layer of the laser element In addition
を全部除去してから、例えばSiO 2 、TiO 2のような絶縁膜を露出した窒化物半導体層の上に形成しても良い。 The after all removed, may be formed on, for example, SiO 2, nitride to expose the insulating film such as TiO 2 semiconductor layer.

【0031】 [0031]

【発明の効果】以上説明したように、本発明の方法によると導電性基板を有する窒化物半導体素子が実現できるので、チップサイズの小さい素子を提供することができる。 As described above, according to the present invention, since the nitride semiconductor device having a conductive substrate according to the method of the present invention can be realized, it is possible to provide a small device with chip size. また素子に形成した電極同士が対向しているので、 Since electrodes are formed on the element faces,
電流が窒化物半導体層に均一に流れ発熱量が小さくなり、レーザ素子を実現することも可能となる。 Current uniformly flows calorific value is reduced in the nitride semiconductor layer, it is also possible to realize a laser device. さらに容易に窒化物半導体の劈開が可能となり、その劈開面を共振器とできるためレーザ素子の作製が容易となる。 More easily enables the cleavage of the nitride semiconductor, manufacturing a laser element for possible the cleavage plane and the resonator is facilitated. さらにまた発光デバイスを実現すると、窒化物半導体層と導電性基板とを接着した電極により、窒化物半導体層の発光が電極表面で反射されるので発光出力も増大させることができる。 Further also realize a light emitting device, the electrodes adhere the conductive substrate and the nitride semiconductor layer may be luminous output also increases the emission of the nitride semiconductor layer is reflected at the electrode surface.

【0032】従来の窒化物半導体LEDは図6に示すようにp型層64の表面のほぼ全面に光を透過する正電極65が形成されていた。 The conventional nitride semiconductor LED is positive electrode 65 which transmits light over substantially the entire surface of the p-type layer 64 as shown in FIG. 6 has been formed. これはp型層の電流が広がりにくいことによる。 This is due to the fact that hard to spread the current of the p-type layer. この正電極65により発光する光の5 5 of light emitted by the positive electrode 65
0%以上が吸収されていた。 0% or more had been absorbed. しかし本発明の素子によると図4および図5に示すように低抵抗なn型層21が最上層となるので、従来のように全面電極を設ける必要がなくなり、小さな部分電極でよい。 However, since according to the device of the present invention FIG. 4 and the low-resistance n-type layer 21 as shown in FIG. 5 is a top layer, eliminates the need for conventional manner provided full-surface electrode may be a small part electrode. 従って窒化物半導体層側からの光の取り出し効率が飛躍的に向上し発光出力が向上する。 Thus the extraction efficiency of light from the nitride semiconductor layer side is improved enhanced light output dramatically. このように本発明は窒化物半導体を用いたデバイスを実現する上で産業上の利用価値は非常に大きい。 Thus, the present invention is industrial applicability in enabling devices using nitride semiconductor is very large.

【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS

【図1】 本発明の方法の一工程を説明する窒化物半導体ウェーハの模式断面図。 Schematic cross-sectional view of a nitride semiconductor wafer for explaining one process of the method of the present invention; FIG.

【図2】 本発明の方法の一工程を説明する窒化物半導体ウェーハの模式断面図。 Schematic cross-sectional view of a nitride semiconductor wafer for explaining one process of the method of the invention; FIG.

【図3】 本発明の方法の一工程を説明する窒化物半導体ウェーハの模式断面図。 Schematic cross-sectional view of a nitride semiconductor wafer for explaining one process of the method of the present invention; FIG.

【図4】 本発明の一実施例に係る窒化物半導体素子の構造を示す模式断面図。 Schematic cross-sectional view showing a structure of a nitride semiconductor device according to an embodiment of the present invention; FIG.

【図5】 本発明の他の実施例に係る窒化物半導体素子の構造を示す模式断面図。 Schematic cross-sectional view showing a structure of a nitride semiconductor device according to another embodiment of the present invention; FIG.

【図6】 従来の窒化物半導体発光素子の構造を示す模式断面図。 Figure 6 is a schematic sectional view showing a structure of a conventional nitride semiconductor light emitting device.

【符号の説明】 DESCRIPTION OF SYMBOLS

1・・・・サファイア基板 2・・・・窒化物半導体層 21・・・・n型層 22・・・・活性層 23・・・・p型層 30・・・・第一のオーミック電極 40・・・・第二のオーミック電極 50・・・・p型GaAs基板 25・・・・負電極 55・・・・正電極 1 ... sapphire substrate 2 .... nitride semiconductor layer 21 ... n-type layer 22 .... active layer 23 .... p-type layer 30 ... first ohmic electrode 40 .... second ohmic electrodes 50 ... p-type GaAs substrate 25 ... negative electrode 55 ... positive electrode

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Claims (9)

    (57)【特許請求の範囲】 (57) [the claims]
  1. 【請求項1】 絶縁性基板の上に窒化物半導体層が成長されたウェーハの窒化物半導体層面に、劈開性を有する導電性基板を接着する第一の工程と、導電性基板接着後、前記ウェーハの絶縁性基板の一部、又は全部を除去して窒化物半導体層を露出させる第二の工程と、導電性基板の劈開性を利用してウェーハを分割する工程とを備えることを特徴とする窒化物半導体素子の製造方法。 To 1. A nitride semiconductor layer surface of the wafer on which the nitride semiconductor layer is grown on an insulating substrate, a first step of bonding the conductive substrate having a cleavage property, the conductive substrate after the bonding, the some of the wafers of the insulating substrate, or a feature in that it comprises a second step of exposing the nitride semiconductor layer by removing all, by utilizing the cleavage of the conductive substrate and a step of dividing the wafer method of manufacturing a nitride semiconductor device which.
  2. 【請求項2】 前記第一の工程において、窒化物半導体層面と導電性基板とを電極、又は導電性材料を介して接着することを特徴とする請求項1に記載の窒化物半導体素子の製造方法。 2. A said first step, preparation of a nitride semiconductor device according to claim 1, characterized in that bonding through the nitride semiconductor layer surface and the conductive substrate and the electrode or conductive material, Method.
  3. 【請求項3】 前記電極が窒化物半導体層表面に形成されたオーミック電極及び/又は導電性基板表面に形成されたオーミック電極を含むことを特徴とする請求項2に記載の窒化物半導体素子の製造方法。 3. A nitride semiconductor device according to claim 2, characterized in that it comprises an ohmic electrode in which the electrode is formed on the ohmic electrode and / or conductive substrate surface formed on the nitride semiconductor layer surface Production method.
  4. 【請求項4】 窒化物半導体と導電性基板とが接着され、該導電性基板の劈開により得られた窒化物半導体の劈開面を有することを特徴とする窒化物半導体素子。 4. A nitride semiconductor and the conductive substrate is bonded, a nitride semiconductor device characterized by having a cleavage plane of the resulting nitride semiconductor by cleavage of the conductive substrate.
  5. 【請求項5】 上下より電極が取り出せる構造を有することを特徴とする請求項4に記載の窒化物半導体素子。 5. A nitride semiconductor device according to claim 4, characterized by having a structure that can be extracted electrodes than vertically.
  6. 【請求項6】 前記導電性基板と前記窒化物半導体発光素子とが電極、又は導電性材料を介して接着されていることを特徴とする請求項4、又は請求項5に記載の窒化物半導体素子。 6. The method of claim 4, or a nitride semiconductor according to claim 5, characterized in that said conductive substrate and the nitride semiconductor light emitting device is bonded through the electrodes, or conductive material element.
  7. 【請求項7】 前記電極が窒化物半導体層表面に形成されたオーミック電極及び/又は導電性基板表面に形成されたオーミック電極を含むことを特徴とする請求項6に記載の窒化物半導体素子。 7. A nitride semiconductor device according to claim 6, characterized in that it comprises an ohmic electrode in which the electrode is formed on the ohmic electrode and / or conductive substrate surface formed on the nitride semiconductor layer surface.
  8. 【請求項8】請求項4乃至7記載の窒化物半導体素子が、共振面を有する窒化物半導体レーザ素子であって、 8. A nitride semiconductor device according to claim 4 to 7 wherein is a nitride semiconductor laser device having a resonant surface,
    前記窒化物半導体の劈開面を共振面とすることを特徴とする窒化物半導体レーザ素子。 Nitride semiconductor laser device which is characterized in that the resonance surface cleavage plane of the nitride semiconductor.
  9. 【請求項9】 窒化物半導体層を成長させた絶縁性基板の一部が除去されて、電流狭窄層として窒化物半導体層に設けられていることを特徴とする請求項8に記載の窒化物半導体レーザ素子。 9. Some of the nitride insulating substrate a semiconductor layer is grown is removed, the nitride according to claim 8, characterized in that provided in the nitride semiconductor layer as a current constricting layer semiconductor laser element.
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