JP3250476B2 - Air bag detonator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a detonator for an airbag, which makes an accurate collision judgment by using an acceleration sensor and an impact sensor, and reliably operates an ignition device by using a coded command. Things.

[0002]

2. Description of the Related Art The importance of the role of an airbag system as an occupant restraint for protecting a vehicle occupant from an impact in a collision is recognized, and the occupant is protected not only from a frontal collision accident but also from a side collision accident. To be able to do so, vehicles equipped with both frontal airbags and side airbags are becoming widespread. In the case of a frontal airbag that buffers the impact of a head-on collision, the engine room functions as a cushion that absorbs the impact to some extent, so that the collision determination time required from the occurrence of the collision to the deployment of the airbag can have some allowance. In the case of a side airbag that protects an occupant from a side collision in which an impact may harm an occupant due to deformation of a door, etc., for example, in the case of a high-speed side collision, a collision determination is made within a very short time of about 5 ms. Therefore, it has been found that the collision determination algorithm also requires an operation considering an event specific to a side collision. However, both frontal airbags and side airbags operate on the same principle as the squib, in which the squib is used as a deployment trigger for the airbag. As the ignition circuit for energizing the ignition current to cause the ignition to explode, basically the same ignition circuit is employed.

An air bag detonating device 1 shown in FIG. 4 calculates an acceleration signal detected by an acceleration sensor 2 to determine a threshold value and supplies an ignition command from a CPU 3 for determining a collision to an ignition device 4, and the ignition device 4 The detonating element 5 in the element 4 is ignited and detonated to apply a deployment trigger to the airbag. The ignition device 4 has a pair of switching elements Qu and Qd for detonation connected to both ends of a detonation element 5 that is detonated and ignited by an ignition current having a predetermined detonation energy. Form an ignition sequence,
The pair of ignition systems are connected in parallel with each other via a reverse blocking diode D, and this parallel connection circuit is connected to a battery power supply 7 via a parallel connection circuit of an impact sensor 6 and a current limiting resistor r. Impact sensor 6
Is a mechanical acceleration sensor in which a reed switch is closed by a magnet piece that inertia moves upon receiving an impact, and CP
When U3 erroneously outputs an ignition command, it functions as a safing sensor for preventing the detonating element 5 from detonating. The CPU 3 makes a logical judgment of the threshold value output of the absolute value of the acceleration signal and the threshold value output of the integral value of the acceleration signal section, makes a collision judgment using the output of the logic gate, and applies the collision judgment to the detonating switching elements Qu and Qd. In response, an ignition command is issued.

[0004] The detonating switching elements Qu and Qd include:
FETs having different channel structures are used. In this case, a gate resistance R is used as the upstream switching element Qu.
A P-channel FET having g and a source-gate resistance Rsg is used, and an N-channel FET having a gate resistance Rg and a gate-source resistance Rgs is used as the downstream initiating switching element Qd. Further, current limiting resistors Ru and Rd for bypassing the source and the drain are connected in parallel to the detonating switching elements Qu and Qd, and a safe diagnostic current less than the detonation level is always supplied to the detonating element 5. It is responsible for doing

[0005] In addition, the upstream detonating switching element Q
u, the connection point of the diode D, the connection point of the upstream detonating switching element Qu and the detonation element 5, and the detonation element 5
And the downstream switching element Qd are connected at
When connected to the CPU 3 and the CPU 3 supplies a safe diagnostic current less than the ignition current to the detonating element 5, the voltages V1, V2, and V3 at the three connection points are checked, and a circuit abnormality is detected. It is configured to check the presence or absence. However, at the time of diagnosis, of the pair of detonating switching elements Qu and Qd connected in series to the battery power supply 7 with the detonating element 5 interposed therebetween, only one of the detonating switching elements Qu or Qd is selectively made conductive, and Care is taken to avoid detonation of the detonating element 5 due to simultaneous energization of the switching elements Qu and Qd.

[0006]

In the above-described conventional air bag detonating apparatus 1, a mechanical shock sensor 6 as a safing sensor is interposed between a battery power source 7 and a diode D, and an error caused by a runaway of the CPU 3 is caused. Although it is configured to prevent the operation, the shock sensing sensor 6 is a mechanical acceleration sensor having a structure in which the movable part is displaced to close the reed switch, and therefore detects the acceleration and generates a collision detection signal. Response is slow, and almost none can respond to a high-speed request of about 5 ms, which is particularly required for side collision determination, and the closed state is maintained while the CPU 3 calculates the collision determination and issues an ignition command. Despite the necessity, the lead command of the reed switch may chatter repeatedly at high speed, causing the ignition command itself to be cut off. , There is a problem such as sometimes deployment of the air bag is delayed.

Further, when the CPU 3 runs away, the ignition switching elements Qu and Qd in the ignition device 4 are ignited despite the fact that the ignition element 5 does not normally need to be detonated. Command was given,
There is a problem that the detonating element 5 may be detonated. Also, in places where electromagnetic interference is severe, such as in an engine room, noise due to electromagnetic interference may very closely resemble the deployment command. In such a case, despite the fact that the CPU 3 does not run away, the noise causes an explosion. However, there is a problem that it cannot be said that there is no possibility that the switching elements Qu and Qd become conductive and the detonating element 5 is detonated.

When the detonating element 5 fails, or when the grounding short-circuit occurs between the detonating element 5 and the downstream switching element Qd, the failure is diagnosed by closing the upstream switching element Qu. In this case, an ignition current of several A flows instead of a safe diagnostic current in the detonating element 5, and there is a problem that the detonating element 5 cannot be denied.

The present invention has been made to solve the above-mentioned problem, and an air sensor which makes an accurate collision judgment by using an acceleration sensor and an impact sensor, and reliably operates an ignition device by using a coded command. An object of the present invention is to provide a bag detonator.

[0010]

In order to achieve the above object, the present invention provides an acceleration sensor for detecting an acceleration signal,
An impact sensor that electrically closes and detects an impact, and an acceleration signal from the acceleration sensor is calculated based on a predetermined calculation formula, and a calculation result exceeds a predetermined threshold value and the operation detection sensor That issues an airbag deployment command coded with a predetermined code when a closing signal from
A decoder that receives the airbag deployment command supplied from the CPU, decodes the airbag deployment command and issues an ignition command, and operates according to the ignition command supplied from the decoder to trigger the deployment of the airbag. And an ignition device for energizing and initiating the initiating element.

[0011] The ignition device may further include a detonating element which is supplied with an ignition current exceeding a detonation level and detonates the ignition.
A pair of switching elements for detonation that are connected to the upstream side and the downstream side of the detonating element and that conduct when receiving an ignition command issued by the decoder, and that are connected in parallel to each of the pair of detonating switching elements; A current limiting resistor that constantly supplies a safe diagnostic current that is less than or equal to, and a malfunction avoiding switching element that is connected between the upstream detonating switching element and a battery power source and that conducts in response to the ignition command. A current limiting resistor connected in parallel to the malfunction-preventing switching element and constantly supplying a safe diagnostic current less than the detonation level; Designate one of the switching elements, issue an airbag deployment command and a diagnostic command of the same code to selectively conduct,
Diagnosing the presence / absence of a circuit abnormality by determining the voltage of the diagnostic portion as a threshold value, or the malfunction avoiding switching element,
The term “at least one of the pair of switching elements for detonation” is characterized in that conduction occurs upon receiving an ignition command having the opposite polarity.

Further, the CPU generates the expansion command as serial data of a plurality of bits having a bit arrangement specified in advance, and the decoder holds a shift register holding the expansion command of the plurality of bits; A logic circuit that performs a logical decision on the shift output of all bits and outputs a logical decision signal only when the received expansion command matches the predetermined bit arrangement, and amplifies the logical decision signal of the logic circuit, Output means for outputting an ignition command, or the CPU outputs 2n-bit serial data in which the first n bits and the second n bits have a polarity inversion relationship, or the CPU outputs
U externally supplies two series of mutually synchronized clock signals accompanying the multi-bit expansion command, and the decoder monitors a phase shift of the two series of clock signals, and a phase shift of a certain width or more occurs. Resetting the shift register when the error occurs.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a schematic circuit configuration diagram showing an embodiment of an airbag detonator of the present invention. FIG. 2 is a circuit diagram showing a specific configuration of the decoder shown in FIG. 1, and FIG. 3 is a signal waveform diagram of each section of the decoder shown in FIG.

In FIG. 1, an airbag detonating device 11 is connected to a CPU 13 in addition to an acceleration sensor 12 for detecting an acceleration signal, and a semiconductor type impact sensor 16 for electrically sensing and closing an impact. The impact sensor 16 is configured to function as a safing sensor. Also,
In order to avoid a malfunction of the ignition device 14, the CPU 13 issues a deployment command coded according to a predetermined code, and decodes the coded deployment command to generate a firing command. 14 is connected.

The ignition device 14 is provided with a pair of detonation switching elements Qu and Qd, which are electrically connected to both ends of a detonation element 15 which receives an ignition command from a decoder 20 when an ignition current exceeding the detonation level is supplied to initiate ignition. A current limiting resistor R that constantly supplies a safe diagnostic current less than the level
u and Rd are connected in parallel, and further connected to a battery power source 7 via a parallel connection circuit of a switching element Q for avoiding malfunction and a current limiting resistor R for supplying a diagnostic current instead of the conventional shock sensor. is there. As the switching element Q for avoiding malfunction, a P-channel FET having a gate resistance Rg and a source-gate resistance Rsg is used.
The pair of switching elements for detonation become conductive upon receiving an ignition command having the opposite polarity. In addition, a current limiting resistor R bypassing the source and drain of the malfunction avoiding switch sig element Q.
, A safe diagnostic current less than the detonation level, for example, a current of about several tens mA is always supplied to the detonating element.

The CPU 13 receives the acceleration signal output from the acceleration sensor 12, makes a logical determination on the threshold value determination output of the absolute value of the acceleration signal and the threshold value determination output of the integral value of the section, and outputs a development command with the output of the logic gate. . For this expansion command, a predetermined array whose bit array is specified in advance, for example, 8-bit serial data having a bit array of "10010110" is used, and two series of mutually synchronized clock signals CLK1 accompanying this expansion command are used. , 2 is C
The PU 13 outputs one serial data, that is, eight clocks. The expansion command uses, in principle, even-bit serial data.
"001" and the latter four bits "0110" use 8-bit serial data having a polarity inversion relationship. this is,
Even if a pseudo-expansion command of a bit array similar to the expansion command is accidentally generated due to electromagnetic interference, such a pseudo-expansion command is irregular noise, and the regularity is such that the bit arrangement in the first and second half is in a polarity reversal relationship. And is based on an empirical rule that the probability of coincidence with a normal deployment command is almost zero, even if accidentally.

As in the conventional case, the CPU 13 determines the voltage V1 at the connection point between the upstream detonating switcher element Qu and the diode D and the voltage at the connection point between the upstream detonating switching element Qu and the detonating element 15. V2, the voltage V3 at the connection point between the detonating element 2 and the downstream switching element Qd
Is detected and abnormality is diagnosed. In the CPU 13, a voltage dividing circuit for dividing the voltages V1, V2, and V3, and a comparator (comparator) or a window ratio shaping device (window comparator) for determining the output of the voltage dividing circuit or its AD conversion value as a threshold value. Immediately after the engine is started by operating the ignition key, the switching elements Q, Qu, and Qd are sequentially and selectively turned on in accordance with a series of diagnosis programs to execute diagnosis.

The decoder 20 determines whether or not the expansion instruction is a predetermined bit array. As shown in FIG. 2, the decoder 20 has a shift register 21 for storing an expansion instruction composed of 8-bit serial data, A logic circuit 22 that logically determines the shift output of the shift register 21 for all bits and outputs a logical determination signal only when a specific combination of bit arrangements is obtained. And a pre-driver 23 for outputting the same. As the shift register 21, a single 8-bit output type can be used, but here, two 4-bit output type shift registers 21a and 21b are connected in cascade. The first shift register 21a has a data input terminal D to which coded data from the CPU 13 is supplied,
A clock input terminal CLK to which a first clock signal CLK1 is supplied from U13, a reset input terminal R to which a reset signal from a reset circuit 24 described later is supplied,
It has bit output terminals Q0 to Q3 for outputting from the 0th stage shift signal to the 3rd stage shift signal. The second shift register 21b has a data input terminal D to which a bit output is supplied from a bit output terminal Q3 of the first shift register 21a, and a first clock signal CLK from the CPU 13.
1; a reset input terminal R to which a reset signal from the reset circuit 24 is supplied; and bit output terminals Q4 to Q7 for outputting the fourth to seventh shift signals. Have.

The logic circuit 22 logically determines the coded data of the bit array "10010110", and outputs the coded data from the bit output terminals Q7 to Q0 of the shift registers 21a and 21b. And outputs a logic determination signal when a bit output of the combination is obtained. More specifically, an AND gate 22a for performing a logical AND operation on four bits “1” and a NOR gate 22b for performing a NOR operation on four bits “0”
And an AND gate 22c that calculates the logical product of the outputs of the AND gate 22a and the NOR gate 22b. That is, the AND gate 22a is connected to the bit output terminals Q1,
The logical product of the bit outputs of Q2, Q4 and Q7 is taken, and NOR gate 22b is connected to bit output terminals Q0, Q3, Q5 and Q6.
OR the bit outputs of

The pre-driver 23 comprises a common emitter transistor 23a receiving the output of the AND gate 22c in the logic circuit 22 at the base, and a buffer amplifier 23b for amplifying and extracting the collector output of the transistor 23a. Rb is the base resistance of the transistor 23a, and Rbe is the base-emitter resistance of the transistor 23a. When the transistor 23a receives a high-active logic determination signal from the AND gate 22c and becomes conductive, the collector potential drops, and a low-active ignition command is applied from the buffer amplifier 23b to the detonation switching element in the ignition device 14. .

The reset circuit 24 monitors the phase shift between the two clock signals CLK1 and CLK2 output by the CPU 13 in phase, and when a phase shift occurs between the clock signals CLK1 and CLK2, the CPU 13 runs away. Then, a reset signal is supplied to the reset input terminals of the shift registers 21a and 21b. Specifically, an exclusive OR gate 2 that performs an exclusive OR operation on the clock signals CLK1 and CLK2 and outputs a phase difference signal between the two clock signals
4a and an integrating circuit 24b for integrating the output of the exclusive OR gate 24a. The integration circuit 24b
It consists of a time constant circuit consisting of a resistor R and a capacitor C,
The terminal voltage of the capacitor C is extracted from the connection point between the resistor R and the capacitor C, and is supplied to the reset input terminals R of the shift registers 21a and 21b. Shift registers 21a, 2
A minimum operation voltage is specified for the reset input 1b, and a reset signal less than the minimum operation voltage is not accepted. Therefore, the clock signal CLK1
Even if a phase shift occurs between the clock signal and CLK2, if the phase shift is less than the allowable range, the output signal width of the exclusive OR gate 24a is ignored, and the terminal voltage of the capacitor C exceeds the minimum operating voltage. There is no runaway judgment.

Here, when the CPU 13 makes a collision determination,
An expansion command having the bit array “10010110” is sent from the CPU 13 to the decoder 20. This 8
The bit serial data is supplied to the first clock signal CLK.
1 and is taken in from the data input terminal D of the shift register 21a at the rise of the first clock signal CLK.
Shift registers 21a and 21b at the rise of 1
Is sequentially shifted. When the 8-bit serial data is completely taken into the shift registers 21a and 21b in this manner, the clock signals CLK1 and CLK2 disappear, and as shown by the dotted lines in FIGS.
Bit output terminals Q0 of shift registers 21a and 21b
From Q7, Is obtained, and this output state is maintained. That is, the clock signals CLK1 and CL
As long as K2 is not overshot, the same bit output state is maintained.

Thus, the shift registers 21a, 21b
"01101001" to the bit output terminals Q0 to Q7 of
When all the bit outputs are output, the output of the AND gate 22a for determining the logical product of the bit "1" and the output of the NOR gate 22b for determining the logical OR of the bit "0" both become logical "1", and the outputs of the AND gate 22a and the NOR gate 22b. The output of the AND gate 22c that takes the logical product of the outputs also becomes logic "1". The output of the AND gate 22c is
3 is applied to the base of the transistor 23a, and the transistor 23a conducts. As a result, the buffer amplifier 2
The output level of 3b is reduced, a low active ignition command is supplied to the ignition device 14, and an ignition current flows through the ignition device 15 with the conduction of the switching device for ignition.
When the detonating element 15 ignites and detonates due to energization of the ignition current,
The airbag is deployed with the firing energy at this time as a trigger.

When a phase shift between the clock signals CLK1 and CLK2 exceeding an allowable range occurs, an exclusive OR gate 24a that performs an exclusive OR process on the clock signals CLK1 and CLK2 outputs a phase difference signal between the two clock signals. When the output of the integrating circuit 24b exceeds the minimum operating voltage set at the reset input terminal R of the shift registers 21a and 21b, the CPU 1
3 is determined to have runaway, and shift registers 21a,
All bit outputs output from the bit output terminal 21b are reset. Also, the bit array “1001”
While the CPU 13 is sending the expansion command “0110” to the decoder 20, the CPU 13 causes a runaway, and a false interval command different from the normal bit array is held in the shift registers 21 a and 21 b in the decoder 20. In this case, a logic determination signal is not obtained from the logic circuit 22, so that the blow driver 23 does not operate.

As described above, the air bag detonating device 1
Reference numeral 1 denotes a CPU 13 that determines a collision generates a deployment command coded according to a predetermined code, and a decoder 20 that receives the deployment command decodes the deployment command to issue an ignition command, and an ignition device that operates according to the ignition command. 14
However, unlike the conventional device that directly drives the ignition device by a simple deployment command such as "1" or "0" of the bit because the detonating element 15 is energized and detonated,
Since the ignition device 14 is driven by the ignition command obtained by decoding the coded expansion command by the decoder 20, the ignition device 14 may malfunction due to external noise, or the ignition device 14 may be activated by the runaway of the CPU 13 itself. There is no possibility of malfunction, and it is possible to reliably eliminate the detonation of the detonating element due to electromagnetic interference or runaway. In addition, the impact sensor 16 functioning as a safing sensor is replaced by a conventional mechanical impact sensor 6 and an electric sensor such as a semiconductor sensor. While the CPU 13 is calculating the collision determination and issuing an ignition command, the shock sensor 16 reliably maintains the closed state without repeating chattering and the like, so that the ignition command itself is disconnected. As a result, the deployment of the airbag is not delayed, and the response from the detection of the acceleration to the generation of the collision determination signal is accelerated, so that it is possible to respond to a high-speed request of about 5 ms required for the side collision determination. Accurate airbag deployment corresponding to a collision event is possible.

Further, the CPU 13 generates an expansion instruction as 8-bit serial data having a bit arrangement specified in advance, and the expansion instruction is held by the shift register 21 in the decoder 20, and the shift output of the shift register 21 is output. The logic circuit 22 makes a logical decision on all bits, outputs a logical decision signal only when the received expansion command matches the previously specified bit arrangement, and outputs a bridging driver 23 that amplifies the logical decision signal as an ignition command. With this configuration, the decoder 20 determines whether the 8-bit bit array output as serial data is a predetermined bit array.
Can be reliably determined by the shift register 21 and the logic circuit 22. Since the serial data bits of 8 bits are used as the expansion command, a specific one of 2 8 power combinations considered as the expansion command can be used. By discriminating only the signal having the bit array as the deployment command, the probability of malfunction can be reduced to 1/256 even if it is simply estimated, and thereby the detonation of the detonating element 15 due to electromagnetic interference or runaway can be prevented. It can be reliably eliminated.

Further, since the CPU 13 is configured to output 8-bit serial data in which the first 4 bits and the latter 4 bits have a polarity inversion relationship as a development command, the CPU 13 specifies from among 256 combinations considered as the development command. Since only the signal having the bit arrangement of the above is used as the expansion instruction, and the arrangement is a special form of bit arrangement in which the first 4 bits and the latter 4 bits have a polarity inversion relationship, the expansion instruction is accidentally given due to electromagnetic wave interference. Even if a pseudo-expansion command of a similar bit array is generated, such a pseudo-expansion command is irregular noise, which is far from the regularity of the first and second bit arrays having a polarity inversion relationship. There is almost no occurrence of a deployment command due to an electromagnetic wave disturbance or runaway of the CPU 13.
Can be reliably eliminated.

In addition, the CPU 13 generates two series of mutually synchronized clock signals CLK in conjunction with an 8-bit expansion command.
1 and 2 are supplied externally, and the decoder 20 monitors the phase shift of the two series of clock signals CLK1 and CLK2, and resets the shift register 21 when a phase shift of a certain width or more occurs. 2 that CPU13 has runaway
The determination can be made based on the phase shift of the series clock signal, and the detonation of the detonating element 15 due to the runaway of the CPU 13 can be more reliably prevented.

In the diagnosis, the CPU 13
One of a pair of the switching elements Qu and Qd for detonation and the switching element Q for avoiding malfunction is designated, and an airbag deployment command and a diagnosis command of the same code are issued to selectively conduct. As a result, for example, Equation 1 below the detonation level
A safe diagnostic current of about 0 mA is supplied to the detonating element 15, and at that time, the voltages V1, V
2, V3 is determined as a threshold value to diagnose the presence or absence of a circuit abnormality.

The diagnostic current flowing through the detonating element 15 is suppressed to a safe value that does not cause the detonating element 15 to ignite. Therefore, a potential difference of several tens of mV is generated between both ends of the detonating element having a resistance value of several Q. Therefore, the potential difference V at both ends of the detonating element 15
By determining the threshold value of 2-V3 in the CPU, it is possible to diagnose whether the firing element 15 is short-circuited or opened. When the malfunction avoiding switching element Q is turned on, if the voltages V1 and V2 are found to be the same voltage, it is detected that the upstream detonating switching element Qu is short-circuited. If it is determined that the voltage V3 is at the ground level, it is detected that the downstream switching element Qd is short-circuited.
If the voltage difference between the voltages V1 and V2 is substantially equal to the potential difference across the current limiting resistor Ru when the upstream switching element Qu is turned on, the switching element Qu must be open. Is detected. When such a circuit abnormality as a short circuit or an open circuit is detected, the CPU 13 issues an abnormality detection signal to notify the console panel or the like of the abnormality.

By the way, at the time of the above diagnosis, it is assumed that the upstream switching element Qu is turned on without noticing that the cold side of the detonating element is ground-short-circuited. In this case, if it is the conventional airbag detonating device 1 having no switching element Q for preventing malfunction,
As described above, an ignition current of several A flows through the detonating element along with the conduction of the detonating switching element Qu on the upstream side, so that detonation of the detonating element could not be avoided. However, the upstream detonating switching element Q
In the case of the air bag detonator 11 provided with the malfunction avoiding switching element Q between u and the battery power supply 7, the current limiting resistor R connected in parallel to the malfunction avoiding switching element Q limits the current. In addition, an ignition current exceeding a safe value does not flow through the detonating element, and unnecessary detonation of the detonating element 15 can be avoided.

In addition, the air bag detonating device 11 has a conventional configuration in which a pair of detonating switching elements Qu and Qd are connected to both ends of the detonating element 2 even if a computing device that issues a deployment command upon collision determination causes a runaway. In comparison with the detonating device 1, the switching element Q for preventing malfunction which functions as a safing sensor is a pair of the switching element Q for detonating.
Because of the fact that it is connected in series to the detonating element 2 together with u and Qd, the malfunction avoiding ability due to the runaway of the CPU 13 is high, and the malfunction avoiding switching element Q determines about 5 ms required for high-speed side collision. Since it has a sufficient responsive conduction capability with respect to time, it is optimal as a safing sensor for a side airbag.

A pair of detonating switching elements Q
Using FETs having different channel structures as u and Qd,
Furthermore, since the switching element Q for malfunction prevention uses an FET having a channel structure different from that of the switching element Qd for detonation on the downstream side, for example, noise generated due to electromagnetic interference even though the deployment command is not issued is generated. Even if one of the switching elements Q, Qu or Qd becomes conductive due to the cause, the other switching element Qd or Q, Qu
Is kept off, thereby eliminating the inconvenience of inadvertent simultaneous conduction of the three switching elements Q, Qu, Qd. Therefore, a remarkable effect can be exhibited as a countermeasure against malfunction particularly in a place where electromagnetic interference is likely to occur, such as an engine room.

In the above-described embodiment, the CPU 13 uses the two-system clock signal CLK that accompanies the code expansion command.
Although the configuration has been described in which 1, 2 is output, it is also possible to provide a configuration in which CPU 13 outputs start-stop synchronous coded data. In this case, it is possible to use no clock signal. Further, in the above embodiment, the case where the switching elements Q, Qu, Qd are constituted by FETs is taken as an example, but these switching elements Q, Qu, Qd can be constituted by other transistors.

[0035]

As described above, according to the present invention,
A CPU that connects an acceleration sensor that detects an acceleration signal and an impact sensor that electrically senses and closes an impact calculates an acceleration signal from the acceleration sensor based on a predetermined arithmetic expression. Since the airbag deployment command coded with a predetermined code is issued when the threshold value is exceeded and a closing signal from the shock sensor is present, a shock sensor functioning as a safing sensor is replaced with a conventional one. By replacing the mechanical acceleration sensor with an electrical sensor such as a semiconductor sensor, and by providing a direct connection to the CPU instead of the conventional ignition current feed path,
While calculating the collision judgment and issuing the ignition command, the impact sensor reliably maintains the closed bear without repeating chattering, etc., and therefore the ignition command itself is cut off and the deployment of the airbag is delayed. In addition, since the response from the detection of the acceleration to the generation of the collision determination signal is accelerated, it is possible to respond to the high-speed request of about 5 ms required for the value collision determination, and to accurately respond to the collision event. CPU capable of deploying airbags and determining collision
However, a configuration in which a deployment command coded according to a predetermined code is generated, a decoder receiving the deployment command decodes the deployment command and issues an ignition command, and an ignition device operated by the ignition command energizes and detonates the detonating element. Therefore, unlike the conventional apparatus in which the ignition device is directly driven by a simple deployment command such as "1" or "0" of a bit, the ignition command obtained by decoding the coded deployment command by a decoder is used. Since the ignition device is driven, the ignition device does not malfunction due to external noise, or the ignition device does not malfunction due to runaway of the collision determination means itself. It has an excellent effect that the detonation can be reliably eliminated.

Further, according to the present invention, the ignition current exceeding the detonation level is applied to ignite and detonate, and a pair of the detonation elements, which act as a deployment trigger of the airbag, are electrically connected to the upstream and downstream sides of the detonation element upon receiving a deployment command. In addition to connecting the detonation switching elements, a current limiting resistor that constantly supplies a safe diagnostic current less than the detonation level is connected in parallel to each of the pair of ignition switching elements. Connect a malfunction-prevention switching element that conducts in response to the deployment command between the battery power supply and a current-limiting resistor that constantly supplies a safe diagnostic current less than the detonation level to this malfunction-prevention switching element. The diagnostic circuit is connected in parallel, and the diagnostic circuit replaces the deployment command with a pair of the switching element for detonation and the switching element for preventing malfunction. A command is issued and selectively turned on, and the voltage at the diagnosis point is determined as a threshold value to diagnose the presence or absence of a circuit abnormality. Compared to the conventional detonator which only connected the detonating switching element to both ends of the detonating element, the malfunction preventing switching element functioning as a safing sensor is connected in series with the detonating element together with the pair of detonating switching elements. As a result, the detonation avoidance capability of the detonating element due to the runaway of the arithmetic unit is high, and the switching element for malfunction prevention has a sufficient prompt conduction capability even for the collision determination time of about 5 ms required for high-speed side collision. It is ideal for avoiding malfunctions for airbags because it has, and a diagnostic command is issued from the diagnostic circuit to turn on the upstream detonation switching element. Even if the downstream switching element and the detonating element are already short-circuited to ground, the current limiting resistor connected in parallel with the malfunction avoiding switching element sets the diagnostic current to the detonation level. Since the safety element is suppressed to a level lower than the safety level, an excellent effect is obtained such that the detonation of the detonating element can be avoided.

In addition, according to the present invention, since the malfunction avoiding switching element is constituted by a transistor that conducts upon receipt of a deployment command having the opposite polarity to at least one of the pair of detonating switching elements, for example, Even if one of the switching elements is turned on due to noise generated due to electromagnetic interference even though the deployment command is not issued, the remaining switching elements remain non-conductive,
This eliminates the inconvenience of inadvertent simultaneous conduction of the three switching elements, and can exert a remarkable effect as a countermeasure against malfunction, particularly in a place where electromagnetic interference is likely to occur, such as an engine room. And so on.

Further, the collision judging means generates the expansion command as serial data of a plurality of bits having a predetermined bit arrangement, and a decoder holds a shift register holding the expansion command of the plurality of bits; A logic circuit that performs a logical decision on the shift output of all bits and outputs a logical decision signal only when the received expansion command matches the predetermined bit arrangement, and amplifies the logical decision signal of the logic circuit, Since output means for outputting the ignition command is provided, it is possible to determine whether or not the bit array of a plurality of bits output as serial data is a predetermined bit array by a shift register and a logic circuit in the decoder. When 2n serial data bits are used as the expansion instruction, 2 @ 2 powers considered as the expansion instruction By judging only a signal having a specific bit arrangement from among the combinations as the expansion command, the probability of malfunction can be reduced to 2 2n-even if it is simply estimated. It is possible to ensure that malfunction of the detonating element due to runaway can be reliably eliminated.

The collision determining means outputs 2n-bit serial data in which the first half n bits and the second half n bits have a polarity inversion relationship as the expansion instruction. Only a signal having a specific bit arrangement among the combinations of the powers is used as an expansion command, and the arrangement is composed of the first half n bits and the second half n bits.
Since the bits are in a special form of bit arrangement having a polarity reversal relationship, even if a pseudo-expansion command of a bit arrangement similar to the expansion command is accidentally generated due to electromagnetic interference,
Such a pseudo-expansion command is irregular noise, which is far from the regularity in which the bit arrangement in the first and second half is in a polarity reversal relationship. This has the effect that the detonation can be reliably eliminated.

In addition, the collision judging means externally supplies two series of mutually synchronized clock signals accompanying the expansion command of the plurality of bits, and the decoder monitors a phase shift of the two series of clock signals. When the phase shift of a certain width or more occurs, the shift register is reset, so that the runaway of the collision judging means can be judged based on the phase shift of the two series of clock signals. It is possible to prevent the detonation of the detonating element based on the runaway.

[Brief description of the drawings]

FIG. 1 is a schematic circuit configuration diagram showing an embodiment of an airbag detonator of the present invention.

FIG. 2 is a circuit diagram showing a specific configuration of a decoder shown in FIG.

3 is a signal waveform diagram of each section of the decoder shown in FIG.

FIG. 4 is a schematic circuit configuration diagram showing an example of a conventional air bag detonator.

[Explanation of symbols]

 Reference Signs List 7 Battery power supply 11 Air bag detonator 12 Acceleration sensor 13 CPU 14 Ignition device 15 Detonating element 16 Shock sensor 20 Decoder 21, 21a, 21b Shift register 22 Logic circuit 22a, 22c AND gate 22b OR gate 23 Output means (Buri driver) 23a Transistor 23b Buffer Amplifier 24 Reset Circuit 24a Exclusive OR Gate 24b Integrator Circuit Q Malfunction Avoiding Switching Element Qu Upstream Initiating Switch Sig Element Qd Downstream Initiating Switching Taisho D Diode R, Ru, Rd Current Limit resistance

Continuation of the front page (56) References JP-A-8-72635 (JP, A) JP-A-10-15492 (JP, A) JP-A-8-69421 (JP, A) JP-A-6-72281 (JP) JP-A-63-207755 (JP, A) JP-A-7-315158 (JP, A) JP-A-8-123710 (JP, A) Table 11-11-507893 (JP, A) 11-506068 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) B60R 21/32

Claims (6)

(57) [Claims] An acceleration sensor for detecting an acceleration signal,
An impact sensor that electrically senses and closes an impact, and calculates an acceleration signal from the acceleration sensor based on a predetermined calculation formula, and the calculation result exceeds a predetermined threshold value and CPU that issues an airbag deployment command coded with a predetermined code when a closing signal is present
A decoder that receives the airbag deployment command supplied from the CPU, decodes the airbag deployment command and issues an ignition command, and operates according to the ignition command supplied from the decoder to trigger the deployment of the airbag. And an ignition device for energizing the detonating element. 2. The ignition device according to claim 1, wherein the ignition device is connected to an initiating element that is energized by an ignition current exceeding an initiating level and initiates ignition, and is connected to an upstream side and a downstream side of the initiating element. A pair of detonating switching elements, a current limiting resistor that is connected in parallel to each of the pair of detonating switching elements and constantly supplies a safe diagnostic current less than the detonation level, and the upstream detonation switching. Connected between the element and battery power,
A malfunction avoiding switching element that conducts in response to the ignition command, and a current limiting resistor that is connected in parallel to the malfunction avoiding switching element and constantly supplies a safe diagnostic current less than the detonation level; The CPU designates one of the pair of the switching element for detonation and the switching element for malfunction prevention, issues a diagnosis command of the same code as the airbag deployment command and selectively conducts the same, and selectively conducts the diagnosis. 2. The airbag detonating device according to claim 1, wherein the voltage is judged as a threshold value to diagnose the presence or absence of a circuit abnormality. 3. The switching device for malfunction prevention,
3. The airbag detonating device according to claim 2, wherein at least one of the pair of detonating switching elements receives an ignition command having a polarity opposite to that of the switching element and conducts. 4. The CPU generates the expansion instruction as serial data of a plurality of bits having a predetermined bit array, and the decoder includes: a shift register that holds the expansion instruction of the plurality of bits; A logic circuit that performs a logical decision on the shift output of all bits and outputs a logical decision signal only when the received expansion command matches the predetermined bit arrangement, and amplifies the logical decision signal of the logic circuit, 2. The airbag detonating device according to claim 1, further comprising an output unit that outputs an ignition command. 5. The airbag detonator according to claim 4, wherein the CPU outputs 2n-bit serial data in which the first half n bits and the second half n bits have a polarity inversion relationship. 6. The CPU externally supplies two series of mutually synchronized clock signals accompanying the multi-bit expansion command, and the decoder monitors a phase shift between the two series of clock signals, and outputs a constant width signal. 5. The airbag detonator according to claim 4, wherein the shift register is reset when the above-mentioned phase shift occurs.