JP3239907B2 - Register allocation method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a register allocating method, and more particularly, to a register allocating method of a compiling device (compiler) for converting a source code into an object code. In some documents, the terms “register allocation ” and “register allocation ” are strictly distinguished as in the following (1) and (2). However, in this specification, the term “register allocation” is described in the following (1). And (2). (1) Register allocation = At a certain point in the program, a set of variables whose values are to be made resident in registers is obtained. (2) Register allocation = Subsequent to the register allocation phase, a register for making the value of a variable resident is selected. (Referring to AVAho et al., Translated by Kenichi Harada, "Compiler 2 (where" 2 "is a Roman numeral)" (1990.10.10)
p.628)

[0002]

2. Description of the Related Art The suitability or unsuitability of register allocation in a compiling device has a great effect on the execution speed of a program. The optimization is a major theme when designing a compiling device. As a technique related to this, there has been a technique described in the following literature. Reference 1) Computer Language, 1981 [6] (US) GJChaiti
n, MAAuslander, AKChandra, J. Cocke, MEHopkin
s and PWMarkstein, "Register Allocation via Color
ing ", p.47-57 Reference 2) Proceedings of the ACM SIGPLAN Symposium o
n Compiler Construction, (June 17-22,1984) (USA)
C. Chow and J. Hennesy, "Register Allocation by Prior
ity-based Coloring ", p.222-232 (ACM SIGPLAN = Assoc
iation for Computing Machinery Special interest gr
oup on programming languages) Reference 3) Japanese Patent Application Laid-Open No. 1-103742, "Optimal compilation method"

[0003]

In the technique of Document 1, register allocation is performed by applying a graph coloring method.
For example, in the case of a source code as shown in FIG. 6A, first, a live range of a variable is obtained (FIG. 6B), and an interference graph is generated from the live range (FIG. 6C). Each variable is assigned to a register (Reg1 to Reg3) based on this (FIG. 6D). In this prior art, the entire live range of each variable is set as the minimum unit for register allocation. For this reason, for example, as shown in FIG. 7A, the variable (E) is increased by one, and only a small part of the live range interferes with the other (C). Even if assignment is possible, any of the interfering variables is subject to spilling as a whole live range (not subject to assignment), resulting in inefficient object code generated. There was a case.

In the literature 2, the above problem is solved by dividing the live range of the variable to be spilled into a plurality of sections after the coloring is completed. However,
Since a new node is added to the initially generated interference graph and recalculation is performed, the calculation time becomes long, and the live range of the variable to be divided may not be appropriate. For example, FIG.
As shown in (B), the variables A and B interfere in the section IR2, and the variable A is referred to 10 times outside this section IR2, and is not referenced at all in the interference section IR2 except for the end point PE. It is assumed that B is referred to three times only in the section of the interference section IR2. In the result of the graph coloring, it is the variable B that is to be spilled, and B is divided.
However, if the above situation occurs in the interference section IR2 causing the spill, it is better to leave the variable B, which has a larger number of references, as the one to be assigned to the register, and rather to divide the variable A, Code execution efficiency is high.

[0005] In Reference 3, variables that have not been assigned after coloring are also divided. However, the resulting node is not newly added to the interference graph, and the remaining variables are set so that the lifetime of the higher priority one among the remaining variables becomes as long as possible with respect to the free interval of the remaining register. Is divided and assigned. However, even in this prior art, as in the case of the above-mentioned document 2, no consideration is given to the reference situation of the variable of the already-colored interference part, and the disadvantage pointed out in the above-mentioned document 2 is eliminated. Not. SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned drawbacks of the prior art and to provide a register allocating method capable of optimizing register allocation in an optimizing processing unit of a compiling device.

[0006]

In order to achieve the above object, according to the present invention, in a compiling apparatus for converting a source code into an object code, an appearance state of each variable is inspected in each section obtained by dividing a predetermined number of instructions. Appearance state inspection means and allocation candidate extraction means for calculating the priority of each variable in each section based on the appearance state of each of the variables, and assigning variables up to the number of registers in descending order of priority as allocation candidates And all candidate priorities calculating means for calculating priorities for all the variables based on the priorities in the respective sections in which each of the variables has been assigned as an allocation candidate in each section, and Allocation processing for allocating the variable to the empty register of the section for each section in which the variable appears, in order of priority from all variables. And means.

[0007]

In the compiler device, object code generation is performed through source code parsing, intermediate language generation, and optimization processing. The register allocation method of the present invention
This is performed as one of the optimization processes. First, a series of instructions of the generated intermediate language are divided into predetermined numbers,
In each section (hereinafter referred to as a “window”), the appearance state of each variable is checked. The check of the appearance state refers to a check of whether the life span of the variable is at the beginning or end within the window, and how many times the variable is referenced or substituted in the window. At the beginning and end of the live range, variables are moved between the register and the memory.
This processing is expensive (processing time is required). Therefore, a variable having a start point and an end point in the window of interest is calculated to have a lower register allocation priority than a variable having a continuous live range there. As is well known, reference,
A variable having a larger number of substitutions or the like has a higher processing speed when it is stored in a register. Therefore, the one with the larger number of times is calculated with the higher priority of register allocation. Based on these appearance states, the priority of each variable in each window is calculated. Variables up to the number of registers in descending order of priority are assigned to registers in the window. For example, if there are seven variables used in the window and three registers, the variables with the first to third priorities are set as allocation candidates there.

[0008] With respect to all the variables which have been assigned as candidates in each window in this way, the priorities for all the variables are calculated based on the priorities in the respective windows in which they appear. You. For example, if the number of registers is 3
If there are three, three allocation candidates are extracted in each window. Here, the windows x, y, u in the window 3 and the variables j, u, y in the window 4, such as ten windows, are collected. There are 27 variables up to z. The priority order from No. 1 to No. 27 is determined for these 27 variables. This priority is determined, for example, as follows. That is, when the priority in each window is set to be proportional to the magnitude of the evaluation value, the evaluation value given to the variable is integrated for all the windows in which the same variable is a candidate for allocation. The higher the value, the higher the priority. In accordance with this priority order, for all windows in which the variable appears, allocation of the variable to an empty register of each window is performed. For example, it is assumed that the priority of the variables exemplified above is u, h, j,..., And that the variable u also appears in windows 6 to 10. The variable u is allocated first to the registers in all of the windows 6-10, starting with the non-highest priority windows 3,4. However, it cannot be allocated to windows that are not allocation candidates.
Next, according to the above-described priority, register allocation is performed for the variable h in all windows in which it appears. When there are no more variables to be allocated in all the windows, the register allocation processing ends, and the information of register allocation of each window is given to the post-processing code generation unit, and coding is performed based on this information. .

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of the present invention will be described below with reference to the illustrated embodiments. FIG. 2 shows a schematic configuration of the compiling device 1. As described above, the source code is first parsed by the parser 2. Next, the intermediate language is converted into an intermediate language by the intermediate language generation unit 3. The intermediate language is subjected to register allocation and other optimization processing according to the present invention in the optimization processing unit 4. Then, it is coded in the code generation unit 5 to be an object code.
Avaho et al., "Compilers Principles, Technique, andTools", describe various optimization processes such as common subexpression elimination, instruction rearrangement, and peephole optimization.
(1986) Addison-Wesley Publishers Limited (US), etc., and other processes of the compiler unit are also described in the same book.

FIG. 1 shows the configuration of an allocating apparatus according to an embodiment of the present invention. This device 41 is arranged in the optimization processing unit 4. It should be noted that components that have already been described, such as the front and rear units, are given the same reference numerals, and will not be described again. In the figure, reference numeral 31 denotes an intermediate language holding unit which holds the intermediate language generated by the intermediate language generation unit 3. 411
Is an appearance state checker which reads a series of instructions of this intermediate language at a predetermined number (for each window), checks the appearance state of each variable, and generates information representing the appearance state of each variable in each window. The information is stored in the information storage unit 412. Here, the check of the appearance state means whether the life span of the variable starts or ends in the window, and how many times the variable is referred to or substituted in the window. Say. As described above, at the beginning and end of the live range, variables are moved between the register and the memory. This processing is expensive (processing time is required). Therefore, a variable having a start point and an end point in the window of interest is calculated as having a lower priority than a variable having a continuous live range there. In addition, the processing speed when a variable is placed in a register increases as the number of times of reference or substitution increases. Therefore, it is calculated that the higher the number of times, the higher the priority of register allocation.

Reference numeral 413 denotes an allocation candidate extraction unit which calculates the priority of each variable in each window based on the information on the appearance state of each of these variables stored in the appearance information holding unit 412. In the figure, “assignment” is displayed as “assignment”. For example, as mentioned above, if there are seven variables used in the window and three registers,
The variables with the first to third priorities are extracted as allocation candidates in the window, and the allocation candidate holding unit 414
Is stored in A specific calculation example of the priority will be described later.
Reference numeral 415 denotes an all-candidate-priority calculating unit which determines all the allocation candidates stored in the allocation-candidate holding unit 414 based on the priorities in the respective windows in which each appears.
Calculate the priority over all variables. For example, as described above, if the number of registers is three, three allocation candidates are extracted in each window. In window 3, variables x, y, u, and in window 4, variables j, u, y,
Thus, in each window, for example, each of the ten windows, there are 27 variables a to z. The priority order from No. 1 to No. 27 is determined for these 27 variables. This priority is determined as follows in this embodiment. In other words, the one with the larger evaluation value has higher priority,
For the same variable, the evaluation values given in all the windows in which it is a candidate for allocation are integrated.
The integrated values are sorted in the order of the size, and the larger one is determined to have a higher priority. The all-candidate-priority calculating unit 415 stores the information on the priorities of all the allocation candidates calculated in this way in the all-candidate-priority holding unit 416.

Reference numeral 417 denotes an allocation processing unit which allocates all windows in which the variable appears to empty registers according to the priority order. For example, for the variables exemplified above, the priority order is u,
h, j,..., and this variable u also appears in windows 6 to 10. The allocation processing unit 417 allocates the register to the variable u first in the windows 3 to 4 which are not the highest priority in the above example and in all of the windows 6 to 10. Thereafter, registers are allocated to the variables in all the windows in which the variable appears in accordance with the above-described priority order. When there are no more allocation candidate variables in all windows, the allocation processing unit 417 ends the processing,
The register allocation information generated in this process is stored in the allocation information holding unit 51. The post-processing code generation unit 5 performs a coding process based on this information.

FIG. 3 shows a specific processing example. When the source code as shown in FIG. 7A is parsed and converted into an internal representation as shown in FIG. 7B, there are six load / store instructions which are expensive in this state. For example, assuming three instructions as one window, as shown in FIG.
The live range of c is divided. These windows W1 to W1
The priority of each variable in W3 is calculated by the following equation (1). Assuming that the number of registers is 2, the result is as shown in FIG. Those with the highest priority are shown on the left, and those that are evicted in the memory are displayed in parentheses in the window. Next, all the allocation candidates of the three windows W1 to W3 are extracted and their priorities are integrated. Here, it is assumed that the point 2 is simply given to the first priority and the point 1 is given to the second, regardless of the expression (1) described later. The variable b is the accumulated point “5”,
c becomes “3” and a becomes “1”.

It is assumed that the larger the accumulated points, the higher the priority. Therefore, the variable b has the highest priority, and for this variable b, all the windows W1 to
In W3, the register 1 of that part is allocated (FIG. 3
(E)). The second priority was variable c. The live range of the variable c is the windows W2 and W3. There are still empty registers (register 2) in these windows.
The variable c is assigned to this (FIG. 3E). Next, a register is allocated to the variable a. The life span of this variable a was the window W1. In this window, register 2 is still empty. The variable a is assigned to this part of the register 2 (FIG. 3E). FIG.
The register allocation information as shown in (E) is supplied to the code generation unit 5 via the allocation information holding unit 51. According to this information, the code generation unit 5
Replacing the internal representation of (B) results in FIG. 3 (F). Although the number of instructions is increased by 1, the costly instruction, that is, the load / store instruction from the memory, is shown in FIG.
The number is extremely reduced from six in (B) to two. For this reason, the execution efficiency is improved.

The priority is calculated, for example, by the following equation (1). Variables with higher priority values are determined to have higher priority, and in each window, variables are extracted by the same number as the number of registers in descending order of priority, and these are set as allocation candidates. Priority = load profit × the number of references in the window + store profit × the number of substitutions in the window−movement cost × n (Equation 1) The contents of each item are as follows. Load profit: execution time saved when placing the variable in a register compared to referencing in memory Store profit: execution time saved when placing the variable in a register compared to storing in memory Transfer cost: Time required to transfer between memory and register. n: Number of times of movement between memory registers.

It is known that the greater the number of references and the number of substitutions, the more advantageous it is to place them in a register. Therefore, also in this equation (1), the values of “load profit × the number of references in the window” and “store profit × the number of substitutions in the window” are factors that increase the priority by making the values plus the priority. On the other hand, variables must be moved between memory registers at the beginning and end of the live range in order to place them in registers. The cost (processing time) of this transfer is high. Therefore, the value of "movement cost x n" is set to minus the priority,
This is an element that lowers the priority. The number of times of movement n
Is counted by adding 1 when the live range of the variable starts or ends in that window, and if the live range spans the previous and next windows. "N = 0", "n = 1" if there is a start point or end point in the window, "n = 2" if there is both a start point and end point, and the higher the value, the lower the priority of the variable.

FIG. 4 shows a flow until an allocation candidate is extracted. This flow is for one variable. A plurality of variables are processed. For these variables, the entire flow of FIG. 4 may be repeated for the number of variables, or all the variables may be processed in parallel at each step. good. First, the value of n in equation (1) is set to an initial value “0” (step S1). The word “step” will be omitted hereinafter. Next, a code corresponding to the size of the window is read (step S2). Next, the number of movements n is obtained (S3 to S6). If the live range has started from the window or the live range has ended in the window, 1 is added to n. Next, the instructions for one window are sequentially checked, and the number of references and the number of substitutions of the variable are counted (S7). The processing up to this point is executed by the appearance state inspection unit 411, and these values are stored in the appearance information holding unit 412.

Next, these values are substituted into equation (1), and the priority of the variable is calculated (S8). The calculated priority of the variable is stored in the allocation candidate holding unit 414 (S9). The processing in S8 and S9 is performed by the allocation candidate extracting unit 413. These processes (S1 to S
Step 9) is repeated for all windows (S10).
When the processing in FIG. 4 is completed, the allocation candidate extracting unit 413 sorts the variables in the allocation candidate holding unit 414 so that the variables are arranged in order of magnitude in priority. The variables corresponding to the number of registers from the one with the highest priority for each window are left as allocation candidates for the window, and the allocation candidate holding unit 41
4 again. When the processing of FIG. 4 is completed for all variables, the allocation candidates for each window may be left for the registers. In this case, the allocation candidate holding unit 414 is provided with only a storage area for the number of registers for each window from the beginning. At the time of storing the priority of each variable, it is first checked whether there is a free space in the window area, and if there is no free space, it is stored as it is. If there is no free space, the new stored priority is added to the stored priority. Sort by adding degrees, and store priorities for the number of areas in descending order. In this way, when the processing in FIG. 4 is completed for all variables, the allocation candidates for the registers remain in the area of each window of the allocation candidate holding unit 414.

FIG. 5 shows a flow of the register allocating process. First, with respect to all the variables which are the allocation candidates in each window, the priority given to the variable is integrated in each window, and the variables are sorted in the order of the magnitude of the integrated value (S11). This processing is performed by the all candidate priority calculation unit 415
The priority information is stored in the all candidate priority holding unit 416. Here, the one with the larger integrated value has the higher priority. From the variable with the highest priority,
In all the windows in which it appears, the variable is allocated to an empty register (S12). This process is continued by the allocation processing unit 417 until there are no more variables that are candidates for allocation (S13). After the processing is completed, the generated allocation information is stored in the allocation information holding unit 51. The code generation unit 5 generates a code based on this information. Finally, a description will be given of the correspondence between the structure of the claims and the structure of the embodiment having different names. Reference numeral 411 corresponds to an appearance state inspection unit. The allocation candidate extracting unit 413 corresponds to an allocation candidate extracting unit. The all-candidate-priority calculating unit 415 corresponds to all-candidate-priority calculating means. The allocation processing unit 417 corresponds to an allocation processing unit.

[0020]

As described above, according to the present invention, instructions are divided into predetermined numbers, the appearance state of each variable is examined for each section, and the priority of each variable in each section is determined based on the state. Calculate and assign variables from the highest priority up to the number of registers as allocation candidates, and for all variables that are allocation candidates in each section, the priority in each section in which each appears , The priority is calculated, and in order from the highest priority, each section in which the variable appears is assigned to an empty register in that section. Therefore, the registers are allocated to the registers in order from the one with the highest effect of register allocation, and register allocation more efficient than the conventional method can be realized.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment apparatus.

FIG. 2 is a block diagram illustrating a configuration example of a compiling device.

FIG. 3 is a diagram showing an example of register allocation according to the present invention.

FIG. 4 is a flowchart illustrating an example of an allocation candidate extraction procedure for each window.

FIG. 5 is a diagram showing an example of a register allocation procedure.

FIG. 6 is a diagram (part 1) for explaining a procedure of register allocation according to the related art.

FIG. 7 is a diagram (part 2) for explaining the procedure of register allocation according to the conventional technique.

[Explanation of symbols]

 1 Compiling device 411 Appearance state inspection means 413 Assignment candidate extraction means 415 All candidate priority calculation means 417 Assignment processing means

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-4-213118 (JP, A) JP-A-62-219130 (JP, A) Yasuo Matsuoka et al., “Optimization Techniques in Compilers”, Interface, Japan, CQ Publishing Co., Ltd., March 1, 1989, Vol. 15, No. 3, pp. 196-210, (Patent Office CSDB literature number: CSNW199900633004) Toru Onuki, "Interrupt processing, parallel control and code tuning", Interface, Japan, CQ Publishing Co., Ltd., March 1, 1989, Vol. 15, No. 3, pp. 264-272, (Patent Office CSDB Document No .: CSNW199900633009) Hitoshi Abe et al., "Register Allocation by Living Interval Division", Proc. Of the 42nd National Convention of IPSJ, Volume 5, Japanese, Information Processing Corporation Society, February 25, 1991, pp. 113-114 (58) Field surveyed (Int.Cl. ⁷ , DB name) G06F 9/45 G06F 9/46 G06F 9/30-9/42 G06F 9/06 410 JICST file (JOIS) INSPEC (DIALOG) CSDB (Japan Patent Office)

Claims (1)

(57) [Claims] 1. A compiling apparatus for converting a source code into an object code, comprising: an appearance state inspection unit for inspecting an appearance state of each variable in each section obtained by dividing an instruction by a predetermined number; Assignment candidate extracting means for calculating the priority of each variable in each section based on the priority, and assigning variables up to the number of registers in descending order of priority as allocation candidates; and all variables assigned as allocation candidates in each section. , All candidate priority calculating means for calculating the priority of all the variables based on the priority in each section in which each appears, and in order from the highest priority for all the variables, Allocating means for allocating the variable to an empty register of the section for each section in which Perfomed.