JP3208319B2 - Method for manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent accidental separation of a rear side electrode by performing back-etching which cleans the rear surface of a substrate and after that, plasma-processing a silicon surface. SOLUTION: A silicon substrate 11 is provided, and a base area 14 is formed on the surface of an epitaxial layer 12. Then, the rear surface of the substrate 11 is back-ground for reducing a board thickness, then, at the same time emitter diffusion is performed and high concentration defuse layer 19 is formed on the rear surface side of the substrate 11 as well. After formation of a contact hole and electrode 20, in order to clean the rear surface of the substrate 11 polluted in the process, wet etching is performed. On the silicon surface which is mirror-finished by wet etching, irregularities are formed again by plasma treatment, so that a back surface electrode 21 is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device having a step of chemically etching the back surface of a substrate, and to the prevention of peeling of the back electrode.

[0002]

2. Description of the Related Art As an example, a structure of a power transistor is shown in FIG. The power transistor has a P-type substrate on the surface of an N-type epitaxial layer 2 formed on an N + type substrate 1.
A P-type base region 3 is formed, an N + -type emitter region 4 is formed on the surface of the P-type base region 3, and an electrode 5 is formed to contact the P-type base region 3 and the N + -type emitter region 4, respectively. . An insulating film and a bonding pad are formed thereon to complete the element formation. After that, the back side of the wafer is back-ground to reduce the thickness, and the steps of back electrode formation, dicing, and die bonding are performed. . 6 is a P + guard ring, and 7 is an N + channel stopper.

Normally, a back grinding process is performed after the completion of element formation. However, in order to further improve the surface concentration of the N + type substrate 1 on the back side and reduce the contact resistance, for example, when the thickness of the wafer is 300 μm or more. After the back grinding step, the emitter may be diffused. That is, the back side of the substrate 1 after the base diffusion has been finished is removed by a back grinding process, and as shown in FIG.
After that, a contact hole is formed, an aluminum electrode 5 is formed, a jacket insulating film is formed, and chemical etching is performed to clean the surface of the substrate 1 contaminated in the steps up to this point. The back electrode 9 is formed as shown in FIG.

[0004]

However, hydrofluoric acid +
When chemical etching is performed using a mixed solution of nitric acid and acetic acid, the back surface of the substrate 1 has a smooth surface as if it has been mirror-finished, and the adhesive strength with the back electrode 9 is weakened. If the adhesive strength is weak, the back electrode 9 is peeled off from the silicon surface and remains on the dicing sheet when the divided chips are picked up after bonding and dicing the wafer to the dicing sheet, which hinders the assembling process. There was a disadvantage.

[0005]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional problems. The present invention has been made in consideration of the above-mentioned problems. An object of the present invention is to provide a method of manufacturing a semiconductor device having an increased bonding strength.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below in detail with reference to the drawings. Referring to FIG. 1A, a silicon substrate having an N-type epitaxial layer 12 formed as a collector layer on an N + substrate 11 is prepared. P + type guard ring region 1 on the surface of epitaxial layer 12
3 and then a P-type base region 14 is formed.

Referring to FIG. 1B, oxide film 15 on the surface is formed.
A thick insulating film such as a photoresist film is applied thereon to form a protective film 16. The protective film 16 is attached on a workbench, and the back surface of the substrate 11 is back-ground. Since this step is grinding using abrasive grains, the surface becomes a rough surface with rough irregularities.
Further, the thickness of the wafer including the epitaxial layer 12 and the substrate 11 is ground to about 250 microns.

Referring to FIG. 1C, after removing the protective film 16, the oxide film 15 on the side of the epitaxial layer 12 is opened by photoetching to selectively diffuse phosphorus, and the emitter region 1 is removed.
7 and a channel stopper 18 are formed. This completes the device formation. At the same time, the impurities during the emitter diffusion in the diffusion furnace are spilled and diffused to the back side of the substrate 11 to form the high concentration diffusion layer 19. This high concentration diffusion layer 19
The impurity concentration is about 10 × 10, which is about the same as that of the emitter region 17, and has a diffusion depth of about 5 μm.

Referring to FIG. 2A, a contact hole for a base / emitter electrode is formed in oxide film 15 on epitaxial layer 12, and an aluminum electrode 20 is formed by sputtering deposition and patterning of an aluminum layer. At the same time as the formation of the aluminum electrode 20, the formation of the emitter / base bonding pad is also performed. A silicon nitride film is deposited as a passivation film on the electrode 20 by CVD, and an opening is formed on the bonding pad (not shown).

Referring to FIG. 2B, the wafer is wet-etched with a mixed solution of hydrofluoric acid and nitric acid for about 20 seconds. This is to remove impurities (resist of photoresist, silicon nitride film, natural oxide film, etc.) attached to the back surface of the substrate 11 in a step after the back grinding step. At this time, it has been confirmed by SEM analysis that the fine irregularities formed in the back grinding process disappear by wet etching and the surface state becomes closer to a mirror surface. Note that the high concentration diffusion layer 19 formed by the emitter diffusion must not be extinguished. Thereafter, the back surface of the wafer is subjected to plasma processing in an atmosphere of CF4 gas or CF4 + O2 to form irregularities on the silicon surface on the back surface of the substrate 11 to a state rougher than the state after the back grinding step. This process is used in common with the process of removing the natural oxide film formed on the silicon surface and immediately sputtering or vapor-depositing the back electrode 21 by using a barrel-type plasma device for about 5 minutes and a single-wafer-type plasma device. About 3
By performing the treatment for 0 seconds, considerable irregularities could be formed on the silicon surface.

Referring to FIG. 2C, the back electrode 21 is formed immediately after forming the irregularities by the plasma processing. The back electrode 21 has a thickness of 500 in order from the silicon side.
It is composed of Angstrom titanium (Ti), 1000 Angstrom thick titanium nickel (Ti · Ni), 5000 Angstrom thick nickel (Ni), and 1000 Angstrom thick gold or silver. Titanium is for adhesion with silicon (Si), gold or silver is for solder bonding during die bonding, and nickel is for adhesion between titanium and gold or silver. Titanium / nickel acts as a barrier layer that prevents solder from contacting the titanium layer. Since the back electrode 21 has irregularities formed on the silicon surface, the contact area between titanium and silicon increases, and the adhesion between the two can be further enhanced.

Thereafter, an adhesive dicing sheet is attached to the back surface of the wafer, the wafer is divided into individual chips by dicing and breaking along a dicing line, and the individual chips are distanced by stretching the dicing sheet. Separate from Then, the process proceeds to a die bonding step, in which the chip is sucked by a suction collet, peeled off from the dicing sheet, and fixed to a tab portion of a separately prepared lead frame by soldering.

In the present invention, since the adhesion of the back electrode 21 is enhanced, it is possible to avoid a problem that the back electrode 21 remains on the dicing sheet due to peeling from the dicing sheet. In addition, since the plasma treatment for forming the irregularities is performed simultaneously with the removal of the natural oxide film, the process can be simplified.

[0014]

As described above, according to the present invention,
After the substrate 11 is cleaned by wet etching, irregularities are formed on the surface by plasma processing, so that the adhesion strength with the back electrode 20 is increased, and the problem of peeling off of the back electrode 21 in the subsequent assembly process can be avoided. . In addition, since the plasma treatment for forming the irregularities is performed simultaneously with the removal of the natural oxide film, the process can be simplified. And
By forming a high concentration diffusion layer on the back side of the substrate 11, the contact resistance can be reduced.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view for explaining the present invention.

FIG. 2 is a cross-sectional view for explaining the manufacturing method of the present invention.

FIG. 3 is a cross-sectional view for explaining a conventional example.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/28-21/288 H01L 21/44-21/445 H01L 29/40-29/43 H01L 29 / 47 H01L 29/872

Claims (3)

(57) [Claims] A step of back-grinding the semiconductor wafer to a desired thickness; and etching the back side of the semiconductor wafer with an etchant containing at least hydrofluoric acid and nitric acid so that the irregularities formed by the back-grind are mirror-finished. A step of bringing the back side of the semiconductor wafer to plasma etching to form irregularities again on the front side; a step of forming a back side electrode on the back side of the semiconductor wafer; and dividing the semiconductor wafer into individual parts. A method for manufacturing a semiconductor device, comprising: a step of forming a semiconductor chip; and a step of die-bonding the semiconductor chip. A step of back grinding the semiconductor wafer to a desired thickness; a step of forming a diffusion region on the front side of the semiconductor wafer and simultaneously performing a high concentration diffusion on the back side of the semiconductor wafer; the back side of the semiconductor wafer is etched with an etchant containing at least the boiling acid and nitric acid, the back gley
In the step after the step of performing
A step of the unevenness formed by the removal of the adhered impurities and the back-grinding a state close to the mirror surface, forming a re uneven surface to the back surface of the semiconductor wafer by plasma etching, the back surface of the semiconductor wafer A step of forming a back electrode on the substrate, a step of dividing the semiconductor wafer to form individual semiconductor chips, and a step of die-bonding the semiconductor chips. 3. The method according to claim 1, wherein the back electrode is titanium / titanium / nickel / nickel / gold or titanium / titanium in order from the silicon side.
3. The method for manufacturing a semiconductor device according to claim 1, wherein the method is titanium / nickel / nickel / silver.