JP3136079B2 - Optical semiconductor device and method of manufacturing the same - Google Patents

Optical semiconductor device and method of manufacturing the same

Info

Publication number
JP3136079B2
JP3136079B2 JP07163720A JP16372095A JP3136079B2 JP 3136079 B2 JP3136079 B2 JP 3136079B2 JP 07163720 A JP07163720 A JP 07163720A JP 16372095 A JP16372095 A JP 16372095A JP 3136079 B2 JP3136079 B2 JP 3136079B2
Authority
JP
Japan
Prior art keywords
light
chip
resin
semiconductor device
receiving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP07163720A
Other languages
Japanese (ja)
Other versions
JPH0918028A (en
Inventor
光章 中野
敏之 一ノ瀬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP07163720A priority Critical patent/JP3136079B2/en
Publication of JPH0918028A publication Critical patent/JPH0918028A/en
Application granted granted Critical
Publication of JP3136079B2 publication Critical patent/JP3136079B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Light Receiving Elements (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明の光半導体装置及びその製
造方法は、特に受光装置の構造及びその製造方法に関す
るものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical semiconductor device and a method of manufacturing the same, particularly to a structure of a light receiving device and a method of manufacturing the same.

【0002】[0002]

【従来の技術】図14は従来の光半導体装置を示す図で
あり、(a)は平面図であり、(b)は側面図である。
2. Description of the Related Art FIGS. 14A and 14B show a conventional optical semiconductor device. FIG. 14A is a plan view and FIG. 14B is a side view.

【0003】図に示すように、従来の光半導体装置は、
チップ搭載用リード(1次側リード)1及びチップ結線
用リード(2次側リード)2とからなるリードフレーム
3と、前記チップ搭載用リード1の載置片1aに導電性
接着剤を介して搭載され、裏面電極が電気的に接続され
てなる受光チップ4と、該受光チップ4の表面電極と前
記チップ結線用リード2との間を電気的に接続する金線
5と、前記受光チップ4,載置片1a及び金線5を被覆
する略直方体状の透光性樹脂6とを備えてなる構成であ
る。
[0003] As shown in the figure, a conventional optical semiconductor device comprises:
A lead frame 3 composed of a chip mounting lead (primary side lead) 1 and a chip connection lead (secondary side lead) 2 and a mounting piece 1a of the chip mounting lead 1 via a conductive adhesive. A light receiving chip 4 mounted and electrically connected to a back electrode, a gold wire 5 for electrically connecting a front electrode of the light receiving chip 4 and the chip connection lead 2, And a substantially rectangular parallelepiped light-transmitting resin 6 covering the mounting piece 1 a and the gold wire 5.

【0004】上述した光半導体装置は、基板等への実装
の際、リードフレーム3の露出部分にリードフォーミン
グが行われ、ディッピングやリフローにより実装され
る。
The above-described optical semiconductor device is mounted on a substrate or the like by performing lead forming on an exposed portion of the lead frame 3 and dipping or reflowing.

【0005】例えば、挿入型光半導体装置においては、
基板に設けられた位置決め孔(スルーホール)にリード
フレームを挿入して固定(仮固定)するため、リードフ
レーム3の露出部分が略同一方向に折り曲げられ、リー
ドフレーム3の露出部分を基板に挿入固定(仮固定)
後、ディップ半田付け法やリフロー半田付け法によって
実装される。
For example, in an insertion type optical semiconductor device,
In order to insert and fix (temporarily fix) the lead frame into the positioning holes (through holes) provided in the substrate, the exposed portion of the lead frame 3 is bent in substantially the same direction, and the exposed portion of the lead frame 3 is inserted into the substrate. Fixed (temporary fixed)
Thereafter, mounting is performed by a dip soldering method or a reflow soldering method.

【0006】また、面実装型光半導体装置においては、
リードフレーム3の露出部分が透光性樹脂6の底面と面
一となるよう折り曲げられ、リードフレーム3の透光性
樹脂底面と面一部分を基準として基板に半田付けして固
定(仮固定)したり、また透光性樹脂6の底面を接着剤
で基板に固定(仮固定)した後、ディップ半田付け法や
リフロー半田付け法によって面実装される。
In a surface-mount type optical semiconductor device,
The exposed portion of the lead frame 3 is bent so as to be flush with the bottom surface of the translucent resin 6, and is fixed (temporarily fixed) by soldering to the substrate with reference to the translucent resin bottom surface and a part of the surface of the lead frame 3. Alternatively, after the bottom surface of the translucent resin 6 is fixed (temporarily fixed) to the substrate with an adhesive, it is surface-mounted by dip soldering or reflow soldering.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、従来の
光半導体装置は、外装パッケージが透光性樹脂6にて構
成されているために、例えば側面側からの外乱光の入光
によって、光学系に誤動作等の影響が受けやすい構造と
なっている。
However, in the conventional optical semiconductor device, since the outer package is formed of the translucent resin 6, for example, the optical system is disturbed by the input of disturbance light from the side. The structure is susceptible to malfunctions and the like.

【0008】また、面実装型光半導体装置においては、
該面実装型光半導体装置を基板上の所定位置に搭載する
場合に、仮固定の基準とする部分が透光性樹脂6の底面
とリードフレーム3の露出部分しかなく、これらの位置
合わせ精度に高精度を要する。
In a surface-mount type optical semiconductor device,
When the surface-mount type optical semiconductor device is mounted at a predetermined position on the substrate, the only reference portion for temporary fixing is only the bottom surface of the translucent resin 6 and the exposed portion of the lead frame 3. Requires high precision.

【0009】その理由としては、例えば、基板上の所定
位置(光軸位置)からずれて搭載された場合、これによ
って光学系にずれが生じてしまい、本来の機能を果たす
ことが困難となるためである。
The reason for this is that, for example, if the optical system is mounted at a position shifted from a predetermined position (optical axis position) on the substrate, this causes a shift in the optical system, making it difficult to perform its original function. It is.

【0010】本発明は、上記課題に鑑み、外乱光の入光
防止が図れる光半導体装置、及び外乱光の入光防止が図
れ、且つ高精度な光軸調整が図れる光半導体装置及びそ
の製造方法の提供を目的とするものである。
SUMMARY OF THE INVENTION In view of the above problems, the present invention provides an optical semiconductor device capable of preventing disturbance light from entering, an optical semiconductor device capable of preventing disturbance light from entering, and a highly accurate optical axis adjustment, and a method of manufacturing the same. The purpose is to provide.

【0011】[0011]

【課題を解決するための手段】本発明の請求項1記載の
光半導体装置は、リードフレームと、該リードフレーム
に搭載される受光チップと、該受光チップを被覆する透
光性樹脂とを備えた光半導体装置において、受光窓を備
え前記透光性樹脂の受光面を被覆するとともに平面視で
外周部分が前記透光性樹脂よりも突出する遮光マスク
と、該遮光マスクを保持するとともに前記受光面を除く
透光性樹脂表面を被覆する遮光性樹脂とを設けてなるこ
とを特徴とするものである。
According to a first aspect of the present invention, an optical semiconductor device includes a lead frame, a light receiving chip mounted on the lead frame, and a light-transmitting resin covering the light receiving chip. The optical semiconductor device has a light-receiving window, covers the light-receiving surface of the light-transmitting resin, and
A light-shielding mask having an outer peripheral portion protruding beyond the light- transmitting resin; and a light-shielding resin holding the light-shielding mask and covering a light-transmitting resin surface excluding the light-receiving surface. It is.

【0012】また、本発明の請求項2記載の光半導体装
置は、リードフレームと、該リードフレームに搭載され
る受光チップと、該受光チップを被覆する透光性樹脂と
を備えた光半導体装置において、受光窓を備え前記透光
性樹脂の受光面を被覆する遮光マスクと、該遮光マスク
を保持するとともに前記受光面を除く透光性樹脂表面を
被覆する遮光性樹脂とを設けてなり、前記遮光マスクに
前記遮光性樹脂より外方に突出する突出部を備え、該突
出部に位置決め手段を設けてなることを特徴とするもの
である。
Further, an optical semiconductor device according to a second aspect of the present invention is mounted on a lead frame and the lead frame.
A light-receiving chip, and a light-transmitting resin covering the light-receiving chip.
An optical semiconductor device comprising: a light receiving window;
Light-shielding mask for covering a light-receiving surface of a conductive resin, and the light-shielding mask
And the translucent resin surface excluding the light receiving surface
And a light-shielding resin to be coated, wherein the light-shielding mask includes a protrusion protruding outward from the light-shielding resin, and positioning means is provided on the protrusion.

【0013】さらに、本発明の請求項3記載の光半導体
装置は、前記突出部が前記遮光性樹脂の相異なる側面か
ら相異なる方向に突出してなり、前記位置決め手段が該
各突出部の前記受光チップ中心から均等な位置に設けら
れてなることを特徴とするものである。
Further, in the optical semiconductor device according to a third aspect of the present invention, the protrusions protrude from different side surfaces of the light-shielding resin in different directions, and the positioning means detects the light reception of each of the protrusions. It is characterized by being provided at a uniform position from the center of the chip.

【0014】加えて、本発明の請求項4記載の光半導体
装置は、複数個のチップ搭載用リード及び該チップ搭載
用リードと同数のチップ結線用リードをそれぞれ一定の
配置ピッチにて並置してなるリードフレームを形成する
工程と、前記各チップ搭載用リードに受光チップを搭載
する工程と、それぞれの受光チップとチップ結線用リー
ドとを金線にて電気的に接続する工程と、前記各受光チ
ップをそれぞれ透光性樹脂にて被覆する工程と、前記チ
ップ搭載用リードの配置ピッチと同一ピッチで前記チッ
プ搭載用リードと同数の受光窓を備えた遮光マスクを形
成する工程と、該遮光マスクに前記チップ搭載用リード
よりも1つ多い数の位置決め手段形成用窓を前記受光窓
と同一ピッチで且つ1/2ピッチずれた位置に形成する
工程と、それぞれの受光部の中心と受光チップの中心と
を一致させた状態で前記遮光マスクを透光性樹脂の受光
面に配置する工程と、遮光性樹脂により前記金属マスク
を保持するとともに受光面を除く透光性樹脂表面を被覆
する工程と、前記チップ搭載用リードの並置方向に対し
て垂直方向であって、且つ前記位置決め手段形成用窓の
中心を通過する軸にて分割する工程とを備えてなること
を特徴とするものである。
In the optical semiconductor device according to a fourth aspect of the present invention, a plurality of chip mounting leads and the same number of chip connection leads as the chip mounting leads are juxtaposed at a constant arrangement pitch. Forming a lead frame, mounting a light receiving chip on each of the chip mounting leads, electrically connecting each light receiving chip and a chip connection lead with a gold wire, A step of coating each chip with a translucent resin; a step of forming a light-shielding mask having the same number of light-receiving windows as the chip-mounting leads at the same pitch as the arrangement pitch of the chip-mounting leads; Forming one more positioning means forming windows than the chip mounting leads at the same pitch as the light receiving windows and being shifted by 1 / pitch; Disposing the light-shielding mask on the light-receiving surface of the light-transmitting resin in a state where the center of the light-receiving portion and the center of the light-receiving chip coincide with each other; and transmitting the metal mask with the light-shielding resin and excluding the light-receiving surface. A step of coating the surface of the conductive resin, and a step of dividing by a shaft which is perpendicular to the juxtaposition direction of the chip mounting leads and passes through the center of the positioning means forming window. It is characterized by the following.

【0015】[0015]

【作用】上記構成によれば、本発明の請求項1記載の光
半導体装置は、受光窓を備え前記透光性樹脂の受光面を
被覆するとともに平面視で外周辺が前記透光性樹脂より
も突出する遮光マスクと、該遮光マスクを保持するとと
もに前記受光面を除く透光性樹脂表面を被覆する遮光性
樹脂とを設けてなる構成なので、前記透光性樹脂は遮光
マスクの受光窓に対応する透光性樹脂表面を除く部分が
遮光マスク又は遮光性樹脂により被覆され、受光窓に対
応する部分以外からの外乱光の入光を防止できるととも
に、受光窓から信号光を精度よく入光することができ
る。
According to the above construction, the optical semiconductor device according to the first aspect of the present invention includes a light receiving window, covers the light receiving surface of the light transmitting resin, and has an outer periphery that is smaller than the light transmitting resin in plan view.
And a light-shielding resin that covers the light-transmitting resin surface excluding the light-receiving surface while holding the light-shielding mask. Except for the corresponding light-transmitting resin surface, the light-shielding mask or light-shielding resin is covered to prevent disturbance light from entering from other than the part corresponding to the light-receiving window. can do.

【0016】また、本発明の請求項2記載の光半導体装
置は、受光窓を備え前記透光性樹脂の受光面を被覆する
遮光マスクと、該遮光マスクを保持するとともに前記受
光面を除く透光性樹脂表面を被覆する遮光性樹脂とを設
けてなり、前記遮光マスクに前記遮光性樹脂より外方に
突出する突出部を備え、該突出部に位置決め手段を設け
てなる構成なので、前記透光性樹脂は遮光マスクの受光
窓に対応する透光性樹脂表面を除く部分が遮光マスク又
は遮光性樹脂により被覆され、受光窓に対応する部分以
外からの外乱光の入光を防止できるとともに、受光窓か
ら信号光を精度よく入光することができ、前記位置決め
手段を用いて光半導体装置を基板等に容易に位置決めを
行うことができ、且つ高精度な光軸調整が可能な位置決
めをも行うことが可能である。
The optical semiconductor device according to a second aspect of the present invention has a light receiving window and covers a light receiving surface of the translucent resin.
A light-shielding mask;
A light-shielding resin that covers the light-transmitting resin surface except the light surface
Only it becomes and, provided with a protrusion protruding from the outwardly the light-shielding resin to said light-shielding mask, since arrangement of providing a positioning means projecting portion, the translucent resin is receiving the light shielding mask
Except for the translucent resin surface corresponding to the window,
Are covered with a light-blocking resin, and
It is possible to prevent external light from entering,
Signal light can be accurately input from the optical semiconductor device, the optical semiconductor device can be easily positioned on a substrate or the like by using the positioning means, and the optical axis can be adjusted with high accuracy. Is possible.

【0017】さらに、本発明の請求項3記載の光半導体
装置は、前記突出部が前記遮光性樹脂の相異なる側面か
ら相異なる方向に突出してなり、前記位置決め手段が該
各突出部の前記受光チップ中心から均等な位置に設けら
れてなる構成なので、受光チップ中心位置を精度良く算
出することができ、高精度な光軸調整が可能な位置決め
固定が可能である。
Further, in the optical semiconductor device according to a third aspect of the present invention, the projecting portions project in different directions from different side surfaces of the light-shielding resin, and the positioning means is configured to detect the light receiving of each of the projecting portions. Since the light receiving chip is provided at an even position from the center of the chip, the center position of the light receiving chip can be calculated with high accuracy, and the positioning and fixing that enables highly accurate optical axis adjustment is possible.

【0018】加えて、本発明の請求項4記載の光半導体
装置の製造方法によれば、光半導体装置が載置される基
板等の取り付けたい位置の中心から相異なる方向で且つ
製造時のチップ搭載用リードの配置ピッチの1/2ピッ
チの距離の位置に前記位置決め手段を保持する保持手段
を設けることにより、該保持手段にて前記位置決め手段
を保持して光半導体装置を載置するだけで、取り付け位
置の中心と受光チップの中心とが一義的に一致して固定
されることになり、高精度な光軸調整で位置決め固定を
行うことのできる光半導体装置を提供することができ
る。
In addition, according to the method of manufacturing an optical semiconductor device according to the fourth aspect of the present invention, the chip in a different direction from the center of the mounting position of the substrate or the like on which the optical semiconductor device is mounted and in the manufacturing process. By providing a holding means for holding the positioning means at a position of a half pitch of the arrangement pitch of the mounting leads, it is only necessary to hold the positioning means with the holding means and mount the optical semiconductor device. Since the center of the mounting position and the center of the light receiving chip are uniquely matched and fixed, it is possible to provide an optical semiconductor device that can perform positioning and fixing with high-precision optical axis adjustment.

【0019】[0019]

【実施例】図1は本発明の一実施例よりなる光半導体装
置を示す図であり、(a)は平面図であり、(b)は側
面側からの透視図である。
1 is a view showing an optical semiconductor device according to an embodiment of the present invention. FIG. 1 (a) is a plan view and FIG. 1 (b) is a perspective view from the side.

【0020】図に示すように、本実施例の光半導体装置
は、チップ搭載用リード(1次側リード)11及びチッ
プ結線用リード(2次側リード)12とからなるリード
フレーム13と、前記チップ搭載用リード11の載置片
11aに導電性接着剤を介して搭載され、裏面電極が電
気的に接続されてなる受光チップ14と、該受光チップ
14の表面電極と前記チップ結線用リード12との間を
電気的に接続する金線15と、前記受光チップ14,載
置片11a及び金線15を被覆する略直方体状の透光性
樹脂16と、円形の受光窓17を備え前記透光性樹脂1
6の受光面を被覆する遮光マスク18と、該遮光マスク
18を部分的に被覆保持するとともに前記透光性樹脂1
6の受光面を除く表面を被覆する遮光性樹脂19とを備
えてなる構成である。
As shown in the figure, the optical semiconductor device of this embodiment has a lead frame 13 including a chip mounting lead (primary side lead) 11 and a chip connecting lead (secondary side lead) 12; A light-receiving chip 14 mounted on a mounting piece 11a of a chip mounting lead 11 via a conductive adhesive and electrically connected to a back electrode, a front electrode of the light-receiving chip 14 and the chip connection lead 12 And a substantially rectangular parallelepiped translucent resin 16 covering the light receiving chip 14, the mounting piece 11a and the gold wire 15, and a circular light receiving window 17. Light resin 1
6, a light-shielding mask 18 for covering the light-receiving surface of the light-transmitting resin 6,
6 and a light-shielding resin 19 covering the surface excluding the light receiving surface.

【0021】前記遮光マスク18は、例えば銅,セラミ
ック等の金属板,プラスチック等からなり、前記遮光性
樹脂19側面より前記リード11,12の引き出し方向
と垂直な2方向に外方に突出する突出部18aを備え、
該突出部18aの両端部であって且つ受光チップ14の
中心から均等な位置に円形窓をその中心を通過する軸に
て2分してなる形状の切り欠き(位置決め手段)20が
設けられてなる。
The light-shielding mask 18 is made of, for example, a metal plate such as copper or ceramic, plastic, or the like, and protrudes outward from the side surface of the light-shielding resin 19 in two directions perpendicular to the lead-out direction of the leads 11 and 12. Part 18a,
Notches (positioning means) 20 are provided at both ends of the protruding portion 18a and at equal positions from the center of the light receiving chip 14 in such a manner that the circular window is bisected by an axis passing through the center. Become.

【0022】該構成によれば、本実施例の光半導体装置
は、受光窓17を備え透光性樹脂16の受光面を被覆す
る遮光マスク18と、該遮光マスク18を部分的に被覆
保持するとともに透光性樹脂16の受光面を除く表面を
被覆する遮光性樹脂19とを設けてなる構成なので、前
記透光性樹脂16は遮光マスク18の受光窓17に対応
する透光性樹脂16の表面を除く部分が遮光マスク16
又は遮光性樹脂19により被覆され、受光窓17に対応
する部分以外からの外乱光の入光を防止できるととも
に、受光窓17から信号光を精度よく入光することがで
きる。
According to this configuration, the optical semiconductor device of the present embodiment has the light receiving window 17 and covers the light receiving surface of the translucent resin 16, and the light shielding mask 18 is partially covered and held. And a light-shielding resin 19 for covering the surface except for the light-receiving surface of the light-transmitting resin 16, so that the light-transmitting resin 16 is formed of the light-transmitting resin 16 corresponding to the light-receiving window 17 of the light-shielding mask 18. The portion excluding the surface is a light shielding mask 16
Alternatively, it is possible to prevent disturbance light from entering from a portion other than the portion corresponding to the light receiving window 17 while being covered with the light-shielding resin 19, and to accurately input signal light from the light receiving window 17.

【0023】したがって、外乱光による誤動作を防止す
ることが可能となる。
Therefore, it is possible to prevent malfunction due to disturbance light.

【0024】また、前記遮光マスク18に前記遮光性樹
脂19の相異なる側面からリード11,12の引き出し
方向と垂直な2方向に外方に突出する突出部18aを設
け、該突出部18aの両端部であって且つ受光チップ1
4の中心から均等な位置に円形窓をその中心を通過する
軸にて2分してなる形状の切り欠き20を設けてなる構
成なので、該切り欠き20を用いて光半導体装置を基板
等に容易に位置決め固定を行うことができ、且つ高精度
な光軸調整が可能な位置決め固定をも行うことが可能で
ある。特に、面実装型光半導体装置に有効である。
Further, the light-shielding mask 18 is provided with protrusions 18a projecting outward from two different side surfaces of the light-shielding resin 19 in two directions perpendicular to the lead-out directions of the leads 11, 12, and both ends of the protrusions 18a. And light receiving chip 1
4 is provided with a notch 20 having a shape obtained by dividing a circular window into two parts by an axis passing through the center at an equal position from the center of 4, so that the optical semiconductor device can be mounted on a substrate or the like using the notch 20. It is possible to easily perform positioning and fixing, and also to perform positioning and fixing that enables highly accurate optical axis adjustment. In particular, it is effective for a surface-mount type optical semiconductor device.

【0025】例えば、図2に示すように、光半導体装置
を面実装にて載置する基板21の所定位置に前記切り欠
き20を嵌合保持する突起(保持手段)21aを設ける
ことにより、高精度な光軸調整が可能な位置決め固定を
行うことができる。図中、(a)は平面図であり、
(b)は側面図である。
For example, as shown in FIG. 2, a projection (holding means) 21a for fitting and holding the notch 20 is provided at a predetermined position of a substrate 21 on which the optical semiconductor device is mounted by surface mounting, thereby increasing the height. It is possible to perform positioning and fixing that enables accurate optical axis adjustment. In the figure, (a) is a plan view,
(B) is a side view.

【0026】具体的には、該突起21aを予め設定した
い光軸位置(載置位置中心)から相異なる方向の均等な
位置であって且つ前記突起21aと設定したい光軸位置
との距離が前記受光チップ14の中心と切り欠き20と
の距離と同一となる位置に設定することにより、光半導
体装置を載置すると同時に、設定したい光軸位置と受光
チップ14の中心位置とを一致させて固定することがで
き、高精度な光軸調整が可能な位置決め固定が行えるも
のである。
More specifically, the distance between the projection 21a and the optical axis position to be set, which is an equal position in a different direction from the optical axis position (center of the mounting position) where the projection 21a is to be set in advance, is different from the above. By setting the optical semiconductor device at the same position as the distance between the center of the light receiving chip 14 and the notch 20, the optical semiconductor device is placed and at the same time, the optical axis position to be set and the center position of the light receiving chip 14 are matched and fixed. It is possible to perform positioning and fixing that enables highly accurate optical axis adjustment.

【0027】図3は、図2に示す基板21に光半導体装
置を面実装にて載置した状態を示す図であり、(a)は
平面図であり、(b)は側面図である。
FIGS. 3A and 3B are diagrams showing a state in which the optical semiconductor device is mounted on the substrate 21 shown in FIG. 2 by surface mounting. FIG. 3A is a plan view, and FIG. 3B is a side view.

【0028】上記実施例においては、位置決め手段とし
て切り欠きを用いて説明したが、貫通孔を位置決め手段
として用いても良い。この場合、基板に設けられた突起
を挿通して位置決め固定する。
In the above embodiment, the notch is used as the positioning means, but a through hole may be used as the positioning means. In this case, the positioning is fixed by inserting the projection provided on the substrate.

【0029】以下、上記実施例の光半導体装置の製造方
法について、図4乃至図12にしたがって説明する。
Hereinafter, a method of manufacturing the optical semiconductor device of the above embodiment will be described with reference to FIGS.

【0030】まず、図4に示すように、複数個のチップ
搭載用リード11及び該チップ搭載用リード11と同数
のチップ結線用リード12をそれぞれ一定の配置ピッチ
P1にて並置してなる共通のリードフレーム13′を形
成し、各チップ搭載用リード11の載置片11aに受光
チップ14を搭載し、該受光チップ14とチップ結線用
リード12とを金線15にてワイヤーボンディングを行
う。図中、(a)は平面図であり、(b)は側面図であ
る。
First, as shown in FIG. 4, a plurality of chip mounting leads 11 and the same number of chip connection leads 12 as the chip mounting leads 11 are arranged in parallel at a constant arrangement pitch P1. A lead frame 13 'is formed, the light receiving chip 14 is mounted on the mounting piece 11a of each chip mounting lead 11, and the light receiving chip 14 and the chip connecting lead 12 are wire-bonded with the gold wire 15. In the figure, (a) is a plan view and (b) is a side view.

【0031】次に、図5に示すように、各受光チップ1
4毎において、受光チップ14,載置片11a及び金線
15を透光性樹脂16により一次成型する。図中、
(a)は平面図であり、(b)は側面図である。
Next, as shown in FIG.
For each 4, the light receiving chip 14, the mounting piece 11 a, and the gold wire 15 are primarily molded with the translucent resin 16. In the figure,
(A) is a plan view and (b) is a side view.

【0032】また、上記工程と別工程で、図6に示すよ
うに、前記チップ搭載用リード11の配置ピッチP1と
同一ピッチで前記チップ搭載用リード11と同数の受光
窓17及び前記チップ搭載用リード11よりも1つ多い
数の位置決め手段形成用窓20′がそれぞれ形成される
とともに、前記受光窓17と位置決め手段形成用窓2
0′とが互いに1/2ピッチずれて配置されてなる多連
状の遮光マスク18′を形成する。図6は、遮光マスク
18′の平面図である。
As shown in FIG. 6, in the separate step from the above-mentioned step, as many light receiving windows 17 as the number of the chip mounting leads 11 and the same number of the light receiving windows 17 as the chip mounting leads 11 are arranged at the same pitch as the arrangement pitch P1 of the chip mounting leads 11. One more number of positioning means forming windows 20 'than the leads 11 are respectively formed, and the light receiving window 17 and the positioning means forming windows 2' are formed.
0 'are shifted from each other by a half pitch to form a multiple light shielding mask 18'. FIG. 6 is a plan view of the light shielding mask 18 '.

【0033】次に、図7に示す金型(下型)22を用い
て一次成型体と多連状の遮光マスク18′とを一体的に
遮光性樹脂19にて二次成型する。図中(a)は平面図
であり、(b)は側面図である。なお、図において下型
のみを示す。
Next, using a mold (lower mold) 22 shown in FIG. 7, the primary molded body and the multiple light-shielding masks 18 ′ are secondarily molded integrally with the light-shielding resin 19. In the figure, (a) is a plan view, and (b) is a side view. In the drawing, only the lower mold is shown.

【0034】該金型22は、図7に示すように、共通の
リードフレーム13′の位置決め用の位置決めピン22
aと多連状の遮光マスク18′の位置決め用の位置決め
ピン22bとを備え、まず、図8に示すように、前記位
置決めピン22aに共通のリードフレーム13′に設け
られた位置決め穴23aを挿通することにより共通のリ
ードフレーム13′が位置決めされ、次に、図9に示す
ように、前記位置決めピン22bに多連状の遮光マスク
18′に設けられた位置決め手段形成用窓20′及び位
置決め穴23bを挿通することにより多連状の遮光マス
ク18′が位置決めされる。図中、(a)は平面図であ
り、(b)は側面図であり、(c)は(b)の要部拡大
側面図である。
As shown in FIG. 7, the mold 22 is provided with positioning pins 22 for positioning the common lead frame 13 '.
a and a positioning pin 22b for positioning the multiple light shielding mask 18 '. First, as shown in FIG. 8, a positioning hole 23a provided in a common lead frame 13' is inserted through the positioning pin 22a. As a result, the common lead frame 13 'is positioned, and then, as shown in FIG. 9, the positioning pin 22b is provided with a positioning means forming window 20' and a positioning hole provided on the multiple light shielding mask 18 '. The multiple light-shielding masks 18 'are positioned by inserting 23b. In the figure, (a) is a plan view, (b) is a side view, and (c) is an enlarged side view of a main part of (b).

【0035】前記位置決めピン22a,22b及び位置
決め穴23a,23bは、各受光チップ14の中心と受
光窓17の中心とが一致するように配置されており、図
9の状態においては完全に一致した状態となっている。
図中、24は遮光性樹脂成型用の凹部である。
The positioning pins 22a and 22b and the positioning holes 23a and 23b are arranged so that the center of each light receiving chip 14 and the center of the light receiving window 17 coincide with each other. In the state shown in FIG. It is in a state.
In the drawing, reference numeral 24 denotes a concave portion for molding a light-shielding resin.

【0036】この状態で、上型(図示せず)を配置して
リードフレームを挟持し、遮光性樹脂19によるインサ
ート成型を行う。図10は成型後の状態を示す図であ
り、(a)は平面図であり、(b)は側面図であり、
(c)は正面図である。
In this state, an upper mold (not shown) is arranged, the lead frame is sandwiched, and insert molding with the light-shielding resin 19 is performed. FIG. 10 is a view showing a state after molding, (a) is a plan view, (b) is a side view,
(C) is a front view.

【0037】この後、図11に示すように、共通のリー
ドフレーム13′及び多連状の遮光マスク18′の不要
部分が除去され、図12に示すように、各リード11,
12の引き出し方向に位置決め手段形成用窓20′を2
分することにより、単品状の光半導体装置が得られる。
ここで、単品とせず多連状の光半導体装置を構成しても
良い。図11及び図12はそれぞれ平面図である。
Thereafter, as shown in FIG. 11, unnecessary portions of the common lead frame 13 'and the multiple light shielding masks 18' are removed, and as shown in FIG.
12, the positioning means forming window 20 'is
As a result, a single-piece optical semiconductor device is obtained.
Here, a multiple optical semiconductor device may be formed instead of a single product. 11 and 12 are plan views, respectively.

【0038】上記製造工程においては、チップ搭載用リ
ード11及びチップ結線用リード12を共通のリードフ
レーム13′にて形成したが、それぞれを個別のリード
フレームにて形成して、後にそれぞれの位置合わせを行
っても良い。
In the above manufacturing process, the chip mounting lead 11 and the chip connecting lead 12 are formed on a common lead frame 13 '. May be performed.

【0039】また、位置決め手段形成用窓20′を予め
多連状の遮光マスク18′に形成したが、二次成型後に
位置決め手段形成用窓20′を形成しても良い。
Although the positioning means forming window 20 'is formed in advance in the multiple light shielding mask 18', the positioning means forming window 20 'may be formed after the secondary molding.

【0040】図13は、他の多連状の遮光マスク18′
の構成を示す平面図であり、(a)は位置決め手段形成
用窓20′を四角形(正方形)としたものであり、
(b)は同じく楕円形としたものである。これらの位置
決め手段形成用窓は、上記同様に2分されて位置決め手
段、即ち切り欠きとなる。
FIG. 13 shows another multiple light shielding mask 18 '.
FIG. 4A is a plan view showing the configuration of FIG. 5A, in which a positioning means forming window 20 ′ is a square (square);
(B) is also an elliptical shape. These positioning means forming windows are divided into two in the same manner as described above, and serve as positioning means, that is, notches.

【0041】上記製造方法によれば、光半導体装置が載
置される基板等の取り付けたい位置の中心から相異なる
方向で且つ製造時のチップ搭載用リードの配置ピッチの
1/2ピッチの距離の位置に前記位置決め手段を保持す
る保持手段を設けることにより、該保持手段にて前記位
置決め手段を保持して光半導体装置を載置するだけで、
取り付け位置の中心と受光チップの中心とが一義的に一
致して固定されることになり、高精度な光軸調整で位置
決め固定を行うことのできる光半導体装置を提供でき
る。
According to the above manufacturing method, the distance from the center of the mounting position of the substrate or the like on which the optical semiconductor device is to be mounted is different from the center of the mounting pitch of the chip mounting lead in the manufacturing direction. By providing a holding means for holding the positioning means at a position, just by mounting the optical semiconductor device while holding the positioning means with the holding means,
Since the center of the mounting position and the center of the light receiving chip are uniquely fixed and fixed, it is possible to provide an optical semiconductor device that can perform positioning and fixing with high-precision optical axis adjustment.

【0042】[0042]

【発明の効果】以上説明したように、本発明の請求項1
記載の光半導体装置によれば、受光窓を備え前記透光性
樹脂の受光面を被覆するとともに平面視で外周部分が前
記透光性樹脂よりも突出する遮光マスクと、該遮光マス
クを保持するとともに前記受光面を除く透光性樹脂表面
を被覆する遮光性樹脂とを設けてなる構成なので、前記
透光性樹脂は遮光マスクの受光窓に対応する透光性樹脂
表面を除く部分が遮光マスク又は遮光性樹脂により被覆
され、受光窓に対応する部分以外からの外乱光の入光を
防止できるとともに、受光窓から信号光を精度よく入光
することができ、外乱光による誤動作が防止される。
As described above, according to the first aspect of the present invention,
According to the optical semiconductor device described in the above, the light-receiving window is provided and covers the light-receiving surface of the translucent resin, and the outer peripheral portion is in front in plan view.
A light-shielding mask projecting from the light-transmitting resin and a light-shielding resin that holds the light-shielding mask and covers the light-transmitting resin surface excluding the light-receiving surface are provided. The portion of the light-shielding mask other than the light-transmitting resin surface corresponding to the light-receiving window is covered with the light-shielding mask or light-shielding resin, so that disturbance light can be prevented from entering from portions other than the light-receiving window, and signals from the light-receiving window can be prevented. Light can be accurately incident, and malfunction due to disturbance light can be prevented.

【0043】また、本発明の請求項2記載の光半導体装
置によれば、受光窓を備え前記透光性樹脂の受光面を被
覆する遮光マスクと、該遮光マスクを保持するとともに
前記受光面を除く透光性樹脂表面を被覆する遮光性樹脂
とを設けてなり、前記遮光マスクに前記遮光性樹脂より
外方に突出する突出部を備え、該突出部に位置決め手段
を設けてなる構成なので、前記透光性樹脂は遮光マスク
の受光窓に対応する透光性樹脂表面を除く部分が遮光マ
スク又は遮光性樹脂により被覆され、受光窓に対応する
部分以外からの外乱光の入光を防止できるとともに、受
光窓から信号光を精度よく入光することができ、外乱光
による誤動作が防止され、更に前記位置決め手段を用い
て光半導体装置を基板等に容易に位置決めを行うことが
でき、且つ高精度な光軸調整が可能な位置決めをも行う
ことが可能となる。
According to the optical semiconductor device of the second aspect of the present invention, a light receiving window is provided and the light receiving surface of the translucent resin is covered.
A light-shielding mask to cover and hold the light-shielding mask
Light-shielding resin covering the light-transmitting resin surface excluding the light-receiving surface
Be provided bets, said comprising a protrusion from the light-shielding resin in the light-shielding mask projecting outwardly, so configuration formed by providing the positioning means projecting portion, the translucent resin light shielding mask
Except for the translucent resin surface corresponding to the light receiving window of
Covered with a screen or light-shielding resin, corresponding to the light receiving window
It is possible to prevent disturbance light from entering
Signal light can be accurately entered from the optical window, and disturbance light
In addition, the optical semiconductor device can be easily positioned on a substrate or the like using the positioning means, and the positioning can be performed with high-precision optical axis adjustment.

【0044】さらに、本発明の請求項3記載の光半導体
装置によれば、前記突出部が前記遮光性樹脂の相異なる
側面から相異なる方向に突出してなり、前記位置決め手
段が該各突出部の前記受光チップ中心から均等な位置に
設けられてなる構成なので、受光チップ中心位置を精度
良く算出することができ、高精度な光軸調整が可能な位
置決め固定が可能である。
Further, according to the optical semiconductor device of the third aspect of the present invention, the protruding portions protrude from different side surfaces of the light-shielding resin in different directions, and the positioning means is provided on each of the protruding portions. Since the light receiving chip is provided at an equal position from the center of the light receiving chip, the center position of the light receiving chip can be calculated with high accuracy, and the positioning and fixing can be performed with high-precision optical axis adjustment.

【0045】加えて、本発明の請求項4記載の光半導体
装置の製造方法によれば、光半導体装置が載置される基
板等の取り付けたい位置の中心から相異なる方向で且つ
製造時のチップ搭載用リードの配置ピッチの1/2ピッ
チの距離の位置に前記位置決め手段を保持する保持手段
を設けることにより、該保持手段にて前記位置決め手段
を保持して光半導体装置を載置するだけで、取り付け位
置の中心と受光チップの中心とが一義的に一致して固定
されることになり、高精度な光軸調整で位置決め固定を
行うことのできる光半導体装置を提供できる。
In addition, according to the method of manufacturing an optical semiconductor device according to the fourth aspect of the present invention, the chip in a different direction from the center of the mounting position of the substrate or the like on which the optical semiconductor device is mounted and in the manufacturing process. By providing a holding means for holding the positioning means at a position of a half pitch of the arrangement pitch of the mounting leads, it is only necessary to hold the positioning means with the holding means and mount the optical semiconductor device. Since the center of the mounting position and the center of the light receiving chip are uniquely matched and fixed, it is possible to provide an optical semiconductor device that can perform positioning and fixing with high-precision optical axis adjustment.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例よりなる光半導体装置を示す
図であり、(a)は平面図であり、(b)は側面側から
の透視図である。
FIGS. 1A and 1B are views showing an optical semiconductor device according to an embodiment of the present invention, wherein FIG. 1A is a plan view and FIG. 1B is a perspective view from the side.

【図2】図1に示す光半導体装置を載置する基板を示す
図であり、(a)は平面図であり、(b)は側面図であ
る。
2A and 2B are diagrams showing a substrate on which the optical semiconductor device shown in FIG. 1 is mounted, wherein FIG. 2A is a plan view and FIG. 2B is a side view.

【図3】図2に示す基板に光半導体装置を載置した状態
を示す図であり、(a)は平面図であり、(b)は側面
図である。
3A and 3B are diagrams showing a state in which the optical semiconductor device is mounted on the substrate shown in FIG. 2, wherein FIG. 3A is a plan view and FIG. 3B is a side view.

【図4】図1に示す光半導体装置の製造工程を説明する
ための図である。
FIG. 4 is a view for explaining a manufacturing process of the optical semiconductor device shown in FIG. 1;

【図5】同じく、製造工程を説明するための図である。FIG. 5 is also a view for explaining a manufacturing process.

【図6】同じく、製造工程を説明するための図である。FIG. 6 is a view for explaining a manufacturing process.

【図7】同じく、製造工程を説明するための図である。FIG. 7 is a view for explaining a manufacturing process.

【図8】同じく、製造工程を説明するための図である。FIG. 8 is also a view for explaining a manufacturing process.

【図9】同じく、製造工程を説明するための図である。FIG. 9 is a view for explaining a manufacturing process.

【図10】同じく、製造工程を説明するための図であ
る。
FIG. 10 is a view for explaining the manufacturing process.

【図11】同じく、製造工程を説明するための図であ
る。
FIG. 11 is a view for explaining the manufacturing process.

【図12】同じく、製造工程を説明するための図であ
る。
FIG. 12 is a view for explaining a manufacturing process.

【図13】他の多連状の遮光マスクの構造を示す平面図
である。
FIG. 13 is a plan view showing the structure of another multiple light shielding mask.

【図14】従来例を示す図であり、(a)は平面図であ
り、(b)は側面図である。
14A and 14B are diagrams showing a conventional example, in which FIG. 14A is a plan view and FIG. 14B is a side view.

【符号の説明】[Explanation of symbols]

11 チップ搭載用リード 11a 載置片 12 チップ結線用リード 13 リードフレーム 13′ 共通のリードフレーム 14 受光チップ 15 金線 16 透光性樹脂 17 受光窓 18 遮光マスク 18′ 多連状の遮光マスク 18a 突出部 19 遮光性樹脂 20 切り欠き(位置決め手段) 20′ 位置決め手段形成窓 P1 配置ピッチ DESCRIPTION OF SYMBOLS 11 Lead for chip mounting 11a Mounting piece 12 Lead for chip connection 13 Lead frame 13 'Common lead frame 14 Light receiving chip 15 Gold wire 16 Translucent resin 17 Light receiving window 18 Light shielding mask 18' Multiple light shielding mask 18a Projection Part 19 Light-shielding resin 20 Notch (positioning means) 20 'Positioning means forming window P1 Arrangement pitch

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平6−77526(JP,A) 特開 昭54−109389(JP,A) 特開 昭63−240078(JP,A) 特開 平2−206179(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 31/00 - 31/0392 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-6-77526 (JP, A) JP-A-54-109389 (JP, A) JP-A-63-240078 (JP, A) JP-A-2- 206179 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 31/00-31/0392

Claims (4)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 リードフレームと、該リードフレームに
搭載される受光チップと、該受光チップを被覆する透光
性樹脂とを備えた光半導体装置において、 受光窓を備え前記透光性樹脂の受光面を被覆するととも
に平面視で外周部分が前記透光性樹脂よりも突出する
光マスクと、該遮光マスクを保持するとともに前記受光
面を除く透光性樹脂表面を被覆する遮光性樹脂とを設け
てなることを特徴とする光半導体装置。
1. An optical semiconductor device comprising a lead frame, a light receiving chip mounted on the lead frame, and a light transmitting resin covering the light receiving chip, comprising: a light receiving window; together when coating the surface
A light-shielding mask having an outer peripheral portion projected from the light- transmitting resin in plan view, and a light-shielding resin that holds the light-shielding mask and covers the light-transmitting resin surface excluding the light-receiving surface. An optical semiconductor device characterized by being provided.
【請求項2】 リードフレームと、該リードフレームに
搭載される受光チップと、該受光チップを被覆する透光
性樹脂とを備えた光半導体装置において、 受光窓を備え前記透光性樹脂の受光面を被覆する遮光マ
スクと、該遮光マスクを保持するとともに前記受光面を
除く透光性樹脂表面を被覆する遮光性樹脂とを設けてな
り、 前記遮光マスクは前記遮光性樹脂より外方に突出する突
出部を備え、該突出部に位置決め手段を設けてなること
を特徴とする光半導体装置。
2. A lead frame and a lead frame.
Light receiving chip to be mounted and light transmission covering the light receiving chip
An optical semiconductor device comprising a transparent resin, a light-shielding mask having a light-receiving window and covering a light-receiving surface of the translucent resin.
And the light-receiving surface while holding the light-shielding mask.
Excluding a light-shielding resin that covers the light-transmitting resin surface
Ri, the light shielding mask said comprises a protrusion protruding outward from the light-shielding resin, the optical semiconductor device you characterized by comprising providing a positioning means projecting portion.
【請求項3】 前記突出部は前記遮光性樹脂の相異なる
側面から相異なる方向に突出してなり、前記位置決め手
段は該各突出部の前記受光チップ中心から均等な位置に
設けられてなることを特徴とする請求項2記載の光半導
体装置。
3. The method according to claim 2, wherein the projecting portions project in different directions from different side surfaces of the light-shielding resin, and the positioning means is provided at an equal position from the center of the light receiving chip of each projecting portion. 3. The optical semiconductor device according to claim 2, wherein:
【請求項4】 複数個のチップ搭載用リード及び該チッ
プ搭載用リードと同数のチップ結線用リードをそれぞれ
一定の配置ピッチにて並置してなるリードフレームを形
成する工程と、 前記各チップ搭載用リードに受光チップを搭載する工程
と、 それぞれの受光チップとチップ結線用リードとを金線に
て電気的に接続する工程と、 前記各受光チップをそれぞれ透光性樹脂にて被覆する工
程と、 前記チップ搭載用リードの配置ピッチと同一ピッチで前
記チップ搭載用リードと同数の受光窓を備えた遮光マス
クを形成する工程と、 該遮光マスクに前記チップ搭載用リードよりも1つ多い
数の位置決め手段形成用窓を前記受光窓と同一ピッチで
且つ1/2ピッチずれた位置に形成する工程と、 それぞれの受光部の中心と受光チップの中心とを一致さ
せた状態で前記遮光マスクを透光性樹脂の受光面に配置
する工程と、 遮光性樹脂により前記金属マスクを保持するとともに受
光面を除く透光性樹脂表面を被覆する工程と、 前記チップ搭載用リードの並置方向に対して垂直方向で
あって、且つ前記位置決め手段形成用窓の中心を通過す
る軸にて分割する工程と、を備えてなることを特徴とす
る光半導体装置の製造方法。
4. A step of forming a lead frame in which a plurality of chip mounting leads and the same number of chip connection leads as the chip mounting leads are juxtaposed at a fixed arrangement pitch, respectively. Mounting the light receiving chips on the leads, electrically connecting the respective light receiving chips and the chip connecting leads with gold wires, covering each of the light receiving chips with a translucent resin, Forming a light-shielding mask having the same number of light-receiving windows as the chip-mounting leads at the same pitch as the arrangement pitch of the chip-mounting leads; and positioning one more number than the chip-mounting leads on the light-shielding mask. Forming the means forming window at the same pitch as the light receiving window and at a position shifted by ピ ッ チ pitch; and aligning the center of each light receiving portion with the center of the light receiving chip. Disposing the light-shielding mask on the light-receiving surface of the light-transmitting resin in a state in which the light-shielding resin is placed; holding the metal mask with the light-shielding resin and covering the light-transmitting resin surface excluding the light-receiving surface; A step of dividing by an axis perpendicular to the juxtaposition direction of the positioning leads and passing through the center of the positioning means forming window.
JP07163720A 1995-06-29 1995-06-29 Optical semiconductor device and method of manufacturing the same Expired - Fee Related JP3136079B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP07163720A JP3136079B2 (en) 1995-06-29 1995-06-29 Optical semiconductor device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP07163720A JP3136079B2 (en) 1995-06-29 1995-06-29 Optical semiconductor device and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH0918028A JPH0918028A (en) 1997-01-17
JP3136079B2 true JP3136079B2 (en) 2001-02-19

Family

ID=15779382

Family Applications (1)

Application Number Title Priority Date Filing Date
JP07163720A Expired - Fee Related JP3136079B2 (en) 1995-06-29 1995-06-29 Optical semiconductor device and method of manufacturing the same

Country Status (1)

Country Link
JP (1) JP3136079B2 (en)

Also Published As

Publication number Publication date
JPH0918028A (en) 1997-01-17

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