JP3088892B2 - Data receiving device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data receiving apparatus used for digital radio communication of a phase modulation system, and more particularly to a data receiving apparatus which is capable of automatically correcting a wide range of phase errors of a synchronously detected received signal.

[0002]

2. Description of the Related Art In π / 4 shift QPSK, which is a quaternary phase modulation method, a transmitting side transmits one of four symbols arranged at signal points on an I axis and a Q axis, and then transmits the symbol. Transmit any of the four symbols constelled on the axis rotated 45 ° from the I and Q axes, and then transmit any of the symbols on the I and Q axes again. Repeat the operation sequentially. The information to be transmitted is represented by the phase difference between the symbol and the next transmitted symbol. The phase difference includes ± π / 4 and ± 3π /
4 can be taken, and the cosine and sine of each phase difference represent binary information of 0 or 1, respectively. Therefore, any one of the information of (0,0) (1,0) (0,1) or (1,1) can be transmitted by one phase difference.

[0003] The signal point of this phase difference △ φ has the I axis as the horizontal axis,
In the phase diagram where the Q axis is displayed on the vertical axis, FIG.
Is displayed at the position of the black circle. The arrow attached to each signal point indicates the transition direction of the next signal. That is, when the current phase difference Δφ is π / 4, a larger phase of 3π / 4 can be taken as the next phase difference Δφ, or a smaller phase of −π / 4 or −3π / 4 can be taken. Can also. On the other hand, when the current phase difference Δφ is 3π / 4, the next phase difference Δφ is π / 4, −π / 4 or −3π /
4, but cannot take a larger phase difference, and when the current phase difference Δφ is −3π / 4, the next phase difference Δφ is −π / 4, π / 4 or 3
Although π / 4 can be taken, a smaller phase difference cannot be taken.

On the other hand, the receiving side obtains the modulation phase of the received signal by synchronous detection, detects the phase difference Δφ between the symbols of the modulation phase, and extracts the transmitted information. At this time, if there is a frequency error Δf between the center frequency of the received modulated signal and the oscillation frequency of the local oscillator used for synchronous detection, the detected phase difference includes the phase error θe. Therefore, the phase error θe is provided to the data receiving device.
Is provided, and the error rate in decoding is improved by this compensation.

As shown in FIG. 5, a conventional data receiving apparatus of this kind includes an antenna 1 for receiving a π / 4-shifted QPSK modulated wave signal, a receiving root Nyquist band-pass filter for shaping the waveform of the received signal. 2, a limiter amplifier 3 for limiting the amplitude of the output of the root Nyquist bandpass filter 2, and a local oscillator 4 constituting a quadrature detection unit for detecting an in-phase component and a quadrature component of baseband from the output of the limiter amplifier 3. a π / 2 phase shifter 5 and multipliers 6 and 7, a low-pass filter 8 for removing a double carrier component included in the in-phase and quadrature outputs of the quadrature detector,
9, A / D converters 10 and 11 for converting the outputs of the low-pass filters 8 and 9 into digital signals, and A / D converters 10 and 11
Cosine and sine of the modulation phase difference between the symbols of the received signal based on the output of the baseband delay detection circuit 12 that outputs the in-phase component I and the quadrature component Q, respectively, and the output of the baseband delay detection circuit 12 A timing reproduction circuit 15 for reproducing the bit timing; and an automatic frequency control circuit 14 for removing a component of the phase error θe included in the in-phase component I and the quadrature component Q of the modulation phase difference outputted from the baseband differential detection circuit 12 And determiners 16 and 17 for determining binary information based on the in-phase output Ie or the quadrature output Qe output from the automatic frequency control circuit 14, and parallel-serial conversion for converting the outputs of the determiners 16 and 17 into serial data And a reception data output terminal 19 for outputting the output of the parallel / serial converter 18 as reception data.

The A / D converters 10 and 11 operate at a sampling frequency M times the symbol rate (M: positive integer) in order to convert the outputs of the low-pass filters 8 and 9 into digital signals.

The automatic frequency control circuit 14 fetches the in-phase component output I and the quadrature component output Q of the baseband delay detection circuit 12 in synchronization with the bit timing signal output from the timing recovery circuit 15, and While referring to the output, the center frequency of the received modulated signal and the local oscillator 4
The phase error θe occurring at each output of the baseband differential detection circuit 12 due to the frequency error Δf with respect to the oscillation frequency is compensated.

FIG. 3 shows a modulation phase difference Δφ between symbols obtained from a received π / 4 shift QPSK modulated wave signal.
Is a phase diagram showing the case where the phase error θe is zero. Further, the phase diagram of FIG. 4 shows the modulation when the phase error θe occurs because the frequency error Δf exists between the center frequency of the received modulated signal and the oscillation frequency of the local oscillator 4 of the quadrature detector. The phase difference is shown.

This data receiving device operates as follows. The quadrature detector frequency-converts the received π / 4 shift QPSK modulated wave signal into a baseband signal. At this time,
The symbol rate of the modulated wave signal is f _R = 1 / T, and the sampling frequency of the A / D converters 10 and 11 is f _S = 1 / T _S = M
Assuming that f _R (M: a positive integer), the outputs X (kT _S ) and Y (kT _S ) of the A / D converters 10 and 11 are represented by the following equations (1) and (2). _{X (kT S) = COS (} φ (kT S) -2πΔfkT S) (1) Y (kT S) = SIN (φ (kT S) -2πΔfkT S) (2) Equation (1), (2), φ (kT _S ) is the received π /
This is the modulation phase of the 4-shift QPSK modulated wave signal, and Δf is the frequency error between the center frequency of this modulated signal and the oscillation frequency of the local oscillator 4.

[0010] Baseband delay detection circuit 12, the output X (kT _S) of the A / D converter 10,11, Y (kT _S) and its preceding symbol output X ((k-M) T S) , Y ((k−M) T _s ), the following equations (3) and (4) are calculated. _{I (kT S) = X (} kT S) X ((k-M) T S) + Y (kT S) Y ((k-M) T S) (3) Q (kT S) = Y (kT S) X ((k−M) T _s ) −X (kT _s ) Y ((k−M) T _s ) (4) Equation (3) is located on the same circumference of the phase diagram representing the modulation phase. Two points, that is, a point (X (kT _S ),
Y (kT _S )) and points (X ((k−M) T _S ), Y ((k−M)
T _s )), the cosine of the phase difference between
Equation (4) calculates the sine of the phase difference.

As a result of this calculation, the baseband differential detection circuit 12 calculates the cosine and sine of the modulation phase difference of the received π / 4 shift QPSK modulated wave signal as shown in the following equations (5) and (6). , Respectively, as the in-phase output I (kT _S ) and the quadrature output Q (kT _S ).

[0012] _{I (kT S) = COS (} Δφ (kT S) + θe) (5) Q (kT S) = SIN (Δφ (kT S) + θe) (6) This Δφ (kT _S) has the formula (7 ) Is the original modulation phase difference, and θe is the phase error due to Δf expressed by equation (8). _{Δφ (kT S) = φ (} kT S) -φ ((k-M) T S) (7) θe = 2πΔfMT S = 2πΔfT (8)

In the π / 4 shift QPSK modulation, the transmitting side sets the modulation phase difference Δφ to ± π / 4 or ± 3π / 4.
, The modulation phase difference Δ at the time of identification of the received signal
φ (kT _S ) is given by θe = 0 (Δf =
0), on the I and Q planes of the phase diagram, FIG.
Are represented by signal points of black circles. Also, θe ≠ 0
When (Δf ≠ 0), as shown in FIG. 4, a constant phase error θe occurs with respect to the modulation phase difference on the phase diagram. As a result, the noise margin between the determination boundary (I-axis and Q-axis) is reduced, and the noise may cross the determination boundary depending on the noise, so that the error rate characteristics of the received data deteriorate.

The automatic frequency control circuit 14 performs an operation of compensating for the phase error θe caused by Δf. First, the automatic frequency control circuit 14 outputs the outputs I (nT) and Q (nT) of the baseband differential detection circuit 12 at the time of identification in synchronization with the bit timing signal reproduced by the timing reproduction circuit 15.
T) and the output Ie (n) of the automatic frequency control circuit 14
T), Qe (nT) and outputs Id (nT), Q of decision units 16 and 17
An operation for minimizing a mean square error with d (nT) is performed by the following equation.

WX (nT) = E {Id (nT) I (nT) + Qd (nT) Q (nT)} / E {I (nT) ² + Q (nT) ² } (9) WY (nT) = E {Id (nT) Q (nT) -Qd (nT) I (nT)} / E {I (nT) ² + Q (nT) ² } (10) Ie (nT) = I (nT) WX (nT) + Q (nT) WY (nT) (11) Qe (nT) = Q (nT) WX (nT) -I (nT) WY (nT) (12) where E ｛·｝ in equations (9) and (10). Indicates an average value calculation. WX (nT) in these equations is the phase error θ
e, and WY (nT) corresponds to the sine of the phase error θe. In equations (11) and (12), a point (I (nT), Q (nT)) on the phase diagram is This means that the in-phase component and the quadrature component when rotated by θe in the direction opposite to the error are obtained.

At this time, the frequency error Δf between the center frequency of the received modulated signal and the frequency of local oscillator 4 is |
If Δf | <f _R / 8, the phase error θe becomes | θe | <π / 4 according to the equation (8).
Is used as a determination threshold value for the I-axis and the Q-axis in FIG.
(nT) can be output. Therefore, from equations (9) and (10), appropriate WX (nT) and WY (nT)
The automatic frequency control circuit 14 calculates the equation (1)
By using 1) and (12), it is possible to output the in-phase component Ie (nT) and the quadrature component Qe (nT) in which the phase error θe is compensated. Further, upon receiving the determination, the determiner 18 can output a determination result that does not further include an error.

As described above, in the conventional data receiving apparatus including the automatic frequency control circuit 14, the frequency error Δf between the center frequency of the received modulated signal and the frequency of the local oscillator 4 is | Δf | <f _R / 8. In this case, the influence of Δf can be compensated, and the deterioration of the error rate characteristic of the received data can be improved.

[0018]

However, in the conventional data receiving apparatus, the frequency error Δf between the center frequency of the received modulated signal and the frequency of the local oscillator 4 is f _R / 8 ≦
When | Δf | <f _R / 4 (f _R : symbol rate), the phase error θe at the output of the baseband differential detection circuit 12 becomes π / 4 ≦ | θe | <π / 2. 4
On the I and Q planes, the quadrant where the signal point at the time of identification is located is shifted from the quadrant where the original signal point is located, and
The determination units 16 and 17 using the axes and the Q axis as the determination thresholds cause a steady determination error from the beginning. Therefore, the automatic frequency control circuit 14 cannot correctly obtain WX (nT) corresponding to the cosine of the phase error θe or WY (nT) corresponding to the sine, and performs phase compensation in the wrong direction. As a result, there is a problem that the error rate characteristic of the received data is significantly deteriorated.

The present invention is to solve such a conventional problem. The output of the baseband differential detection circuit is caused by the frequency error Δf between the center frequency of the modulated signal and the frequency of the local oscillator 4. phase error θ of π / 4 ≦ | θe |
An object of the present invention is to provide a data receiving apparatus having a wide automatic frequency control range that can compensate for the occurrence of e.

[0020]

Accordingly, in the present invention, a local oscillator used for quadrature detection of a phase-modulated received signal and a modulation phase of the received signal are obtained, and a phase difference between symbols of the modulation phase is determined. A baseband differential detection circuit that outputs a cosine and a sine as an in-phase component and a quadrature component, and a phase error generated in the in-phase component and the quadrature component due to a frequency difference between a center frequency of the received signal and an oscillation frequency of the local oscillator. In a data receiving apparatus of the π / 4 shift QPSK modulation system having automatic frequency control means for compensating θe, a range of a magnitude of a phase error θe generated in an output of a baseband differential detection circuit and a direction of the phase error θe are as follows :
A zero-crossing decision means <br/> determining using information of the zero-crossing, the zero-crossing decision means the magnitude of the phase error θe π / 4 ≦ | θe | when it is determined that,? K / 4 in phase and quadrature components (K is a positive or negative integer) phase rotation means for applying a phase rotation, and the in-phase component and the quadrature component after the phase rotation is applied by the phase rotation means are inputted to the automatic frequency control means. doing.

Further, the zero-crossing determining means crosses the I-axis or the Q-axis of the phase diagram (that is, the zero-crossing means).
Based on the number of the scan to) signals, and configured to determine the size range of the phase error θe and its orientation.

[0022]

Therefore, when the phase error θe is equal to or more than π / 4, the phase rotation means adds πK / 4 (K) to the in-phase component and the quadrature component output from the baseband delay detection circuit based on the determination result of the zero-crossing determination means. Is a positive or negative integer)
And the signal point on the phase diagram of the modulation phase difference represented by those components is returned to the quadrant where the signal point of the original transmission modulation phase difference exists. Therefore, the automatic frequency control means can always perform correct phase compensation by directly executing the conventional phase compensation method.

The zero-crossing determining means uses a π / 4 shift QP
The magnitude and direction of the phase error are determined using the property of the signal point of the SK modulation method in the transition direction. In other words, the occurrence of the phase error changes the frequency of signals crossing the positive or negative I-axis or Q-axis of the phase diagram,
By detecting this, the magnitude and direction of the phase error are determined.

[0024]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A data receiving apparatus according to an embodiment of the present invention
As shown in FIG. 1, a phase error θe of π / 4 ≦ | θe | <π / 2 is generated in the modulation phase difference due to a frequency error between the center frequency of the modulated signal and the oscillation frequency of the local oscillator 4. At this time, a phase compensation circuit 13 is provided to reduce the error to | θe | <π / 4. Other configurations are the same as those of the conventional device (FIG. 5).

As shown in FIG. 2, the phase compensation circuit 13 takes in the in-phase component I and the quadrature component Q output from the baseband differential detection circuit 12, and is included in the modulation phase difference represented by these components. A zero-crossing determination circuit 20 for determining the magnitude of the phase error θe and its sign, and outputting a control signal according to the determination result;
And a phase rotation circuit 21 for applying a phase rotation of 0, π / 4 or -π / 4 to the input in-phase component I and quadrature component Q in response to the control signal.

The zero-crossing determination circuit 20 determines the number of times that the signal point representing the modulation phase difference crosses the negative I axis, the number of crossings of the positive Q axis, and the number of times of crossing the negative Q axis on the I and Q planes of the phase diagram. By counting each, the magnitude of the phase error θe and its sign are determined.

This data receiving device operates as follows. The operations of the quadrature detection unit and the baseband differential detection circuit 12 are the same as those of the conventional device. Now, the symbol rate of the received π / 4 shift QPSK modulated wave signal is set to f _R = 1 /
T, the sampling frequency of the A / D converters 10 and 11 is represented by f _S =
1 / T _S = Mf _R (M: positive integer), A / D converters 10 and 11
X output of each (kT _S), when the _{Y (kT S), X (} kT S) = COS (φ (kT S) -2πΔfkT S) (1) Y (kT S) = SIN (φ (kT S ) −2πΔfkT _S ) (2) Here, φ (kT _S ) represents the modulation phase of the received π / 4 shift QPSK modulated wave signal, and Δf represents a frequency error between the center frequency of the modulated signal and the frequency of the local oscillator 4.

[0028] Baseband delay detection circuit 12, the output of the A / D converter _{10,11, I (kT S) =} X (kT S) X ((k-M) T S) + Y (kT S) Y ((k−M) T _s ) (3) Q (kT _s ) = Y (kT _s ) X ((k−M) T _s ) −X (kT _s ) Y ((k−M) T _s ) ( 4) is calculated, and the in-phase output I (kT _S ) and the quadrature output Q (k
T _S ). The I (kT _S ) and Q (k
T _S ) is the received π as shown in equations (5) and (6).
The cosine and sine of the modulation phase difference of the / 4 shift QPSK modulated wave signal are shown.

[0029] _{I (kT S) = COS (} Δφ (kT S) + θe) (5) Q (kT S) = SIN (Δφ (kT S) + θe) (6) This [Delta] [phi (kT _S) has the formula (7 ) Is the original modulation phase difference, and θe is the phase error due to Δf expressed by equation (8). Δφ (kT _S ) = φ (kT _S ) −φ ((k−M) T _S ) (7) θe = 2πΔfMT _S = 2πΔfT (8)

Now, the modulation phase difference Δφ (kT _S ) at the time of identification of the received signal in the π / 4 shift QPSK modulation is θ
When e = 0 (Δf = 0), I,
It is represented on the Q plane by the signal points of black circles in FIG. As is apparent from FIG. 3, in the case of θe = 0 (Δf = 0), the transition direction of the signal point in the second quadrant and the third quadrant of the phase diagram is limited only to the direction away from the negative I axis. ing. Therefore, the RF of the limiter amplifier 3 etc.
The signal point of the phase difference does not cross the negative I-axis except for the influence of noise due to the receiving unit.

When θe ≠ 0 (Δf ≠ 0), FIG.
As shown in the figure, a constant phase error θe is generated with respect to the modulation phase difference on the phase diagram.
, Q axis). However,
Also in this case, when | θe | <π / 4, the signal point of the phase difference does not constantly cross the negative I axis except for the influence of noise.

However, the frequency error Δf becomes f _R / 8 ≦ | Δ
When f | <f _R / 4, π / 4 ≦ |
A phase error θe of θe | <π / 2 occurs. At this time, as can be seen by expanding θe to this magnitude in FIG. 4, the transition path of the signal point steadily crosses the negative I axis. become. At this time, π / 4 ≦
If θe <π / 2, the transition path of the signal point is negative Q
The number of traversal of the positive Q axis is greater than the number of traversal of the axis. On the other hand, when −π / 2 <θe ≦ −π / 4, the number of times that the transition path of the signal point crosses the positive Q axis is smaller than the number of times that the transition path crosses the negative Q axis. .

In the phase compensation circuit 13, a zero-crossing judgment circuit
20 is the in-phase component output signal I of the baseband differential detection circuit 12.
(kT _s ) and the quadrature component output signal Q (kT _s )
The number of times the signal points on the I and Q planes of the phase diagram represented by these signals cross the negative I axis, cross the positive Q axis, and cross the negative Q axis, respectively, are calculated. According to the three types of control signals S
EL (i) (i = 1, 2, 3) is output.

The zero-crossing determination circuit 20 performs this processing in the following procedure. First, I (kT _S ) and Q
When (kT _S ) sample values of N ₀ (N ₀ : positive integer) are fetched and a signal point crosses the I and Q axes, sign inversion corresponding to that axis occurs between each sample value. Using this, the number of times CT1 crossing the negative I axis, the number CT2 of crossing the positive Q axis, and the number of times CT3 crossing the negative Q axis are determined by equations (13) to (15), respectively. However, it is assumed that the sampling frequency f _S = 1 / T _S is sufficiently higher than the symbol rate f _R.

CT1 = {I (kT _S ) <0: Q (kT _S ) The number of times that Q ((k−1) T _S ) <0} (13) In CT1, I (kT _S ) is negative. Yes, and Q (k
The sign of T _S) represents the number of times of inversion. _{Similarly, CT2 = {Q (kT S} )> 0: I (kT S) I ((k-1) T S) < 0 times} (14) CT3 = {Q (kT S) <0: I The number of times ｋ (15) where (kT _S ) I ((k−1) T _S ) <0 is determined. At this time, a positive integer N ₁ satisfying N ₁ <N ₀ is set as a threshold, and if CT ₁ <N ₁ (16), the zero-crossing determination circuit 20 determines the phase error θe
Is determined to be | θe | <π / 4, and the determination signal SEL is determined.
(1) is output.

If {CT1 ≧ N ₁ {CT2> CT3} (17), that is, if the number of signal points crossing the negative I axis is N ₁ or more and the negative Q axis is If the number of times of crossing is less than the number of times of crossing the positive Q axis, the zero crossing determination circuit 20
Determines that the phase error θe is π / 4 ≦ θe <π / 2, and outputs a determination signal SEL (2).

Also, if {CT1 ≧ N ₁ << CT2 <CT3} (18), that is, the number of times the signal point crosses the negative I axis is N ₁ or more, and the negative Q axis is If the number of times of crossing is greater than the number of times of crossing the positive Q axis, the zero crossing determination circuit 20
Determines that the phase error θe is −π / 2 <θe ≦ −π / 4, and outputs the determination signal SEL (3).

Next, the phase rotation circuit 21 performs the operation shown in the equation (19) according to the control signal from the zero-crossing judgment circuit 20, and outputs the output I (k) of the baseband delay detection circuit 12.
A phase rotation of ψ is applied to T _s ) and Q (kT _s ).

[Equation 19] As a result, the frequency error Δf becomes f _R / 8 ≦ | Δf | <f _R /
4, the phase error θe in the outputs Ic (kT _S ) and Qc (kT _S ) of the phase compensation circuit 13 is | θe | <π /
It becomes 4.

The automatic frequency control circuit 14 includes a phase compensation circuit 13
| Θe | remaining in the outputs Ic (kT _S ) and Qc (kT _S )
<Π / 4 phase error θe is compensated. This operation is basically the same as the operation of the automatic frequency control circuit of the conventional apparatus, and the output Ic of the phase compensation circuit 13 at the discrimination time is synchronized with the bit timing signal reproduced by the timing reproduction circuit 15.
(nT) and Qc (nT), automatic frequency control circuit
An operation for minimizing the mean square error between the outputs Ie (nT) and Qe (nT) of the fourteenth and the outputs Id (nT) and Qd (nT) of the discriminators 16 and 17 is performed by the following equation.

WX (nT) = E {Id (nT) Ic (nT) + Qd (nT) Qc (nT)} / E {Ic (nT) ² + Qc (nT) ² } (20) WY (nT) = E {Id (nT) Qc (nT) -Qd (nT) Ic (nT)} / E {Ic (nT) ² + Qc (nT) ² } (21) Ie (nT) = Ic (nT) WX (nT) + Qc (nT) WY (nT) (22) Qe (nT) = Qc (nT) WX (nT) -Ic (nT) WY (nT) (23) where E ｛·｝ in the equations (20) and (21). Indicates an average value calculation.

At this time, the frequency error Δf between the center frequency of the received modulated signal and the frequency of the local oscillator 4 is f _R
Even when / 8 ≦ | Δf | <f _R / 4, the phase error θ of Ic (nT) and Qc (nT)
Since e is reduced to | θe | <π / 4, the decision unit 1
6 and 17 can output Id (nT) or Qd (nT) without incurring a steady judgment error from the beginning, using the I-axis and Q-axis in FIG. 4 as judgment thresholds. Therefore, appropriate WX (nT) and WY (nT) can be obtained from equations (20) and (21), and the automatic frequency control circuit 14
Is the phase error θ using the equations (22) and (23).
e in-phase component Ie (nT) and quadrature component Qe
(nT) can be output. Further, upon receiving the determination, the determiner 18 can output a determination result that does not further include an error.

As described above, in the apparatus according to the embodiment, there is a frequency error Δf of f _R / 8 ≦ | Δf | <f _R / 4 between the center frequency of the received modulation signal and the frequency of the local oscillator 4. Even when a phase error θe of π / 4 ≦ | θe | <π / 2 is generated in the in-phase component I and the quadrature component Q output from the baseband delay detection circuit 12, it is provided before the automatic frequency control circuit 14. Since the phase compensation circuit 13 reduces the phase error θe to π / 4 or less, the automatic frequency control circuit 14 can perform the automatic frequency control normally, and as a result, correct received data is decoded. This device is equivalent to 2 of the conventional device.
Automatic frequency control is possible in the double frequency range.

In the embodiment, when the phase error θe is π / 4 ≦
Although the case where | θe | <π / 2 has been described in detail, it is possible to extend this idea to the case where the phase error θe is even larger. The magnitude range and the direction of the phase error θe at that time can be obtained by focusing on the number of signals crossing either the positive or negative I axis or the Q axis of the phase diagram. Is determined by the zero-crossing determination circuit 20 of the phase compensating circuit 13, and the in-phase component of the baseband differential detection circuit 12 is determined by the phase rotation circuit 21 based on the determination result of the zero-crossing determination circuit 20. I and quadrature component Q are converted by equation (19). However, the value of ψ is πK / 4 (K is a positive or negative integer), and K is set according to the range and direction of the magnitude of the phase error θe. As a result, the signal point in the phase diagram of the modulation phase difference including the phase error θe is returned to the quadrant of the signal point of the original modulation phase difference, and as a result, the correct automatic frequency control in the automatic frequency control circuit 14 is performed. Becomes possible.

[0044]

As is apparent from the above description of the embodiment, the data receiving apparatus of the present invention provides a frequency error Δf between the center frequency of the received modulated signal and the frequency of the local oscillator 4.
Π / 4 ≦ the output of the baseband differential detection circuit 12
Even when the phase error θe of | θe | occurs, the automatic frequency control can be accurately performed, and the deterioration of the error rate characteristic caused by Δf can be improved widely.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment in a data receiving apparatus of the present invention;

FIG. 2 is a block diagram showing a configuration of a phase compensation circuit in the data receiving device according to the embodiment;

FIG. 3 is a phase diagram (when θe = 0) representing a signal point of a signal output from a baseband differential detection circuit;

FIG. 4 is a phase diagram (when θe ≠ 0) representing a signal point of a signal output from the baseband differential detection circuit;

FIG. 5 is a block diagram showing a configuration of a conventional data receiving device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Antenna 2 Root Nyquist band pass filter for reception 3 Limiter amplifier 4 Local oscillator 5 π / 2 phase shifter 6, 7 Multiplier 8, 9 Low pass filter 10, 11 A / D converter 12 Baseband delay detection circuit 13 Phase Compensation circuit 14 Automatic frequency control circuit 15 Timing recovery circuit 16, 17 Judgment device 18 Parallel-serial converter 19 Receive data output terminal 20 Zero-cross judgment circuit 21 Phase rotation circuit

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-7-212422 (JP, A) JP-A-7-212424 (JP, A) JP-A-7-212425 (JP, A) JP-A-6-212425 224960 (JP, A) JP-A-3-128550 (JP, A) JP-A-6-508495 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04L 27/00-27 / 38

Claims (2)

(57) [Claims] A local oscillator used for quadrature detection of a phase-modulated received signal, and a modulation phase of the received signal are obtained.
A baseband differential detection circuit that outputs a cosine and a sine as an in-phase component and a quadrature component; and the in-phase component and the quadrature component occur due to a frequency difference between a center frequency of the received signal and an oscillation frequency of the local oscillator. In a data receiving apparatus of a π / 4 shift QPSK modulation system comprising automatic frequency control means for compensating a phase error θe, a range of a magnitude of the phase error θe generated in an output of the baseband differential detection circuit and a direction thereof And the zero black
And determining zero-crossing decision means using the information of the scan, the zero-crossing decision means said phase error .theta.e of size π / 4 ≦ | θe | when it is determined that the in-phase component and the quadrature component πK / 4 (K Phase rotation means for applying a phase rotation of (positive or negative integer), and inputting the in-phase component and the quadrature component after the phase rotation is applied by the phase rotation means to the automatic frequency control means. Data receiving device. 2. The method according to claim 1, wherein the zero-crossing determining means determines a number of signals crossing an I axis or a Q axis of the phase diagram.
The data receiving apparatus according to claim 1, wherein a range of a magnitude of the phase error θe and a direction thereof are determined.