JP3017640B2 - Semiconductor chip appearance inspection method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for inspecting the appearance of a semiconductor chip.

[0002]

2. Description of the Related Art As a technique for inspecting the appearance of a semiconductor chip such as a pattern, as disclosed in JP-A-60-31235, a semiconductor chip formed on a wafer is cut by a linear image sensor before cutting the wafer. A technique for capturing an image with an image input device such as the one described above is generally employed. Since the positional accuracy of each semiconductor chip on the wafer is controlled when the semiconductor chip is formed, in order to capture an image of a desired semiconductor chip on the wafer with the image input device, the position of the wafer with respect to the image input device must be adjusted. Just by managing, it is possible to know which position of the semiconductor chip on the wafer is being imaged by the image input device. That is, if the wafer is moved along the direction in which the semiconductor chips are arranged at a fixed distance unit, which is the pitch between the semiconductor chips, it is possible to adjust the position of the semiconductor chip at a desired position with respect to the image input device.

[0003]

By the way, in order to make it easy to take out the semiconductor chips from the wafer, the wafer on which the semiconductor chips were formed was placed on a synthetic resin film, and each semiconductor chip was cut off without cutting the film. later,
It has been considered to form gaps between semiconductor chips by pulling the film along the surface of the wafer. In the case of using a film in this way, if the appearance inspection is performed after cutting the semiconductor chip, defects that occur not only during the manufacturing of the semiconductor chip but also during the cutting can be found,
The rate of finding defects in the product can be increased as compared with the case where the appearance inspection is performed before cutting.

[0004] However, when the wafer is placed on the film and stretched, the direction and the interval of each semiconductor chip become uneven because the amount of expansion in each position and direction of the film is uneven. Therefore, when the appearance inspection is performed after the film is stretched, a desired semiconductor chip may not be able to be positioned within the field of view of the image input device even if the film is moved by a certain distance.

In order to image a semiconductor chip with an image input device, it is general that a specific semiconductor chip defined in advance is set as a reference chip and a position relative to the reference chip is set as a position of each semiconductor chip. However, due to differences in processing conditions, even in the same lot, there may be differences in the surface color and shape, and also due to various conditions such as illumination conditions when imaging with an image input device. Since a change occurs in an image input to the image input device, there is also a problem that it is difficult to determine a reference chip.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and a first object of the present invention is to provide an image input device which captures images of each semiconductor chip after stretching the film. Even if the intervals and directions of are not uniform, the desired semiconductor chip is positioned within the field of view of the image input device, and the second purpose is as follows.
It is an object of the present invention to provide a method for inspecting the appearance of a semiconductor chip in which a reference chip can be easily determined even if there is a slight difference in the color tone and shape of a wafer.

[0007]

According to a first aspect of the present invention, there is provided a semiconductor resin film comprising a plurality of semiconductor chips arranged in rows and columns placed on a synthetic resin film. A method of inspecting the appearance of each semiconductor chip based on an image taken by an image input device with respect to each semiconductor chip in a state where a film is stretched so that a gap is formed between the plurality of semiconductor chips defined on a wafer Is a reference chip, a known number of semiconductor chips between a pair of reference chips provided on a straight line in the vertical direction or the horizontal direction, and a reference obtained based on an image obtained by an image input device including both reference chips in the field of view. From the coordinates of the representative point of the chip in the image and the reference distance, which is the average value of the distance between adjacent semiconductor chips, and the inclination formed by the straight line connecting the two reference chips with respect to the coordinate axis of the image. Look, the wafer and the image input device from positions of matches one semiconductor chip to the field of view of the image input apparatus is relatively moved by the reference distance in the direction of the slope,
Next, after correcting the position of the image of the semiconductor chip so as to match the plurality of specific points obtained for the semiconductor chip present in the field of view of the image input device and the plurality of specific points of the template defined in advance, It is characterized in that the presence or absence of a defective portion of the semiconductor chip is detected based on the degree of coincidence between the image of the semiconductor chip and the template.

According to a second aspect of the present invention, after the wafer and the image input device are relatively moved by the reference distance in the direction of the inclination, the center coordinates in the image of the semiconductor chip picked up by the image input device. Taking into account the relative position of the image and the center coordinates of the image, the direction and distance of the relative movement between the wafer and the image input device are set so that the semiconductor chip to be inspected next falls within the field of view of the image input device. It is characterized in that it is determined.

According to a third aspect of the present invention, a specific point having a high degree of coincidence with a predetermined specific point of a template among a plurality of specific points obtained for an image of a semiconductor chip present in a field of view of an image input device. Is used for correcting the position of the image on the semiconductor chip. According to a fourth aspect of the present invention, after matching the center of gravity of a plurality of specific points obtained for an image of a semiconductor chip present in the field of view of the image input device with the center of gravity of a specific point in the template, the image of the semiconductor chip is specified. The image of the semiconductor chip is rotated around the center of gravity so that the point coincides with a specific point on the template.

According to a fifth aspect of the present invention, a sum of squares of distance differences between a plurality of specific points obtained for an image of a semiconductor chip present in the field of view of the image input device and a specific point of the template is minimized. The image of the semiconductor chip is moved to correct the position of the image of the semiconductor chip. The invention according to claim 6 is the method for inspecting the appearance of a semiconductor chip according to claim 1, wherein a good product is extracted from the semiconductor chip on the wafer to create a template.

According to a seventh aspect of the present invention, a plurality of semiconductor chips on a wafer are mutually matched and a semiconductor chip having a high probability of being highly matched with another semiconductor chip is determined as a non-defective product. I do. The invention according to claim 8, wherein a degree of coincidence is obtained for a plurality of semiconductor chips on a wafer, and a pixel corresponding to an image of a plurality of semiconductor chips having a high probability of being highly coincident with another semiconductor chip It is characterized in that the average value is used as the pixel value of the template.

[0012]

According to the first aspect of the present invention, a pair of reference chips are provided on a straight line in a vertical direction or a horizontal direction on a wafer, and a reference distance which is an interval between semiconductor chips based on the reference chips and an arrangement direction. The tilt is determined, and the image input device and the wafer are relatively moved by the reference distance in the direction of the tilt, so even if there is a slight variation in the interval between the separated semiconductor chips, the semiconductor chip is imaged by the image input device. can do. Further, after performing position correction so that a specific point of the image of the semiconductor chip coincides with a specific point of the template, the presence or absence of a defective portion of the semiconductor chip is detected based on the degree of coincidence between the image of the semiconductor chip and the template. The position correction of the chip is performed by image processing, and accurate positioning independent of the machine precision becomes possible.

According to the second aspect of the present invention, regarding the direction and distance of relative movement between the wafer and the image input device, the center coordinates and the center of the image in the image of the semiconductor chip imaged by the image input device. Since the relative position with respect to the coordinates is determined in consideration of the inclination and the reference distance, the relative moving distance and the moving direction between the wafer and the image input device are determined so that the semiconductor chip does not deviate from the visual field of the image input device. It becomes possible.

According to a third aspect of the present invention, a specific point having a high degree of coincidence with the specific point of the template among a plurality of specific points obtained for the image of the semiconductor chip is used for correcting the position of the image of the semiconductor chip. In the invention, after matching the center of gravity of a plurality of specific points obtained for the image of the semiconductor chip with the center of gravity of the specific point in the template, the specific point of the image of the semiconductor chip is matched with the specific point of the template. Rotate the image of the semiconductor chip around the center of gravity,
According to the fifth aspect of the present invention, the semiconductor chip is positioned so that the sum of squares of the distance difference between the plurality of specific points obtained for the image of the semiconductor chip existing within the field of view of the image input device and the specific point of the template is minimized. Since the image is moved, the position of the image on the semiconductor chip can be accurately corrected even when the semiconductor chip has a defect due to dust or scratches or when the appearance of the semiconductor chip varies.

According to the configuration of the sixth aspect of the present invention, a good product is extracted from a semiconductor chip on a wafer to create a template. Since a template is created for each wafer, the semiconductor chip of a different wafer may be used. A difference in the result of the pass / fail judgment due to the difference in appearance can be prevented, and the accuracy of the pass / fail judgment can be increased. The invention of claim 7 and claim 8 is a preferred embodiment of claim 6, wherein in the invention of claim 7, a degree of coincidence is obtained for a plurality of semiconductor chips on a wafer and other semiconductor chips are determined. By making a semiconductor chip having a high probability of achieving a high degree of coincidence with a non-defective product, a semiconductor chip occupying a large number on a wafer can be used as a template. According to the invention of claim 8, the degree of coincidence is obtained for a plurality of semiconductor chips on the wafer, and a pixel corresponding to an image of the plurality of semiconductor chips having a high probability of high coincidence with other semiconductor chips is obtained. Is used as the pixel value of the template, it is possible to reduce the influence of random noise and the like by averaging the pixel values.

[0016]

【Example】

(Embodiment 1) In this embodiment, a wafer 2 on which a large number of semiconductor chips 1 are formed as shown in FIG. 4 is mounted on a synthetic resin film 3 as shown in FIG. It is attached to the holding ring 4 in a state where it is pulled in the directions in which it is arranged (the vertical direction and the horizontal direction in FIG. 4). As shown in FIG. 2, the holding ring 4 is fixed on an XY table 5, and the semiconductor chip 1 is imaged by an image input device 10 including a TV camera arranged to face the XY table 5. Here, it is assumed that the horizontal direction and the vertical direction of the image captured by the image input device 10 coincide with the coordinate axis direction of the XY table 5.

The image input device 10 controls each semiconductor chip 1
First, the XY table 5
Of the semiconductor chip 1 with respect to the standard axis direction (X direction, Y direction)
Obtain the inclination in the direction (x 'direction and y' direction) (see FIG. 3)
reference). Here, the inclination of the direction in which the semiconductor chips 1 are arranged is
Wafer 2 instead of individual semiconductor chip 1
Is obtained as a whole. For this purpose, FIG.
As shown in FIG.
A plurality of reference channels that are
A plurality of (here, two) tips 6 are formed. Standard
The chip 6 is formed at the time of manufacturing the semiconductor chip 1.
Therefore, the two reference chips 6 are in either the X 'direction or the Y' direction.
Formed on the straight line and between the two reference chips 6
The number of semiconductor chips 1 is known. So, the picture
Both reference chips 6 should be placed in the field of view of image input device 10
Is set to the coordinates of the center (X₁,
Y ₁), (X_Two, Y_Two) To the coordinate axes of the XY table 5
The inclination θ of the wafer 2 with respect to the wafer 2 (see FIG. 6) is obtained. Sand
Tanθ = (Y₁-Y_Two) / (X₁-X_Two)become.
The distance between the centers of the reference chips 6 is L,
If the number of the semiconductor chips 1 between 6 is n, the semiconductor chip
The average value of the intervals of the top 1 is L / (n + 1). This
The thus obtained interval is defined as a reference distance Δp. Here is the distance
The separation L is the coordinate of the center of the two reference chips 6 in the image.
(X₁, Y₁), (X_Two, Y_Two), L = ｛(X₁
-X_Two)^Two+ (Y₁-Y_Two)^Two｝^1/2Asking for
Can be.

The inclination θ and the reference distance Δp obtained in the above-described procedure are straight lines in which the distance between the adjacent semiconductor chips 1 is constant and each side of each semiconductor chip 1 connects the centers of the reference chips 6. If they are parallel, no correction is required in the appearance inspection of each semiconductor chip 1, but there is actually an error in the distance and inclination between each semiconductor chip 1 and an adjacent semiconductor chip. That is, as shown in FIG. 7, the reference distance Δp is set in the direction of the inclination θ from the semiconductor chip 1 at the center position p _0.
An error Δd ₁ is generated between the position p ₁ moved by the distance and the center position p ₁ ′ of the target semiconductor chip 1. Also,
At position p ₂ is moved in the direction of inclination θ by reference distance Δp from the position p _1, the center position p of the semiconductor chip 1 of interest
It is conceivable that the error Δd ₂ with respect to ₂ ′ is further increased. Here, if the errors Δd ₁ and Δd ₂ are small, by setting the field of view of the image input device 10 to be slightly larger than the size of the semiconductor chip 1, it is possible to image the semiconductor chip 1 without departing from the field of view. However, if the margin of the visual field with respect to the size of the semiconductor chip 1 is increased, the resolution is reduced, so the margin is set to be relatively small. That is, even if the semiconductor chip 1 can be accommodated in the field of view of the image input device 10 if the error Δd 1 with respect to the adjacent semiconductor chip 1 is about ₁ , the semiconductor chip 1 is moved to the image input device 10 May not be able to fit within the field of view.

Therefore, it is assumed that the error Δd ₁ between the adjacent semiconductor chips 1 is relatively small, and the field of view of the image input device 10 is set so that the semiconductor chip 1 can be imaged for such an error Δd ₁ . Then, the reference distance Δ from the center position p ₀ of the semiconductor chip 1 to the direction of the inclination θ is obtained.
The error Δd ₁ between the position p ₁ moved by p and the center position p ₁ ′ of another semiconductor chip 1 can be known. Now, regarding the error Δd ₁ , the respective components in the coordinate axis direction of the XY table 5 are set as Δd _X1 and Δd _Y1, and the inclination from the position p ₁ toward the next semiconductor chip 1 and the correction values θ ′ and Δp ′ of the reference distance are expressed by the following equations. Ask for.

Tan θ ′ = Δd _Y1 / (Δp + Δd _X1 ) Δp ′ = ｛(Δp + k × Δd _X1 ) ² + (m × Δ
d _Y1 ) ² ｝ ^1/2 where k and m are appropriate coefficients empirically set in accordance with the characteristics of the film. When obtaining the next position p ₂ "from the position p ₁ using thus determined inclination theta 'and the reference distance Delta] p', as shown in FIG. 7, the position p ₂
Thus, the position is closer to the center position p ₂ ′ of the semiconductor chip 1, and the semiconductor chip 1 can be accommodated in the field of view of the image input device 10.

As described above, even if the semiconductor chip 1 is in the field of view of the image input device 10, each side of each semiconductor chip 1 is inclined with respect to the direction connecting the centers of both reference chips 6. Therefore, it is necessary to correct this inclination. Therefore, as shown in FIG. 8A, a plurality of points (3 in this embodiment) are obtained from a template of the semiconductor chip 1 prepared in advance for performing pattern matching (template matching) with the semiconductor chip 1 to be inspected. Location) matching area Ta,
Tb and Tc are extracted, and a candidate area that maximizes the degree of coincidence with each of the matching areas Ta, Tb, and Tc is obtained for the image of the semiconductor chip 1 to be inspected as shown in FIG. The center position Pa ₁ of each candidate area,
Pb ₁ and Pc ₁ are obtained. Since the image of the semiconductor chip 1 to be inspected has dust or scratches or an error due to a difference in conditions for forming a pattern, only the candidate regions having a degree of coincidence exceeding a specified threshold are selected. The position is selected and the position of the image of the semiconductor chip 1 to be inspected is corrected. In addition, the relative position of the center positions of the matching regions Ta, Tb, and Tc is compared with the center position Pa of each candidate region.
_A part with a high degree of coincidence of the relative relationship between ₁ , Pb ₁ and Pc ₁ is selected, and a part with a low degree of coincidence is excluded.

The above operation is summarized in FIG.
That is, the matching regions Ta, T
b and Tc are extracted (S1), and a candidate area having a high degree of coincidence with respect to the image of the semiconductor chip 1 is extracted (S2, S3).
Next, the extracted candidate region is compared with the template matching regions Ta, Tb, and Tc (S4), and a portion having a low degree of coincidence in the candidate region is removed as an unnecessary portion (S5).

According to the above-described processing procedure, the center positions Pa ₁ , Pb ₁ , and Pc ₁ of the candidate regions having a high degree of matching with the matching regions Ta, Tb, and Tc in the template for the semiconductor chip 1 to be inspected can be obtained. it can. When the center positions Pa ₁ , Pb ₁ , and Pc ₁ are obtained, the relative positions of the center positions of the matching regions Ta, Tb, and Tc are compared with the relative positions of the center positions Pa ₁ , Pb ₁ , and Pc ₁ of the candidate region. It is possible to know the inclination of the semiconductor chip 1 to be inspected with respect to the template.

After the position of the image of the semiconductor chip 1 is corrected so as to substantially match the image of the semiconductor chip 1, the degree of matching between the template and the image of the semiconductor chip 1 is calculated. That is, it is determined that the imaged semiconductor chip 1 is good. In order to perform the above processing, the output of the image input device 10 is converted into a digital image by the A / D converter 11 and stored in the image memory 12. The image memory 1
The correction values .theta. 'And .DELTA.p' are obtained by the correction amount calculating section 13 based on the image stored in the XY table 2, and the XY table is set by the moving amount set by the moving amount setting section 14 based on the correction values .theta. 'And .DELTA.p'. The XY table 5 is driven via the drive unit 15. Further, the image of the semiconductor chip 1 corrected by the correction amount calculation unit 13 is compared with the template stored in the template image memory 16 by the comparison unit 17, and the determination unit 18 determines whether there is a defect.

The operation of this embodiment is summarized as shown in FIG. That is, the reference chip 6 is registered (S1), and then the inclination of the wafer 2 and the reference distance Δp of the semiconductor chip 1 are obtained based on the reference chip 6 (S2). Further, the matching regions Ta, Tb, and Tc are extracted from the template (S3). Thereafter, the XY table 5 is moved (S
4), the adjacent semiconductor chips 1 are sequentially placed in the image input device 10
(S5). The image of the semiconductor chip 1 is collated with the template (S6). Further, correction values θ ′ and Δ for the movement amount and direction for inspecting the next semiconductor chip 1
p 'is obtained (S7). Here, the image input device 10
After the position of the image of the semiconductor chip 1 being picked up is corrected (S8), the presence or absence of a defect is determined based on the degree of coincidence with the template (S9). In this way,
After determining the quality of the semiconductor chip 1, the correction values θ ′, Δp ′
The XY table 5 is moved according to the above, and the above processing is repeated. When the XY table 5 reaches the last semiconductor chip 1 (S10), the operation is terminated.

(Embodiment 2) In this embodiment, an image of the semiconductor chip 1 to be inspected is used as a template after excluding a portion having a low degree of coincidence with the matching regions Ta, Tb, and Tc of the template from the candidate regions. This is an example in which the position is corrected so as to overlap. That is, as shown in FIG. 10A, each matching area Ta, Tb, Tc of the template
Together determine the center of gravity G, find the center position Pa _1, Pb _1, the center of gravity G ₁ of Pc ₁ candidate region for the semiconductor chip 1 to be inspected as shown in FIG. 10 (b), both the center of gravity G, G ₁ Overlap each other. Then, the matching area Ta, Tb, center position Pa of Tc, Pb, center position Pa ₁ of Pc and the candidate region, Pb _1, Pc ₁ and overlap as the center of gravity G, an image of the semiconductor chip 1 around in G ₁ Rotate. Further, the degree of coincidence between the template and the image of the semiconductor chip 1 is determined, and if a high degree of coincidence is obtained, the image input device 1
It is determined that the semiconductor chip 1 imaged at 0 is a non-defective product.

The above operation is summarized as shown in FIG. Steps S1 to S5 are the same as the procedure shown in FIG. 9 in the first embodiment. In this embodiment, as step S6, the center of gravity G of the template matching regions Ta, Tb, and Tc and the image of the semiconductor chip 1 are obtained. superposed and the center of gravity G ₁ of the candidate region only in that by adding the process of performing position correction of the image the semiconductor chip 1 is different in. Other procedures are the same as in the first embodiment.

(Embodiment 3) In this embodiment, another method for correcting the position of an image of the semiconductor chip 1 to be inspected so as to be superimposed on a template will be described. That is, in the present embodiment, the center positions Pa, Pb, and Pc of the matching regions Ta, Tb, and Tc and the center position Pa of the candidate region
_The difference between the distances ₁ , ₁ , Pb ₁ , and Pc ₁ is determined, and the position of the image on the semiconductor chip 1 is corrected so that the sum of the squares of the distance differences is minimized. Even with such a method, the image of the semiconductor chip 1 can be superimposed on the template. After the superposition, the degree of coincidence between the template and the image of the semiconductor chip 1 is determined. It is determined that the semiconductor chip 1 imaged by the input device 10 is good.

The above operation is summarized as shown in FIG. That is, steps S1 to S5 are the same as the procedure shown in FIG. 9 in the first embodiment, and in this embodiment, the matching regions Ta and T
The position correction of the image of the semiconductor chip 1 is performed so that the sum of the squares of the distance differences between the center positions Pa, Pb, Pc of b and Tc and the center positions Pa ₁ , Pb ₁ , Pc ₁ of the candidate area is minimized. The only difference is that a process is added. Other procedures are the same as in the first embodiment.

(Embodiment 4) In each of the above-described embodiments, the template of the semiconductor chip 1 is commonly used for the wafer 2 on which the same type of semiconductor chip 1 is formed. Subtle differences in shape may occur. Therefore, in this embodiment, a template is created for each wafer 2 to further improve the accuracy of defect detection by pattern matching.

That is, as shown in FIG. 13, images of a plurality of semiconductor chips 1 are fetched (S1), and the quality of each semiconductor chip 1 is determined from the images (S2). The pass / fail judgment will be described later. Based on the result of the pass / fail judgment, a template is created from non-defective products (S3). Thereafter, an image of the semiconductor chip 1 to be inspected is fetched (S4), and the inspection is performed by the method described in each of the above embodiments ( S5) When reaching the last semiconductor chip 1 of each wafer 2 (S6), the next wafer 2 is inspected (S7). Here, the point of re-creating a template for each wafer 2 is a characteristic point of the present embodiment collar.

In order to select a non-defective product to be used as a template from a large number of semiconductor chips 1 formed on the wafer 2 (pass / fail judgment in step S2 in FIG. 13), as shown in FIG. The images arbitrarily selected from the images of the chip 1 are compared with each other (S1, S2), and the semiconductor chips 1 having a high degree of coincidence with each other are obtained (S3, S4). For example, when five semiconductor chips 1 (A, B, C, D, and E) are selected, two of them are compared with each other for the degree of coincidence. Now, a combination in which a threshold value is appropriately set for the matching degree and the matching degree exceeds the threshold value is AB,
In the case of AD, BD, BE, and DE, the matching degree of the semiconductor chip 1 (C) is low with respect to any of the semiconductor chips 1, so that it is not suitable as a template. to decide. Further, since both the semiconductor chips 1 (B, D) have a high degree of coincidence with the other semiconductor chips 1, they are adopted for template creation (S5).

When a template is created from a non-defective product of the selected semiconductor chip 1 (step S3 in FIG. 13).
Creation of a template), as shown in FIG.
(S1) With respect to the image of the semiconductor chip 1 (B, D), the average value of the pixel values at the corresponding positions is obtained, and this average value is adopted as the pixel value of each pixel of the template (S
2). As described above, by determining the average value of the pixel values of the plurality of semiconductor chips 1, it is possible to reduce the influence of random noise and the like included in the image.

Although the average value of the pixel values is determined only for the semiconductor chip 1 having a high degree of coincidence, the average value of the pixel values may be determined for the semiconductor chip 1 after excluding the one having a low degree of coincidence. Good. In the above embodiment, X
The Y table 5 is moved so that a desired image of the semiconductor chip 1 can be captured by the image input device 10.
The image input device 10 may be moved with respect to the wafer 2 instead of the Y table 5. In correcting the position of the image of the semiconductor chip 1, the center positions Pa, P of the template matching regions Ta, Tb, Tc are used.
b, Pc and the center position P of the candidate area of the semiconductor chip 1
Although using _{a 1, Pb 1, Pc 1} , may be used other specific points.

[0035]

According to the first aspect of the present invention, a pair of reference chips are provided on a wafer in a straight line in a vertical direction or a horizontal direction, and a reference distance which is an interval between semiconductor chips based on the reference chips and an arrangement direction. The tilt is determined, and the image input device and the wafer are relatively moved by the reference distance in the direction of the tilt, so even if there is a slight variation in the interval between the separated semiconductor chips, the semiconductor chip is imaged by the image input device. There is an advantage that can be. Further, after performing position correction so that a specific point of the image of the semiconductor chip coincides with a specific point of the template, the presence or absence of a defective portion of the semiconductor chip is detected based on the degree of coincidence between the image of the semiconductor chip and the template. The position correction of the chip is performed by image processing, and there is an advantage that accurate positioning can be performed without depending on the machine precision.

According to a second aspect of the present invention, with respect to the direction and the distance of relative movement between the wafer and the image input device, the center coordinates in the image of the semiconductor chip imaged by the image input device and the center coordinates of the image are calculated. Is determined in consideration of the tilt and the reference distance, so that the relative movement distance and movement direction between the wafer and the image input device can be determined so that the semiconductor chip does not deviate from the visual field of the image input device. Has the effect of becoming

According to the present invention, the position of the image of the semiconductor chip is accurately corrected even when the semiconductor chip has a defect due to dust or scratches or when the appearance of the semiconductor chip varies. It has the advantage of being able to. According to the invention of claim 6, since a non-defective product is extracted from the semiconductor chip on the wafer and a template is created, and a template is created for each wafer, the quality is determined based on a difference in appearance of the semiconductor chip due to a difference between wafers and a difference in illumination. There is an advantage that the difference in the results can be prevented and the accuracy of the pass / fail judgment can be increased.

According to the seventh aspect of the present invention, since a semiconductor chip occupying a large number on a wafer is used as a template, there is an advantage that a reasonable standard can be given when creating a template for each wafer. According to the invention of claim 8, since the average value of the pixel values of the corresponding pixels for the images of the plurality of non-defective semiconductor chips is used as the pixel value of the template, the influence of random noise and the like can be reduced by averaging the pixel values. There is an advantage that you can.

[Brief description of the drawings]

FIG. 1 is a flowchart illustrating a procedure according to a first embodiment.

FIG. 2 is a schematic configuration diagram of an apparatus used in Example 1.

FIG. 3 is a diagram illustrating a relationship between an XY table and a wafer according to the first embodiment.

FIG. 4 is a diagram illustrating a wafer according to the first embodiment.

FIG. 5 is a diagram illustrating an example of a reference chip according to the first embodiment.

FIG. 6 is a diagram illustrating a relationship between a reference chip, a reference distance, and an inclination in the first embodiment.

FIG. 7 is a diagram illustrating a concept of a correction value in the first embodiment.

FIG. 8 is a diagram illustrating a concept of position correction of an image of a semiconductor chip in the first embodiment.

FIG. 9 is a flowchart of position correction of an image of a semiconductor chip in the first embodiment.

FIG. 10 is a diagram illustrating a concept of position correction of an image of a semiconductor chip in a second embodiment.

FIG. 11 is a flowchart of position correction of an image of a semiconductor chip in the second embodiment.

FIG. 12 is a flowchart of position correction of an image of a semiconductor chip in a third embodiment.

FIG. 13 is a flowchart illustrating a template creation procedure according to a fourth embodiment.

FIG. 14 is a flowchart illustrating a main part of a template creation procedure according to a fourth embodiment.

FIG. 15 is a flowchart of a main part showing a template creation procedure according to the fourth embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor chip 2 Wafer 3 Film 4 Ring 5 XY table 6 Reference chip 10 Image input device

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-2-290040 (JP, A) JP-A-63-205923 (JP, A) JP-A-54-83774 (JP, A) JP-A-5-205 293795 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G01B 11/00-11/30 G01N 21/88

Claims (8)

(57) [Claims] 1. A wafer formed by arranging a large number of semiconductor chips vertically and horizontally is placed on a synthetic resin film, and after separating each semiconductor chip, the film is formed so that a gap is formed between adjacent semiconductor chips. A method of inspecting the appearance of each semiconductor chip in an extended state based on an image taken by an image input device, wherein a plurality of semiconductor chips defined on a wafer are used as reference chips, and a vertical or horizontal direction is used. The known number of semiconductor chips between a pair of reference chips provided on a straight line, and the coordinates in the image of the representative point of the reference chip obtained based on the image obtained by the image input device including both reference chips in the field of view. From the reference distance, which is the average value of the distance between adjacent semiconductor chips, and the slope formed by a straight line connecting the two reference chips with respect to the coordinate axis of the image. The wafer and the image input device are relatively moved in the direction of the inclination by the reference distance from the position where the semiconductor chip is stored, and then a plurality of specific points obtained for the semiconductor chip present in the field of view of the image input device After correcting the position of the image of the semiconductor chip so as to match a plurality of specific points of the template defined in advance, the presence or absence of a defective portion of the semiconductor chip is detected based on the degree of matching between the image of the semiconductor chip and the template. A method for inspecting the appearance of a semiconductor chip, comprising: 2. After the wafer and the image input device are relatively moved by the reference distance in the direction of the inclination, the center coordinates in the image of the semiconductor chip imaged by the image input device and the center coordinates of the image. Taking into account the relative position of the wafer and the reference distance, the relative movement direction and distance between the wafer and the image input device so that the semiconductor chip to be inspected next falls within the field of view of the image input device. 2. The method for inspecting the appearance of a semiconductor chip according to claim 1, wherein: 3. A specific point having a high degree of matching with a specific point of a predetermined template among a plurality of specific points obtained for an image of a semiconductor chip existing within the field of view of the image input device. 2. The method according to claim 1, wherein the method is used for correcting the position of the semiconductor chip. 4. After matching the center of gravity of a plurality of specific points obtained for an image of a semiconductor chip present in the field of view of the image input device with the center of gravity of a specific point in the template,
2. The method of claim 1, wherein the image of the semiconductor chip is rotated around the center of gravity so that a specific point of the image of the semiconductor chip coincides with a specific point of the template. 5. The image of a semiconductor chip is minimized so that the sum of squares of distance differences between a plurality of specific points obtained from an image of the semiconductor chip present in the field of view of the image input device and a specific point of the template is minimized. 2. The method according to claim 1, wherein the position of the image of the semiconductor chip is corrected by moving the semiconductor chip. 6. The method according to claim 1, wherein a good product is extracted from the semiconductor chips on the wafer to create a template. 7. The semiconductor device according to claim 6, wherein a degree of coincidence is determined for a plurality of semiconductor chips on the wafer, and a semiconductor chip having a high probability of being highly coincident with another semiconductor chip is determined as a non-defective product. Semiconductor chip appearance inspection method. 8. A degree of coincidence is obtained for a plurality of semiconductor chips on a wafer, and a pixel value of a pixel corresponding to an image of a plurality of semiconductor chips having a high probability of being highly coincident with another semiconductor chip is obtained. 7. The method according to claim 6, wherein the average value is used as the pixel value of the template.