JP2973705B2 - Automatic gain control circuit - Google Patents

Automatic gain control circuit

Info

Publication number
JP2973705B2
JP2973705B2 JP4145148A JP14514892A JP2973705B2 JP 2973705 B2 JP2973705 B2 JP 2973705B2 JP 4145148 A JP4145148 A JP 4145148A JP 14514892 A JP14514892 A JP 14514892A JP 2973705 B2 JP2973705 B2 JP 2973705B2
Authority
JP
Japan
Prior art keywords
control
variable attenuator
voltage
automatic gain
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP4145148A
Other languages
Japanese (ja)
Other versions
JPH05343937A (en
Inventor
敬 中澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP4145148A priority Critical patent/JP2973705B2/en
Publication of JPH05343937A publication Critical patent/JPH05343937A/en
Application granted granted Critical
Publication of JP2973705B2 publication Critical patent/JP2973705B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、自動利得制御回路に関
し、特にマイクロ波受信装置に使用される自動利得制御
回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic gain control circuit, and more particularly, to an automatic gain control circuit used for a microwave receiver.

【0002】[0002]

【従来の技術】従来の自動利得制御回路(以下AGC回
路という)は図2に示すように、入力信号は、可変減衰
器9を経由して増幅器10において増幅される。この増
幅された出力信号を検波器11で検波し、この検波電圧
に比例した直流電圧を発生する制御電圧発生器12に入
力する。この直流電圧は切替器13を経由して、可変減
衰器9に供給され減衰量を制御しAGC回路を形成して
いた。さらに、切替器13は、このAGC制御電圧を切
替えて、試験や保守時に、固定電圧源14から固定電圧
を出力し、可変減衰器9に印加して固定利得に設定して
いた。
2. Description of the Related Art In a conventional automatic gain control circuit (hereinafter referred to as an AGC circuit), an input signal is amplified by an amplifier 10 via a variable attenuator 9 as shown in FIG. The amplified output signal is detected by a detector 11 and input to a control voltage generator 12 that generates a DC voltage proportional to the detected voltage. This DC voltage is supplied to the variable attenuator 9 via the switch 13 to control the amount of attenuation to form an AGC circuit. Further, the switch 13 switches the AGC control voltage, outputs a fixed voltage from the fixed voltage source 14 and applies it to the variable attenuator 9 to set a fixed gain at the time of a test or maintenance.

【0003】[0003]

【発明が解決しようとする課題】この従来のAGC回路
は、保守時又は、試験時にAGC回路を固定利得にする
場合に切替器を駆動し、切替が始まってから、完了する
までの切替時間に相当する間、AGC回路の直流制御信
号が0になるので、可変減衰器の減衰量が無くなり、A
GC回路出力には最大出力が発生する。特に、このAG
C回路の最大利得が大きいほど後段に接続される復調器
等に過大入力が印加されるために最悪の場合に破損する
恐れがあるという欠点がある。
This conventional AGC circuit drives a switch when maintaining the AGC circuit at a fixed gain at the time of maintenance or a test. During this time, the DC control signal of the AGC circuit becomes 0, so that the attenuation of the variable attenuator is lost, and
The maximum output is generated at the GC circuit output. In particular, this AG
The larger the maximum gain of the C circuit is, the more the excessive input is applied to the demodulator and the like connected at the subsequent stage.

【0004】[0004]

【課題を解決するための手段】本発明の自動利得制御回
路は、入力信号を制御端子からの第1の制御電圧に応じ
て減衰量を加減する第1の可変減衰器と、この第1の可
変減衰器の出力を増幅する増幅器と、この増幅器の出力
を検波する検波器と、この検波電圧に対応する電圧を発
生する制御電圧発生器と、この制御電圧発生器により発
生した前記第1の制御電圧を前記制御端子に接続するか
又は固定電圧を前記制御端子に接続するかの切り替えを
行う切替器とを有する自動利得制御回路において、前記
増幅器の出力に接続される第2の可変減衰器と、前記切
替器が前記固定電圧を出力する側に切り替える過渡時間
より長いT時間の間、前記第2の可変減衰器の減衰量を
所定の値に保持する第2の制御信号を送出する単安定発
振器とを有する。
SUMMARY OF THE INVENTION An automatic gain control circuit according to the present invention comprises a first variable attenuator for adjusting the amount of attenuation of an input signal according to a first control voltage from a control terminal; An amplifier for amplifying the output of the variable attenuator, a detector for detecting the output of the amplifier, a control voltage generator for generating a voltage corresponding to the detected voltage, and a control voltage generator
In the automatic gain control circuit and a switch for whether or fixed voltage the first control voltage without connecting to the control terminal performs either switching to connect to the control terminal is connected to the output of said amplifier A second variable attenuator and a second variable attenuator for maintaining the attenuation of the second variable attenuator at a predetermined value for a T time longer than a transient time during which the switch switches to the side outputting the fixed voltage . A monostable oscillator for transmitting a control signal .

【0005】[0005]

【実施例】次に本発明について図面を参照して説明す
る。図1は、本発明の一実施例の回路図である。図1に
おいて、入力信号は可変減衰器9を経由して、増幅器1
0で増幅された後、可変減衰器1を経て出力される。一
方、検波器11で、レベルを検出し、制御電圧発生器1
2で直流制御電圧を発生させて切替器13を経て可変減
衰器9を制御し、AGC回路を構成する。又、切替器1
からは切替制御信号4が、出力され時定数Tを有する
単安定発振器3を制御して、T時間の間増幅器2によ
り、可変減衰器1の減衰量をAGC回路の最大利得と定
常利得との差に等しい値以上に大きくする。この動作す
る時間Tは、切替器13の切替時間よりも大きく設定さ
れており、切替器13が駆動されるに必要な時間内で
は、常に可変減衰器1により、定常出力値よりも低く出
力レベルが抑圧されるので、保守時や試験時に後続され
る復調器等に過大入力が印加されないため、機器の破損
する恐れがなくなる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram of one embodiment of the present invention. In FIG. 1, an input signal passes through a variable attenuator 9 and passes through an amplifier 1.
After being amplified by 0, it is output through the variable attenuator 1 . On the other hand, the level is detected by the detector 11 and the control voltage generator 1
In step 2, a DC control voltage is generated to control the variable attenuator 9 via the switch 13, thereby forming an AGC circuit. Switch 1
3 outputs a switching control signal 4 and has a time constant T.
And controls the monostable oscillator 3, by between amplifier 2 the T time, the attenuation amount of the variable attenuator 1 increase equal more than the difference between the maximum gain and the constant gain of the AGC circuit. The operating time T is set to be longer than the switching time of the switch 13, and during the time required for driving the switch 13, the variable attenuator 1 always outputs the output level lower than the steady output value. Is suppressed, so that an excessive input is not applied to a demodulator and the like that follow at the time of maintenance or testing, so that there is no risk of damage to the equipment.

【0006】[0006]

【発明の効果】以上説明したように本発明は、出力信号
側の可変減衰器、増幅器、時定数Tを有する単安定発振
器を介して切替器を制御することにより、保守時や試験
時に行なうAGC回路の停止切替による過大出力の発生
を抑圧し後続する機器の破損を防止し、保守性を向上さ
せるという効果がある。
As described above, according to the present invention, the AGC performed at the time of maintenance or test is performed by controlling the switch via the variable attenuator, the amplifier and the monostable oscillator having the time constant T on the output signal side. This has the effect of suppressing the occurrence of excessive output due to switching of the circuit stop, preventing damage to subsequent equipment, and improving maintainability.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例の回路図である。FIG. 1 is a circuit diagram of one embodiment of the present invention.

【図2】従来の自動利得制御回路の回路図である。FIG. 2 is a circuit diagram of a conventional automatic gain control circuit.

【符号の説明】[Explanation of symbols]

1,9 可変減衰器 2,10 増幅器 3 単安定発振器 4 切替制御信号 11 検波器 12 制御電圧発生器 13 切替器 14 固定電圧源 1,9 Variable attenuator 2,10 Amplifier 3 Monostable oscillator 4 Switching control signal 11 Detector 12 Control voltage generator 13 Switch 14 Fixed voltage source

フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H03G 1/00 - 3/34 Continuation of the front page (58) Field surveyed (Int.Cl. 6 , DB name) H03G 1/00-3/34

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 入力信号を制御端子からの第1の制御電
圧に応じて減衰量を加減する第1の可変減衰器と、この
第1の可変減衰器の出力を増幅する増幅器と、この増幅
器の出力を検波する検波器と、この検波電圧に対応する
電圧を発生する制御電圧発生器と、この制御電圧発生器
により発生した前記第1の制御電圧を前記制御端子に接
続するか又は固定電圧を前記制御端子に接続するかの切
り替えを行う切替器とを有する自動利得制御回路におい
て、前記増幅器の出力に接続される第2の可変減衰器
と、前記切替器が前記固定電圧を出力する側に切り替え
る過渡時間より長いT時間の間、前記第2の可変減衰器
の減衰量を所定の値に保持する第2の制御信号を送出す
る単安定発振器とを有することを特徴とする自動利得制
御回路。
1. A first variable attenuator for adjusting an amount of attenuation of an input signal according to a first control voltage from a control terminal, an amplifier for amplifying an output of the first variable attenuator, and the amplifier Detector for detecting the output of the control voltage generator, a control voltage generator for generating a voltage corresponding to the detected voltage, and the control voltage generator
In the automatic gain control circuit and a switch for whether or fixed voltage connected to said control terminal of said generated first control voltage is, whether or switch connected to said control terminal by being connected to an output of said amplifier that a second variable attenuator, while the switching device is the fixed voltage longer T time than transition time to switch to the side for outputting the second for holding the attenuation of the second variable attenuator to a predetermined value And a monostable oscillator for transmitting the control signal .
【請求項2】 前記過渡時間における前記第2の可変減
衰器の減衰量は、この自動利得制御回路の最大利得と定
常利得との差に等しい値以上であることを特徴とする請
求項1記載の自動利得制御回路。
2. The method according to claim 1, wherein the second variable reduction during the transition time is performed.
The attenuation of the attenuator is defined as the maximum gain of this automatic gain control circuit.
2. The automatic gain control circuit according to claim 1, wherein the value is equal to or more than a value equal to a difference from the normal gain .
JP4145148A 1992-06-05 1992-06-05 Automatic gain control circuit Expired - Fee Related JP2973705B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4145148A JP2973705B2 (en) 1992-06-05 1992-06-05 Automatic gain control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4145148A JP2973705B2 (en) 1992-06-05 1992-06-05 Automatic gain control circuit

Publications (2)

Publication Number Publication Date
JPH05343937A JPH05343937A (en) 1993-12-24
JP2973705B2 true JP2973705B2 (en) 1999-11-08

Family

ID=15378532

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4145148A Expired - Fee Related JP2973705B2 (en) 1992-06-05 1992-06-05 Automatic gain control circuit

Country Status (1)

Country Link
JP (1) JP2973705B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FI106325B (en) * 1998-11-12 2001-01-15 Nokia Networks Oy Method and device for controlling power control

Also Published As

Publication number Publication date
JPH05343937A (en) 1993-12-24

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Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 19990803

LAPS Cancellation because of no payment of annual fees