JP2967110B2 - Lead frame and manufacturing method thereof - Google Patents
Lead frame and manufacturing method thereofInfo
- Publication number
- JP2967110B2 JP2967110B2 JP23953491A JP23953491A JP2967110B2 JP 2967110 B2 JP2967110 B2 JP 2967110B2 JP 23953491 A JP23953491 A JP 23953491A JP 23953491 A JP23953491 A JP 23953491A JP 2967110 B2 JP2967110 B2 JP 2967110B2
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- stage
- semiconductor element
- tab
- predetermined
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、リードフレーム及びそ
の製造方法に関するものであり、特に詳しくは、クラッ
クの発生を有効に防止しえるリードフレームの構造に関
するものである。The present invention relates to a lead frame and a lead frame.
More specifically, the present invention relates to a lead frame structure capable of effectively preventing cracks from occurring.
【０００２】[0002]
【従来の技術】従来、半導体装置を構成する場合には、
図２に示すように、例えば所定の形状のタブ部５とリー
ド部２とを有するリードフレームを形成し、該リードフ
レームの該タブ部５（以下、タブ部を単にタブと称する
こともある）に所定の半導体集積回路からなる半導体素
子、例えば、半導体チップ３を搭載し、且つ該半導体チ
ップ３の所定の端子部を構成するパッド部７と該リード
フレームのリード部２とを金線等の導電性ワイヤ４で接
続した後、適宜の樹脂材料からなる封止樹脂１を用いて
モールディング加工を行う事によって製造されるもので
ある。2. Description of the Related Art Conventionally, when a semiconductor device is constructed,
As shown in FIG. 2, for example, a lead frame having a tab portion 5 and a lead portion 2 having a predetermined shape is formed, and the tab portion 5 of the lead frame (hereinafter, the tab portion is simply referred to as a tab)
Semiconductor element having a predetermined semiconductor integrated circuit also) be
After mounting the semiconductor chip 3 and connecting the pad portion 7 constituting a predetermined terminal portion of the semiconductor chip 3 and the lead portion 2 of the lead frame with a conductive wire 4 such as a gold wire, It is manufactured by performing a molding process using a sealing resin 1 made of an appropriate resin material.
【０００３】近年、半導体装置の小型化及び高集積化に
伴いパッケージ厚は薄くなり、パッケージに対する半導
体素子の占有率も拡大し、５０％以上、更には８０％〜
９０％に迫るものも現れて来ている。係る半導体装置の
小型化及び高集積化に伴い、問題となるのは、該タブと
半導体素子との接着性及び該リードフレームのタブと封
止樹脂との接着性であり、当該半導体素子を基板に実装
する工程で、加熱を行うと、該半導体素子の封止樹脂
部、該封止樹脂部とリード部、或いはタブ部の間にクラ
ックが発生すると言う欠点が多発してきている。In recent years, the thickness of a package has been reduced along with the miniaturization and high integration of a semiconductor device, and the occupation ratio of a semiconductor element to a package has been increased.
Some are approaching 90%. With the miniaturization and high integration of such a semiconductor device, what is problematic is the adhesion between the tab and the semiconductor element and the adhesion between the tab of the lead frame and the sealing resin. When heating is carried out in the mounting step, cracks are frequently generated between the sealing resin part of the semiconductor element, the sealing resin part and the lead part, or the tab part.
【０００４】係るクラック発生の原因は、多数あるが、
現在一番有力な原因としては、つぎの様に考えられてい
る。即ち、現在リードフレームとして一般的に使用され
ている材料としては、鉄／ニッケル合金（Ｆｅ／Ｎｉ＝
５８／４２、４２アロイと称されている）で有って、そ
の熱膨張係数が４．３×１０-6である。There are many causes of such cracks,
Currently, the most probable causes are considered as follows. That is, as a material generally used as a lead frame at present, an iron / nickel alloy (Fe / Ni =
58/42, 42 alloy), and its thermal expansion coefficient is 4.3 × 10 -6 .
【０００５】一方、該半導体素子を封止する封止樹脂と
しては、エポキシ樹脂等が使用されるが、該樹脂の熱膨
張係数は一般的には１５〜２０×１０-6である。係る両
者を接合した場合、その接合界面は、完全に均一ではな
く、ミクロ的に見ると多数の間隙、隙間、孔等が存在し
ているのであり、係る両者をモールド成形する工程で加
熱すると係る熱膨張係数の差から、両者の接合界面にス
トレスが発生し間隙等が拡大する事により、外気からの
水分が吸収され易くなる。該水分が吸収され易い部分
は、該タブ５の下面と該封止樹脂１との接合界面であ
る。On the other hand, an epoxy resin or the like is used as a sealing resin for sealing the semiconductor element, and the resin has a thermal expansion coefficient of generally 15 to 20 × 10 −6 . When such both are joined, the joint interface is not completely uniform, and there are many gaps, gaps, holes and the like when viewed microscopically. Due to the difference in coefficient of thermal expansion, stress is generated at the joint interface between the two and a gap or the like is enlarged, so that moisture from outside air is easily absorbed. The portion where the moisture is easily absorbed is the bonding interface between the lower surface of the tab 5 and the sealing resin 1.
【０００６】又、該モールド工程に使用される樹脂は、
本来的には、吸湿性があり、そのままほっておいても１
週間で約０．２％の水分を吸水する能力を持っている。
その為、係るモールド工程を経て樹脂封止された半導体
装置を後の工程で、基板に実装する場合、半田を用いて
接着処理を行うが、その際、２１０℃〜２６０℃の加熱
が該半導体装置に付加されるので、その際の熱により、
該半導体装置内の該タブの下面に吸収されていた水分が
沸騰し、体積が約２０００倍と膨れ上がり膨張部を形成
すると同時に、内部でのストレスが急増する他、当該加
熱によって該封止樹脂もヤング率が低下してゴム状の状
態に変化する為、当該封止樹脂の引張強度も低下する事
になる。[0006] The resin used in the molding step is:
Originally, it has hygroscopicity and can be left alone
It has the ability to absorb about 0.2% water per week.
Therefore, when a semiconductor device sealed with resin through such a molding step is mounted on a substrate in a later step, an adhesive treatment is performed using solder. In this case, heating at 210 ° C. to 260 ° C. As it is added to the device,
Moisture absorbed on the lower surface of the tub in the semiconductor device boils, the volume swells to about 2,000 times to form an expanded portion, and at the same time, the stress inside increases sharply. Also, since the Young's modulus decreases and changes to a rubbery state, the tensile strength of the sealing resin also decreases.
【０００７】その為、該封止樹脂の内部及び内部から外
部にかけて内部クラックや外部クラックが発生する事に
なる。係るクラックは、特に、該リードフレームを所定
の金属平板から所定の金型を用いて打ち抜く工程に於い
て該リードフレームのタブ５の周縁部に通常発生する突
起状部で通常バリ部６と称される部分にストレスが集中
する事から、係るバリ部６からクラックが発生し易くな
っている。As a result, internal cracks and external cracks occur from inside and outside of the sealing resin. Such cracks are projections which are usually formed on the periphery of the tab 5 of the lead frame in a step of punching the lead frame from a predetermined metal flat plate using a predetermined die, and are usually called burr portions 6. Since the stress is concentrated on the part to be cracked, cracks are easily generated from the burr part 6.
【０００８】係る問題を解決する方法として従来では、
当該バリ部６を当該タブ５の該チップ搭載面に形成させ
て、樹脂の厚い外部クラックに至らない方向に発生させ
る方法とか、逆に該バリ部６の研磨加工或いはエッチン
グ処理により除去するとか丸くする方法が用いられてい
るが、何れも十分な効果を発揮するには至っていないの
が現状である。Conventionally, as a method for solving such a problem,
The burr portion 6 is formed on the chip mounting surface of the tub 5 so as to generate in a direction that does not lead to a thick external crack of resin, or conversely, the burr portion 6 may be removed by polishing or etching. However, at present, none of them have been able to exhibit a sufficient effect.
【０００９】つまり、上記の様な原因で発生するストレ
スは、該タブ下面に形成された空間部の水分が膨張する
際該樹脂を押し下げる作用に基づいて発生するものであ
り、該タブ５の略中央部分に最大の応力が掛かる事にな
るので、係る応力を緩和する様に該タブの形状を最適化
しなければ、確実に該クラックの発生を防止する事は不
可能である。That is, the stress generated due to the above-mentioned cause is generated due to the action of pushing down the resin when the water in the space formed on the lower surface of the tub expands. Since the maximum stress is applied to the central portion, it is impossible to surely prevent the crack from occurring unless the shape of the tab is optimized so as to reduce the stress.
【００１０】[0010]
【発明が解決しようとする課題】本発明の目的は、係る
従来技術に於ける問題を解決し、半導体パッケージを実
装する際にクラックが発生しない様な半導体パッケージ
を形成する為に適したリードフレーム及びその製造方法
を提供するものである。SUMMARY OF THE INVENTION An object of the present invention is to solve the problems in the prior art and to provide a lead frame suitable for forming a semiconductor package in which cracks do not occur when the semiconductor package is mounted. and Oh Ru is provided a method of manufacturing <br/>.
【００１１】[0011]
【課題を解決するための手段】上記目的を達成するため
に、本発明は、半導体素子搭載用のステージを備えてお
り、上記ステージは、上記半導体素子が搭載される半導
体素子搭載面の端部に鋭角状突起部が形成されると共
に、上記半導体素子搭載面に対する裏面側の周辺に面取
り状テーパ、すなわち、テーパ状構成部を備えているリ
ードフレームを提供する。また一方で、本発明は、半導
体素子搭載用のステージを備えたリードフレームの製造
方法であって、所定材料の金属板から、所定形状の上記
ステージと所定形状のリード部とが所定の関係を保って
組み合わされたリードフレームパターンを打ち抜く工程
と、上記ステージにおいて上記半導体素子が搭載される
半導体素子搭載面の端部に鋭角状突起部を形成すると共
に、上記半導体素子搭載面に対する裏面側の周辺に所定
の角度を持つ面取り状テーパを形成する工程とを含むこ
とを特徴とするリードフレームの製造方法を提供する。
好ましくは、本発明のリードフレームの製造方法におい
ては、上記リードフレームパターンの上記ステージが上
記ステージの裏面側の周辺にて当接し得る逆台形状を有
し、かつ、周辺部の傾斜が所定角度に形成されている凹
孔を備えた金型を、上記リードフレームパターンの上記
ステージの裏面側へ押圧することによって、上記面取り
状テーパを形成する工程が遂行される。To achieve the above object of the Invention The present invention comprises a stage for mounting a semiconductor element, the stage, the end of the semiconductor element mounting surface of the semiconductor element is mounted When a sharp projection is formed on the
Further, there is provided a lead frame having a chamfered taper around the back surface side with respect to the semiconductor element mounting surface , that is, a tapered component. On the other hand, the present invention relates to a method for manufacturing a lead frame including a stage for mounting a semiconductor element, wherein the stage having a predetermined shape and the lead portion having a predetermined shape have a predetermined relationship from a metal plate of a predetermined material. The step of punching the combined lead frame pattern while maintaining and forming the acute angle projection at the end of the semiconductor element mounting surface on which the semiconductor element is mounted on the stage.
Forming a chamfered taper having a predetermined angle around the back surface side with respect to the semiconductor element mounting surface .
Preferably, in the method of manufacturing a lead frame of the present invention, the above said stage of the lead frame pattern
Have an inverted trapezoidal shape can abut at the back side near the serial stage, and a mold tilting of the peripheral portion is provided with a recessed hole that is formed at a predetermined angle, the stage of the lead frame pattern The step of forming the above-mentioned chamfered taper is performed by pressing to the back side.
【００１２】[0012]
【作用】本発明に係るリードフレームに於いては、例え
ば、後述の図１に示すように、該リードフレームのステ
ージを構成するタブ部５の第１の主面にバリ部６を設け
ると同時に、該タブ部５の第２の主面を、該第１の主面
に比べてその面積が小さくなる様に構成しているので、
該第２の主面に於いて発生する応力を低減させると共
に、該バリ部６に於ける該応力の集中を分散する事が可
能となるので、ストレスの発生時にクラックの発生を有
効に防止する事ができる。In the lead frame according to the present invention, for example,
If, as shown in FIG. 1 described later, stearyl of the lead frame
At the same time the first major surface of the tab portion 5 constituting the over-di providing burr portion 6, a second major surface of the tab portion 5, its area than the first main surface becomes smaller like So that
Since it is possible to reduce the stress generated in the second main surface and to disperse the concentration of the stress in the burr portion 6, it is possible to effectively prevent the occurrence of cracks when the stress is generated. things Ru can.
【００１３】[0013]
【実施例】以下に、本発明に係るリードフレームの具体
例を図面を参照しながら詳細に説明する。図１は、本発
明に係るリードフレームの一具体例の構成を示す断面図
であり、又該本発明に係るリードフレームを用いて構成
された樹脂封止型半導体装置の構成例を示す断面図であ
る。図に於いて、リードフレーム８は、半導体チップ３
のような半導体素子を搭載するタブ部５とリード部２と
から構成されているものである。すなわち、図１は、該
タブ部５に於ける該半導体素子を搭載する第１の主面９
の端部に鋭角状突起部を含むバリ部６が形成されてお
り、且つ該タブ部５の該導体素子３を搭載する第１の主
面９とは反対側の第２の主面１０の端縁部周辺にテーパ
ー状構成部１６が設けられているリードフレーム８を示
したものである。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A specific example of a lead frame according to the present invention will be described below in detail with reference to the drawings. FIG. 1 is a cross-sectional view illustrating a configuration of a specific example of a lead frame according to the present invention, and is a cross-sectional view illustrating a configuration example of a resin-sealed semiconductor device configured using the lead frame according to the present invention. It is. In the figure, a lead frame 8 is a semiconductor chip 3
And a lead portion 2 on which a semiconductor element such as that described above is mounted . That is, FIG. 1 shows a first main surface 9 on which the semiconductor element is mounted in the tab portion 5.
End and burr portion 6 is formed including a sharp protrusions in, and opposite to the first major surface 9 for mounting the conductor elements 3 of the tab portion 5 of the second major surface 10 FIG. 4 shows a lead frame 8 provided with a tapered component 16 around an edge.
【００１４】本発明に於いては、上記した様に、半導体
パッケージ内に侵入した水分が該タブ部の下面つまり第
２の主面で蒸発気化する事により発生する応力は、当該
タブ部の中央で最大となり、又、該ストレスが発生する
平面の寸法が大きいと発生する応力も大きくなるので、
問題となるクラックの発生を抑制する為には、該タブ部
で発生する応力を効果的に分散しえる構成を該タブ部が
有している事が必要となる。According to the present invention, as described above, the stress generated by the vaporization of the water that has entered the semiconductor package on the lower surface of the tab portion, that is, on the second main surface, is at the center of the tab portion. At the maximum, and when the size of the plane where the stress occurs is large, the generated stress is also large.
In order to suppress the generation of cracks, which are problematic, it is necessary that the tab portion has a configuration capable of effectively dispersing the stress generated in the tab portion.
【００１５】その為、本発明に於いては該リードフレー
ムの半導体チップを搭載する第１の主面と対向する第２
の主面に鈍角を構成するテーパー状構成部１６を該第２
の主面の周縁端部１４に設けると共に、第１の主面の周
縁端部に頂点部の角度θ1 が鋭角に形成された鋭角状突
起部を含むバリ部６を形成させる事により、所望の効果
を有するリードフレームを得る事が可能となったもので
ある。少なくとも該バリ部６はその頂点部が鋭角を構成
している事が好ましい。For this reason, in the present invention, the second main surface of the lead frame opposed to the first main surface on which the semiconductor chip is mounted is provided.
The tapered component 16 forming an obtuse angle with the main surface of the second
In addition to forming the burr portion 6 including an acute projection having an apex angle θ 1 formed at an acute angle at the peripheral edge portion of the first main surface, the edge portion 14 is provided at the peripheral edge portion 14 of the first main surface. Thus, it is possible to obtain a lead frame having the above effect. It is preferable that at least the vertex portion of the burr portion 6 forms an acute angle.
【００１６】又、本発明に係る該バリ部６は、該リード
フレームを所定の金属平板から、所定の金型を用いて打
ち抜く工程で発生する突起部を活用するもので有っても
良く或いは該リードフレームを打ち抜いた後に適宜の切
削加工、研磨加工、エッチング加工等を活用して形成す
るものであっても良い。本発明に係る該リードフレーム
に於ける該テーパー状構成部１６は、当該タブ部５に於
ける該第２の主面１０と鈍角で交わる傾斜角度θ3を有
している事が好ましい。The burr portion 6 according to the present invention may utilize a protrusion generated in a step of punching the lead frame from a predetermined metal flat plate using a predetermined die. appropriate cutting after punching the lead frame, polishing, Oh may it intended to form by utilizing the etching process or the like. It is preferable that the tapered component portion 16 in the lead frame according to the present invention has an inclination angle θ 3 that intersects the second main surface 10 of the tab portion 5 at an obtuse angle.
【００１７】又、本発明に於いては、当該リードフレー
ム８の該タブ部５の側壁部１１は、該第１の主面９の端
部から外側に傾斜して構成されており、且つ該テーパー
状構成部６が、該タブの側壁部１１と鈍角θ2 を形成し
て交わる様に構成されている事が好ましい。更に、本発
明に於ける該第２の主面１０の周縁端部に形成される該
テーパ部１６はその個数、大きさ、頂点部の角度θi を
含む形状は特に限定されるものではないが、ストレス発
生時に於ける応力を効果的に分散しえる形状、個数を有
するものである事が望ましい。In the present invention, the side wall 11 of the tab portion 5 of the lead frame 8 is formed to be inclined outward from the end of the first main surface 9. It is preferable that the tapered component 6 is formed so as to form an obtuse angle θ 2 with the side wall 11 of the tab. Further, the shape the tapered portion 16 formed on the peripheral edge of the main surface 10 of at second to the present invention including the number, size, angle of the apex portion theta i is not limited to a particular However, it is desirable to have a shape and a number that can effectively disperse the stress at the time of occurrence of stress.
【００１８】本発明に於ける該リードフレームの該タブ
部５の特に第２の主面１０に発生する応力を考えると、
該応力σは以下の関係式により表される。 σ＝ｋ・Ｐ・ａ2 ／ｈ2 （ここで、ｋは定数、Ｐは蒸気圧、ａはタブ部の短辺寸
法、ｈはタブ部下部の樹脂の厚さをそれぞれ表すもので
ある。）従って、係る関係式から判断すると、該応力σ
はタブ部の短辺寸法ａを小さくして該第２の主面１０の
面積を小さくする、タブ部下部の樹脂の厚さｈを大きく
する事により小さくする事が可能となる。Considering the stress generated on the tab portion 5 of the lead frame in the present invention, particularly on the second main surface 10,
The stress σ is represented by the following relational expression. σ = k · P · a 2 / h 2 (where k is a constant, P is the vapor pressure, a is the short side dimension of the tab portion, and h is the thickness of the resin below the tab portion. Therefore, judging from the relational expression, the stress σ
Can be reduced by reducing the short side dimension a of the tab portion to reduce the area of the second main surface 10 and increasing the thickness h of the resin under the tab portion.
【００１９】そこで、本発明に於いては、該タブ部５の
第２の主面１０にテーパー状構成部１６を形成する事に
より、該タブ部の短辺寸法ａを小さくする事が可能とな
り、又該テーパ状構成部１６を形成する事により、タブ
部５の第２の主面１０の端部とパッケージ外部との距離
をより長くとれ、クラックの出やすい方向に樹脂を厚く
する事が出来る。Accordingly, in the present invention, the short side dimension a of the tab portion can be reduced by forming the tapered component portion 16 on the second main surface 10 of the tab portion 5. Also, by forming the tapered component portion 16, the distance between the end of the second main surface 10 of the tab portion 5 and the outside of the package can be made longer, and the resin can be thickened in a direction in which cracks are easily generated. I can do it.
【００２０】本発明に於ける該テーパー状構成部１６の
傾斜角度θ3 は特に限定されるものではないが上記した
効果を発揮する範囲で適宜決定する事が出来る。更に、
本発明に於ける、該テーパー状構成部１６と該タブの側
壁部１１との交差角度θ2 も同様に適宜決定する事が出
来る。In the present invention, the inclination angle θ 3 of the tapered component 16 is not particularly limited, but can be appropriately determined within a range in which the above-described effects are exhibited. Furthermore,
In the present invention, the intersection angle θ 2 between the tapered component 16 and the side wall 11 of the tab can also be appropriately determined.
【００２１】次に、本発明に係る該テーパー状構成部１
６の形成方法は、特に限定されるものではないが、例え
ば所定の形状を有するタブ部とリード部とが組み合わさ
れたリードフレームを打ち抜いた後に、少なくとも該リ
ードフレーム８の該タブ部５の第２の主面１０の周縁端
部に所定の角度を有するテーパー状構成部１６を形成す
るものであり、その工程は如何なるものであっても良い
が、一例を示すならば、図３に示す様に、該リードフレ
ーム８の第２の主面１０の周縁端部１４に、所定の傾斜
部１２を周縁部に有する金型１３を押圧若しくは叩打せ
しめて、当該タブ部の第２の主面１０の周縁端部１４を
変形させるものである。係る場合には、当該タブ部５の
第１の主面９を適宜の固定部材１５に固定させておく事
が好ましい。Next, the tapered component 1 according to the present invention will be described.
The method for forming the lead frame 6 is not particularly limited. For example, after punching a lead frame in which a tab having a predetermined shape and a lead are combined, at least the first tab 5 of the lead frame 8 is punched. the peripheral edge <br/> portion of second major surface 10 is intended to form a tapered structure portion 16 having a predetermined angle, but the process may be I Oh of any type, if an example, As shown in FIG. 3, a metal mold 13 having a predetermined inclined portion 12 on the peripheral edge thereof is pressed or hit against the peripheral edge 14 of the second main surface 10 of the lead frame 8, and the tab 13 2 is to deform the peripheral edge portion 14 of the main surface 10. In such a case, it is preferable to fix the first main surface 9 of the tab portion 5 to an appropriate fixing member 15.
【００２２】本発明に係る上記のリードフレーム８を用
いて樹脂封止型半導体装置を製造する場合には、例えば
次の様な工程を経て製造する事が可能である。即ち、所
定の材料で構成された金属平板を準備する工程、該金属
平板から、所定の形状に形成された金型を用いて、所定
の形状を有するタブ部とリード部とが組み合わされたリ
ードフレームを打ち抜く工程、When manufacturing a resin-sealed semiconductor device using the above-described lead frame 8 according to the present invention, it is possible to manufacture the semiconductor device through the following steps, for example. That is, a step of preparing a metal flat plate made of a predetermined material, and a lead in which a tab portion and a lead portion having a predetermined shape are combined from the metal flat plate using a mold formed in a predetermined shape. The process of punching the frame,
【００２３】少なくとも該リードフレームの該タブ部の
半導体チップを搭載する第１の主面とは反対側に有る第
２の主面の周縁部に所定の角度を有するテーパー状構成
部１６を形成する工程、該リードフレームの該タブ部に
所定の半導体集積回路からなる半導体チップを搭載し、
且つ該半導体チップの所定の端子部を構成するパッド部
と該リードフレームのリード部とを金線等の導電性ワイ
ヤで接続する工程、及び該リードフレームを適宜の樹脂
材料からなる封止樹脂を用いてモールディング加工を行
う工程により製造されるものである。A tapered component 16 having a predetermined angle is formed at least on a peripheral portion of a second main surface of the lead frame opposite to the first main surface on which the semiconductor chip is mounted. Mounting a semiconductor chip made of a predetermined semiconductor integrated circuit on the tab portion of the lead frame,
And a step of connecting a pad part constituting a predetermined terminal part of the semiconductor chip and a lead part of the lead frame with a conductive wire such as a gold wire, and sealing the lead frame with a sealing resin made of an appropriate resin material. It is manufactured by a process of performing a molding process using the same.
【００２４】[0024]
【発明の効果】本発明により構成された樹脂封止型半導
体装置の効果を、以下に説明する。即ち、本発明に係る
リードフレームを用いて製造された半導体装置と従来の
リードフレームを用いて製造された半導体装置を用い
て、所定の時間吸湿処理を行った後、半田ディップ操作
を用いて実装作業を実施した後のクラック発生率を測定
した結果を以下に示す。The effects of the resin-sealed semiconductor device constructed according to the present invention will be described below. That is, a semiconductor device manufactured using the lead frame according to the present invention and a semiconductor device manufactured using the conventional lead frame are subjected to moisture absorption processing for a predetermined time, and then mounted using a solder dip operation. The results of measuring the crack occurrence rate after performing the work are shown below.
【００２５】本比較実験に於いて使用された半導体装置
は、リードフレームの構造が異なる他は全て同一の条件
で構成したものを採用した。 上記比較実験の結果から判る通り、従来のリードフレー
ムを用いて構成された半導体装置は、実装時に２２％も
のクラック発生率があるのに対し、本発明に係るリード
フレームを用いて構成された半導体装置に於いては、実
装時においても該クラックの発生が殆どなく、従って該
半導体装置に対する信頼性は極めて高いものとなる事が
確認された。The semiconductor devices used in this comparative experiment were all constructed under the same conditions except for the structure of the lead frame. As can be seen from the results of the above-mentioned comparative experiment, the semiconductor device constructed using the conventional lead frame has a crack occurrence rate of 22% during mounting, whereas the semiconductor device constructed using the lead frame according to the present invention. In the device, it was confirmed that the crack hardly occurred even at the time of mounting, and therefore, the reliability of the semiconductor device was extremely high.
【図１】図１は、本発明に係るリードフレームの構成と
半導体装置の構成の例を説明する断面図である。FIG. 1 is a cross-sectional view illustrating an example of a configuration of a lead frame and a configuration of a semiconductor device according to the present invention.
【図２】図２は、従来に於けるリードフレームの構成と
半導体装置の構成の例を説明する断面図である。FIG. 2 is a cross-sectional view illustrating an example of a configuration of a conventional lead frame and a configuration of a semiconductor device.
【図３】図３は、本発明に於けるタブ部の下面にテーパ
ー状構成部を形成する方法の例を示す図である。FIG. 3 is a diagram showing an example of a method of forming a tapered component on the lower surface of a tab according to the present invention.
１…封止樹脂 ２…リード部 ３…半導体チップ ４…導電性ワイヤ ５…タブ部 ６…バリ部 ７…パッド部 ８…リードフレーム ９…第１の主面 １０…第２の主面 １１…側壁部 １２…傾斜部 １３…金型 １４…周縁端部 １５…固定部材 １６…テーパー状構成部DESCRIPTION OF SYMBOLS 1 ... Sealing resin 2 ... Lead part 3 ... Semiconductor chip 4 ... Conductive wire 5 ... Tab part 6 ... Burr part 7 ... Pad part 8 ... Lead frame 9 ... 1st main surface 10 ... 2nd main surface 11 ... the side wall portion 12 ... inclined portion 13 ... die 14 ... peripheral edge 15 ... fixing member 16 ... tapered configuration unit
フロントページの続き (58)調査した分野(Int.Cl.6，ＤＢ名) H01L 23/50 Continuation of the front page (58) Field surveyed (Int.Cl. 6 , DB name) H01L 23/50
Claims (3)
ードフレームであって、 前記ステージは、前記半導体素子が搭載される半導体素
子搭載面の端部に鋭角状突起部が形成されると共に、前
記半導体素子搭載面に対する裏面側の周辺に面取り状テ
ーパを備えていることを特徴とするリードフレーム。1. A lead frame provided with a stage for mounting a semiconductor element, wherein the stage has an acute-angled protrusion formed at an end of a semiconductor element mounting surface on which the semiconductor element is mounted , and
A lead frame having a chamfered taper around the back surface side with respect to the semiconductor element mounting surface .
ードフレームの製造方法であって、 所定材料の金属板から、所定形状の前記ステージと所定
形状のリード部とが所定の関係を保って組み合わされた
リードフレームパターンを打ち抜く工程と、 前記ステージにおいて前記半導体素子が搭載される半導
体素子搭載面の端部に鋭角状突起部を形成すると共に、
前記半導体素子搭載面に対する裏面側の周辺に所定の角
度を持つ面取り状テーパを形成する工程とを含むことを
特徴とするリードフレームの製造方法。2. A method of manufacturing a lead frame including a stage for mounting a semiconductor element, comprising: combining a stage having a predetermined shape with a lead portion having a predetermined shape from a metal plate of a predetermined material while maintaining a predetermined relationship. Punching the lead frame pattern, and forming an acute projection on the end of the semiconductor element mounting surface on which the semiconductor element is mounted on the stage ,
Forming a chamfered taper having a predetermined angle around the back surface side with respect to the semiconductor element mounting surface .
ージが該ステージの裏面側の周辺にて当接し得る逆台形
状を有し、かつ、周辺部の傾斜が所定角度に形成されて
いる凹孔を備えた金型を、前記リードフレームパターン
の前記ステージの裏面側へ押圧することによって、前記
面取り状テーパを形成する工程が遂行される請求項２記
載のリードフレームの製造方法。3. A stage in which the stage of the lead frame pattern has an inverted trapezoidal shape capable of abutting on the periphery of the back side of the stage, and has a concave hole in which the inclination of the peripheral portion is formed at a predetermined angle. 3. The method of manufacturing a lead frame according to claim 2, wherein the step of forming the chamfered taper is performed by pressing the mold to the back side of the stage of the lead frame pattern.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23953491A JP2967110B2 (en) | 1991-09-19 | 1991-09-19 | Lead frame and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23953491A JP2967110B2 (en) | 1991-09-19 | 1991-09-19 | Lead frame and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0582704A JPH0582704A (en) | 1993-04-02 |
| JP2967110B2 true JP2967110B2 (en) | 1999-10-25 |
Family
ID=17046242
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23953491A Expired - Fee Related JP2967110B2 (en) | 1991-09-19 | 1991-09-19 | Lead frame and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2967110B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6549003B2 (en) | 2015-09-18 | 2019-07-24 | エイブリック株式会社 | Semiconductor device |
| DE112017008277T5 (en) * | 2017-12-13 | 2020-08-20 | Mitsubishi Electric Corporation | SEMICONDUCTOR DEVICE AND POWER CONVERSION DEVICE |
-
1991
- 1991-09-19 JP JP23953491A patent/JP2967110B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0582704A (en) | 1993-04-02 |
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