JP2955291B2 - Electronic still camera - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention is capable of recording a video signal photoelectrically converted by an image pickup device on a recording medium detachably mounted on a camera body. Electronic still camera.

[Prior Art] A system for converting image information into digital image data by A / D conversion means and storing the digital image data in an image memory is a TV system.
It has already been proposed by the present applicant as a TV image data input device used for computer processing of images (Japanese Patent Application Laid-Open
59-94164, JP-A-60-20287), and various other known systems have been realized. These systems generally convert a video signal generated by a TV camera into digital data by sampling at a predetermined rate and A / D converting the digital signal, and accessing the memory with a predetermined address signal. To store in the memory.

On the other hand, in recent years, a system for converting image information and the like into a signal and storing it in a storage medium such as a so-called card memory which can be removably mounted on an apparatus main body having a signal conversion function is being developed. .

This type of system converts image information into digital data and stores it in a storage medium (memory device). As one example, there is one that has been filed as Japanese Patent Application No. 61-85927. Such a signal conversion system is to directly A / D convert a signal photoelectrically converted by an image pickup device and store the A / D converted signal in the card memory.

[Problems to be Solved by the Invention] In the conventional system as described above, when reproducing a video signal from a recorded memory card, a video signal processing circuit at least excluding an imaging device from an electronic still camera is required. In addition, since the signal form remains the primary color signal, the compatibility of the reproducing apparatus is lacking, and there is a disadvantage that the circuit scale becomes large.

Therefore, the present invention converts a video signal read from an imaging unit into a versatile signal form and stores the converted signal in a storage medium, and reads and reproduces information stored in the storage medium in various applications. It is an object of the present invention to provide an electronic still camera capable of storing sub-information that enables the electronic still camera.

[Means for Solving the Problems] In order to solve the above problems and achieve the object, an electronic still camera of the present invention is configured as follows.

For a removable storage medium that is capable of recording a video signal in a main area of its own storage area and recording a sub information signal attached to the video signal in a sub area,
An electronic still camera capable of recording a signal, comprising: separating means for separating a video signal photoelectrically converted by an image sensor into a component corresponding to a luminance signal and a component corresponding to a color difference signal; A memory unit that stores the component corresponding to the separated luminance signal and the component corresponding to the color difference signal in different areas, and a component corresponding to the luminance signal and a component corresponding to the color difference signal from the memory unit. Reading means for sequentially reading the components, and sequentially reading and multiplexing the components corresponding to the luminance signals and the components corresponding to the chrominance signals in a time-series manner, and the components corresponding to the luminance signals and the chrominance signals. Multiplexing output means for outputting a component corresponding to a signal at the same rate, sub-information signal generating means for generating the sub-information signal, A storage for storing the multiplexed component corresponding to the luminance signal and the component corresponding to the color difference signal in the main area of the storage medium, and storing the sub information signal in the sub area of the storage medium. Means.

[Action] As a result of taking such a measure, the following action occurs. In the present invention, the components corresponding to the separated luminance signals and the components corresponding to the color difference signals are temporarily stored in the memory means before the data is transferred to the removable storage medium. Since the component corresponding to the luminance signal and the component corresponding to the color difference signal are sequentially read out, they are arranged in time series and multiplexed and stored in the main area of the storage medium. It can be stored in a storage medium as a certain video signal.

That is, a signal composed of a luminance signal component and a chrominance signal component is used as an internal signal processing method of many video signal devices, and a signal processing circuit can be simplified as compared with inputting in other signal forms. This produces the effect.

Further, since the component corresponding to the luminance signal and the component corresponding to the color difference signal can be recorded or read without overlapping in time, compared to the case where the luminance signal component and the color difference signal component are simultaneously recorded or reproduced, The number of terminals for transmitting and receiving signals between the camera body and the storage medium can be reduced, the structure can be simplified, and the electrical reliability can be improved.

[Embodiment] FIG. 1 is a view showing an embodiment of an electronic still camera according to the present invention. This electronic still camera comprises an electronic still camera main body 1 as an apparatus main body, and a storage medium or a card memory 2 which is detachably mounted on the electronic still camera main body 1. Denotes an imaging unit 3 that photoelectrically converts an image of a subject, a processing unit 4 that receives a signal from the imaging unit 3 and separates the signal into a luminance signal and a color signal, and a storage unit that stores the separated signal from the processing unit 4 5 is comprised.

The imaging unit 3 is configured as follows. Reference numeral 31 denotes an original oscillator for generating a clock signal. When the clock signal generated by the original oscillator 31 is input to a synchronous signal generator (SSG) 32, the synchronous signal generator 32 generates a synchronous signal and a sampling pulse, It is supplied to an imager driver 33 and a sampling and holding circuit (S / H) 35. The imager driver 33 generates a drive signal from the clock signal and drives the imager 34. The sampling and holding circuit 35 receives the sampling pulse from the synchronizing signal generator 32, samples the image signal supplied from the imager 34, and holds the value.

The process unit 4 is configured as follows. Reference numeral 41 denotes a low-pass filter (LPF) that performs low-pass filtering on the signal from the imaging unit 3, and the passing signal is input to a YC separator 42. The YC separator 42 converts a signal consisting of a luminance signal Y corresponding to the brightness of the subject and a color signal C corresponding to the hue superimposed on the luminance signal into a luminance signal Y and two color difference signals R-Y, The signal is separated into BY and component signals.
The separated color difference signals R-Y and B-Y are appropriately adjusted for white signals by white balance circuits (WB) 43a and 43b, and then errors are properly corrected by gamma correctors 44a and 44b. Further, the error of the luminance signal Y separated by the YC separator 42 is appropriately corrected by the γ corrector 44c, and then the white clipper 45 limits the amplitude of the white signal.

The storage unit 5 is configured as follows. Reference numeral 51 denotes a line sequential unit that converts the color difference signals output from the gamma correctors 44a and 44b of the process unit 4 into a line sequential mode. Reference numeral 52 denotes a clock generator for generating a first rate clock signal f1 corresponding to the luminance signal Y and a second rate clock signal f2 corresponding to the color signal C. First A / D converter 53
Receives the first rate clock signal f1 from the clock generator 52, samples the luminance signal,
Performs digital conversion. The second A / D converter 54 receives the second rate clock signal f2 from the clock generator 52, samples the output signal of the line sequential unit 51,
Performs analog / digital conversion. The first and second
The outputs of the A / D converters 53 and 54 are sequentially stored in a first memory area 55a for storing a luminance signal and a second memory area 55b for storing a color signal in the main memory 55, respectively. The rate converter 56 converts the signal stored in the main memory 55,
The signal is read out as a signal in a series form by a time-series combination at a third rate commonly corresponding to the luminance signal Y and the color signal C, and output to the card memory 2 as a storage medium.
The memory controller 57 includes first and second A / D converters 53,
The operation of the clock generator 52 is controlled so as to extract a signal portion corresponding to the effective screen from the component signals input to 54. Also memory controller
57 controls the storage of the main memory 55 and the card memory 2.

The clock signal f1 corresponding to the luminance signal Y supplied from the clock generator 52 to the first A / D converter 53 has a frequency of 10.7 MHz which is slightly higher than twice the 4.2 MHz band of the luminance signal Y.
The clock signal f2 corresponding to the color signal C supplied to the second converter 54 is a color signal C
Is a clock signal having a frequency of 3.58 MHz, which is slightly higher than twice the bandwidth of 1.5 MHz. Hereinafter, the extraction operation of the effective screen, that is, the main area will be described with reference to FIGS. 2 (a), 2 (b), 2 (c) and 3 as needed.

FIG. 2A is a diagram showing signals in one horizontal scanning period (1H) input to the first and second A / D converters 53 and 54. This one horizontal scanning period (1H) is a horizontal blanking period (HBL) having a horizontal synchronizing signal and a burst signal.
And a video signal period corresponding to the above-described effective screen. If the sampling frequency is 14.3 MHz, then 1
The horizontal scanning period (1H) is 910 CLK (clock), and the video signal period corresponding to the effective screen is 760 CLK. FIG. 2B is a diagram showing signals in one vertical scanning period (1 V), that is, in one field. As shown in the figure, one vertical scanning period 1V is 262.5H, and a video signal period is 242H.
Thus, as shown in FIG. 2 (c), the memory area required to store the effective screen for one field corresponds to the horizontal scanning period.
The main area P is a memory area obtained by multiplying 760 CLK by the vertical scanning period 242H. However, since the area of a generally used memory is determined based on a binary digital signal, the memory capable of storing the effective screen is 76
A memory having an 8CLK × 256H memory area will be used.

In order to extract the above-mentioned effective screen (main area P), the memory controller 57 generates a control signal having the timing shown in FIG. 3 and controls the operation of the clock generator 52.

That is, the memory controller 57 detects the horizontal synchronizing signal B from the horizontal scanning signal A, and at the time t2 which is delayed by 150 CLK from the rising time t1 of the horizontal synchronizing signal B and at the time t3 which is further delayed by 760 CLK from this time. Control signals C and D are transmitted, respectively. Therefore, the clock generator 52 receives the control signals C and D and generates the first or second rate signal E in the period T corresponding to the video signal period corresponding to the effective screen, and outputs the first and second signals. The operation of the second A / D converters 53 and 54 is controlled.

FIG. 4 is a diagram showing a specific configuration of the rate converter 56. 59a and 59b store the effective screen of one horizontal scanning period 1H
A memory having an input terminal connected to the first memory area 55a;
Are connected in common to a luminance signal line 58 for inputting a luminance signal Y read out from the CPU, and their output terminals are connected to a YC multiplex switch 60, respectively. Similarly, 62a and 62b are 1H memories for storing an effective screen of one horizontal scanning period, and their input terminals are commonly connected to a color signal line 61 for inputting a color signal read from the second memory area 55b, Output terminals are
It is connected to the YC multiplex switch 60. Where 1H memory 59a,
59b is alternately written and controlled by a clock signal f1 of a first rate (10.7 MHz), and is read by a clock signal f3 of a third rate (14.3 MHz) which is 4/3 times compressed, and is read by a YC multiplex switch 60. Is output to 1H memory 62a,
62b is alternately written and controlled by the clock signal f2 of the second rate (3.58 MHz) and is read out by the clock signal f3 of the third rate (14.3 MHz) which is four times compressed and output to the YC multiplex switch 60 It is something to be done. YC multiplex switch 60
The luminance signal of the third rate (14.3 MHz) from the 1H memories 59a and 59b and the color signal of the third rate from the 1H memories 62a and 62b are multiplexed and output as a 1H serial signal. . Here, the contents of the 1H memory 59a and the 1H memory 62b are multiplexed into a series at a third rate at the third rate, and the YC multiplexed signal is set to 1H. And a YC multiplexed signal that is multiplexed into 1H and alternately switched and output.

The sub information signal converter 7 is configured as follows. 71
Reference numeral denotes a shutter trigger switch for operating a shutter provided in the camera body 1. A trigger operation counter 72 counts the number of times the shutter trigger switch 71 has been turned on. The trigger operation counter 72 is linked to the shutter, and usually uses a 5-bit counter. Therefore, the trigger operation counter 72 counts information on the number of shutters up to 5 bits, that is, up to 32 times, and outputs the information as a count signal. The imager identification signal 73 is output from the imager 34 for identifying the type of the different system among the PAL system, the SECAM system, and the NTSC system. The character generator operating section 74 is for inputting information such as characters and symbols such as titles and dates. The character generator 75 generates a character signal such as a date by operating the character generator operation section 74. The character signal, the imager identification signal, and the count signal are mixed and input to the multiplexing circuit 76 as a mixed signal. The output signal of the character generator 75 is timing-controlled by a control signal from the memory controller 57, and is output only for a certain period. This timing control is similar to the timing control in the effective screen area P described above, and will be described with reference to FIG.

In FIG. 2 (c), the memory area of the card memory 2 for one field of valid screen is 768CLK × 256H = 1966.
08 bytes. From this memory area, the effective screen area P
(760 x 242 = 183920 bytes) is subtracted from 768 CLK
× 14H (10752 bytes) area Q and 8CLK × 242H (19
36 bytes). That is, the character signal, the imager identification signal, and the count signal are inserted into the area Q and the area R in order to effectively use the area Q and the area R as the sub storage areas. The insertion timing of these three signals is 14H before the video signal period in one vertical period in the region Q as shown in FIG. 2B. Therefore, the above three signals are output to the multiplexing circuit 76 in response to the control signal of the memory controller 57 only during the period of 14H before the video signal period. In addition, as shown in FIG. 2A, the region R is a period of 8 CLK before a video signal period in one horizontal period. Accordingly, the three signals are output to the multiplexing circuit 75 upon receiving the control signal of the memory controller 57 only during the period of 8 CLK before the video signal period in one horizontal period. The multiplexing circuit 76 multiplexes the video signal from the rate converter 56 and the above-described mixed signal and outputs the multiplexed signal to the card memory 2. The card memory 2 has a main memory area 21 and a sub memory area
The main memory area 21 stores the video signal of the main area P corresponding to the above-mentioned effective screen, and the sub memory area 22 stores information on the sum of the area Q and the area R for the sub information signal. Has become.

Next, the operation of the electronic still camera according to the present embodiment thus configured will be described. First, in the imaging unit 3, a synchronization signal generator is generated based on a clock signal generated from the original oscillator 31.
A synchronizing signal is generated from the imager 32, and the imager 34 is driven by an imager driver 33 corresponding to the synchronizing signal.
The image of the subject taken by the photoelectric conversion unit 34 is photoelectrically converted into an image signal, and this image signal is sampled and held by a sampling and holding circuit.
Output to 35. In the sampling and holding circuit 35, the image signal is sampled and held and output to the processing unit 4.

In the processing section 4, the image signal is low-pass filtered by a low-pass filter 41, and then separated by a YC separator 42 into a luminance signal Y and two color difference signals RY, BY, that is, a component signal. . The luminance signal Y is γ-corrected by the γ corrector 44c, and the amplitude of the white signal is further restricted by the white clipper 45.
Output to The color difference signal RY and the color difference signal B-
Y is subjected to white balance adjustment by white balance circuits 43a and 43b, and γ-corrected by γ correctors 44a and 44b, respectively, and then output to the storage unit 5.

In the storage unit 5, the clock generator 52 operates in response to a control signal (FIGS. 3C and 3D) for instructing the memory controller 57 to extract an image, and the first and second A / D converters 53 and 54 are operated. Operation control. Therefore, the luminance signal Y is output from the first A / D converter 5.
At 3 the first rate from the clock generator 52 (10.7M
Hz) clock signal f1, only the area corresponding to the effective screen is sampled and converted to a digital signal.
The data is written to the first memory area 55a of the main memory 55.
In the second A / D converter 54, only the area corresponding to the effective screen is sampled by the clock signal f2 of the second rate (3.58 MHz) from the clock signal generator 52 in the second A / D converter 54, and is converted into a digital signal. After that, the main memory
55 is written to the second memory area 55b.

Next, the luminance signal Y stored in the first memory area 55a of the main memory 55 is sequentially read out with a 10.7 MHz clock signal and input to the rate converter 56. The luminance signal input to the rate converter 56 is as shown in FIG.
1H memory 59a as a luminance signal Y1 and 1H memory 59b as a luminance signal Y2 at a first rate (10.7 MHz) sequentially for 1H
It is written alternately every time. The color signals stored in the second memory area 55b of the main memory 55 are read at a rate of 3.58 MHz and input to the rate converter 56. The color signal input to the rate converter 56 is stored in a 1H memory 62a as a color signal (RY) 1 and a 1H memory 62b as shown in FIG.
Indicates the color signal (BY) 2 as the second rate (3.58
MHz).

Next, the luminance signal Y1 written to the 1H memory 59a and the luminance signal Y2 written to the 1H memory 59b are compressed at a first rate (10.7 MHz) by 4/3 times as shown by J in FIG. Data is read out alternately at a third rate (14.3 MHz). The color signal (RY) written in the 1H memory 62a, 1H memory 62b
The color signal (R-Y) 2 written in the second rate (3.58 MHz) is compressed by a factor of 4 as shown in FIG.
At the same rate (14.3 MHz). And one
The luminance signal Y1 and the color signal (RY) 1 read from the H memories 59a and 62a are converted by the YC multiplex switch 60 into the L signal shown in FIG.
Are multiplexed into the 1H series signal of the same rate (14.3 MHz) as shown in (1). Similarly, the luminance signal Y2 and the color signal (BY) 2 read from the 1H memories 59b and 62b are multiplexed by the YC multiplexing switch 60 into a series signal as shown by L in FIG. These selectively switched and multiplexed signals
The signals are transferred to the multiplexing circuit 76 as a series of signals Y1, (RY) 1, Y2, (BY) 2.

On the other hand, in the sub information signal converter 7, the imager 34 generates an imager identification signal 73 of a different type such as the PAL system or the NTSC system, and the shutter trigger switch 71 is turned on.
It is operated, the number of shutters is counted by the trigger operation counter 72, and is output as a count signal. Further, when character information such as a date and a title is input from the character generator operating section 74, a character signal is generated by the character generator 75. The character signal, the imager identification signal, and the count signal are mixed, and all three signals receive the control signal of the memory controller 57. In the area Q shown in FIG. The mixed signal is output to the multiplexing circuit 76 only during the 14H period before the video period of one vertical scanning period. In addition, as for the region R shown in FIG. 2C, 8 CLK before the video signal period in one horizontal scanning period shown in FIG.
The mixed signal is output to the multiplexing circuit 76 only during the period. Therefore, the video signal from the rate converter 56 and the mixed signal composed of the character signal, imager identification signal, and count signal are multiplexed by the multiplexing circuit 76 and transferred to the card memory 2. Then, under the control of the memory controller 57, the video signal corresponding to the effective screen is written into the main memory area 21 of the card memory 2, and the sub memory area 22
The character signal, the count signal, and the imager identification signal, which are the sub information signals, are written into the sub-information signal.

As described above, according to the present embodiment, the area P corresponding to the effective screen in the video signal is extracted and processed by the imaging unit 3, the processing unit 4, and the storage unit 5 as the main information signal conversion means. Are supplied to the range of the main memory area 21.
The sub-information conversion means 7 obtains a sub-information signal other than the video signal, that is, an imager identification signal, a count signal, and a character signal.
Supplied to As a result, the main memory area 21 and the sub memory area 22 of the card memory 2 are all used by the video signal (luminance signal and color difference signal) and the sub information signal, so that the card memory 2 can be effectively used.

The present invention is not limited to the embodiments described above. For example, in the above-described embodiment, three signals of the imager identification signal, the count signal, and the character signal are used as the sub-information signals. For example, only the character signal may be used. In addition, it goes without saying that various modifications can be made without departing from the spirit of the present invention.

[Effects of the Invention] According to the present invention, an electronic still camera having the following effects can be provided. In the present invention, the components corresponding to the separated luminance signals and the components corresponding to the color difference signals are temporarily stored in the memory means before the data is transferred to the removable storage medium. Since the component corresponding to the luminance signal and the component corresponding to the color difference signal are sequentially read out, they are arranged in time series and multiplexed and stored in the main area of the storage medium. It can be stored in a storage medium as a certain video signal. That is, a signal composed of the luminance signal component and the color difference signal component is used as an internal signal processing method of many video signal devices, and a signal processing circuit is input rather than input in other signal forms. There is an effect that simplification can be achieved.

In addition, since the component corresponding to the luminance signal and the component corresponding to the color difference signal can be recorded or read without overlapping in time, the component corresponding to the luminance signal and the component corresponding to the color difference signal are simultaneously recorded or reproduced. Rather, the number of terminals for transmitting and receiving signals between the camera body and the storage medium can be reduced, which can contribute to simplification of the structure and improvement of electrical reliability.

Thus, according to the present invention, the video signal read from the imaging unit is converted into a versatile signal form and stored in a storage medium, and the information stored in the storage medium is read out and reproduced. It is possible to provide an electronic still camera capable of storing sub-information enabling various applications.

[Brief description of the drawings]

1 to 5 show an embodiment of the electronic still camera according to the present invention. FIG. 1 is a schematic configuration diagram of the electronic still camera, and FIGS. 2 (a), (b) and (c) are effective screens. FIG. 3 is a diagram showing the timing of the extraction operation of the effective image, FIG. 4 is a schematic configuration diagram of a rate converter, and FIG. FIG. 4 is a diagram showing operation timing of the container. 1 ... electronic still camera body 2 ... card memory 3
... Imaging unit, 4 process unit, 5 storage unit, 7
Sub information signal converter, 21 Main memory area, 22 Sub memory area, 31 Original oscillator, 32 Synchronous signal generator (SS
G), 33 ... Imager driver, 34 ... Imager, 3
5 Sampling hold circuit (S / H), 41 Low-pass filter (LPF), 42 YC separator, 43a, 43b White balance circuit (WB), 44a, 44b, 44c Gamma correction Container, 45…
... White clipping device, 51... Line sequential device, 52... Clock generator, 53... 1st A / D converter, 54... 2nd A / D converter, 55. ... First memory area, 55b Second memory area, 56 Rate converter, 5
7: Memory controller, 58: Luminance signal line, 59a, 59
b, 62a, 62b ... 1H memory, 60 ... YC multiplex switch, 61 ...
Color signal line, 63 Signal line, 71 Shutter trigger switch, 72 Trigger operation counter, 73 Imager identification signal, 74 Character generator operation unit, 75
…… Character generator, 76 …… Multiplexing circuit.

Claims (1)

(57) [Claims] 1. A detachably mountable storage medium capable of recording a video signal in a main area of its own storage area and recording a sub information signal accompanying the video signal in a sub area. An electronic still camera capable of recording a signal, comprising: a separating unit that separates a video signal photoelectrically converted by an imaging device into a component corresponding to a luminance signal and a component corresponding to a color difference signal; A memory unit for storing a component corresponding to the luminance signal and a component corresponding to the color difference signal separated by the separation unit in different areas, respectively; and a component corresponding to the component corresponding to the luminance signal and the color difference signal from the memory unit. Reading means for sequentially reading the components to be read, and multiplexing the time-sequentially arranged components corresponding to the luminance signal and the components corresponding to the color difference signal, which are sequentially read. Multiplexing output means for outputting a component corresponding to the luminance signal and a component corresponding to the chrominance signal at the same rate; a sub-information signal generating means for generating the sub-information signal; Storage means for storing the component corresponding to the luminance signal and the component corresponding to the color difference signal in the main area of the storage medium, and storing the sub information signal in the sub area of the storage medium. An electronic still camera, comprising: