JP2914489B2 - Method of forming ferroelectric capacitor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of forming a ferroelectric capacitor on a substrate, and more particularly to a method of forming a ferroelectric capacitor used in a ferroelectric memory integrated in a semiconductor integrated circuit. It is about the method.

[0002]

2. Description of the Related Art Ferroelectric thin film forming methods include a sol-gel method of spin-coating a material formed by mixing a metal alkoxide, an organic metal solution deposition (MOCVD) method, a laser ablation method, and a sputtering method. However, all of them have poor surface morphology, and particularly in the case of using a sol-gel method, irregularities are easily generated on the surface because solid phase nuclei grow in a solution. Conventionally, when depositing a film using these methods, the surface flattening has been attempted using deposition conditions such as substrate temperature and deposition rate as parameters, but in order to obtain good electrical characteristics in the deposited film, In any of these methods, high-temperature heat treatment is required during or after film formation, so that deterioration of the surface morphology of the formed film is unavoidable, and planarization by changing deposition conditions is extremely difficult.

As a general method of planarizing a film, there is a chemical mechanical polishing (CMP) method, which is widely used in a semiconductor device manufacturing process and the like. At present, much research has been conducted on CMP, but its purpose is to form embedded wiring, remove exposure unevenness by flattening, and make SOI substrates. Not done. Further, ferroelectrics, particularly Bi-based ferroelectrics (S
rBi ₂ Ta ₂ O ₉ ) is often not even known for its chemical properties, and is often used for CMP studies on ferroelectrics, such as CMP.
No studies on abrasives have been reported.

[0004]

When a ferroelectric film is formed, a high-temperature heat treatment is required during or after the film formation, so that the surface morphology of the formed film deteriorates. The unevenness of the in-plane film thickness of the ferroelectric due to the deterioration of the surface morphology causes the in-plane unevenness of the electric field strength applied in the film thickness direction.
The operation of the ferroelectric element is performed by inverting the ferroelectric by applying an electric field higher than the coercive electric field to the ferroelectric. Since this causes non-uniformity and degrades the reliability of element operation, this is a problem when producing a ferroelectric element.

For example, when SrBi ₂ Ta ₂ O ₉ is deposited to a thickness of 200 nm by the sol-gel method, irregularities of about 50 nm are generated, and this difference causes an intensity difference of about 25% in the electric field applied to the film, thereby deteriorating the device operation. Make it unstable. For stable device operation, the uniformity of the film thickness must be kept at 10% or less. Further, when a voltage is applied to a ferroelectric film having poor surface morphology, an electric field is concentrated at a portion having a small radius of curvature. It is well known that the electric field concentration causes dielectric breakdown, leakage, defect generation, and the like, thereby deteriorating the characteristics of an insulating film, even in a gate oxide film of a MOS transistor. Degradation of the dielectric capacitance characteristics will be a major problem in the future. For example, a short circuit occurring in a ferroelectric substance is considered to be caused by local electric field concentration. However, when SrBi ₂ Ta ₂ O ₉ is formed by a sol-gel method, a short circuit occurs by about 5%.

Therefore, the problems to be solved by the present invention are:
An object of the present invention is to provide a ferroelectric capacitor element having a stable ferroelectric capacitor element without flattening the surface of a formed ferroelectric thin film.

[0007]

The above object can be attained by forming a ferroelectric thin film on a substrate and then flattening the surface of the ferroelectric thin film by using a CMP method.

[0008]

BEST MODE FOR CARRYING OUT THE INVENTION A method for forming a ferroelectric capacitor according to the present invention comprises the following steps: (1) forming a lower electrode film on a substrate; (2) forming a ferroelectric thin film; ) The ferroelectric thin film and the lower electrode film are simultaneously
Patterning; ( 4 ) chemical mechanical polishing (CM) of the surface of the ferroelectric thin film;
Possess planarizing the polishing surface by P) method, and forming an upper electrode of a predetermined pattern on the ferroelectric thin film which is (5) flattening, Engineering of the first (4)
In the process, a stopper film is used to form the dielectric thin film.
Control of the film thickness is made is characterized in Rukoto.

Preferably, after the step ( 3 ), prior to the step ( 4 ), the step (3) is performed.
Forming a stopper film chemical mechanical polishing rate ferroelectric thin film and a lower electrode film portions removed by patterning comprises a material lower than the ferroelectric thin film in extent is added. Alternatively, after the step (1) and prior to the step (2), a step of depositing a stopper film made of a material having a lower polishing rate in chemical mechanical polishing than the ferroelectric thin film; Patterning the deposited stopper film.

Preferably, the chemical mechanical polishing in the step ( 4 ) is performed by using hydrofluoric acid, hydrofluoric acid and nitric acid, hydrofluoric acid and ammonium fluoride or acetic acid, or hydrofluoric acid. , Nitric acid and an abrasive containing ammonium fluoride or acetic acid.

As described above, in the present invention, the lower electrode and the ferroelectric thin film are sequentially formed on the substrate, and then the surface is planarized by CMP. Then, CMP is performed after a film serving as a stopper is formed for controlling the residual thickness of the ferroelectric after the CMP. For example, the ferroelectric film, or a part of the ferroelectric film and the lower electrode is selectively removed to partially expose the substrate. Thereafter, a silicon oxide film (SOG film) of a desired thickness is selectively formed on the exposed portion of the substrate by spin coating using a low viscosity SOG solution. At this time, SOG is deposited on the ferroelectric film, but it is very thin, so that there is almost no problem in subsequent polishing.

Since the ferroelectric thin film has a significantly higher dissolution rate in hydrofluoric acid than the silicon oxide film, when the CMP is performed using an abrasive (slurry) containing hydrofluoric acid, the silicon oxide film becomes Since the ferroelectric is polished to the same height as the silicon oxide film, and the polishing is terminated when the polishing rate is reduced, the ferroelectric can be planarized while leaving the ferroelectric at an arbitrary thickness. .

By adding nitric acid to the above-mentioned CMP abrasive, it is possible to dissolve metals which cannot be dissolved in hydrofluoric acid but precipitate on the surface. Also, NH ₄ F or acetic acid is added as a buffer to a CMP abrasive containing hydrofluoric acid or a CMP abrasive containing hydrofluoric acid and nitric acid to maintain a constant polishing rate to keep the polishing rate constant. You may make it. Since the etching rate of the silicon oxide film exposed to nitric acid and acetic acid is extremely low, the function of the silicon oxide film as a stopper does not decrease even if these are added to the CMP abrasive.

The silicon oxide film formed to a desired thickness at the portion where the ferroelectric film is removed is SOG when the substrate is silicon.
It can be formed by thermal oxidation instead of a film. Also,
Before the deposition of the ferroelectric film, a polishing stopper film may be formed in advance. That is, a silicon oxide film having a desired thickness is deposited on a substrate by a CVD method, a silicon oxide film in a predetermined region is removed to form a concave portion, and the inside of the concave portion is buried to form a ferroelectric film. Perform CMP.

In a conventional method of forming a ferroelectric capacitor,
Since the formed ferroelectric film was used as it was, it was not possible to form a film having a certain thickness or more in order to obtain an element having desired characteristics, and it was formed through a high-temperature heat treatment step. Since the surface morphology of the ferroelectric film deteriorates, it is not possible to prevent the occurrence of a portion where the film thickness is partially reduced. On the other hand, according to the method of the present invention, since the CMP is performed after the film is formed, the ferroelectric film can be formed in advance to a required thickness or more. Therefore, according to the film forming method of the present invention, it is possible to prevent the occurrence of a portion where the film thickness is partially reduced. For this reason, the electric field intensity in the film can be made constant, and characteristic deterioration due to leakage or fatigue due to local electric field concentration can be suppressed, and reliability can be improved.

[0016]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.
Will be explained. FIG. 1 shows a ferroelectric capacitor according to the present invention.
FIG. 6 is a sectional view in the order of steps showing a first embodiment of a method for forming a child.
You. First, as shown in FIG.
The lower electrode 20 made of Pt is formed by the
SrBi on the sol-gel method _Two Ta_Two O₉ Consists of
A ferroelectric film 30 is formed. Next, as shown in FIG.
Photolithography and dry etching
The ferroelectric film 30 and the lower electrode 20 are selectively removed by using
Then, the surface of the substrate 10 is partially exposed. Next, FIG.
As shown in FIG. 3 (c), using a low viscosity SOG solution
The SOG film 40 is formed by a spin coating method. At this time SOG
Since the viscosity of the solution is low, the substrate of the SOG film 40 is exposed.
Formed only on the ferroelectric film.
Absent. Then, hydrofluoric acid, nitric acid, NH_Four Including F
Used in normal semiconductor processes using abrasives
Perform CMP by the method. Hydrofluoric acid for ferroelectrics
Hydrofluoric acid concentration should be 5% or less to suppress polishing rate
It is desirable to hold down. Also, nitric acid, NH_Four F concentration
Should be about 0.25 to 4 times that of hydrofluoric acid.
Good. Polishing pad used for CMP polishing is SOG film 40
Finish polishing when the polishing rate decreases during
The thickness of the ferroelectric film 30 as S as a stopper film
It can be adjusted to the thickness of the OG film. And the above method
As a result, as shown in FIG.
Surface flattening can be performed. After that, the ferroelectric film 30
An upper electrode (not shown) made of Pt or the like is formed thereon.
Thus, the fabrication of the ferroelectric capacitor is completed.

In the above embodiment, the lower electrode (same for the upper electrode) is formed by using Pt.
/ Ti, Au, RuO _X, it is possible to form the electrode by using the electrode material used the IrO _X Usual ferroelectric. In the above embodiment, the ferroelectric film 30 is made of SrBi.
Instead of using ₂ Ta ₂ O ₉ , other bismuth-based ferroelectrics and barium-based ferroelectrics (BaTi
O ₃ , Ba _1-x Sr _x TiO ₃ , lead-based ferroelectric (P
bTiO ₃ , PbZr ₁ -x Ti _x O ₃ , Pb (La _{1 -y}
Zr _y) like _1-X Ti X O ₃₎ can be used. As a method for forming the ferroelectric film, a sputtering method, an MOCVD method, a laser ablation method, or the like can be used instead of the sol-gel method. By performing planarization using CMP, the in-plane variation of the film thickness, which was about 25% before polishing, could be reduced to about 5%. In addition, by flattening the surface, a short circuit, which had conventionally occurred about 5%, could be reduced to 1% or less.

[Second Embodiment] FIG. 2 is a sectional view of a method of forming a ferroelectric capacitor according to a second embodiment of the present invention in the order of steps. First, as shown in FIG. 2A, a silicon oxide film 60 is formed on a silicon substrate 50 by thermal oxidation, a lower electrode 70 is formed by a sputtering method, and a ferroelectric film 80 is formed by a sol-gel method. Next, as shown in FIG. 2B, the ferroelectric film 80 and the lower electrode 70 are processed by a processing method used in a normal semiconductor process to partially expose the surface of the silicon oxide film 60. Next, FIG.
As shown in FIG. 1C, the surface of the silicon substrate is oxidized by using a thermal oxidation method to grow the silicon oxide film 90 to a desired thickness.

Thereafter, CMP is performed using an abrasive containing hydrofluoric acid, nitric acid, and NH ₄ F. By terminating the polishing when the polishing pad used for the CMP polishing hits the silicon oxide film 90 and the polishing rate decreases, the ferroelectric film can be processed to a desired thickness. That is, as shown in FIG. 2D, the surface of the ferroelectric film can be planarized by the above method. Thereafter, by forming an upper electrode (not shown) on the ferroelectric film 80, the fabrication of the ferroelectric capacitor of this embodiment is completed. Since the polishing rate of the thermal oxide film is smaller than that of the silicon oxide film formed by SOG, the present embodiment using the thermal oxide film as a stopper can more accurately control the thickness of the ferroelectric material than the previous embodiment. .

Although the preferred embodiments have been described above, the present invention is not limited to these embodiments, and appropriate changes can be made within the scope described in the claims. For example, in the embodiment, the lower electrode is patterned at the same time as the ferroelectric film. However, the lower electrode can be patterned before forming the ferroelectric film.

[0021]

As described above, the method of forming a ferroelectric capacitor according to the present invention is to planarize by CMP after forming a ferroelectric film. A ferroelectric film is formed to a desired thickness, and a desired thickness can be achieved by CMP, and the surface can be flattened. Therefore, according to the present invention, local electric field concentration can be prevented, and short circuit and deterioration of characteristics due to electric field concentration can be prevented to provide a highly reliable ferroelectric capacitor. Become.

[Brief description of the drawings]

FIG. 1 is a sectional view illustrating a first embodiment of the present invention in the order of steps.

FIG. 2 is a sectional view illustrating a second embodiment of the present invention in the order of steps.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Substrate 20, 70 Lower electrode 30, 80 Ferroelectric film 40 SOG film 50 Silicon substrate 60, 90 Silicon oxide film

Continuation of the front page (51) Int.Cl. ⁶ identification code FI H01L 27/10 451 (58) Investigated field (Int.Cl. ⁶ , DB name) H01L 27/108 H01L 21/304 H01L 21/822 H01L 21 / 8242 H01L 27/04 H01L 27/10 451

Claims (6)

(57) [Claims] (1) forming a lower electrode film on a substrate; (2) forming a ferroelectric thin film; and (3) simultaneously forming the ferroelectric thin film and the lower electrode film.
Patterning; ( 4 ) chemical mechanical polishing (CM) of the surface of the ferroelectric thin film;
Planarizing the polishing surface by P) method, (5) possess a step, the forming an upper electrode of a predetermined pattern on the planarized ferroelectric thin film, the step of the first (4) In, the stopper film
Method of forming a ferroelectric capacitive element controlling the thickness of the dielectric thin film is characterized Rukoto performed utilizing the. 2. After the step ( 3 ), prior to the step ( 4 ), the ferroelectric thin film and the lower electrode film portion removed by the patterning in the step (3) are chemically coated. 2. The method for forming a ferroelectric capacitor according to claim 1, further comprising a step of forming a stopper film made of a material having a mechanical polishing rate lower than that of the ferroelectric thin film. 3. The method for forming a ferroelectric capacitor according to claim 2, wherein the stopper film is a silicon oxide film formed by a spin-on-glass method or a thermal oxidation method. 4. The polishing in the chemical mechanical polishing of the ferroelectric thin film prior to the step (1) or after the step (1) and prior to the step (2). 2. The method for forming a ferroelectric capacitor according to claim 1, further comprising: a step of applying a stopper film made of a material having a low rate; and a step of patterning the applied stopper film. . 5. The method according to claim 1, wherein the forming of the ferroelectric thin film in the step (2) is performed using a sol-gel method. 6. The chemical mechanical polishing in the step ( 4 ), wherein the hydrofluoric acid, hydrofluoric acid and nitric acid, hydrofluoric acid and ammonium fluoride or acetic acid, or hydrofluoric acid, nitric acid and 2. The method according to claim 1, wherein the method is performed using an abrasive containing ammonium fluoride or acetic acid.