JP2894267B2 - Lead frame, manufacturing method thereof, and semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a lead frame,
In particular, a lead frame in which leads are formed based on an insulating layer, a manufacturing method for manufacturing the lead frame based on a metal laminate having a multilayer structure of three or more layers, and a semiconductor element mounted using the lead frame. And a semiconductor device.

[0002]

2. Description of the Related Art As a conventional example of a method for manufacturing a lead frame, there is a method shown in the order of steps with reference to FIGS.

(A) As shown in FIG. 4A, a resin (for example, polyimide resin) film (thickness, for example, 25 μm) a serving as a base has a metal layer (thickness, for example, 10 μm) b made of copper on one surface. Is prepared. The metal layer b made of copper has a role as a base layer for forming a lead forming gold layer described later by plating.

(B) Next, the surface of the metal layer b is covered with a selectively formed resist film c, and as shown in FIG. 4B, a lead (thickness, for example) is formed using the resist film c as a mask. 30 μm) d is formed.

(C) Next, as shown in FIG. 4C, the resin film a is selectively etched,
An opening e is formed in a portion of each lead d which will be a terminal on the side opposite to the semiconductor element.
The resin film a is patterned. The terminal on the semiconductor element side of the lead d is also exposed by the etching. The etching is performed by laser processing.

(D) Next, as shown in FIG. 4D, a ball electrode f composed of a nickel plating layer and a gold plating layer formed on the surface thereof is formed in each opening e.

(E) Next, as shown in FIG. 4E, a metal layer b made of copper is formed by using the lead d made of gold as a mask.
Is etched. As a result, each lead d is electrically isolated from the other leads. This etching is performed by spray etching. For the lead d, gold is selected as a material so as to sufficiently fulfill a mask function when etching a metal layer b made of copper, which is not so thin as about 10 μm.

(F) Next, an elastomer g made of, for example, a rubber sheet is bonded to a position on the surface of the lead frame on which the leads are formed, where the semiconductor element is to be mounted. Thus, the lead frame i is completed.

Next, how a semiconductor element is assembled to the lead frame i will be described with reference to FIGS.

(A) First, as shown in FIG. 5 (A), the surface of the elastomer g, which is bonded to each lead forming region of the lead frame i via an adhesive h, on the side opposite to the lead forming region, is mounted on the semiconductor element j. And the portion excluding the peripheral portion on which the electrodes are formed, with an adhesive k. Reference numeral 1 denotes an electrode formed around the surface of the semiconductor element j.

(B) Next, a portion of each lead b to be connected to the electrode 1 of the semiconductor element j is cut, and then the portion is connected to the electrode 1 by single point bonding (ultrasonic wave). FIG. 5B shows the state after the bonding.

(C) Next, as shown in FIG. 5C, an outer ring m surrounding each semiconductor element j is positioned.

(D) Next, as shown in FIG. 5D, a resin n is filled between the outer ring m and the semiconductor element j.
The positional relationship between them is fixed.

(E) Next, as shown in FIG. 5 (E), unnecessary portions of the lead frame i are removed, and the semiconductor elements j are separated from each other.

[0015]

However, the above-mentioned prior art has the following problems.

First, since the lead frame i is based on a very thin resin film a and is subjected to various processes and is processed, there is a problem that good processes and processes are difficult. Particularly, good patterning of the lead b is extremely difficult, which limits the miniaturization of the lead and the increase in the number of pins. In addition, the positional accuracy in patterning is likely to be reduced due to deformation such as bending of the base.

Second, it is necessary to pattern a resin film a forming a laminate serving as a base material for forming a lead frame after the formation of the leads d. At present, the patterning must be performed by laser processing. There's a problem. This is because expensive laser processing machines are indispensable for laser processing, otherwise high-precision processing is impossible, and the processing time is long. This is because it is a factor of increase.

Third, when the elastomer g is bonded to the lead frame with the adhesive h, the bonding surface of the lead frame has irregularities, which makes it difficult to bond well and often causes voids. Then, there is a problem that the reliability is insufficient because the adhesiveness or the like is reduced or moisture enters.

Fourthly, in bonding the lead d to the electrode, a step of cutting the lead d is indispensable before the bonding, so that there is a problem that the time required for bonding is long. This also causes an increase in the cost of the semiconductor device.

Fifth, the lead d is formed of gold, and the lead is used as a mask in a spray etching step [see FIG. 4E] after the step of forming the lead of gold [see FIG. 4B]. The underlying copper layer b of the lead d is etched, and there is a problem that the material cost is high because a thick lead is formed of gold.

This is because the base layer has a low mechanical strength, so that the copper layer b serves as a base for plating for forming leads.
For example, the thickness must be increased to, for example, 10 μm. As a result, the thickness to be etched when the plating underlayer b after forming the lead is etched using the lead d as a mask becomes thicker. This is because it is necessary to use a material that can obtain the above, and gold must be used for that purpose.

The present invention has been made in order to solve such a problem, and it is possible to form a lead or the like by performing processing on a lead frame having rigidity, so that fine leads are not obstructed. Without forming, avoiding patterning by processing the insulating layer after forming the insulating layer, facilitating good adhesion between the lead frame and the semiconductor element, eliminating the need for lead cutting, A further object is to eliminate the need to use expensive gold as the lead forming material.

[0023]

According to the lead frame of the present invention, a plurality of leads are provided on the surface of an insulating layer on the semiconductor element side, and the lead surface and the insulating layer surface are flush with each other.
The tip of the portion protruding from the insulating layer of each lead is used as a semiconductor element side terminal connected to the electrode of the semiconductor element. Correspondingly, openings for exposing the openings are formed, and an electrode opposite to the semiconductor element of the lead is formed in each of the openings.

Therefore, according to the lead frame of the present invention,
Since the insulating layer and the lead are formed so that their surfaces are flush with each other, a surface without irregularities can be bonded to the surface of the semiconductor element. Therefore, it is possible to avoid a problem that a void is generated in the adhesive when a surface having irregularities is bonded as in the related art and a sufficient adhesive force cannot be obtained, thereby improving reliability. be able to.

Further, the tip of the portion of the lead protruding from the insulating layer can be used as a terminal on the semiconductor element side.
This eliminates the need to cut the terminal when bonding it. Therefore, the time required for bonding can be shortened by the amount that cutting is not required.

According to the method for manufacturing a lead frame of the present invention, a plurality of leads are formed on the thin layer side of a metal laminate in which a thick layer and a thin layer are formed via an etching stop layer, and the leads are formed on the metal laminate. An insulating layer having a thickness covering the leads is selectively formed on the surface side so as to have at least an opening for exposing the leads, and a portion of the thick layer corresponding to a lead forming region where the plurality of leads are formed is subjected to the etching stop. The layer is selectively etched with an etchant having a low erosion property, and the leads are used as a mask to etch at least the etching stop layer to electrically separate the leads from each other.

Therefore, according to the lead frame manufacturing method of the present invention, the metal laminate is used as the base (the base in the stage of completing the lead frame is an insulating layer, but the base in the stage of manufacturing the lead frame is a metal laminate. ) To perform various processes such as formation of leads. In the manufacturing process, the base metal laminate has a high rigidity unlike resin films, so that fine leads can be formed with high precision and high positioning precision. It is possible.

According to the lead frame manufacturing method of the present invention, the leads are formed on one of the thin layers of the etching stop layer, then the insulating layer is formed, and the base for forming the leads and the insulating layer is formed. Since the side is removed, the surfaces of the lead and the insulating layer are located on the same plane and have no unevenness, and that surface is the surface on the semiconductor element side.
Therefore, the uneven surface of the lead frame can be bonded to the semiconductor element, and voids are generated in the adhesive generated when the uneven surface is bonded as in the related art, and a sufficient adhesive force cannot be obtained. And other problems can be avoided.

Further, according to the lead frame manufacturing method of the present invention, when a thin layer is formed by plating with another metal, the lead is formed on one of the rigid metal laminates. The underlayer only needs to function to improve the plating properties, and therefore does not need to be thick. Therefore, the etching thickness when the underlying layer is etched using the leads as a mask can be reduced.

Therefore, the etching mask property required for the lead may be weaker than in the case of the prior art shown in FIG. 4, and it is not necessary to use gold, so that the material cost can be significantly reduced.

Furthermore, since the insulating layer is selectively formed after the formation of the lead, it is not necessary to pattern the entire surface by forming the cured insulating layer and then processing it as in the prior art.

Thus, it is possible to form an insulating layer patterned with high precision by, for example, a photolithography technique without using laser processing, and therefore without using an expensive laser processing machine, and without taking much time. In addition, the manufacturing cost can be reduced.

By using the tip of the portion of the lead protruding from the insulating layer as a terminal on the semiconductor element side, it is possible to eliminate the necessity of cutting when bonding the terminal, thereby shortening the time required for bonding. be able to.

[0034]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments.

1A to 1H are sectional views showing one embodiment of a method for manufacturing a lead frame according to the present invention in the order of steps.

(A) First, as shown in FIG. 1A, a metal laminate 11 having a three-layer structure is prepared. The laminated board 11
Copper having a thickness of, for example, 150 μm which forms a ring (surrounds the semiconductor element and reinforces the semiconductor element by being adhered to it and corresponds to the ring m of the prior art, and is referred to as an outer ring). Layer 12 and aluminum layer 1 having a thickness of, for example, 3 μm serving as an etching stopper
3 and a plating base layer 14 made of copper or nickel having a thickness of, for example, 2 μm. The plating underlayer 14 is, for example, a chromium layer (thickness, for example, 0.2 μm).
May have a multi-layer structure in which a nickel layer (for example, 2 μm in thickness) is formed thereon.

(B) Next, as shown in FIG. 1B, leads 3, 3,... And suspensions 10, 10, 10, 10 are formed on the plating underlayer 14. Specifically, the leads 3, 3,...
A resist having a negative pattern is applied to a pattern in which 0 is to be formed, and copper (or nickel) plating (plating thickness of, for example, 30 μm) is performed using the resist as a mask and the layer 14 as a base.

The hanging portions 10, 10, 10, 10 are for hanging a reinforcing outer ring (8) surrounding the semiconductor element (4), and are formed of the same layer as the leads 3, 3,.
Therefore, it is made of, for example, copper or nickel. On the other hand, the ring (8) has not yet been formed at this stage,
It is formed integrally on the outside of the main part of the lead frame via the suspension parts 10, 10, 10, 10, and for example, copper,
It has a laminated structure made of aluminum, copper, nickel or the like.

(C) Next, as shown in FIG. 1 (C), a plurality of film circuits were integrally connected by selectively performing etching through the metal laminate 11 from both sides. Form into a lead frame shape. The etching is performed using, for example, a ferric chloride-based etchant.

(D) Next, as shown in FIG. 1D, an insulating layer (insulating film) 2 is selectively formed on the surface of the laminated plate 11 on the lead forming surface side. The insulating layer 2 is made of a photosensitive resin material, and is coated, exposed, and developed to form a desired pattern. 21, 21, ...
.. Are openings for exposing portions of the insulating layer 2 where the ball electrodes (6) of the leads 3, 3,... Are to be formed, and the insulating layer 2 has the openings 21, 21,. Is selectively formed. Therefore, unlike the conventional technique shown in FIG. 4, it is not necessary to pattern the insulating layer 2 later by, for example, laser processing.

(E) Next, as shown in FIG. 1 (E), solder balls 6, 6,... Serving as external terminals are formed on the surfaces of the leads 3, 3,. To form The solder balls 6, 6,... Are formed by nickel plating (for example, 80 to 110 μm in thickness) and solder or gold plating (for example, 10 to 30 μm in thickness).

(F) Next, as shown in FIG. 1 (F), the inside of the portion 8 serving as the outer ring of the thick copper layer 12 located on the back side of the laminated board 11 is selectively etched from the back side. To remove. This etching is performed, for example, with H ₂ SO
The etching is performed using a ₄ / H ₂ O ₂ type etching solution. The reason for this is that the etchant invades copper, but not aluminum, and allows the aluminum layer 13 to serve as an etching stopper.

At this stage, the aluminum layer 13
FIG. 1C shows a state in which a portion other than the portion removed during the selective etching shown in FIG.

(G) Next, as shown in FIG. 1 (G), the leads 3, 3,...
10 (however, none of the hanging portions 10 appear in FIG. 1; see FIG. 3) is used as a mask to etch the underlying plating layer 14 and the aluminum layer 13 serving as an etching stopper. As a result, the leads 3, 3,... And the suspension portions 10, 10, 10, 10 are independent, and are not in a state where they are electrically shorted to each other for the first time. Reference numeral 15 denotes a main part of the lead frame 1. The main part 15 can be seen as being separated from the outer ring 8 in FIG. 1 (G). This is because they do not appear. In fact, they are integrally connected to the outer ring 8 via the hanging portions 10, 10, 10, 10.

(H) Next, as shown in FIG. 1 (H), the ends 3a, 3a,
, Are formed with bumps 16, 16,. Therefore, the bump may be formed on the semiconductor element 4 side,
It may not be formed at all.

In this embodiment, the leads 3 are formed by growing a plating film using a resist film selectively formed on a plating base film as a mask, but the layer 14 made of copper or nickel is thickened. Alternatively, the leads may be formed by patterning the leads by selective etching. According to the present embodiment, the lead frame 1 is formed by using the lead frame manufacturing method in which the outer lead is formed on one side and the inner lead is formed on the other side based on a three-layer structure metal laminate. Can be manufactured,
The base metal laminate 11 has a high rigidity unlike the resin film serving as a base in the conventional lead frame manufacturing technique shown in FIG. 4, so that the fine leads 3, 3,.
Can be formed with high accuracy and high positioning accuracy.

Further, according to the present embodiment, since the insulating layer 2 is selectively formed, it is not necessary to pattern the insulating layer 2 formed over the entire surface as in the prior art by subsequently processing the insulating layer 2.

Therefore, it is possible to form an insulating layer patterned with high precision by the photolithography technique without using laser processing, and thus without using an expensive laser processing machine, and without taking time. In addition, the manufacturing cost can be reduced.

According to the present embodiment, since the leads 3, 3,... Are formed on one side of the rigid metal laminate 11, the bases of the leads 3, 3,. It is not necessary to increase the thickness of the copper or nickel layer 14, which is the underlying layer, for example, to a thickness of 2 μm. Therefore, since the etching thickness when etching the base layer 14 using the leads 3 as a mask can be made small, the etching mask property required for the leads 3 may be weaker than that of the prior art shown in FIG. Therefore, there is no need to use gold, and material costs can be significantly reduced.

FIGS. 2A to 2D show lead frame 1.
Are shown in the order of steps in assembling the semiconductor device.

(A) First, as shown in FIG. 2 (A), the semiconductor elements 4 aligned on the lead frame 1 are positioned and bonded via a buffer bonding layer 7. The buffer adhesive 7 has a role of bonding the lead frame 1 and the semiconductor element 4, and further has a role of protecting the surface of the semiconductor element 4, and therefore is required to have cushioning properties.

(B) Next, as shown in FIG. 2B, the bumps 16, 16,... Of the tips 3a, 3a,. Are connected to the four electrode pads 5, 5,... By, for example, single point bonding.

In this case, since the tip of the portion of the lead 3 protruding from the insulating layer 2 is a terminal on the semiconductor element side, it is not necessary to cut the terminal when bonding. This point is also different from the conventional one. Therefore, the time required for bonding can be reduced.

(C) Next, as shown in FIG. 4 (C), a sealing agent 9 such as epoxy resin or silicon resin is injected between the semiconductor element 4 and the lead frame 1 / outer ring 8 by potting to seal. And the space between the semiconductor element 4 and the lead frame 1 / outer ring 8 is fixed.

(D) Next, a plurality of semiconductor elements 4, 4,.
By cutting unnecessary portions of the lead frame 1 in which the leads are integrally connected, the portions of each semiconductor element of the lead frame 1 are separated from each other as shown in FIG. Thus, the lead frame 1 is provided as an intermediate circuit board, and ball grid array-shaped external terminals 6 connected to the respective electrodes of the semiconductor element 1 are provided on the intermediate circuit board.
, And a semiconductor device reinforced by the outer ring 8 can be obtained. FIG. 3 is a plan view showing the encapsulant 9 of the resulting semiconductor device.

The following advantages appear in the assembling process. First, since the outer ring 8 is formed integrally with the film circuit 1, when the film circuit 1 is positioned with respect to the semiconductor element 4, the outer ring 8 is naturally also positioned with respect to the semiconductor element 4. There is an advantage that a special step of positioning the semiconductor element 4 and the film circuit 1 is not required, but not only that, but also an advantage that the surface of the lead frame 1 without unevenness can be bonded to the semiconductor element 4. is there.

That is, in this embodiment, the lead 3
Is formed on one side of the etching stop layer 14 of the lead frame 1, then the insulating layer 2 is formed, and the base side (the etching stop layer 13 and the plating base layer 14) in forming the lead and the insulating layer is formed. Since the surface is removed, the surfaces of the lead 3 and the insulating layer 2 are located on the same plane and have no irregularities, that is, a plane, and the plane is a surface on the semiconductor element 4 side. Therefore, the surface of the lead frame 1 without unevenness can be bonded to the semiconductor element 4 via the buffer adhesive layer 7, so that voids are generated in the adhesive which is generated when the uneven surface is bonded as in the related art. This can avoid problems such as generation of insufficient adhesive strength due to occurrence of the problem.

Next, by using the tip of the portion of the lead 3 protruding from the insulating layer 2 as a terminal on the semiconductor element side, it is possible to eliminate the necessity of cutting the terminal when bonding, thereby reducing the time required for bonding. Shortening can be achieved.

[0059]

According to the present invention, the surfaces of the insulating layer and the leads on the semiconductor element side are made flush (thritch), so that the surface without irregularities can be bonded to the surface of the semiconductor element. . Therefore, it is possible to avoid a problem that a void is generated in the adhesive generated when bonding a surface having irregularities as in the related art and a sufficient adhesive force cannot be obtained.

Further, since the tip of the portion of the lead protruding from the insulating layer is used as a terminal on the semiconductor element side, it is not necessary to cut the terminal when bonding the semiconductor element to the electrode of the semiconductor element. Therefore, the time required for bonding can be shortened by the amount that cutting is not required.

Various processes such as formation of leads can be performed on the base of the metal laminate, and since the metal laminate on which the base is made has high rigidity unlike resin films, fine leads can be positioned with high precision and high positioning. It is possible to form with precision.

According to the present invention, when a lead is formed by plating with a thin layer of a metal laminate as a base, the lead is formed on one of the rigid metal laminates because of the formation of the lead. It is only necessary to work to improve the plating properties, so there is no need to make it thicker. Therefore, no problem occurs even if the underlayer is made thin as long as the plating property is ensured, and the thickness to be etched when the underlayer is etched using the lead as a mask can be reduced.

Accordingly, the etching mask property required for the lead may be weaker than in the case of the prior art shown in FIG. 4, and it is not necessary to use gold, so that the material cost can be significantly reduced.

Further, since the insulating layer is selectively formed after the formation of the lead, there is no need to pattern the insulating layer formed over the entire surface as in the prior art by subsequently processing the insulating layer.

Thus, it is possible to form an insulating layer patterned with high precision by, for example, a photolithography technique without using laser processing and therefore without using an expensive laser processing machine and without taking much time. In addition, the manufacturing cost can be reduced.

By using the tip of the portion of the lead protruding from the insulating layer as a terminal on the semiconductor element side, it is possible to eliminate the necessity of cutting the terminal when bonding, thereby shortening the time required for bonding. be able to.

[Brief description of the drawings]

FIGS. 1A to 1H are cross-sectional views illustrating an example of a method for manufacturing a lead frame of the present invention in the order of steps.

FIGS. 2A to 2D are cross-sectional views showing an example of a method of assembling a lead frame of the present invention to a semiconductor element in the order of steps.

FIG. 3 is a plan view showing one embodiment of the semiconductor device of the present invention after finishing the step of FIG. 2 omitting a sealant;

4A to 4F are cross-sectional views showing a conventional example of a method for manufacturing a lead frame in the order of steps.

5 (A) to 5 (E) are cross-sectional views showing a method of assembling a conventional lead frame manufactured by the method shown in FIG. 4 to a semiconductor element in the order of steps.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Lead frame, 2 ... Insulating layer, 3 ... Lead, 4 ... Semiconductor element, 6 ... Electrode, 7 ... Buffer adhesive layer, 9 ... Sealant, 11 ... Metal laminates, 1
2 ... thick layer, 13 ... etching stop layer, 1
4 ... thin layer (plating underlayer)

Continuation of the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 23/50 H01L 21/306

Claims (5)

(57) [Claims] 1. A plurality of leads are formed on a surface portion of an insulating layer on a semiconductor element side so that the surface of the lead and the surface of the insulating layer are located on the same plane. The tip of the protruding portion is a semiconductor device side terminal connected to the electrode of the semiconductor device, and an opening is formed in a portion of the insulating layer opposite to the semiconductor device so as to expose the lead corresponding to each of the leads. A lead frame, wherein an electrode of the lead opposite to the semiconductor element is formed in the opening. 2. A method according to claim 1, wherein a plurality of leads are formed on the three or more metal laminates formed by forming a thick layer and a thin layer via an etching stop layer by the thin layer itself or by another metal layer formed on the thin layer. Forming, and selectively forming an insulating layer having a thickness covering the leads on the lead forming surface side of the metal laminate so as to have at least an opening for exposing the leads; Selectively etching a portion corresponding to a lead formation region where leads are formed with an etchant having a low erosion property with respect to the etching stop layer; and etching at least the etching stop layer using the leads as a mask. An etching step of electrically separating and independing from each other, and a method of manufacturing a lead frame comprising at least: 3. An insulating layer is selectively formed by applying a liquid resin layer having photosensitivity as a material for the insulating layer, and thereafter exposing and developing the resin layer. 2. The method for manufacturing the lead frame according to 2. 4. A plurality of leads are formed on the surface of the insulating layer on the side of the mounting semiconductor element so that the surface of the leads and the surface of the insulating layer are located on the same plane. The tip of the protruding portion is a semiconductor device side terminal connected to the electrode of the semiconductor device, and an opening for exposing it corresponding to each of the leads is formed in a portion of the insulating layer on the side opposite to the semiconductor device. A lead frame in which the anti-semiconductor element side electrode of the lead is formed in the opening; and an insulating layer of the lead frame and a surface on which the lead is formed are adhered on the surface via an adhesive layer, and each electrode is connected to each of the lead frame. A semiconductor element connected to the semiconductor element side terminal of the lead; 5. The semiconductor device according to claim 4, wherein the adhesive layer is made of an elastic buffer adhesive.