JP2845638B2 - Variable gain circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a variable gain circuit.

[0002]

2. Description of the Related Art A conventional variable gain circuit includes an amplifier 15 and a resistor 16 corresponding to a voltage source 14 as shown in FIG.
18 and switches 19 and 20, and the output voltage of the amplifier 15 is configured to be fed back to the negative-phase input side of the amplifier 15 via the resistors 16, 17 and 18.

In the conventional variable gain circuit shown in FIG . 2 , the voltage gain GV1 when the switch 19 is ON and the switch 20 is OFF is given by the following equation.

G _V1 = 1 + R ₁₆ / R ₁₇ (1) When the switch 19 is off and the switch 20 is on, the voltage gain G _V2 is G _V2 = 1 + R ₁₆ / R ₁₈ (2). Further, the voltage gain G _V3 when both the switches 19 and 20 are ON is given by the following equation.

G _V3 = 1 + R ₁₆ · (1 / R ₁₇ + 1 / R ₁₈ ) (3) Therefore, in order to obtain a desired variable gain value, the above (1)
With reference to Equations (3), the resistance values of the resistors 16, 17 and 18 may be appropriately selected and set. For example, these three gains G _V1 , G _V2 and G _V3 are increased by a factor of three,
In order to realize a variable gain circuit that sets the gain to double and octuple, when the resistance value R ₁₆ of the resistor ₁₆ is set to 10 kΩ, the resistance values R ₁₇ and R ₁₈ of the resistors 17 and 18 are set as follows:
It may be set to 5 kΩ and 2 kΩ, respectively.

On the other hand, the GB product of the amplifier 15 used is 10
MHz, the cut-off frequency f _H at each variable gain setting is 3.3 MHz, as shown in FIG.
z, 1.67 MHz and 1.25 MHz. Further, assuming that the input DC offset voltage of the amplifier 15 is 5 mV, the output DC offset voltage at each variable gain setting is 15 mV, 30 mV and 40 mV, respectively.
mV.

[0007]

In the above-described conventional variable gain circuit, the gain is made variable by switching the feedback resistance value including the resistors 16, 17 and 18, so that the cutoff frequency is changed for each variable gain. Since the characteristics also change, for example, there is a drawback that it cannot be used when amplifying a wideband signal such as a video signal.

In addition, since the output offset voltage also changes for each variable gain, when a circuit configuration directly connected to the next-stage circuit is employed, there is a disadvantage that the operating point of a signal to the next-stage circuit changes. .

[0009]

According to the variable gain circuit of the present invention, one of two inputs has a common terminal connected to a voltage input terminal.
The other input is connected to a predetermined reference voltage source.
N (2 or more integer) 2 input 1 output gain selection
The base is commonly connected to the switching circuit and the predetermined reference voltage source
Is also connected to a voltage output terminal with the collector is connected to and supply electricity position through a load resistor, emitter is first
A grounded base preparative <br/> transistor is connected to the ground potential through a constant current source, a collector connected thereto respectively supply potential, and a base corresponding switching among said N SWITCHING circuit each is individually connected to the output terminal of the circuit, before Symbol base contact emitter respectively through the resistor for individual gain setting
It is composed of a N number of emitter follower <br/> transistor connected to the ground potential emitter connection via a separate second constant current source with each of the emitter ground transistor are commonly connected, the N According to the switching circuit
2 ^N -1 types of gain switching and the above-mentioned gain switching
The desired gain can be changed by changing the value of the gain setting resistor.
However, the output of each of the emitter follower transistors
The input voltage is applied to the grounded base through the gain setting resistor.
The current becomes constant by amplifying with a transistor.
Cutoff frequency and output offset according to the load resistance current
Current control means to maintain the
It is characterized in to Rukoto.

[0010]

Next, the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram showing one embodiment of the present invention. As shown in FIG. 1, the present embodiment has an input terminal 51.
And transistors 1 to 3 corresponding to the
Constant current sources 4 to 6, switching circuits 7 and 8, power supply voltage source 9, reference voltage source 10, resistors 11 and 12,
The variable gain circuit includes a load resistor 13 and can select three types of variable gains via the switching circuits 7 and 8.

In FIG. 1, when the switching circuit 7 is connected to the contact a and the switching circuit 8 is connected to the contact b, a differential amplifier circuit including the transistors 1 and 2 is formed. The voltage gain G _V1 of the output voltage of the output terminal 52 corresponding to the input voltage of the input terminal 51 is given by the following equation.

G _V1 = R _L / R ₁₁ (4) where R _L is the resistance value of the load resistor 13 and R 11 is the resistor 11
Is the resistance value.

_[0014] Next, the switching circuit 7 is connected to the b contact side,
When the switching circuit 8 is connected to the contact a side, a differential amplifier circuit including the transistors 2 and 3 is formed, so that the voltage gain G _V2 of the output voltage of the output terminal 52 with respect to the input voltage of the input terminal 51 is provided. Is represented by the following equation.

G _V2 = RL / R ₁₂ (5) In the above equation, R ₁₂ is a resistance value of the resistor 12.

When the switching circuits 7 and 8 are both connected to the contact a, the variable gain is _equal to the gain G _V1 of the differential amplifier circuit including the transistors 2 and 3.
, And the sum of the gain G ₂ of the differential amplifier circuit composed of the transistors 2 and 3, the gain of the output voltage with respect to the input voltage is given by the following equation.

G _V3 = R _L · (1 / R ₁₁ + 1 / R ₁₂ ) (6) Therefore, in order to obtain a desired gain,
The values of the resistance values R _L , R ₁₁ and R ₁₂ may be set with reference to the equations (4) to (6). For example, when the variable gains G _V1 , G _V2 and G _V3 are respectively tripled, six times and nine times, and the load resistance 13 is set to 10 kΩ,
R ₁₁ may be set to 3.3 kΩ and R ₁₂ may be set to 1.67 kΩ. When the switching circuits 7 and 8 are both connected to the b-contact side, it is possible to set the variable gain to 0.

On the other hand, as the frequency characteristic in the embodiment of FIG. 1, the frequency characteristic at the output terminal of the common base circuit in the transistor 2 is dominant, and usually the capacitance between the collector and the base of the transistor 2 ( _CX ). ) and is determined by the load resistor 13 (R _L), the cutoff frequency f _H is obtained as 1 / 2πC _X R _L. Here, since the capacitance C _X is usually a value of about 0.1 to 0.5 pF, when the load resistance 13 is set to R _L = 10 kΩ, the frequency characteristic at which the cutoff frequency becomes about 30 MHz to 50 MHz is obtained. can get. Therefore, G _V1 ,
Even if the voltage gains of G _V2 and G _V3 are set, the capacitance C _X between the collector and the base of the transistor 2 and the load resistance R _L
Are interposed as constant values, so that the cutoff frequency associated therewith is also constant.

The DC offset voltage at the output terminal 52 is a voltage obtained by multiplying the input DC offset voltage ΔV ₁ between the bases of the transistors 1 and 2 by G _{V1 and the} input DC offset voltage between the bases of the transistors 2 and 3. It is given as the sum of the voltage ΔV ₂ and a voltage multiplied by G _V2 . Therefore, even if the voltage gain is changed by changing the setting of the resistance value by the switching circuit, the output terminal 5
The output offset voltage value in 2 is always a constant value.

In the above embodiment, three types of variable gains are set as described above by providing two emitter follower circuits to which the switching circuit is connected. By applying the present invention, the emitter follower circuit to which the switching circuit is connected is set to N (an integer of 2 or more)
By providing the number, (2 ^N −1) types of variable gains can be set.

[0021]

As described above, according to the present invention, a plurality of emitter follower circuits to which a switching circuit for selecting and outputting one of an input voltage and a predetermined reference voltage is connected are provided.
By commonly inputting the output voltage of each emitter follower circuit to one common base circuit via a resistor, even if the voltage gain is variable, the frequency characteristics of the output voltage and the output DC offset voltage do not fluctuate and remain constant. This has the effect of being retained.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing one embodiment of the present invention.

FIG. 2 is a circuit diagram showing a conventional example.

FIG. 3 is a diagram showing an example of frequency characteristics in a conventional example.

[Explanation of symbols]

 1 to 3 transistors 4 to 6 constant current source 7, 8 switching circuit 9 power supply voltage source 10 reference voltage source 11, 12, 16 to 18 resistor 13 load resistor 14 voltage source 15 amplifier 19, 20 switch

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-61-269506 (JP, A) JP-A-59-147514 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H03G 3/10

Claims (1)

(57) [Claims] An input terminal of one of two inputs is a voltage input terminal.
And the other input is connected to a predetermined reference voltage source.
Commonly connected N (2 or more integers) 2-input, 1-output
A switching circuit for gain selection, based on the predetermined reference voltage source
There are commonly connected, is connected to the voltage output terminal with the collector is connected to and supply electric position <br/> through a load resistor, et Mi <br/> jitter is via a first constant current source base that is connected to the ground potential Te
And over scan grounded transistor, a collector connected thereto respectively supply potential, and a base respectively connected individually to the output terminal of the corresponding switching circuit among the N SWITCHING circuit,
Previous through emitter resistors for individual gain setting Symbol
The N emitter connected to the ground potential emitter connection via a separate second constant current source while being commonly connected to the emitter of the common base transistor
Is composed of a follower transistor, the 2 ^N -1 different gain switching and the gain switching by the N switching circuit
A desired gain is obtained by changing the resistance value of the gain setting resistor.
The emitter follower transistor
Each output voltage is connected to the base through the gain setting resistor.
Current with a constant current
Cut-off frequency and output according to the current of the load resistance
Current control to keep the offset voltage constant
Variable gain circuit according to claim Rukoto to have a means.