JP2838403B2 - Printed circuit power circuit - Google Patents
Printed circuit power circuitInfo
- Publication number
- JP2838403B2 JP2838403B2 JP62333835A JP33383587A JP2838403B2 JP 2838403 B2 JP2838403 B2 JP 2838403B2 JP 62333835 A JP62333835 A JP 62333835A JP 33383587 A JP33383587 A JP 33383587A JP 2838403 B2 JP2838403 B2 JP 2838403B2
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- printed circuit
- circuit
- circuit board
- printed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
- H01R12/70—Coupling devices
- H01R12/7088—Arrangements for power supply
Description
【発明の詳細な説明】
〔概要〕
本発明は電源に対し並列接続された複数プリント板を
電源活性状態で着脱できるプリント板電源回路に関し、
電源回路に設けた安定化回路がプリント板挿入時の過
電流の障害を受けないようにすることを目的とし、
各プリント板に形成された論理回路の入力段に安定し
た電圧において過電流を防止する特性をもち、その入力
側と出力側にそれぞれコンデンサを接続した安定化回路
を設け、
該安定化回路の入力側に、プリント板の挿入時の過電
流を抑える抵抗と逆流防止用のダイオードを接続し、
該プリント板の挿入時点より所定時間遅延させて前記
安定化回路の動作を起動する手段を具えた構成とする。
〔産業上の利用分野〕
本発明は電源に対し並列接続された複数プリント板を
電源活性状態で着脱できるプリント板電源回路に関する
ものである。
〔従来の技術〕
従来、直流の共通電源から複数のプリント板の論理回
路に給電するための電源回路の１例を第６図（ａ）に示
す。すなわち、たとえばDC5V電源１から並列接続された
プリント板101，102に対し、同図（ｂ）のコネクタピン
（ピン21,ソケツト21′），，により接続され
る。ピン，間に電源１に対して、直列抵抗Ｒと並列
コンデンサＣを設けて論理回路11が接続される。ピン
は、同図（ｂ）に示すように、短ピンを有し挿入時のタ
イミングに遅延を与えて抵抗Ｒを短絡するように構成さ
れる。この遅延により、電源１を活性状態のままでプリ
ント板10を挿入した場合の過大電流を瞬時抵抗Ｒで抑え
るとともに、遅延ピンの短絡により、ほぼ正常値に近
い状態で効率の良い給電が行なわれる。この場合の遅延
タイミングはRCの時定数に依存する。
〔発明が解決しようとする問題点〕
上記構成により、プリント板がコネクタに挿入された
場合、その挿入の速度によりコンデンサＣへの充電電圧
が異なるため、遅延ピンが接触する時点でコンデンサ
Ｃへの充電が不充分な場合、電位差分による突入電流が
流れ、（１）コネクタピンの破損、（２）電源の電圧低
下、（３）（２）項に基づく他のプリント板の論理回路
の誤動作が発生するおそれがある。
本発明者は、上記の欠点に対処するため、本発明の開
発段階において、第５図（ａ）〜（ｃ）に示す安定化回
路を用いた実施例を提案した。すなわち、同図（ａ）に
示すように、論理回路11の前にコンデンサC2と並列に安
定化回路12を設け、その電源側に抵抗（またはヒユーズ
抵抗）Ｒを設け過電流を抑えるとともにダイオードＤを
挿入して安定化回路12からの逆流を防止する。
安定化回路12は、同図（ｂ）のブロツクに示すよう
に、たとえば、12VDC電源よりDCスイツチング部12−１
でパルスを作り、これを電圧変換部（トランス）12−２
で変圧し、２次側の出力整流部12−３からDC出力電圧を
得るDC−DCコンバータにより構成される。この特性は同
図（ｃ）に示すように、トランスの２次電流をフイード
バツク制御することにより、図示のごとく定電圧の過電
流防止特性をもたせることが容易にできる。すなわち過
電流を最大負荷I0の1.1倍に制限し実線または破線
の特性をもたせる。
このような安定化回路12では、スイッチングスピード
がたとえば20KHZと高速であり、回路の安定性を保つた
めに安定化回路12の前にコンデンサC1を設ける。
以上で原理的には安定化回路12を設けることで、論理
回路11はコネクタ挿入時の過大電流から保護されるが、
実際に適用してみると今度は安定化回路への保護が必要
になつてくる。すなわち、プリント板挿入時コンデンサ
C1，C2への充電電流により多大の突入電流が流れる。安
定化回路そのものはかなりの過電流に耐えられるが、む
しろコネクタピン等を破壊する。
そこで、コンデンサC1，C2への充電電流のタイミング
をずらし、プリント板の挿入時点から遅延させて安定化
回路を動作させるようにすることが考えられる。
本発明の目的は、電源回路に設けた安定化回路がプリ
ント板挿入時の過電流の障害を受けないようにしたこと
である。
〔問題点を解決するための手段〕
前記目的を達成するため、本発明においては、第１図
の原理説明図に示すように、各プリント板101，102等に
形成された論理回路11の入力段に、安定した電圧におい
て過電流を防止する特性をもち、その入力側と出力側に
それぞれコンデンサC1，C2を接続した安定化回路12を設
け、
該安定化回路の入力側に、プリント板の挿入時の過電
流を抑える抵抗Ｒと逆流防止用のダイオードＤを接続
し、
該プリント板の挿入時点より、前記安定化回路の前段
のコンデンサ（C1）を充電し、該コンデンサが所定量充
電された後に該安定化回路の動作を起動することによ
り、該コンデンサC1より遅れて前記コンデンサC2を充電
させる手段14（ON/OFF信号手段）を具えたことを特徴と
するものである。
〔作用〕
前記プリント板の挿入時点より遅延させて安定化回路
を動作させることにより、コンデンサC1，C2に対しずら
して充電されるから過電流は半減することになる。これ
により過電流によるコネクタピン等に対する破損をなく
することができる。なおこの場合論理回路に対する過電
流の保護は安定化回路により万全に行なわれる。
〔実施例〕
第２図（ａ），（ｂ）は本発明の実施例の構成説明図
である。
同図（ａ）において、前述の第５図（ａ）と異なる点
は、安定化回路12の動作時点をプリント板の挿入時点か
ら所定時間遅延させる手段を設けたことである。その実
現手段として第１にはとくに図示しないが外部より所定
時間遅延させてONとする信号を与えることである。第２
には第２図に図示する方法である。すなわち、同図
（ｂ）に示すたとえば４本〜ピンのうち，を短
ピンとし、該短ピンのソケツト側22を短絡したコネクタ
を用意する。この短ピン，に安定化回路12から短絡
により起動する２端子を取り出した回路14を接続する。
プリント板10挿入時、この回路14はコネクタの長ピン
，と短ピン，の差だけ挿入時間が遅延する。
まず、長ピン，が接続した時、ダイオードＤと抵
抗Ｒを介してコンデンサC1が充電され、所定時間遅延後
短ピン，が接続された時安定化回路12が起動され、
第５図（ｃ）の電圧特性と過電流防止特性により論理回
路11に給電が行なわれる。
第３図は本発明の他の実施例の構成説明図である。
同図では、電源をプリント板とともに活性状態で挿入
できるものである。
プリント板対応に電源を複数設けておき、隣接の電源
11，12とプリント板101，102を交差して互いに並列接続
したものである。
そのため、プリント板101内正線のD1とＲの間からD2
を介して電源12の正線に接続し、逆にプリント板102内
正線のD1とＲの間からD2を介して電源11の正線に接続す
る。またプリント板101内負線から電源12の負線に接続
し、プリント板102内負線から電源11の負線に接続す
る。
この場合はコネクタのピンは×2,，,4×２の６
個、ダイオードは２個宛必要となり、交互接続がかなり
複雑となる。
第４図は本発明のさらに他の実施例の構成説明図であ
る。
同図では、電源をプリント板とともに活性状態で挿入
できるものである。
図示のごとく、複数の電源21，22は、AC−DCコンバータ
の安定化回路13を設け、その出力値に直列ダイオードＤ
と並列コンデンサC3を設けたものを収納する。また各プ
リント板内の逆流防止用ダイオードを省く。そして電源
21と電源22の正線，負線をそれぞれ相互に接続する。こ
の構成によればプリント板101，102は第２図と同様の構
成のままで、電源の活性挿入が可能となり、かつ構成を
簡略化できるという利点がある。
〔発明の効果〕
以上説明したように、本発明によれば、プリント板に
収納された論理回路に対し安定化回路を設けて電圧を安
定化し過電流を防止するようにし、さらにこの安定化回
路に対するプリント板挿入時の過電流を減少するととも
に、安定化回路の起動を短ピンコネクタ等により遅延さ
せることにより、過電流による障害をなくすることがで
きるものである。
これらの動作は、電源を活性状態にしたままで、プリ
ント板を挿入することができる。また電源を複数個設け
て隣接プリント板に対し相互に交差接続することによ
り、電源に対しても活性状態で挿入することが可能とな
る。DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a printed circuit board power supply circuit in which a plurality of printed circuit boards connected in parallel to a power supply can be detached in an active state of the power supply. The purpose is to prevent overcurrent faults.The logic circuit formed on each printed circuit board has characteristics to prevent overcurrent at the input stage with a stable voltage, and capacitors are provided on the input side and output side, respectively. Is connected to the input side of the stabilizing circuit, a resistor for suppressing overcurrent when the printed board is inserted and a diode for preventing backflow are connected, and a predetermined time is delayed from the point of time when the printed board is inserted. Means for activating the operation of the stabilizing circuit. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board power supply circuit capable of attaching and detaching a plurality of printed circuit boards connected in parallel to a power supply in a power activated state. [Prior Art] FIG. 6A shows an example of a conventional power supply circuit for supplying power from a common DC power supply to a plurality of printed circuit board logic circuits. That is, for example, the printed circuit boards 10 1 and 10 2 connected in parallel from the DC 5 V power supply 1 are connected by connector pins (pin 21, socket 21 ′) in FIG. A logic circuit 11 is connected to the power supply 1 between the pins by providing a series resistor R and a parallel capacitor C. The pin has a short pin and is configured to delay the timing at the time of insertion and short-circuit the resistor R, as shown in FIG. Due to this delay, an excessive current when the printed circuit board 10 is inserted while the power supply 1 is in an active state is suppressed by the instantaneous resistance R, and efficient power supply is performed in a state close to a normal value due to a short circuit of the delay pin. . The delay timing in this case depends on the RC time constant. [Problems to be Solved by the Invention] According to the above configuration, when a printed board is inserted into a connector, the charging voltage to the capacitor C varies depending on the speed of the insertion. When charging is insufficient, an inrush current flows due to a potential difference, and (1) damage to a connector pin, (2) voltage drop of a power supply, and (3) malfunction of a logic circuit of another printed board based on the item (2). May occur. The present inventor has proposed an embodiment using a stabilizing circuit shown in FIGS. 5A to 5C in the development stage of the present invention in order to address the above-mentioned drawbacks. That is, as shown in FIG. 6 (a), the diode with the provided stabilizing circuit 12 in parallel with the capacitor C 2 in front of the logic circuit 11, suppressing the overcurrent provided its resistance to the power supply (or Hiyuzu resistance) R D is inserted to prevent backflow from the stabilizing circuit 12. As shown in the block of FIG. 2B, the stabilizing circuit 12 is, for example, a DC switching unit 12-1 from a 12 VDC power supply.
To generate a pulse, which is converted to a voltage converter (transformer) 12-2
And a DC-DC converter that obtains a DC output voltage from the secondary-side output rectifier 12-3. As shown in FIG. 4C, by controlling the secondary current of the transformer by feedback, as shown in FIG. 4C, it is possible to easily provide a constant voltage overcurrent prevention characteristic as shown in FIG. That limits the overcurrent 1.1 times the maximum load I 0 impart a solid or broken properties. In such stabilizing circuit 12, a speed switching for example 20KHZ and fast, providing a capacitor C 1 in front of the stabilizing circuit 12 in order to maintain the stability of the circuit. As described above, in principle, by providing the stabilizing circuit 12, the logic circuit 11 is protected from an excessive current when the connector is inserted.
When actually applied, protection of the stabilizing circuit is required. In other words, when inserting the printed board
A large inrush current flows due to the charging current to C 1 and C 2 . The stabilization circuit itself can withstand considerable overcurrent, but rather destroys connector pins and the like. Therefore, it is conceivable to shift the timing of the charging current to the capacitors C 1 and C 2 so as to operate the stabilizing circuit with a delay from the point of insertion of the printed board. SUMMARY OF THE INVENTION It is an object of the present invention to prevent a stabilizing circuit provided in a power supply circuit from being damaged by an overcurrent when a printed board is inserted. [Means for Solving the Problems] To achieve the above object, according to the present invention, as shown in the principle explanatory diagram of FIG. 1 , a logic circuit 11 formed on each of the printed boards 10 1 , 10 2, etc. The input stage has a stabilizing circuit 12 having characteristics to prevent an overcurrent at a stable voltage and having capacitors C 1 and C 2 connected to its input side and output side, respectively, on the input side of the stabilizing circuit. Connecting a resistor R for suppressing overcurrent when a printed board is inserted and a diode D for preventing backflow; charging the capacitor (C 1 ) at the preceding stage of the stabilizing circuit from the time of inserting the printed board; to There by activating the operation of the stabilization circuit after a predetermined amount charged, characterized in that it comprises means 14 (oN / OFF signal means) for charging the capacitor C 2 lags the capacitor C 1 Things. [Operation] By operating the stabilizing circuit with a delay from the time of the insertion of the printed board, the capacitors C 1 and C 2 are charged while being shifted, so that the overcurrent is reduced by half. Thus, damage to the connector pins and the like due to the overcurrent can be eliminated. In this case, overcurrent protection for the logic circuit is completely performed by the stabilization circuit. [Embodiment] FIGS. 2 (a) and 2 (b) are explanatory views of the configuration of an embodiment of the present invention. 5A is different from FIG. 5A in that a means for delaying the operation time of the stabilizing circuit 12 by a predetermined time from the insertion time of the printed board is provided. The first means for realizing this is to supply a signal which is turned on after a predetermined time delay from outside, although not particularly shown. Second
Is a method shown in FIG. That is, a connector is prepared in which, for example, of the four pins shown in FIG. 3B, short pins are used, and the socket side 22 of the short pins is short-circuited. To this short pin, a circuit 14 from which two terminals which are activated by a short circuit from the stabilizing circuit 12 are connected.
When the printed board 10 is inserted, the insertion time of the circuit 14 is delayed by the difference between the long pin and the short pin of the connector. First, when the length pins, connects a capacitor C 1 is charged via the diode D and the resistor R, the short pin after a predetermined time delay, the stabilization circuit 12 when the connected is activated,
Power is supplied to the logic circuit 11 based on the voltage characteristics and overcurrent prevention characteristics shown in FIG. FIG. 3 is an explanatory view of the configuration of another embodiment of the present invention. In the figure, the power supply can be inserted in an active state together with the printed board. Provide multiple power supplies for the printed circuit board, and
1 1, 1 2 intersects the printed circuit board 10 1, 10 2 is obtained by parallel connection with each other. Therefore, D 2 from between the D 1 and R of the printed circuit board 10 1 in the primary line
Via connected to the power supply 1 second positive line, connected to the opposite from between D 1 and R of the printed circuit board 10 2 in the primary line to the power supply 1 1 positive line through a D 2. Also connected from the printed board 10 negative line 1 to the negative line of the power supply 1 2, connected from the printed board 10 in the second negative line power 1 1 negative line. In this case, the connector pins are × 2,.
And two diodes are required, and the alternate connection becomes considerably complicated. FIG. 4 is an explanatory view of the configuration of still another embodiment of the present invention. In the figure, the power supply can be inserted in an active state together with the printed board. As shown, a plurality of power supply 2 1, 2 2, the AC-DC converter of the stabilizing circuit 13 is provided, series diodes D at its output value
Housing the one provided with the parallel capacitor C 3 and. Also, a diode for preventing backflow in each printed board is omitted. And power
2 1 and power 2 2 positive line, connecting the negative line mutually respectively. According to this configuration, there is an advantage that the power supply can be actively inserted and the configuration can be simplified while the printed boards 10 1 and 10 2 remain the same as in FIG. [Effects of the Invention] As described above, according to the present invention, a stabilizing circuit is provided for a logic circuit housed on a printed board to stabilize the voltage and prevent overcurrent, and furthermore, the stabilizing circuit In addition to reducing the overcurrent when the printed circuit board is inserted, the start of the stabilizing circuit is delayed by a short pin connector or the like, so that the failure due to the overcurrent can be eliminated. In these operations, the printed circuit board can be inserted while the power supply is kept active. In addition, by providing a plurality of power supplies and cross-connecting them to adjacent printed circuit boards, it is possible to insert the power supplies in an active state.
【図面の簡単な説明】
第１図は本発明の原理説明図、第２図（ａ），（ｂ）は
本発明の実施例の構成説明図、第３図は本発明の他の実
施例の構成説明図、第４図は本発明の他の実施例の構成
説明図、第５図（ａ）〜（ｃ）は安定化回路を用いた実
施例説明図、第６図（ａ），（ｂ）は従来例の説明図で
あり、図中1,11、12，21、22は電源、10,101，102はプ
リント板、11は論理回路、12,13は安定化回路、21,21′
はコネクタ、22は短絡線、C1，C2はコンデンサ、D,D1，
D2は逆流防止用ダイオード、Ｒは抵抗またはヒユーズ抵
抗を示す。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram illustrating the principle of the present invention, FIGS. 2 (a) and (b) are diagrams illustrating the configuration of an embodiment of the present invention, and FIG. 3 is another embodiment of the present invention. FIG. 4 is an explanatory diagram of a configuration of another embodiment of the present invention, FIGS. 5 (a) to 5 (c) are explanatory diagrams of an embodiment using a stabilizing circuit, and FIGS. (b) is an explanatory view of a conventional example, in the figure 1,1 1, 1 2, 2 1, 2 2 power, 10, 10 1, 10 2 printed board, the logic circuit 11, the 12, 13 Stabilization circuit, 21, 21 '
Is a connector, 22 is a short-circuit wire, C 1 and C 2 are capacitors, D, D 1 ,
D 2 is reverse current preventing diode, R represents shows the resistance or Hiyuzu resistance.
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6，ＤＢ名) H02J 1/00 G05F 1/10──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. 6 , DB name) H02J 1/00 G05F 1/10
Claims (1)
意のプリント板の着脱を電源の活性状態のまま行なうよ
うにしたプリント板電源回路において、 各プリント板に形成された論理回路（11）の入力段に、
安定した電圧において過電流を防止する特性をもち、そ
の入力側と出力側にそれぞれコンデンサ（C1，C2）を接
続した安定化回路（12）を設け、 該安定化回路の入力側に、プリント板の挿入時の過電流
を抑える抵抗と逆流防止用のダイオード（Ｄ）を接続
し、 該プリント板の挿入時点より、前記安定化回路の前段の
コンデンサ（C1）を充電し、該コンデンサが所定量充電
された後に該安定化回路の動作を起動することにより、
該コンデンサC1より遅れて前記コンデンサC2を充電させ
る手段を具えたことを特徴とするプリント板電源回路。 ２．前記安定化回路の動作を起動する手段が、外部より
所定時間遅延させてONとする信号手段であることを特徴
とする特許請求の範囲第１項記載のプリント板電源回
路。 ３．前記安定化回路の動作を起動する手段が、前記プリ
ント板の着脱コネクタに対の短ピンと対応する短絡させ
たソケットとを設け、該対の短ピンを前記安定化回路に
接続し、プリント板の挿入時点から遅延して安定化回路
を起動させるようにしたことを特徴とする特許請求の範
囲第１項記載のプリント板電源回路。 ４．前記電源が各プリント板対応に複数の電源より成
り、前記各プリント板内の抵抗に対しそれぞれ逆流防止
用ダイオードを介し複数の電源と接続するようにしたこ
とを特徴とする特許請求の範囲第１項記載のプリント板
電源回路。 ５．前記電源が各プリント板対応に複数の電源より成
り、該各電源内に交流電源より直流変換し出力側に並列
のコンデンサと逆流防止用ダイオードを有する安定化回
路を有するとともに、プリント板内の逆流防止用ダイオ
ードを省くようにしたことを特徴とする特許請求の範囲
第１項記載のプリント板電源回路。(57) [Claims] An input stage of a logic circuit (11) formed on each printed circuit board in a printed circuit board power supply circuit in which an arbitrary printed circuit board of a plurality of printed circuit boards connected in parallel to a power supply is mounted while the power supply is in an active state. To
A stabilizing circuit (12) having a characteristic of preventing overcurrent at a stable voltage and having capacitors (C 1 , C 2 ) connected to its input and output sides, respectively, is provided on the input side of the stabilizing circuit. A resistor for suppressing overcurrent when a printed circuit board is inserted and a diode (D) for preventing backflow are connected, and from the time of insertion of the printed circuit board, a capacitor (C 1 ) at a preceding stage of the stabilizing circuit is charged. By starting the operation of the stabilization circuit after is charged a predetermined amount,
Printed board power supply circuit, characterized in that it comprises means for charging the capacitor C 2 lags the capacitor C 1. 2. 2. The printed circuit board power supply circuit according to claim 1, wherein the means for activating the operation of the stabilizing circuit is a signal means for turning on after a predetermined time delay from outside. 3. The means for activating the operation of the stabilizing circuit includes a pair of short pins and a corresponding short-circuited socket provided on the detachable connector of the printed board, connecting the pair of short pins to the stabilizing circuit, and 2. The printed circuit board power supply circuit according to claim 1, wherein the stabilization circuit is activated with a delay from the time of insertion. 4. 2. The power supply according to claim 1, wherein the power supply comprises a plurality of power supplies corresponding to each printed circuit board, and a resistance in each of the printed circuit boards is connected to the plurality of power supplies via a backflow prevention diode. Printed circuit board power supply circuit described in the paragraph. 5. The power supply comprises a plurality of power supplies corresponding to each printed circuit board, and each power supply has a stabilization circuit having a parallel capacitor and a backflow prevention diode on the output side which converts DC from an AC power supply, and has a backflow in the printed circuit board. 2. The printed circuit board power supply circuit according to claim 1, wherein the prevention diode is omitted.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62333835A JP2838403B2 (en) | 1987-12-29 | 1987-12-29 | Printed circuit power circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62333835A JP2838403B2 (en) | 1987-12-29 | 1987-12-29 | Printed circuit power circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01177829A JPH01177829A (en) | 1989-07-14 |
| JP2838403B2 true JP2838403B2 (en) | 1998-12-16 |
Family
ID=18270472
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62333835A Expired - Fee Related JP2838403B2 (en) | 1987-12-29 | 1987-12-29 | Printed circuit power circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2838403B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE8903649U1 (en) * | 1989-03-22 | 1990-05-10 | Siemens Ag, 1000 Berlin Und 8000 Muenchen, De | |
| JP4910424B2 (en) * | 2006-03-01 | 2012-04-04 | 株式会社三洋物産 | Game machine |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5075704A (en) * | 1973-11-07 | 1975-06-21 | ||
| JPS5894011U (en) * | 1981-12-18 | 1983-06-25 | 富士通株式会社 | power circuit |
| JPS62126829A (en) * | 1985-11-27 | 1987-06-09 | 株式会社日立製作所 | Rush-current preventing circuit |
-
1987
- 1987-12-29 JP JP62333835A patent/JP2838403B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01177829A (en) | 1989-07-14 |
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| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |